From 42598b541a94d2324ae323610cc11599553d71f2 Mon Sep 17 00:00:00 2001 From: Mark Pizzolato Date: Wed, 18 Jan 2023 11:58:24 -1000 Subject: [PATCH] 3b2: Fix for clock drift when idling When the 3B2 simulator was set to allow idling, there was significant clock drift related to the primary timer unit. It turns out that the simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack` incorrectly. They are not needed with the structure of system timers in the 3B2 architecture. --- 3B2/3b2_stddev.c | 1 - 3B2/3b2_timer.c | 2 -- 2 files changed, 3 deletions(-) diff --git a/3B2/3b2_stddev.c b/3B2/3b2_stddev.c index 14989333..aa47c344 100644 --- a/3B2/3b2_stddev.c +++ b/3B2/3b2_stddev.c @@ -388,7 +388,6 @@ static t_stat tod_svc(UNIT *uptr) sim_activate_after(uptr, 1000000/CLK_TPS); tmr_poll = t; tmxr_poll = t; - AIO_SET_INTERRUPT_LATENCY(tmr_poll * CLK_TPS); return SCPE_OK; } diff --git a/3B2/3b2_timer.c b/3B2/3b2_timer.c index 6c74b540..3b2f515b 100644 --- a/3B2/3b2_timer.c +++ b/3B2/3b2_timer.c @@ -345,8 +345,6 @@ uint32 timer_read(uint32 pa, size_t size) of also clearing pending interrupts */ CSRBIT(CSRCLK, FALSE); CPU_CLR_INT(INT_CLOCK); - /* Acknowledge a clock tick */ - sim_rtcn_tick_ack(1, TMR_CLK); retval = 0; break; default: