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PDP11, VAX: Add MSCP RD33 and various SDI ESE SSD disk types to RQ devices

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This commit is contained in:
Christian Gauger-Cosgrove
2023-11-16 10:32:15 -10:00
committed by Mark Pizzolato
parent 2c0b465275
commit 42d6f414fc
1 changed files with 183 additions and 25 deletions
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208
PDP11/pdp11_rq.c
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@@ -241,23 +241,25 @@ struct rqpkt {
/* The RQDX3 supports multiple disk drive types (x = not implemented): /* The RQDX3 supports multiple disk drive types (x = not implemented):
type sec surf cyl tpg gpc RCT LBNs type sec surf cyl tpg gpc RCT LBNs notes
type sec surf cyl tpg gpc RCT LBNs notes
RX18 9 1 40 9 1 - 360
RX50 10 1 80 5 16 - 800 RX50 10 1 80 5 16 - 800
RX33 15 2 80 2 1 - 2400 RX33 15 2 80 2 1 - 2400
RD51 18 4 306 4 1 36*4 21600 x RD50 17 4 153 ? ? ? ? Seagate ST-506
RD31 17 4 615 4 1 3*8 41560 RD51 18 4 306 4 1 36*4 21600 Seagate ST-412
RD52 17 8 512 8 1 4*8 60480 RD31 17 4 615 4 1 3*8 41560 Seagate ST-225
RD32 17 6 820 6 1 4*8 83204 RD52 17 8 512 8 1 4*8 60480 Quantum 540, ATASI 3046, Evotek ET3540
x RD33 17 7 1170 ? ? ? 138565 RD32 17 6 820 6 1 4*8 83204 Seagate ST-251
RD53 17 8 1024 8 1 5*8 138672 RD33 17 7 1170 ? ? ? 138565 Microscience HH-1090
RD54 17 15 1225 15 1 7*8 311200 RD53 17 8 1024 8 1 5*8 138672 Micropolis 1325, Micropolis 1335
RD54 17 15 1225 15 1 7*8 311200 Maxtor XT-2190
The simulator also supports larger drives that only existed The simulator also supports larger drives that only existed
on SDI controllers. on SDI controllers (UDA50/UDA50A, KDA50, KDB50).
RA60 42(+1) 6 1600 6 1 1008 400176 RA60 42(+1) 6 1600 6 1 1008 400176
x RA70 33(+1) 11 1507+ 11 1 ? 547041 RA70 33(+1) 11 1507+ 11 1 ? 547041
RA80 31 14 559 ? ? ? 237212 RA80 31 14 559 ? ? ? 237212
RA81 51(+1) 14 1258 14 1 2856 891072 RA81 51(+1) 14 1258 14 1 2856 891072
RA82 57(+1) 15 1435 15 1 3420 1216665 RA82 57(+1) 15 1435 15 1 3420 1216665
@@ -265,12 +267,33 @@ x RA70 33(+1) 11 1507+ 11 1 ? 547041
RA72 51(+1) 20 1921 20 1 2040 1953300 RA72 51(+1) 20 1921 20 1 2040 1953300
RA90 69(+1) 13 2656 13 1 1794 2376153 RA90 69(+1) 13 2656 13 1 1794 2376153
RA92 73(+1) 13 3101 13 1 949 2940951 RA92 73(+1) 13 3101 13 1 949 2940951
x RA73 70(+1) 21 2667+ 21 1 ? 3920490 RA73 70(+1) 21 2667+ 21 1 ? 3920490
ESE20 4 128 480 ? ? ? 245760
ESE52 4 128 465 ? ? ? 238080
ESE56 4 128 465 ? ? ? 1196544
ESE58 4 128 465 ? ? ? 1915392
LESI attached RC25 disks (one removable, one fixed) LESI attached RC25 disks (one removable, one fixed)
type sec surf cyl tpg gpc RCT LBNs type sec surf cyl tpg gpc RCT LBNs
RC25 31 2 821 ? ? ? 50902 RC25 31 2 821 ? ? ? 50902
RCF25 31 2 821 ? ? ? 50902 RCF25 31 2 821 ? ? ? 50902
DSSI attached ISEs, as the simulation currently stands the DSSI
devices are accessed in a pseudo-KFQSA manner -- the ISEs are
accessed as Storage System Port (SSP) devices, like the RQDX3 or
UDA50/KDA50; however the exact function of the KFQSA is not, neither
are the SHAC or EDA640 controllers.
type sec surf cyl tpg gpc RCT LBNs
RF30 37 6 1320 ? ? ? 293040
RF31 50 8 1861 ? ? ? 744400
RF35 57 14 1861 ? ? ? 1485078
x RF36 ? ? ? ? ? ? ?
RF71 37 16 1320 ? ? ? 781440
RF72 50 21 1861 ? ? ? 1954050
RF73 71 21 2621 ? ? ? 3907911
x RF74 ? ? ? ? ? ? ?
x RF75 ? ? ? ? ? ? ?
Each drive can be a different type. The drive field in the Each drive can be a different type. The drive field in the
unit flags specified the drive type and thus, indirectly, unit flags specified the drive type and thus, indirectly,
@@ -285,6 +308,27 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define RQDF_RC DRVFL_TYPE_RC /* RC drive */ #define RQDF_RC DRVFL_TYPE_RC /* RC drive */
/* The RX18 information comes from the VT-180 Series Technical Manual
* (EK-VT18X-TM-001) and from the MSCP specification document as well as
* references in the RSX-11/M+ documentation to the RX18 existing as a
* device attachable to the RUX50.
*/
#define RX18_DTYPE 33
#define RX18_SECT 9
#define RX18_SURF 1
#define RX18_CYL 40
#define RX18_TPG RD33_SURF
#define RX18_GPC 1
#define RX18_XBN 0
#define RX18_DBN 0
#define RX18_LBN 360
#define RX18_RCTS 0
#define RX18_RCTC 0
#define RX18_RBN 0
#define RX18_MOD 17
#define RX18_MED 0x25658012
#define RX18_FLGS RQDF_RMV
#define RX50_SECT 10 #define RX50_SECT 10
#define RX50_SURF 1 #define RX50_SURF 1
#define RX50_CYL 80 #define RX50_CYL 80
@@ -541,6 +585,24 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define RD32_MED 0x25644020 #define RD32_MED 0x25644020
#define RD32_FLGS RQDF_MFM #define RD32_FLGS RQDF_MFM
/* The RD33 information comes from the Ultrix-32 v4.5 disktab file and
* from Phil Budne's "dec.disks" file.
*/
#define RD33_SECT 17
#define RD33_SURF 7
#define RD33_CYL 1170
#define RD33_TPG RD33_SURF
#define RD33_GPC 1
#define RD33_XBN 54
#define RD33_DBN 65
#define RD33_LBN 138635
#define RD33_RCTS 5
#define RD33_RCTC 8
#define RD33_RBN 317
#define RD33_MOD 24
#define RD33_MED 0x25644021
#define RD33_FLGS 0
#define RC25_SECT 50 /* */ #define RC25_SECT 50 /* */
#define RC25_SURF 8 #define RC25_SURF 8
#define RC25_CYL 1260 /* */ #define RC25_CYL 1260 /* */
@@ -713,6 +775,76 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define RF73_MED 0x22646049 #define RF73_MED 0x22646049
#define RF73_FLGS RQDF_DSSI /* DSSI drive */ #define RF73_FLGS RQDF_DSSI /* DSSI drive */
/* The ESE20 and the ESE5x information comes from the "ESE50 Solid State
* Disk User Guide" (EK-ESE50-UG.B01), and the "ESE20 Solid State Disk"
* brochure.
*
* The ESE5x models are named using their "media name" from the MSCP
* reference document.
*/
#define ESE20_SECT 4
#define ESE20_SURF 128
#define ESE20_CYL 480
#define ESE20_TPG ESE20_SURF
#define ESE20_GPC 1
#define ESE20_XBN 0
#define ESE20_DBN 0
#define ESE20_LBN 245760
#define ESE20_RCTS 0
#define ESE20_RCTC 1
#define ESE20_RBN 0
#define ESE20_MOD 25
#define ESE20_MED 0x254B3294
#define ESE20_FLGS RQDF_SDI
#define ESE52_SECT 4
#define ESE52_SURF 128
#define ESE52_CYL 465
#define ESE52_TPG ESE52_SURF
#define ESE52_GPC 1
#define ESE52_XBN 0
#define ESE52_DBN 0
#define ESE52_LBN 238080
#define ESE52_RCTS 0
#define ESE52_RCTC 1
#define ESE52_RBN 0
#define ESE52_MOD 31
#define ESE52_MED 0x254B32B4
#define ESE52_FLGS RQDF_SDI
#define ESE56_SECT 4
#define ESE56_SURF 128
#define ESE56_CYL 2337
#define ESE56_TPG ESE56_SURF
#define ESE56_GPC 1
#define ESE56_XBN 0
#define ESE56_DBN 0
#define ESE56_LBN 1196544
#define ESE56_RCTS 0
#define ESE56_RCTC 1
#define ESE56_RBN 0
#define ESE56_MOD 48
#define ESE56_MED 0x254B32B8
#define ESE56_FLGS RQDF_SDI
#define ESE58_SECT 4
#define ESE58_SURF 128
#define ESE58_CYL 3741
#define ESE58_TPG ESE58_SURF
#define ESE58_GPC 1
#define ESE58_XBN 0
#define ESE58_DBN 0
#define ESE58_LBN 1915392
#define ESE58_RCTS 0
#define ESE58_RCTC 1
#define ESE58_RBN 0
#define ESE58_MOD 49
#define ESE58_MED 0x254B32BA
#define ESE58_FLGS RQDF_SDI
/* Controller parameters */ /* Controller parameters */
#define CBUS_QBUS 1 #define CBUS_QBUS 1
#define CBUS_UNIBUS 2 #define CBUS_UNIBUS 2
@@ -730,10 +862,10 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define RUX50_MODEL 10 #define RUX50_MODEL 10
#define RUX50_BUSES CBUS_UNIBUS #define RUX50_BUSES CBUS_UNIBUS
#define UDA50_CTYPE 3 // UNIBUS SDI (RAxx) controller #define UDA50A_CTYPE 3 // UNIBUS SDI (RAxx) controller
#define UDA50_UQPM 6 #define UDA50A_UQPM 6
#define UDA50_MODEL 6 #define UDA50A_MODEL 6
#define UDA50_BUSES CBUS_UNIBUS #define UDA50A_BUSES CBUS_UNIBUS
#define RQDX3_CTYPE 4 // QBUS RX50/RDxx controller #define RQDX3_CTYPE 4 // QBUS RX50/RDxx controller
#define RQDX3_UQPM 19 #define RQDX3_UQPM 19
@@ -765,6 +897,15 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define KDB50_MODEL 18 #define KDB50_MODEL 18
#define KDB50_BUSES CBUS_QBUS #define KDB50_BUSES CBUS_QBUS
#define RQDX4_CTYPE 10 // QBUS RXxx/RDxx controller
#define RQDX4_UQPM 20 // CSS, Reading Special
#define RQDX4_MODEL 20
#define RQDX4_BUSES CBUS_QBUS
#define UDA50_CTYPE 11 // Old UNIBUS SDI (RAxx) controller
#define UDA50_UQPM 2
#define UDA50_MODEL 2
#define UDA50_BUSES CBUS_UNIBUS
#define RQ_DRV(d) \ #define RQ_DRV(d) \
@@ -782,10 +923,12 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define RQ_SIZE(d) d##_LBN #define RQ_SIZE(d) d##_LBN
static DRVTYP drv_tab[] = { static DRVTYP drv_tab[] = {
RQ_DRV (RX18),
RQ_DRV (RX50), RQ_DRV (RX50),
RQ_DRV (RX33), RQ_DRV (RX33),
RQ_DRV (RD51), RQ_DRV (RD51),
RQ_DRV (RD31), RQ_DRV (RD31),
RQ_DRV (RD33),
RQ_DRV (RD52), RQ_DRV (RD52),
RQ_DRV (RD53), RQ_DRV (RD53),
RQ_DRV (RD54), RQ_DRV (RD54),
@@ -808,6 +951,10 @@ static DRVTYP drv_tab[] = {
RQ_DRV (RF71), RQ_DRV (RF71),
RQ_DRV (RF72), RQ_DRV (RF72),
RQ_DRV (RF73), RQ_DRV (RF73),
RQ_DRV (ESE20),
RQ_DRV (ESE52),
RQ_DRV (ESE56),
RQ_DRV (ESE58),
RQ_DRV_A (RA8U, RAUSER), RQ_DRV_A (RA8U, RAUSER),
{ 0 } { 0 }
}; };
@@ -826,13 +973,15 @@ static struct ctlrtyp ctlr_tab[] = {
{ 0, 0, 0, "DEFAULT" }, { 0, 0, 0, "DEFAULT" },
RQ_CTLR (KLESI), RQ_CTLR (KLESI),
RQ_CTLR (RUX50), RQ_CTLR (RUX50),
RQ_CTLR (UDA50), RQ_CTLR (UDA50A),
RQ_CTLR (RQDX3), RQ_CTLR (RQDX3),
RQ_CTLR (KDA50), RQ_CTLR (KDA50),
RQ_CTLR (KRQ50), RQ_CTLR (KRQ50),
RQ_CTLR (KRU50), RQ_CTLR (KRU50),
RQ_CTLR (RQDX1), RQ_CTLR (RQDX1),
RQ_CTLR (KDB50), RQ_CTLR (KDB50),
RQ_CTLR (RQDX4),
RQ_CTLR (UDA50),
{ 0 } { 0 }
}; };
@@ -1054,13 +1203,19 @@ MTAB rq_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, RQ_SH_ALL, "ALL", NULL, { MTAB_XTD|MTAB_VDV|MTAB_NMO, RQ_SH_ALL, "ALL", NULL,
NULL, &rq_show_ctrl, NULL, "Display complete controller state" }, NULL, &rq_show_ctrl, NULL, "Display complete controller state" },
{ MTAB_XTD|MTAB_VDV, RQDX1_CTYPE, NULL, "RQDX1", { MTAB_XTD|MTAB_VDV, RQDX1_CTYPE, NULL, "RQDX1",
&rq_set_ctype, NULL, NULL, "Set RQDX1 (QBUS RX50/RDnn) Controller Type" }, &rq_set_ctype, NULL, NULL, "Set RQDX1/2 (QBUS RX50/RDnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, RQDX3_CTYPE, NULL, "RQDX3", { MTAB_XTD|MTAB_VDV, RQDX3_CTYPE, NULL, "RQDX3",
&rq_set_ctype, NULL, NULL, "Set RQDX3 (QBUS RX50/RDnn) Controller Type" }, &rq_set_ctype, NULL, NULL, "Set RQDX3 (QBUS RX50/RDnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, RQDX4_CTYPE, NULL, "RQDX4",
&rq_set_ctype, NULL, NULL, "Set RQDX4 (QBUS RX50/RDnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, UDA50_CTYPE, NULL, "UDA50", { MTAB_XTD|MTAB_VDV, UDA50_CTYPE, NULL, "UDA50",
&rq_set_ctype, NULL, NULL, "Set UDA50 (UNIBUS SDI RAnn) Controller Type" }, &rq_set_ctype, NULL, NULL, "Set UDA50 (UNIBUS SDI RAnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, UDA50A_CTYPE, NULL, "UDA50A",
&rq_set_ctype, NULL, NULL, "Set UDA50A (UNIBUS SDI RAnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, KDA50_CTYPE, NULL, "KDA50", { MTAB_XTD|MTAB_VDV, KDA50_CTYPE, NULL, "KDA50",
&rq_set_ctype, NULL, NULL, "Set KDA50 (QBUS SDI RAnn) Controller Type" }, &rq_set_ctype, NULL, NULL, "Set KDA50 (QBUS SDI RAnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, KDB50_CTYPE, NULL, "KDB50",
&rq_set_ctype, NULL, NULL, "Set KDB50 (QBUS SDI RAnn) Controller Type" },
{ MTAB_XTD|MTAB_VDV, KRQ50_CTYPE, NULL, "KRQ50", { MTAB_XTD|MTAB_VDV, KRQ50_CTYPE, NULL, "KRQ50",
&rq_set_ctype, NULL, NULL, "Set KRQ50 (QBUS CDROM) Controller Type" }, &rq_set_ctype, NULL, NULL, "Set KRQ50 (QBUS CDROM) Controller Type" },
{ MTAB_XTD|MTAB_VDV, KRU50_CTYPE, NULL, "KRU50", { MTAB_XTD|MTAB_VDV, KRU50_CTYPE, NULL, "KRU50",
@@ -2834,7 +2989,7 @@ MSC *cp = rq_ctxmap[uptr->cnum];
if (val < 0) if (val < 0)
return SCPE_ARG; return SCPE_ARG;
if ((ctlr_tab[val].buses & (UNIBUS? CBUS_UNIBUS : CBUS_QBUS)) == 0) if ((ctlr_tab[val].buses & (UNIBUS? CBUS_UNIBUS : CBUS_QBUS)) == 0)
return sim_messagef (SCPE_ARG, "%s: %s controller not valid on a %s system\n", uptr->dptr->name, ctlr_tab[val].name, (UNIBUS? "Unibus" : "Qbus" )); return sim_messagef (SCPE_ARG, "%s: %s controller not valid on a %s system\n", uptr->dptr->name, ctlr_tab[val].name, (UNIBUS? "Unibus" : "Qbus" ));
cp->ctype = val; cp->ctype = val;
return SCPE_OK; return SCPE_OK;
} }
@@ -2908,7 +3063,7 @@ if (cp->ctype == DEFAULT_CTYPE)
#if defined (VAX_610) #if defined (VAX_610)
cp->ctype = RQDX1_CTYPE; cp->ctype = RQDX1_CTYPE;
#else #else
cp->ctype = (UNIBUS? UDA50_CTYPE : RQDX3_CTYPE); cp->ctype = (UNIBUS? UDA50A_CTYPE : RQDX3_CTYPE);
#endif #endif
if ((ctlr_tab[cp->ctype].buses & (UNIBUS? CBUS_UNIBUS : CBUS_QBUS)) == 0) { if ((ctlr_tab[cp->ctype].buses & (UNIBUS? CBUS_UNIBUS : CBUS_QBUS)) == 0) {
@@ -3235,11 +3390,14 @@ return SCPE_OK;
t_stat rq_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr) t_stat rq_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
{ {
fprintf (st, "UDA50 MSCP Disk Controller (%s)\n\n", dptr->name); MSC *cp = rq_ctxmap[dptr->units->cnum];
fprintf (st, "%s MSCP Disk Controller (%s)\n\n", ctlr_tab[cp->ctype].name, dptr->name);
fprintf (st, "The simulator implements four MSCP disk controllers, RQ, RQB, RQC, RQD.\n"); fprintf (st, "The simulator implements four MSCP disk controllers, RQ, RQB, RQC, RQD.\n");
fprintf (st, "Initially, RQB, RQC, and RQD are disabled. Each RQ controller simulates\n"); fprintf (st, "Initially, RQB, RQC, and RQD are disabled. Each RQ controller simulates\n");
fprintf (st, "an MSCP disk controller with four drives. The MSCP controller type can be\n"); fprintf (st, "an MSCP disk controller with four drives. The MSCP controller type can be\n");
fprintf (st, "specified as one of RQDX1, RQDX3, UDA50, KDA50, KRQ50, KLESI or RUX50.\n"); fprintf (st, "specified as one of RQDX1, RQDX3, UDA50A, UDA50, KDA50, KRQ50, KRU50,\n");
fprintf (st, "KDB50, RQDX4 or RUX50.\n\n");
fprintf (st, "RQ options include the ability to set units write enabled or write locked,\n"); fprintf (st, "RQ options include the ability to set units write enabled or write locked,\n");
fprintf (st, "and to set the drive type to one of many disk types:\n"); fprintf (st, "and to set the drive type to one of many disk types:\n");
fprint_set_help (st, dptr); fprint_set_help (st, dptr);