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MicroVAX2: Added new video device (VCB02)

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This commit is contained in:
Matt Burke
2019-04-10 22:01:52 -07:00
committed by Mark Pizzolato
parent dfd011a9b3
commit 4babf7f529
18 changed files with 4554 additions and 73 deletions
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15
VAX/vax630_defs.h
View File

@@ -91,7 +91,7 @@
/* CPU */
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "MODEL", "MODEL={MicroVAX|VAXStation}", \
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "MODEL", "MODEL={MicroVAX|VAXStation|VAXStationGPX}", \
&cpu_set_model, &cpu_show_model, NULL, "Set/Show the simulator CPU Model" }, \
{ MTAB_XTD|MTAB_VDV, 0, "DIAG", "DIAG={FULL|MIN}", \
&sysd_set_diag, &sysd_show_diag, NULL, "Set/Show boot rom diagnostic mode" }, \
@@ -136,8 +136,10 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, CONST void* desc
#define ROMSIZE (1u << ROMAWIDTH) /* ROM length */
#define ROMAMASK (ROMSIZE - 1) /* ROM addr mask */
#define ROMBASE 0x20040000 /* ROM base */
#define ADDR_IS_ROM(x) ((((uint32) (x)) >= ROMBASE) && \
(((uint32) (x)) < (ROMBASE + ROMSIZE + ROMSIZE)))
#define ADDR_IS_ROM(x) (((((uint32) (x)) >= ROMBASE) && \
(((uint32) (x)) < (ROMBASE + ROMSIZE + ROMSIZE))) || \
((((uint32) (x)) >= QDMBASE) && \
(((uint32) (x)) < (QDMBASE + QDMSIZE + QDMSIZE))))
/* KA630 board registers */
@@ -178,6 +180,13 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, CONST void* desc
#define QVMAMASK (QVMSIZE - 1) /* QVSS mem addr mask */
#define QVMBASE 0x303C0000 /* QVSS mem base */
/* QDSS memory space */
#define QDMAWIDTH 16 /* QDSS mem addr width */
#define QDMSIZE (1u << QDMAWIDTH) /* QDSS mem length */
#define QDMAMASK (QDMSIZE - 1) /* QDSS mem addr mask */
#define QDMBASE 0x303F0000 /* QDSS mem base */
/* Other address spaces */
#define ADDR_IS_CDG(x) (0)

32
VAX/vax630_io.c
View File

@@ -74,6 +74,7 @@ int32 qb_map[QBNMAPR] = { 0 }; /* map registers */
int32 autcon_enb = 1; /* autoconfig enable */
extern int32 ka_mser; /* KA630 mem sys err */
extern int32 sys_model;
t_stat dbl_rd (int32 *data, int32 addr, int32 access);
t_stat dbl_wr (int32 data, int32 addr, int32 access);
@@ -90,6 +91,11 @@ t_stat qba_show_virt (FILE *of, UNIT *uptr, int32 val, CONST void *desc);
t_stat qba_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
const char *qba_description (DEVICE *dptr);
extern int32 va_mem_rd (int32 pa);
extern void va_mem_wr (int32 pa, int32 val, int32 lnt);
extern int32 vc_mem_rd (int32 pa);
extern void vc_mem_wr (int32 pa, int32 val, int32 lnt);
/* Qbus adapter data structures
qba_dev QBA device descriptor
@@ -460,8 +466,18 @@ int32 qbmem_rd (int32 pa)
int32 qa = pa & QBMAMASK; /* Qbus addr */
uint32 ma;
#if !defined(VAX_620)
if (sys_model == 1) { /* VAXstation II? */
if ((pa >= QVMBASE) && (pa < QVMBASE+QVMSIZE))
return vc_mem_rd (pa); /* read QVSS */
}
else if (sys_model == 2) { /* VAXstation II/GPX? */
if ((pa >= QDMBASE) && (pa < QDMBASE+QDMSIZE))
return va_mem_rd (pa); /* read QDSS */
}
#endif
if (qba_map_addr (qa, &ma)) { /* map addr */
return M[ma >> 2];
return ReadW (ma);
}
MACH_CHECK (MCHK_READ); /* err? mcheck */
return 0;
@@ -472,6 +488,18 @@ void qbmem_wr (int32 pa, int32 val, int32 lnt)
int32 qa = pa & QBMAMASK; /* Qbus addr */
uint32 ma;
#if !defined(VAX_620)
if (sys_model == 1) { /* VAXstation II? */
if ((pa >= QVMBASE) && (pa < QVMBASE+QVMSIZE))
vc_mem_wr (pa, val, lnt); /* write QVSS */
return;
}
else if (sys_model == 2) { /* VAXstation II/GPX? */
if ((pa >= QDMBASE) && (pa < QDMBASE+QDMSIZE))
va_mem_wr (pa, val, lnt); /* write QDSS */
return;
}
#endif
if (qba_map_addr (qa, &ma)) { /* map addr */
if (lnt < L_LONG) {
int32 sc = (pa & 3) << 3;
@@ -479,7 +507,7 @@ if (qba_map_addr (qa, &ma)) { /* map addr */
int32 t = M[ma >> 2];
val = ((val & mask) << sc) | (t & ~(mask << sc));
}
M[ma >> 2] = val;
WriteW (ma, val);
}
else mem_err = 1;
return;

133
VAX/vax630_sysdev.c
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@@ -123,7 +123,7 @@ CTAB vax630_cmd[] = {
extern UNIT clk_unit;
extern int32 tmr_poll;
extern DEVICE vc_dev, lk_dev, vs_dev;
extern DEVICE va_dev, vc_dev, lk_dev, vs_dev;
uint32 *rom = NULL; /* boot ROM */
uint8 *nvr = NULL; /* non-volatile mem */
@@ -165,8 +165,6 @@ extern int32 qbmap_rd (int32 pa);
extern void qbmap_wr (int32 pa, int32 val, int32 lnt);
extern int32 qbmem_rd (int32 pa);
extern void qbmem_wr (int32 pa, int32 val, int32 lnt);
extern int32 vc_mem_rd (int32 pa);
extern void vc_mem_wr (int32 pa, int32 val, int32 lnt);
extern int32 wtc_rd (int32 pa);
extern void wtc_wr (int32 pa, int32 val, int32 lnt);
extern void wtc_set_valid (void);
@@ -696,17 +694,15 @@ struct reglink { /* register linkage */
uint32 high; /* high addr */
int32 (*read)(int32 pa); /* read routine */
void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
int32 width; /* data path width */
};
struct reglink regtable[] = {
{ QBMAPBASE, QBMAPBASE+QBMAPSIZE, &qbmap_rd, &qbmap_wr },
{ ROMBASE, ROMBASE+ROMSIZE+ROMSIZE, &rom_rd, NULL },
{ NVRBASE, NVRBASE+NVRASIZE, &nvr_rd, &nvr_wr },
{ KABASE, KABASE+KASIZE, &ka_rd, &ka_wr },
#if !defined(VAX_620)
{ QVMBASE, QVMBASE+QVMSIZE, &vc_mem_rd, &vc_mem_wr },
#endif
{ QBMBASE, QBMBASE+QBMSIZE, &qbmem_rd, &qbmem_wr },
{ QBMAPBASE, QBMAPBASE+QBMAPSIZE, &qbmap_rd, &qbmap_wr, L_LONG },
{ ROMBASE, ROMBASE+ROMSIZE+ROMSIZE, &rom_rd, NULL, L_LONG },
{ NVRBASE, NVRBASE+NVRASIZE, &nvr_rd, &nvr_wr, L_LONG },
{ KABASE, KABASE+KASIZE, &ka_rd, &ka_wr, L_LONG },
{ QBMBASE, QBMBASE+QBMSIZE, &qbmem_rd, &qbmem_wr, L_WORD },
{ 0, 0, NULL, NULL }
};
@@ -722,10 +718,18 @@ struct reglink regtable[] = {
int32 ReadReg (uint32 pa, int32 lnt)
{
struct reglink *p;
int32 val;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->read)
return p->read (pa);
if ((pa >= p->low) && (pa < p->high) && p->read) {
val = p->read (pa);
if (p->width < L_LONG) {
if (lnt < L_LONG)
val = val << ((pa & 2)? 16: 0);
else val = (p->read (pa + 2) << 16) | val;
}
return val;
}
}
MACH_CHECK (MCHK_READ);
@@ -742,9 +746,27 @@ MACH_CHECK (MCHK_READ);
int32 ReadRegU (uint32 pa, int32 lnt)
{
if (lnt == L_BYTE)
return ReadReg (pa & ~03, L_LONG);
return (ReadReg (pa & ~03, L_WORD) & WMASK) | (ReadReg ((pa & ~03) + 2, L_WORD) & (WMASK << 16));
struct reglink *p;
int32 val;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->read) {
if (p->width < L_LONG) {
val = p->read (pa);
if ((lnt + (pa & 1)) <= 2)
val = val << ((pa & 2)? 16: 0);
else val = (p->read (pa + 2) << 16) | val;
}
else {
if (lnt == L_BYTE)
val = p->read (pa & ~03);
else val = (p->read (pa & ~03) & WMASK) | (p->read ((pa & ~03) + 2) & (WMASK << 16));
}
return val;
}
}
MACH_CHECK (MCHK_READ);
}
/* WriteReg - write register space
@@ -763,7 +785,11 @@ struct reglink *p;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->write) {
p->write (pa, val, lnt);
if (lnt > p->width) {
p->write (pa, val & WMASK, L_WORD);
p->write (pa + 2, (val >> 16) & WMASK, L_WORD);
}
else p->write (pa, val, lnt);
return;
}
}
@@ -783,12 +809,48 @@ MACH_CHECK (MCHK_WRITE);
void WriteRegU (uint32 pa, int32 val, int32 lnt)
{
int32 sc = (pa & 03) << 3;
int32 dat = ReadReg (pa & ~03, L_LONG);
struct reglink *p;
dat = (dat & ~(insert[lnt] << sc)) | ((val & insert[lnt]) << sc);
WriteReg (pa & ~03, dat, L_LONG);
return;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->write) {
if (p->width < L_LONG) {
switch (lnt) {
case L_BYTE: /* byte */
p->write (pa, val & BMASK, L_BYTE);
break;
case L_WORD: /* word */
if (pa & 1) { /* odd addr? */
p->write (pa, val & BMASK, L_BYTE);
p->write (pa + 1, (val >> 8) & BMASK, L_BYTE);
}
else p->write (pa, val & WMASK, L_WORD);
break;
case 3: /* tribyte */
if (pa & 1) { /* odd addr? */
p->write (pa, val & BMASK, L_BYTE); /* byte then word */
p->write (pa + 1, (val >> 8) & WMASK, L_WORD);
}
else { /* even */
p->write (pa, val & WMASK, WRITE); /* word then byte */
p->write (pa + 2, (val >> 16) & BMASK, L_BYTE);
}
break;
}
}
else if (p->read) {
int32 sc = (pa & 03) << 3;
int32 dat = p->read (pa & ~03);
dat = (dat & ~(insert[lnt] << sc)) | ((val & insert[lnt]) << sc);
p->write (pa & ~03, dat, L_LONG);
}
return;
}
}
MACH_CHECK (MCHK_WRITE);
}
/* KA630 registers */
@@ -1012,6 +1074,7 @@ if (MATCH_CMD(gbuf, "MICROVAX") == 0) {
sys_model = 0;
#if defined(USE_SIM_VIDEO) && defined(HAVE_LIBSDL)
vc_dev.flags = vc_dev.flags | DEV_DIS; /* disable QVSS */
va_dev.flags = va_dev.flags | DEV_DIS; /* disable QDSS */
lk_dev.flags = lk_dev.flags | DEV_DIS; /* disable keyboard */
vs_dev.flags = vs_dev.flags | DEV_DIS; /* disable mouse */
#endif
@@ -1022,6 +1085,7 @@ else if (MATCH_CMD(gbuf, "VAXSTATION") == 0) {
#if defined(USE_SIM_VIDEO) && defined(HAVE_LIBSDL)
sys_model = 1;
vc_dev.flags = vc_dev.flags & ~DEV_DIS; /* enable QVSS */
va_dev.flags = va_dev.flags | DEV_DIS; /* disable QDSS */
lk_dev.flags = lk_dev.flags & ~DEV_DIS; /* enable keyboard */
vs_dev.flags = vs_dev.flags & ~DEV_DIS; /* enable mouse */
strcpy (sim_name, "VAXStation II (KA630)");
@@ -1030,6 +1094,19 @@ else if (MATCH_CMD(gbuf, "VAXSTATION") == 0) {
return sim_messagef(SCPE_ARG, "Simulator built without Graphic Device Support\n");
#endif
}
else if (MATCH_CMD(gbuf, "VAXSTATIONGPX") == 0) {
#if defined(USE_SIM_VIDEO) && defined(HAVE_LIBSDL)
sys_model = 2;
vc_dev.flags = vc_dev.flags | DEV_DIS; /* disable QVSS */
va_dev.flags = va_dev.flags & ~DEV_DIS; /* enable QDSS */
lk_dev.flags = lk_dev.flags & ~DEV_DIS; /* enable keyboard */
vs_dev.flags = vs_dev.flags & ~DEV_DIS; /* enable mouse */
strcpy (sim_name, "VAXStation II/GPX (KA630)");
reset_all (0); /* reset everything */
#else
return sim_messagef(SCPE_ARG, "Simulator built without Graphic Device Support");
#endif
}
else
return SCPE_ARG;
return SCPE_OK;
@@ -1040,7 +1117,17 @@ t_stat cpu_print_model (FILE *st)
#if defined(VAX_620)
fprintf (st, "rtVAX 1000");
#else
fprintf (st, (sys_model ? "VAXstation II" : "MicroVAX II"));
switch (sys_model) {
case 0:
fprintf (st, "MicroVAX II");
break;
case 1:
fprintf (st, "VAXstation II");
break;
case 2:
fprintf (st, "VAXstation II/GPX");
break;
}
#endif
return SCPE_OK;
}

2
VAX/vax630_syslist.c
View File

@@ -66,6 +66,7 @@ extern DEVICE tq_dev;
extern DEVICE dz_dev;
extern DEVICE xq_dev, xqb_dev;
extern DEVICE vh_dev;
extern DEVICE va_dev;
extern DEVICE vc_dev;
extern DEVICE lk_dev;
extern DEVICE vs_dev;
@@ -87,6 +88,7 @@ DEVICE *sim_devices[] = {
&cr_dev,
&lpt_dev,
#if defined(USE_SIM_VIDEO) && defined(HAVE_LIBSDL)
&va_dev,
&vc_dev,
&lk_dev,
&vs_dev,

24
VAX/vax_2681.c
View File

@@ -100,7 +100,7 @@ switch (rg) {
case 2:
ctx->port[PORT_A].cmd &= ~CMD_ERX;
ctx->port[PORT_A].sts &= ~STS_RXR;
ctx->port[PORT_A].sts &= ~(STS_RXR | STS_FFL);
break;
case 3:
@@ -118,7 +118,7 @@ switch (rg) {
case 3: /* tx/rx buf A */
if (((ctx->port[PORT_A].mode[1] >> MODE_V_CHM) & MODE_M_CHM) == 0x2) { /* Maint */
ctx->port[PORT_A].buf = data & 0xFF;
ctx->port[PORT_A].sts |= STS_RXR;
ctx->port[PORT_A].sts |= (STS_RXR | STS_FFL);
ctx->ists |= ISTS_RAI;
}
else {
@@ -165,7 +165,7 @@ switch (rg) {
case 2:
ctx->port[PORT_B].cmd &= ~CMD_ERX;
ctx->port[PORT_B].sts &= ~STS_RXR;
ctx->port[PORT_B].sts &= ~(STS_RXR | STS_FFL);
break;
case 3:
@@ -183,7 +183,7 @@ switch (rg) {
case 11: /* tx/rx buf B (mouse) */
if (((ctx->port[PORT_B].mode[1] >> MODE_V_CHM) & MODE_M_CHM) == 0x2) { /* Maint */
ctx->port[PORT_B].buf = data & 0xFF;
ctx->port[PORT_B].sts |= STS_RXR;
ctx->port[PORT_B].sts |= (STS_RXR | STS_FFL);
ctx->ists |= ISTS_RBI;
}
else {
@@ -230,7 +230,7 @@ switch (rg) {
case 3: /* tx/rx buf A */
data = ctx->port[PORT_A].buf | (ctx->port[PORT_A].sts << 8);
ctx->port[PORT_A].sts &= ~STS_RXR;
ctx->port[PORT_A].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RAI;
ua2681_update_rxi (ctx);
break;
@@ -258,7 +258,7 @@ switch (rg) {
case 11: /* tx/rx buf B */
data = ctx->port[PORT_B].buf | (ctx->port[PORT_B].sts << 8);
ctx->port[PORT_B].sts &= ~STS_RXR;
ctx->port[PORT_B].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RBI;
ua2681_update_rxi (ctx);
break;
@@ -318,17 +318,17 @@ if (ctx->port[PORT_A].cmd & CMD_ERX) {
r = ctx->port[PORT_A].get_char (&c);
if (r == SCPE_OK) {
ctx->port[PORT_A].buf = c;
ctx->port[PORT_A].sts |= STS_RXR;
ctx->port[PORT_A].sts |= (STS_RXR | STS_FFL);
ctx->ists |= ISTS_RAI;
}
else {
ctx->port[PORT_A].sts &= ~STS_RXR;
ctx->port[PORT_A].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RAI;
}
}
}
else {
ctx->port[PORT_A].sts &= ~STS_RXR;
ctx->port[PORT_A].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RAI;
}
@@ -338,17 +338,17 @@ if (ctx->port[PORT_B].cmd & CMD_ERX) {
r = ctx->port[PORT_B].get_char (&c);
if (r == SCPE_OK) {
ctx->port[PORT_B].buf = c;
ctx->port[PORT_B].sts |= STS_RXR;
ctx->port[PORT_B].sts |= (STS_RXR | STS_FFL);
ctx->ists |= ISTS_RBI;
}
else {
ctx->port[PORT_B].sts &= ~STS_RXR;
ctx->port[PORT_B].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RBI;
}
}
}
else {
ctx->port[PORT_B].sts &= ~STS_RXR;
ctx->port[PORT_B].sts &= ~(STS_RXR | STS_FFL);
ctx->ists &= ~ISTS_RBI;
}

1855
VAX/vax_gpx.c Normal file
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File diff suppressed because it is too large Load Diff

199
VAX/vax_gpx.h Normal file
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@@ -0,0 +1,199 @@
/* vax_gpx.h: GPX video common components
Copyright (c) 2019, Matt Burke
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of the author shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author.
*/
#ifndef VAX_GPX_H
#define VAX_GPX_H 0
#include "vax_defs.h"
/* FIXME - Some or all of these should be dynamic */
#define VA_PLANES 4
#define VA_BPP (1u << VA_PLANES)
#define VA_PLANE_MASK (VA_BPP - 1)
#define VA_XSIZE 1024 /* visible width */
#define VA_YSIZE 864 /* visible height */
#define VA_BXSIZE 1024 /* video buffer width */
#define VA_BYSIZE 2048 /* video buffer height */
#define VA_BUFSIZE (1u << 21) /* video buffer size */
#define VA_BUFMASK (VA_BUFSIZE - 1)
/* Address processor (Adder) registers */
#define ADP_ADCT 0x0 /* address counter */
#define ADP_REQ 0x1 /* request enable */
#define ADP_INT 0x2 /* interrupt enable */
#define ADP_STAT 0x3 /* status */
#define ADP_IDD 0x7 /* I/D data */
#define ADP_CMD1 0x8 /* command */
#define ADP_MDE 0x9 /* mode */
#define ADP_CMD2 0xA /* command (alt) */
#define ADP_IDS 0xC /* I/D scroll data */
#define ADP_ICS 0xD /* I/D scroll command */
#define ADP_PXMN 0xE /* scroll x min */
#define ADP_PXMX 0xF /* scroll x max */
#define ADP_PYMN 0x10 /* scroll y min */
#define ADP_PYMX 0x11 /* scroll y max */
#define ADP_PSE 0x12 /* pause */
#define ADP_PYOF 0x13 /* y offset */
#define ADP_PYSC 0x14 /* y scroll constant */
#define ADP_PXI 0x15 /* pending x index */
#define ADP_PYI 0x16 /* pending y index */
#define ADP_NXI 0x17 /* new x index */
#define ADP_NYI 0x18 /* new y index */
#define ADP_OXI 0x19 /* old x index */
#define ADP_OYI 0x1A /* old y index */
#define ADP_CXMN 0x1B /* clip x min */
#define ADP_CXMX 0x1C /* clip x max */
#define ADP_CYMN 0x1D /* clip y min */
#define ADP_CYMX 0x1E /* clip y max */
#define ADP_FSDX 0x20 /* fast source 1 DX */
#define ADP_SSDY 0x21 /* slow source 1 DY */
#define ADP_SXO 0x22 /* source 1 X origin */
#define ADP_SYO 0x23 /* source 1 Y origin */
#define ADP_DXO 0x24 /* dest X origin */
#define ADP_DYO 0x25 /* dest Y origin */
#define ADP_FDX 0x26 /* fast dest DX */
#define ADP_FDY 0x27 /* fast dest DY */
#define ADP_SDX 0x28 /* slow dest DX */
#define ADP_SDY 0x29 /* slow dest DY */
#define ADP_FS 0x2A /* fast scale */
#define ADP_SS 0x2B /* slow scale */
#define ADP_S2XO 0x2C /* source 2 X origin */
#define ADP_S2YO 0x2D /* source 2 Y origin */
#define ADP_S2HW 0x2E /* source 2 height/width */
#define ADP_ERR1 0x2F /* error 1 */
#define ADP_ERR2 0x30 /* error 2 */
#define ADP_YCT0 0x31 /* y scan count 0 */
#define ADP_YCT1 0x32 /* y scan count 1 */
#define ADP_YCT2 0x33 /* y scan count 2 */
#define ADP_YCT3 0x34 /* y scan count 3 */
#define ADP_XCON 0x35 /* x scan configuration */
#define ADP_XL 0x36 /* x limit */
#define ADP_YL 0x37 /* y limit */
#define ADP_XCT0 0x38 /* x scan count 0 */
#define ADP_XCT1 0x39 /* x scan count 1 */
#define ADP_XCT2 0x3A /* x scan count 2 */
#define ADP_XCT3 0x3B /* x scan count 3 */
#define ADP_XCT4 0x3C /* x scan count 4 */
#define ADP_XCT5 0x3D /* x scan count 5 */
#define ADP_XCT6 0x3E /* x scan count 6 */
#define ADP_SYNP 0x3F /* sync phase */
#define ADP_MAXREG 0x3F
#define ADP_NUMREG (ADP_MAXREG + 1)
/* Adder status register */
#define ADPSTAT_PC 0x0001 /* pause complete */
#define ADPSTAT_SC 0x0002 /* scroll service */
#define ADPSTAT_IC 0x0004 /* rasterop init complete */
#define ADPSTAT_RC 0x0008 /* rasterop complete */
#define ADPSTAT_AC 0x0010 /* address output complete */
#define ADPSTAT_IRR 0x0020 /* I/D data rcv ready */
#define ADPSTAT_ITR 0x0040 /* I/D data xmt ready */
#define ADPSTAT_ISR 0x0080 /* I/D scroll data ready */
#define ADPSTAT_CT 0x0100 /* rasterop clipped top */
#define ADPSTAT_CB 0x0200 /* rasterop clipped bottom */
#define ADPSTAT_CL 0x0400 /* rasterop clipped left */
#define ADPSTAT_CR 0x0800 /* rasterop clipped right */
#define ADPSTAT_CP (ADPSTAT_CT|ADPSTAT_CB|ADPSTAT_CL|ADPSTAT_CR)
#define ADPSTAT_CN 0x1000 /* rasterop clipped none */
#define ADPSTAT_VB 0x2000 /* vertical blanking */
#define ADPSTAT_W0C 0x3F83
#define INT_ADP 0 /* Adder interrupt */
/* Video processor (Viper) registers */
#define VDP_RES 0x0 /* resolution mode */
#define VDP_BW 0x1 /* bus width */
#define VDP_SC 0x2 /* scroll constant */
#define VDP_PA 0x3 /* plane address */
#define VDP_FNC0 0x4 /* logic function 0 */
#define VDP_FNC1 0x5 /* logic function 1 */
#define VDP_FNC2 0x6 /* logic function 2 */
#define VDP_FNC3 0x7 /* logic function 3 */
#define VDP_MSK1 0x8 /* mask 1 */
#define VDP_MSK2 0x9 /* mask 2 */
#define VDP_SRC 0xA /* source */
#define VDP_FILL 0xB /* fill */
#define VDP_LSB 0xC /* left scroll boundary */
#define VDP_RSB 0xD /* right scroll boundary */
#define VDP_BG 0xE /* background colour */
#define VDP_FG 0xF /* foreground colour */
#define VDP_CSR0 0x10 /* CSR 0 */
#define VDP_CSR1 0x11 /* CSR 1 */
#define VDP_CSR2 0x12 /* CSR 2 */
#define VDP_CSR4 0x14 /* CSR 4 */
#define VDP_CSR5 0x15 /* CSR 5 */
#define VDP_CSR6 0x16 /* CSR 6 */
#define VDP_MAXREG 0x17
#define CMD u3
#define CMD_NOP 0 /* no operation */
#define CMD_BTPX 1 /* bitmap to processor (x-mode) */
#define CMD_BTPZ 2 /* bitmap to processor (z-mode) */
#define CMD_PTBX 3 /* processor to bitmap (x-mode) */
#define CMD_PTBZ 4 /* processor to bitmap (z-mode) */
#define CMD_ROP 5 /* rasterop */
#define CMD_ERASE 6 /* erase region */
/* Debugging Bitmaps */
#define DBG_REG 0x0100 /* register activity */
#define DBG_FIFO 0x0200 /* fifo activity */
#define DBG_ADP 0x0400 /* adder activity */
#define DBG_VDP 0x0800 /* viper activity */
#define DBG_ROP 0x1000 /* raster operations */
/* Internal functions/data - implemented by vax_gpx.c */
int32 va_adp_rd (int32 rg);
void va_adp_wr (int32 rg, int32 val);
t_stat va_adp_reset (DEVICE *dptr);
t_stat va_adp_svc (UNIT *uptr);
t_stat va_vdp_reset (DEVICE *dptr);
t_stat va_btp (UNIT *uptr, t_bool zmode);
t_stat va_ptb (UNIT *uptr, t_bool zmode);
void va_fifo_wr (uint32 val);
uint32 va_fifo_rd (void);
void va_adpstat (uint32 set, uint32 clr);
extern int32 va_adp[ADP_NUMREG]; /* Address processor registers */
/* External functions/data - implemented by machine specific device */
extern void va_setint (int32 src);
extern void va_clrint (int32 src);
extern uint32 *va_buf; /* Video memory */
extern t_bool va_updated[VA_BYSIZE];
extern UNIT va_unit[];
#endif

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VAX/vax_vc.c
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@@ -230,6 +230,8 @@ uint32 *vc_map; /* Scanline map */
uint32 *vc_buf = NULL; /* Video memory */
uint32 *vc_lines = NULL; /* Video Display Lines */
uint8 vc_cur[256]; /* Cursor image */
uint32 vc_palette[2]; /* Monochrome palette */
t_bool vc_active = FALSE;
t_stat vc_rd (int32 *data, int32 PA, int32 access);
t_stat vc_wr (int32 data, int32 PA, int32 access);
@@ -673,7 +675,7 @@ uint32 rg = (pa >> 2) & 0xFFFF;
if (!vc_buf) /* QVSS disabled? */
MACH_CHECK (MCHK_READ); /* Invalid memory reference */
return vc_buf[rg];
return (pa & 0x2) ? (vc_buf[rg] >> 16) : vc_buf[rg] & 0xFFFF;
}
void vc_mem_wr (int32 pa, int32 val, int32 lnt)
@@ -952,7 +954,7 @@ for (ln = 0; ln < VC_YSIZE; ln++) {
if ((vc_map[ln] & VCMAP_VLD) == 0) { /* line invalid? */
off = vc_map[ln] * 32; /* get video buf offset */
for (col = 0; col < VC_XSIZE; col++)
vc_lines[ln*VC_XSIZE + col] = vid_mono_palette[(vc_buf[off + (col >> 5)] >> (col & 0x1F)) & 1];
vc_lines[ln*VC_XSIZE + col] = vc_palette[(vc_buf[off + (col >> 5)] >> (col & 0x1F)) & 1];
/* 1bpp to 32bpp */
if (CUR_V && /* cursor visible && need to draw cursor? */
(vc_input_captured || (vc_dev.dctrl & DBG_CURSOR))) {
@@ -962,9 +964,9 @@ for (ln = 0; ln < VC_YSIZE; ln++) {
if ((CUR_X + col) >= VC_XSIZE) /* Part of cursor off screen? */
continue; /* Skip */
if (CUR_F) /* mask function */
vc_lines[ln*VC_XSIZE + CUR_X + col] = vid_mono_palette[(vc_lines[ln*VC_XSIZE + CUR_X + col] == vid_mono_palette[1]) | (cur[col] & 1)];
vc_lines[ln*VC_XSIZE + CUR_X + col] = vc_palette[(vc_lines[ln*VC_XSIZE + CUR_X + col] == vc_palette[1]) | (cur[col] & 1)];
else
vc_lines[ln*VC_XSIZE + CUR_X + col] = vid_mono_palette[(vc_lines[ln*VC_XSIZE + CUR_X + col] == vid_mono_palette[1]) & (~cur[col] & 1)];
vc_lines[ln*VC_XSIZE + CUR_X + col] = vc_palette[(vc_lines[ln*VC_XSIZE + CUR_X + col] == vc_palette[1]) & (~cur[col] & 1)];
}
}
}
@@ -1016,13 +1018,18 @@ vc_crtc[CRTC_CSCS] = 0x20; /* hide cursor */
vc_crtc_p = (CRTCP_LPF | CRTCP_VB);
if (dptr->flags & DEV_DIS) {
free (vc_buf);
vc_buf = NULL;
free (vc_lines);
vc_lines = NULL;
free (vc_map);
vc_map = NULL;
return vid_close ();
if (vc_active) {
free (vc_buf);
vc_buf = NULL;
free (vc_lines);
vc_lines = NULL;
free (vc_map);
vc_map = NULL;
vc_active = FALSE;
return vid_close ();
}
else
return SCPE_OK;
}
if (!vid_active) {
@@ -1048,6 +1055,9 @@ if (!vid_active) {
vid_close ();
return SCPE_MEM;
}
vc_palette[0] = vid_map_rgb (0x00, 0x00, 0x00); /* black */
vc_palette[1] = vid_map_rgb (0xFF, 0xFF, 0xFF); /* white */
vc_active = TRUE;
sim_printf ("QVSS Display Created. ");
vc_show_capture (stdout, NULL, 0, NULL);
if (sim_log)

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