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Bob Supnik's state as of 5/9/2015 after backporting some things from the master branch

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This commit is contained in:
Mark Pizzolato
2015-05-10 05:48:11 -07:00
parent 3a279c013a
commit 4d48f44857
313 changed files with 80976 additions and 38242 deletions
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21
Interdata/id16_cpu.c
View File

@@ -193,7 +193,7 @@ uint32 GREG[16] = { 0 }; /* general registers */
uint16 *M = NULL; /* memory */
uint32 *R = &GREG[0]; /* register set ptr */
uint32 F[8] = { 0 }; /* sp fp registers */
dpr_t D[8] = { 0 }; /* dp fp registers */
dpr_t D[8] = { {0, 0} }; /* dp fp registers */
uint32 PSW = 0; /* processor status word */
uint32 psw_mask = PSW_x16; /* PSW mask */
uint32 PC = 0; /* program counter */
@@ -223,11 +223,6 @@ InstHistory *hst = NULL; /* instruction history *
struct BlockIO blk_io; /* block I/O status */
uint32 (*dev_tab[DEVNO])(uint32 dev, uint32 op, uint32 datout) = { NULL };
extern int32 sim_interval;
extern int32 sim_int_char;
extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern t_bool sim_idle_enab;
uint32 ReadB (uint32 loc);
uint32 ReadH (uint32 loc);
void WriteB (uint32 loc, uint32 val);
@@ -604,7 +599,7 @@ while (reason == 0) { /* loop until halted */
int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ())
if ((reason = sim_process_event ()))
break;
int_eval ();
}
@@ -650,9 +645,7 @@ while (reason == 0) { /* loop until halted */
}
if (PSW & PSW_WAIT) { /* wait state? */
if (sim_idle_enab) /* idling enabled? */
sim_idle (TMR_LFC, TRUE);
else sim_interval = sim_interval - 1; /* no, count cycle */
sim_idle (TMR_LFC, TRUE); /* idling */
continue;
}
@@ -664,7 +657,7 @@ while (reason == 0) { /* loop until halted */
if (sim_brk_summ && sim_brk_test (PC, SWMASK ('E'))) { /* breakpoint? */
reason = STOP_IBKPT; /* stop simulation */
break;
}
}
sim_interval = sim_interval - 1;
@@ -1642,7 +1635,7 @@ do {
if (DEV_ACC (dev)) { /* dev exist? */
by = ReadB ((vec + CCB16_IOC) & VAMASK);/* read OC byte */
dev_tab[dev] (dev, IO_OC, by); /* send to dev */
}
}
break; /* and exit */
}
}
@@ -1955,7 +1948,7 @@ if (!(val & UNIT_816E) && (MEMSIZE > MAXMEMSIZE16)) {
MEMSIZE = MAXMEMSIZE16;
for (i = MEMSIZE; i < MAXMEMSIZE16E; i = i + 2)
M[i >> 1] = 0;
printf ("Reducing memory to 64KB\n");
sim_printf ("Reducing memory to 64KB\n");
}
return SCPE_OK;
}
@@ -2011,8 +2004,6 @@ char *cptr = (char *) desc;
t_value sim_eval[2];
t_stat r;
InstHistory *h;
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
if (hst_lnt == 0) /* enabled? */
return SCPE_NOFNC;

6
Interdata/id16_sys.c
View File

@@ -352,9 +352,8 @@ return -1;
t_stat fprint_sym_m (FILE *of, t_addr addr, t_value *val)
{
uint32 i, j, inst, r1, r2, ea, vp;
uint32 i, j, inst, r1, r2, ea;
vp = 0;
inst = val[0]; /* first 16b */
ea = val[1]; /* second 16b */
for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
@@ -570,7 +569,7 @@ return -1;
t_stat parse_sym_m (char *cptr, t_addr addr, t_value *val)
{
uint32 i, j, t, df, db, inst;
int32 st, r1, r2;
int32 r1, r2;
t_stat r;
char *tptr, gbuf[CBUFSIZE];
@@ -627,7 +626,6 @@ switch (j) { /* case on class */
r = get_addr (gbuf, &tptr, &t, addr); /* get addr */
if ((r != SCPE_OK) || (t & 1) || *tptr) /* error if odd */
return SCPE_ARG;
st = t; /* signed version */
db = (addr - t) & 0x1F; /* back displ */
df = (t - addr) & 0x1F; /* fwd displ */
if ((t == ((addr - db) & VAMASK16)) && /* back work and */

25
Interdata/id32_cpu.c
View File

@@ -28,7 +28,7 @@
28-Apr-07 RMS Removed clock initialization
27-Oct-06 RMS Added idle support
Removed separate PASLA clock
09-Mar-06 RMS Added 8 register bank support for 8/32
09-Mar-06 RMS Added 8 register bank support for 8/32
06-Feb-06 RMS Fixed bug in DH (Mark Hittinger)
22-Sep-05 RMS Fixed declarations (Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems
@@ -222,7 +222,7 @@ uint32 GREG[16 * NRSETS] = { 0 }; /* general registers */
uint32 *M = NULL; /* memory */
uint32 *R = &GREG[0]; /* working reg set */
uint32 F[8] = { 0 }; /* sp fp registers */
dpr_t D[8] = { 0 }; /* dp fp registers */
dpr_t D[8] = { {0} }; /* dp fp registers */
uint32 PSW = 0; /* processor status word */
uint32 PC = 0; /* program counter */
uint32 oPC = 0; /* PC at inst start */
@@ -253,12 +253,6 @@ jmp_buf save_env; /* abort handler */
struct BlockIO blk_io; /* block I/O status */
uint32 (*dev_tab[DEVNO])(uint32 dev, uint32 op, uint32 datout) = { NULL };
extern int32 sim_interval;
extern int32 sim_int_char;
extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern t_bool sim_idle_enab;
extern FILE *sim_deb;
uint32 ReadB (uint32 loc, uint32 rel);
uint32 ReadH (uint32 loc, uint32 rel);
void WriteB (uint32 loc, uint32 val, uint32 rel);
@@ -664,7 +658,7 @@ while (reason == 0) { /* loop until halted */
int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ())
if ((reason = sim_process_event ()))
break;
int_eval ();
}
@@ -714,9 +708,7 @@ while (reason == 0) { /* loop until halted */
}
if (PSW & PSW_WAIT) { /* wait state? */
if (sim_idle_enab) /* idling enabled? */
sim_idle (TMR_LFC, TRUE);
else sim_interval = sim_interval - 1; /* no, count cycle */
sim_idle (TMR_LFC, TRUE); /* idling */
continue;
}
@@ -2293,7 +2285,7 @@ if ((sw & SWMASK ('V')) && (PSW & PSW_REL)) {
int32 cc = RelocT (addr, MAC_BASE, P, &addr);
if (cc & (CC_C | CC_V))
return SCPE_NXM;
}
}
if (addr >= MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
@@ -2309,7 +2301,7 @@ if ((sw & SWMASK ('V')) && (PSW & PSW_REL)) {
int32 cc = RelocT (addr, MAC_BASE, P, &addr);
if (cc & (CC_C | CC_V))
return SCPE_NXM;
}
}
if (addr >= MEMSIZE)
return SCPE_NXM;
IOWriteH (addr, val);
@@ -2323,7 +2315,7 @@ t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
uint32 mc = 0;
uint32 i;
if ((val <= 0) || (val > MAXMEMSIZE32) || ((val & 0xFFFF) != 0))
if ((val <= 0) || (((unsigned)val) > MAXMEMSIZE32) || ((val & 0xFFFF) != 0))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i = i + 4)
mc = mc | M[i >> 2];
@@ -2339,7 +2331,6 @@ return SCPE_OK;
void set_r_display (uint32 *rbase)
{
extern REG *find_reg (char *cptr, char **optr, DEVICE *dptr);
REG *rptr;
int32 i;
@@ -2400,8 +2391,6 @@ char *cptr = (char *) desc;
t_value sim_eval[3];
t_stat r;
InstHistory *h;
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
if (hst_lnt == 0) /* enabled? */
return SCPE_NOFNC;

1
Interdata/id32_dboot.c
View File

@@ -288,7 +288,6 @@ t_stat id_dboot (int32 u, DEVICE *dptr)
{
extern DIB ttp_dib, sch_dib;
extern uint32 PC;
extern int32 sim_switches;
uint32 i, typ, ctlno, off, add, cap, sch_dev;
UNIT *uptr;

3
Interdata/id32_sys.c
View File

@@ -669,12 +669,11 @@ return -3;
t_stat parse_sym_m (char *cptr, t_addr addr, t_value *val)
{
uint32 i, j, df, db, t, inst, vp;
uint32 i, j, df, db, t, inst;
int32 st, r1, r2, rx2;
t_stat r;
char *tptr, gbuf[CBUFSIZE];
vp = 0;
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL)

4
Interdata/id_defs.h
View File

@@ -36,8 +36,8 @@
28-Feb-03 RMS Changed magtape device default to 0x85
*/
#ifndef _ID_DEFS_H_
#define _ID_DEFS_H_ 0
#ifndef ID_DEFS_H_
#define ID_DEFS_H_ 0
#include "sim_defs.h" /* simulator defns */

14
Interdata/id_dp.c
View File

@@ -139,7 +139,6 @@ static struct drvtyp drv_tab[] = {
};
extern uint32 int_req[INTSZ], int_enb[INTSZ];
extern FILE *sim_deb;
uint8 dpxb[DP_NUMBY]; /* xfer buffer */
uint32 dp_bptr = 0; /* buffer ptr */
@@ -393,7 +392,6 @@ t_stat dp_svc (UNIT *uptr)
uint32 u = uptr - dp_dev.units; /* get unit number */
int32 cyl = uptr->CYL; /* get cylinder */
uint32 dtype = GET_DTYPE (uptr->flags); /* get drive type */
uint32 t;
t_stat r;
if (uptr->STD & STD_MOV) { /* seek? */
@@ -419,10 +417,10 @@ switch (dp_cmd & 0x7) { /* case on func */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* sch transfer? */
if (dp_dter (uptr, dp_1st)) /* check xfr err */
return SCPE_OK;
if (r = dp_rds (uptr)) /* read sec, err? */
if ((r = dp_rds (uptr))) /* read sec, err? */
return r;
dp_1st = 0;
t = sch_wrmem (dp_dib.sch, dpxb, DP_NUMBY); /* write to memory */
sch_wrmem (dp_dib.sch, dpxb, DP_NUMBY); /* write to memory */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */
sim_activate (uptr, dp_rtime); /* reschedule */
return SCPE_OK;
@@ -438,7 +436,7 @@ switch (dp_cmd & 0x7) { /* case on func */
return SCPE_OK;
dp_bptr = sch_rdmem (dp_dib.sch, dpxb, DP_NUMBY); /* read from mem */
dp_db = dpxb[dp_bptr - 1]; /* last byte */
if (r = dp_wds (uptr)) /* write sec, err? */
if ((r = dp_wds (uptr))) /* write sec, err? */
return r;
dp_1st = 0;
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */
@@ -498,9 +496,9 @@ uint32 dtype = GET_DTYPE (uptr->flags); /* get drive type */
if (((uptr->flags & UNIT_ATT) == 0) || /* not attached? */
((uptr->flags & UNIT_WPRT) && (dp_cmd == CMC_WR))) {
dp_done (STC_DTE); /* error, done */
return TRUE;
}
dp_done (STC_DTE); /* error, done */
return TRUE;
}
hd = GET_SRF (dp_hdsc); /* get head */
sc = GET_SEC (dp_hdsc); /* get sector */
if (dp_cyl != (uint32) uptr->CYL) { /* wrong cylinder? */

8
Interdata/id_fd.c
View File

@@ -116,7 +116,7 @@ uint32 fd_cmd = 0; /* command */
uint32 fd_db = 0; /* data buffer */
uint32 fd_bptr = 0; /* buffer pointer */
uint8 fdxb[FD_NUMBY] = { 0 }; /* sector buffer */
uint8 fd_es[FD_NUMDR][ES_SIZE] = { 0 }; /* ext status */
uint8 fd_es[FD_NUMDR][ES_SIZE] = { {0} }; /* ext status */
uint32 fd_lrn = 0; /* log rec # */
uint32 fd_wdv = 0; /* wd valid */
uint32 fd_stopioe = 1; /* stop on error */
@@ -227,7 +227,7 @@ switch (op) { /* case IO op */
fd_sta = fd_sta | STA_BSY; /* set busy */
}
else fd_bptr = 0; /* just wrap */
}
}
if ((ctab[fnc] & C_RD) && fd_arm) /* if rd & arm, */
SET_INT (v_FD); /* interrupt */
return fd_db; /* return buf */
@@ -367,7 +367,7 @@ switch (fnc) { /* case on function */
if ((uptr->flags & UNIT_BUF) == 0) { /* not attached? */
fd_es[u][0] = fd_es[u][0] | ES0_FLT; /* set err */
fd_es[u][1] = fd_es[u][1] | ES1_NRDY;
}
}
for (i = 0; i < ES_SIZE; i++) /* copy to buf */
fdxb[i] = fd_es[u][i];
for (i = ES_SIZE; i < FD_NUMBY; i++)
@@ -378,7 +378,7 @@ switch (fnc) { /* case on function */
if ((uptr->flags & UNIT_BUF) == 0) { /* not attached? */
fd_done (u, STA_ERR, ES0_ERR | ES0_FLT, ES1_NRDY);
return SCPE_OK;
}
}
for (i = 0; i < FD_NUMBY; i++) fdxb[i] = 0; /* clr buf */
tk = GET_TRK (uptr->LRN); /* get track */
sc = GET_SEC (uptr->LRN); /* get sector */

13
Interdata/id_idc.c
View File

@@ -96,7 +96,7 @@
/* Drive status, ^ = dynamic, * = in unit status */
#define STD_WRP 0x80 /* ^write prot */
/* 0x40 /* unused */
/* 0x40 *//* unused */
#define STD_ACH 0x20 /* alt chan busy NI */
#define STD_UNS 0x10 /* *unsafe */
#define STD_NRDY 0x08 /* ^not ready */
@@ -503,7 +503,6 @@ t_stat idc_svc (UNIT *uptr)
int32 diff;
uint32 f, u = uptr - idc_dev.units; /* get unit number */
uint32 dtype = GET_DTYPE (uptr->flags); /* get drive type */
uint32 t;
t_stat r;
if (uptr->FNC & CMC_DRV) { /* drive cmd? */
@@ -561,7 +560,7 @@ if (uptr->FNC & CMC_DRV) { /* drive cmd? */
}
} /* end else p1 */
return SCPE_OK; /* end if drv */
}
}
switch (uptr->FNC & CMC_MASK) { /* case on func */
@@ -576,10 +575,10 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* sch transfer? */
if (idc_dter (uptr, idc_1st)) /* dte? done */
return SCPE_OK;
if (r = idc_rds (uptr)) /* read sec, err? */
if ((r = idc_rds (uptr))) /* read sec, err? */
return r;
idc_1st = 0;
t = sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */
sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */
sim_activate (uptr, idc_rtime); /* reschedule */
return SCPE_OK;
@@ -595,7 +594,7 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
return SCPE_OK;
idc_bptr = sch_rdmem (idc_dib.sch, idcxb, IDC_NUMBY); /* read mem */
idc_db = idcxb[idc_bptr - 1]; /* last byte */
if (r = idc_wds (uptr)) /* write sec, err? */
if ((r = idc_wds (uptr))) /* write sec, err? */
return r;
idc_1st = 0;
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */
@@ -693,7 +692,7 @@ uint32 hd, sc, sa;
uint32 dtype = GET_DTYPE (uptr->flags); /* get drive type */
if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
idc_done (STC_DTE); /* error, done */
idc_done (STC_DTE); /* error, done */
return TRUE;
}
if ((uptr->flags & UNIT_WPRT) && (uptr->FNC == CMC_WR)) {

17
Interdata/id_io.c
View File

@@ -66,8 +66,6 @@ extern uint32 int_req[INTSZ], int_enb[INTSZ];
extern uint32 (*dev_tab[DEVNO])(uint32 dev, uint32 op, uint32 datout);
extern uint32 pawidth;
extern UNIT cpu_unit;
extern FILE *sim_log;
extern DEVICE *sim_devices[];
uint32 sch_max = 2; /* sch count */
uint32 sch_sa[SCH_NUMCH] = { 0 }; /* start addr */
@@ -358,14 +356,11 @@ if ((r != SCPE_OK) || (newmax == sch_max)) /* err or no chg? */
if (newmax == 0) /* must be > 0 */
return SCPE_ARG;
if (newmax < sch_max) { /* reducing? */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru dev */
for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru dev */
dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp && (dibp->sch >= (int32) newmax)) { /* dev using chan? */
printf ("Device %02X uses channel %d\n",
sim_printf ("Device %02X uses channel %d\n",
dibp->dno, dibp->sch);
if (sim_log)
fprintf (sim_log, "Device %02X uses channel %d\n",
dibp->dno, dibp->sch);
return SCPE_OK;
}
}
@@ -439,7 +434,7 @@ int32 i, j, t;
uint32 r;
for (i = t = 0; i < INTSZ; i++) { /* loop thru array */
if (r = int_req[i] & int_enb[i]) { /* find nz int wd */
if ((r = int_req[i] & int_enb[i])) { /* find nz int wd */
for (j = 0; j < 32; t++, j++) {
if (r & (1u << j)) {
int_req[i] = int_req[i] & ~(1u << j); /* clr request */
@@ -630,7 +625,7 @@ for (i = 0; i < (DEVNO / 32); i++)
/* Test each device for conflict; add to map; init tables */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */
for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru devices */
dibp = (DIB *) dptr->ctxt; /* get DIB */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */
continue;
@@ -645,9 +640,7 @@ for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */
dmsk = 1u << (t & 0x1F); /* bit to test */
doff = t / 32; /* word to test */
if (dmap[doff] & dmsk) { /* in use? */
printf ("Device number conflict, devno = %02X\n", t);
if (sim_log)
fprintf (sim_log, "Device number conflict, devno = %02X\n", t);
sim_printf ("Device number conflict, devno = %02X\n", t);
return TRUE;
}
dmap[doff] = dmap[doff] | dmsk;

8
Interdata/id_mt.c
View File

@@ -168,7 +168,7 @@ DEVICE mt_dev = {
MT_NUMDR, 10, 31, 1, 16, 8,
NULL, NULL, &mt_reset,
&mt_boot, &mt_attach, &mt_detach,
&mt_dib, DEV_DISABLE
&mt_dib, DEV_DISABLE | DEV_TAPE
};
/* Magtape: IO routine */
@@ -368,13 +368,13 @@ switch (uptr->UCMD) { /* case on function */
}
if (mt_bptr) { /* any chars? */
if (st = sim_tape_wrrecf (uptr, mtxb, mt_bptr)) /* write, err? */
if ((st = sim_tape_wrrecf (uptr, mtxb, mt_bptr)))/* write, err? */
r = mt_map_err (uptr, st); /* map error */
}
break; /* record done */
case MTC_WEOF: /* write eof */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */
if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */
mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) /* set intr */
@@ -402,7 +402,7 @@ switch (uptr->UCMD) { /* case on function */
break;
case MTC_SPCR: /* backspace */
if (st = sim_tape_sprecr (uptr, &tbc)) /* skip rec rev, err? */
if ((st = sim_tape_sprecr (uptr, &tbc))) /* skip rec rev, err? */
r = mt_map_err (uptr, st); /* map error */
break;
} /* end case */

8
Interdata/id_pas.c
View File

@@ -104,7 +104,7 @@ uint8 pas_xarm[PAS_LINES]; /* xmt int armed */
uint8 pas_rchp[PAS_LINES]; /* rcvr chr pend */
uint8 pas_tplte[PAS_LINES * 2 + 1]; /* template */
TMLN pas_ldsc[PAS_LINES] = { 0 }; /* line descriptors */
TMLN pas_ldsc[PAS_LINES] = { {0} }; /* line descriptors */
TMXR pas_desc = { 8, 0, 0, pas_ldsc }; /* mux descriptor */
#define PAS_ENAB pas_desc.lines
@@ -166,7 +166,7 @@ DEVICE pas_dev = {
1, 10, 31, 1, 16, 8,
&tmxr_ex, &tmxr_dep, &pas_reset,
NULL, &pas_attach, &pas_detach,
&pas_dib, DEV_NET | DEV_DISABLE
&pas_dib, DEV_MUX | DEV_DISABLE
};
/* PASL data structures
@@ -335,7 +335,7 @@ if (ln >= 0) { /* got one? */
tmxr_poll_rx (&pas_desc); /* poll for input */
for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */
if (pas_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&pas_ldsc[ln])) { /* any char? */
if ((c = tmxr_getc_ln (&pas_ldsc[ln]))) { /* any char? */
pas_sta[ln] = pas_sta[ln] & ~(STA_FR | STA_PF);
if (pas_rchp[ln])
pas_sta[ln] = pas_sta[ln] | STA_OVR;
@@ -527,7 +527,7 @@ if (newln < PAS_ENAB) {
if (pas_ldsc[i].conn) {
tmxr_linemsg (&pas_ldsc[i], "\r\nOperator disconnected line\r\n");
tmxr_reset_ln (&pas_ldsc[i]); /* reset line */
}
}
pasl_unit[i].flags = pasl_unit[i].flags | UNIT_DIS;
pas_reset_ln (i);
}

2
Interdata/id_pt.c
View File

@@ -204,7 +204,7 @@ if ((temp = getc (uptr->fileref)) == EOF) { /* error? */
if (feof (uptr->fileref)) { /* eof? */
pt_sta = pt_sta | STA_DU; /* set DU */
if (ptr_stopioe)
printf ("PTR end of file\n");
sim_printf ("PTR end of file\n");
else return SCPE_OK;
}
else perror ("PTR I/O error");

3
Interdata/id_ttp.c
View File

@@ -130,7 +130,7 @@ DEVICE ttp_dev = {
uint32 ttp (uint32 dev, uint32 op, uint32 dat)
{
int32 xmt = dev & 1;
int32 t, old_cmd;
int32 t;
switch (op) { /* case IO op */
@@ -160,7 +160,6 @@ switch (op) { /* case IO op */
return t;
case IO_OC: /* command */
old_cmd = ttp_cmd; /* old cmd */
if (dat & CMD_TYP) { /* type 1? */
ttp_cmd = (ttp_cmd & 0xFF) | (dat << 8);
if (ttp_cmd & CMD_WRT) /* write? */

2
Interdata/id_uvc.c
View File

@@ -358,7 +358,7 @@ int32 lfc_cosched (int32 wait)
{
int32 t;
t = sim_is_active (&lfc_unit);
t = sim_activate_time (&lfc_unit);
return (t? t - 1: wait);
}