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Notes For V3.0-0
Because some key files have changed, V3.0 should be unzipped to a clean directory. 1. New Features in 3.0-0 1.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support 1.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 1.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 2. Bugs Fixed in 3.01-0 2.1 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). 2.2 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. 2.3 Nova - Fixed DSK variable size interaction with restore. 2.4 PDP-1 - Fixed DT variable size interaction with restore. 2.5 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. 2.6 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. 2.7 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. 2.8 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. 2.9 GRI - Fixed bug in SC queue pointer management. 3. New Features in 3.0 vs prior releases N/A 4. Bugs Fixed in 3.0 vs prior releases N/A 5. General Notes WARNING: The RESTORE command has changed. RESTORE will now detach an attached file on a unit, if that unit did not have an attached file in the saved configuration. This is required to assure that the unit flags and the file state are consistent. WARNING: The compilation scheme for the PDP-10, PDP-11, and VAX has changed. Use one of the supplied build files, or read the documentation carefully, before compiling any of these simulators.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
43385c9616
commit
4ffd3be790
@@ -1,6 +1,6 @@
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/* i1401_cd.c: IBM 1402 card reader/punch
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Copyright (c) 1993-2002, Robert M. Supnik
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Copyright (c) 1993-2003, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -35,6 +35,7 @@
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Cards are represented as ASCII text streams terminated by newlines.
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This allows cards to be created and edited as normal files.
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25-Apr-03 RMS Revised for extended file support
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30-May-02 RMS Widened POS to 32b
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30-Jan-02 RMS New zero footprint card bootstrap from Van Snyder
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29-Nov-01 RMS Added read only unit support
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@@ -70,7 +71,7 @@ REG cdr_reg[] = {
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{ FLDATA (ERR, ind[IN_READ], 0) },
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{ FLDATA (S1, s1sel, 0) },
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{ FLDATA (S2, s2sel, 0) },
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{ DRDATA (POS, cdr_unit.pos, 32), PV_LEFT },
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{ DRDATA (POS, cdr_unit.pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TIME, cdr_unit.wait, 24), PV_LEFT },
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{ BRDATA (BUF, rbuf, 8, 8, CDR_WIDTH) },
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{ NULL } };
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@@ -95,7 +96,7 @@ REG cdp_reg[] = {
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{ FLDATA (ERR, ind[IN_PNCH], 0) },
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{ FLDATA (S4, s4sel, 0) },
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{ FLDATA (S8, s8sel, 0) },
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{ DRDATA (POS, cdp_unit.pos, 32), PV_LEFT },
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{ DRDATA (POS, cdp_unit.pos, T_ADDR_W), PV_LEFT },
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{ NULL } };
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DEVICE cdp_dev = {
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@@ -119,10 +120,10 @@ UNIT stack_unit[] = {
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{ UDATA (NULL, UNIT_SEQ+UNIT_ATTABLE, 0) } };
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REG stack_reg[] = {
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{ DRDATA (POS0, stack_unit[0].pos, 32), PV_LEFT },
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{ DRDATA (POS1, stack_unit[1].pos, 32), PV_LEFT },
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{ DRDATA (POS28, stack_unit[2].pos, 32), PV_LEFT },
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{ DRDATA (POS4, stack_unit[4].pos, 32), PV_LEFT },
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{ DRDATA (POS0, stack_unit[0].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (POS1, stack_unit[1].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (POS28, stack_unit[2].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (POS4, stack_unit[4].pos, T_ADDR_W), PV_LEFT },
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{ NULL } };
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DEVICE stack_dev = {
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@@ -1,6 +1,6 @@
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/* i1401_cpu.c: IBM 1401 CPU simulator
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Copyright (c) 1993-2002, Robert M. Supnik
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Copyright (c) 1993-2003, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -23,6 +23,12 @@
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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16-Mar-03 RMS Fixed mnemonic, instruction lengths, and reverse
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scan length check bug for MCS
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Fixed MCE bug, BS off by 1 if zero suppress
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Fixed chaining bug, D lost if return to SCP
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Fixed H branch, branch occurs after continue
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Added check for invalid 8 character MCW, LCA
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03-Jun-03 RMS Added 1311 support
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22-May-02 RMS Added multiply and divide
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30-Dec-01 RMS Added old PC queue
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@@ -142,7 +148,9 @@ uint8 M[MAXMEMSIZE] = { 0 }; /* main memory */
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int32 saved_IS = 0; /* saved IS */
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int32 AS = 0; /* AS */
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int32 BS = 0; /* BS */
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int32 D = 0; /* modifier */
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int32 as_err = 0, bs_err = 0; /* error flags */
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int32 hb_pend = 0; /* halt br pending */
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uint16 pcq[PCQ_SIZE] = { 0 }; /* PC queue */
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int32 pcq_p = 0; /* PC queue ptr */
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REG *pcq_r = NULL; /* PC queue reg ptr */
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@@ -194,6 +202,7 @@ REG cpu_reg[] = {
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{ DRDATA (BS, BS, 14), PV_LEFT },
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{ FLDATA (ASERR, as_err, 0) },
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{ FLDATA (BSERR, bs_err, 0) },
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{ ORDATA (D, D, 7) },
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{ FLDATA (SSA, ssa, 0) },
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{ FLDATA (SSB, ind[IN_SSB], 0) },
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{ FLDATA (SSC, ind[IN_SSC], 0) },
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@@ -208,8 +217,9 @@ REG cpu_reg[] = {
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{ FLDATA (OVF, ind[IN_OVF], 0) },
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{ FLDATA (IOCHK, iochk, 0) },
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{ FLDATA (PRCHK, prchk, 0) },
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{ FLDATA (HBPEND, hb_pend, 0) },
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{ BRDATA (ISQ, pcq, 10, 14, PCQ_SIZE), REG_RO+REG_CIRC },
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{ ORDATA (ISQP, pcq_p, 6), REG_HRO },
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{ DRDATA (ISQP, pcq_p, 6), REG_HRO },
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{ ORDATA (WRU, sim_int_char, 8) },
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{ NULL } };
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@@ -271,7 +281,7 @@ const int32 op_table[64] = {
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L1 | L8 | BREQ | BBE, /* branch if bit eq */
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0, /* illegal */
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L1 | L4 | L7 | AREQ | BREQ, /* 30: move zones */
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L7 | AREQ | BREQ, /* move supress zero */
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L1 | L4 | L7 | AREQ | BREQ, /* move supress zero */
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0, /* illegal */
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L1 | L4 | L7 | AREQ | BREQ | NOWM, /* set word mark */
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L7 | AREQ | BREQ | MDV, /* divide */
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@@ -305,7 +315,7 @@ const int32 op_table[64] = {
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L1 | L4 | L7 | AREQ | MLS, /* 70: store B addr */
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0, /* illegal */
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L1 | L4 | L7 | AREQ | BREQ, /* zero and add */
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HNOP | L1 | L4, /* halt */
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HNOP | L1 | L4 | L7, /* halt */
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L1 | L4 | L7 | AREQ | BREQ, /* clear word mark */
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0, /* illegal */
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0, /* illegal */
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@@ -456,8 +466,8 @@ static const int32 mtf_mod[] = { BCD_B, BCD_E, BCD_M, BCD_R, BCD_U, -1 };
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t_stat sim_instr (void)
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{
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extern int32 sim_interval;
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int32 IS, D, ilnt, flags;
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int32 op, xa, t, wm, dev, unit;
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int32 IS, ilnt, flags;
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int32 op, xa, t, wm, ioind, dev, unit;
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int32 a, b, i, asave, bsave;
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int32 carry, lowprd, sign, ps;
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int32 quo, ahigh, qs;
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@@ -466,16 +476,21 @@ t_stat reason, r1, r2;
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/* Restore saved state */
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IS = saved_IS;
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if (as_err) AS = AS | BA; /* flag bad addresses */
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if (bs_err) BS = BS | BA;
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as_err = bs_err = 0; /* reset error flags */
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D = 0;
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reason = 0;
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/* Main instruction fetch/decode loop */
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while (reason == 0) { /* loop until halted */
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if (hb_pend) { /* halt br pending? */
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hb_pend = 0; /* clear flag */
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BRANCH; } /* execute branch */
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saved_IS = IS; /* commit prev instr */
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if (sim_interval <= 0) { /* check clock queue */
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if (reason = sim_process_event ()) break; }
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@@ -500,7 +515,7 @@ if (op == OP_SAR) BS = AS; /* SAR? save ASTAR */
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PP (IS);
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if ((t = M[IS]) & WM) goto CHECK_LENGTH; /* WM? 1 char inst */
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D = t; /* could be D char */
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D = ioind = t; /* could be D char, % */
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AS = hun_table[t]; /* could be A addr */
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PP (IS); /* if %xy, BA is set */
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@@ -519,7 +534,7 @@ if ((t = M[IS]) & WM) { /* WM? 3 char inst */
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AS = AS + one_table[t]; /* finish A addr */
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unit = (t == BCD_ZERO)? 0: t; /* save char as unit */
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xa = (AS >> V_INDEX) & M_INDEX; /* get index reg */
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if (xa && (D != BCD_PERCNT) && (cpu_unit.flags & XSA)) { /* indexed? */
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if (xa && (ioind != BCD_PERCNT) && (cpu_unit.flags & XSA)) { /* indexed? */
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AS = AS + hun_table[M[xa] & CHAR] + ten_table[M[xa + 1] & CHAR] +
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one_table[M[xa + 2] & CHAR];
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AS = (AS & INDEXMASK) % MAXMEMSIZE; }
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@@ -570,7 +585,7 @@ switch (op) { /* case on opcode */
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until A WM
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MCM: copy A to B, preserving B WM, fetch fetch
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until record or group mark
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MSZ: copy A to B, clearing B WM, until A WM; fetch fetch
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MCS: copy A to B, clearing B WM, until A WM; fetch fetch
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reverse scan and suppress leading zeroes
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MN: copy A char digit to B char digit, fetch fetch
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preserving B zone and WM
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@@ -580,21 +595,23 @@ switch (op) { /* case on opcode */
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case OP_MCW: /* move char */
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if (ilnt >= 8) { /* I/O form? */
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reason = iodisp (dev, unit, MD_NORM, D);
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if (ioind != BCD_PERCNT) reason = STOP_INVL;
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else reason = iodisp (dev, unit, MD_NORM, D);
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break; }
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if (ADDR_ERR (AS)) { /* check A addr */
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reason = STOP_INVA;
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break; }
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do {
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M[BS] = (M[BS] & WM) | (M[AS] & CHAR); /* move char */
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wm = M[AS] | M[BS];
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M[BS] = (M[BS] & WM) | (M[AS] & CHAR); /* move char */
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MM (AS); MM (BS); } /* decr pointers */
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while ((wm & WM) == 0); /* stop on A,B WM */
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break;
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case OP_LCA: /* load char */
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if (ilnt >= 8) { /* I/O form? */
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reason = iodisp (dev, unit, MD_WM, D);
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if (ioind != BCD_PERCNT) reason = STOP_INVL;
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else reason = iodisp (dev, unit, MD_WM, D);
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break; }
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if (ADDR_ERR (AS)) { /* check A addr */
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reason = STOP_INVA;
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@@ -607,18 +624,18 @@ case OP_LCA: /* load char */
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case OP_MCM: /* move to rec/group */
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do {
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M[BS] = (M[BS] & WM) | (M[AS] & CHAR); /* move char */
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t = M[AS];
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M[BS] = (M[BS] & WM) | (M[AS] & CHAR); /* move char */
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PP (AS); PP (BS); } /* incr pointers */
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while (((t & CHAR) != BCD_RECMRK) && (t != (BCD_GRPMRK + WM)));
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break;
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case OP_MSZ: /* move suppress zero */
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case OP_MCS: /* move suppress zero */
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bsave = BS; /* save B start */
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qzero = 1; /* set suppress */
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do {
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M[BS] = M[AS] & ((BS != bsave)? CHAR: DIGIT); /* copy char */
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wm = M[AS];
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M[BS] = M[AS] & ((BS != bsave)? CHAR: DIGIT); /* copy char */
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MM (AS); MM (BS); } /* decr pointers */
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while ((wm & WM) == 0); /* stop on A WM */
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if (reason) break; /* addr err? stop */
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@@ -631,7 +648,8 @@ case OP_MSZ: /* move suppress zero */
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else if (((t == BCD_DECIMAL) && (cpu_unit.flags & EPE)) ||
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(t <= BCD_NINE)) qzero = 0;
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else qzero = 1; }
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while (BS <= bsave);
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while (BS < bsave);
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PP (BS); /* BS end is B+1 */
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break;
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case OP_MN: /* move numeric */
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@@ -644,10 +662,7 @@ case OP_MZ: /* move zone */
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MM (AS); MM (BS); /* decr pointers */
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break;
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/* Compare
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A and B are checked in fetch
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*/
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/* Compare - A and B are checked in fetch */
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case OP_C: /* compare */
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if (ilnt != 1) { /* if not chained */
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@@ -993,7 +1008,9 @@ case OP_MCE: /* edit */
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while ((b & WM) == 0);
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M[BS] = M[BS] & ~WM; /* clear B WM */
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if (!qdollar && !(qdecimal && qzero)) break; /* rescan again? */
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if (!qdollar && !(qdecimal && qzero)) { /* rescan again? */
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BS++; /* BS = addr WM + 1 */
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break; }
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if (qdecimal && qzero) qdollar = 0; /* no digits? clr $ */
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/* Edit pass 3 (extended print only) - from right to left */
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@@ -1111,7 +1128,7 @@ case OP_DIV:
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reason = STOP_WRAP; /* address wrap? */
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break; }
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div_sign (M[asave], b, qs - 1, bsave - 1); /* set signs */
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BS = (BS - 2) - (asave - (AS + 1)); /* final bs */
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BS = (BS - 2) - (asave - (AS + 1)); /* final bs */
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break; }
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bsave = BS + (asave - ahigh); /* end subdivd */
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qs = (BS - 2) - (ahigh - (AS + 1)); /* quo start */
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@@ -1208,7 +1225,7 @@ case OP_NOP: /* nop */
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break;
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case OP_H: /* halt */
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if (ilnt >= 4) { BRANCH; } /* branch if called */
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if (ilnt == 4) hb_pend = 1; /* set pending branch */
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reason = STOP_HALT; /* stop simulator */
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saved_IS = IS; /* commit instruction */
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break;
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@@ -1355,10 +1372,12 @@ t_stat cpu_reset (DEVICE *dptr)
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{
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int32 i;
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for (i = 0; i < 64; i++) ind[i] = 0;
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ind[IN_UNC] = 1;
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AS = 0; as_err = 1;
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BS = 0; bs_err = 1;
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for (i = 0; i < 64; i++) ind[i] = 0; /* clr indicators */
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ind[IN_UNC] = 1; /* ind[0] always on */
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AS = 0; as_err = 1; /* clear AS */
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BS = 0; bs_err = 1; /* clear BS */
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D = 0; /* clear D */
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hb_pend = 0; /* no halt br */
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pcq_r = find_reg ("ISQ", NULL, dptr);
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if (pcq_r) pcq_r->qptr = 0;
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else return SCPE_IERR;
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@@ -1389,7 +1408,7 @@ return SCPE_OK;
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t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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int32 mc = 0;
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t_addr i;
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uint32 i;
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if ((val <= 0) || (val > MAXMEMSIZE) || ((val % 1000) != 0))
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return SCPE_ARG;
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@@ -1,3 +1,28 @@
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/* i1401_dat.h: IBM 1401 character conversion tables
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Copyright (c) 1993-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
Except as contained in this notice, the name of Robert M Supnik shall not
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
*/
|
||||
|
||||
/* ASCII to BCD conversion */
|
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|
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|
||||
@@ -1,6 +1,6 @@
|
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/* i1401_defs.h: IBM 1401 simulator definitions
|
||||
|
||||
Copyright (c) 1993-2002, Robert M. Supnik
|
||||
Copyright (c) 1993-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -23,7 +23,8 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
03-Jun-03 RMS Added 1311 support
|
||||
16-Mar-03 RMS Fixed mnemonic for MCS
|
||||
03-Jun-02 RMS Added 1311 support
|
||||
14-Apr-99 RMS Converted t_addr to unsigned
|
||||
|
||||
This simulator is based on the 1401 simulator written by Len Fehskens
|
||||
@@ -79,7 +80,7 @@
|
||||
#define LPT_WIDTH 132 /* line print width */
|
||||
#define CCT_LNT 132 /* car ctrl length */
|
||||
#define INQ_WIDTH 80 /* inq term width */
|
||||
#define ADDR_ERR(x) (((t_addr) (x)) >= MEMSIZE)
|
||||
#define ADDR_ERR(x) (((uint32) (x)) >= MEMSIZE)
|
||||
|
||||
/* Binary address format
|
||||
|
||||
@@ -205,7 +206,7 @@
|
||||
#define OP_BWZ 025 /* branch wm or zone */
|
||||
#define OP_BBE 026 /* branch bit equal */
|
||||
#define OP_MZ 030 /* move zone */
|
||||
#define OP_MSZ 031 /* move suppr zeroes */
|
||||
#define OP_MCS 031 /* move suppr zeroes */
|
||||
#define OP_SWM 033 /* set word mark */
|
||||
#define OP_DIV 034 /* divide */
|
||||
#define OP_SS 042 /* select stacker */
|
||||
|
||||
@@ -1,14 +1,14 @@
|
||||
To: Users
|
||||
From: Bob Supnik
|
||||
Subj: IBM 1401 Simulator Usage
|
||||
Date: 15-Nov-2002
|
||||
Date: 20-Apr-2003
|
||||
|
||||
COPYRIGHT NOTICE
|
||||
|
||||
The following copyright notice applies to both the SIMH source and binary:
|
||||
|
||||
Original code published in 1993-2002, written by Robert M Supnik
|
||||
Copyright (c) 1993-2002, Robert M Supnik
|
||||
Original code published in 1993-2003, written by Robert M Supnik
|
||||
Copyright (c) 1993-2003, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -161,7 +161,7 @@ interrupt system.
|
||||
OVF 1 overflow indicator
|
||||
IOCHK 1 I/O check switch
|
||||
PRCHK 1 process check switch
|
||||
ISQ 1 IS prior to last branch;
|
||||
ISQ[0:63] 14 IS prior to last branch;
|
||||
most recent IS change first
|
||||
WRU 8 interrupt character
|
||||
|
||||
@@ -184,26 +184,30 @@ the POS register specifies the number of the next data item to be read or
|
||||
written. Thus, by changing POS, the user can backspace or advance these
|
||||
devices.
|
||||
|
||||
The reader/punch registers are:
|
||||
The card reader registers are:
|
||||
|
||||
device name size comments
|
||||
name size comments
|
||||
|
||||
CDR LAST 1 last card indicator
|
||||
ERR 1 error indicator
|
||||
S1 1 stacker 1 select flag
|
||||
S2 1 stacker 2 select flag
|
||||
POS 32 position
|
||||
TIME 24 delay window for stacker select
|
||||
BUF[0:79] 8 reader buffer
|
||||
LAST 1 last card indicator
|
||||
ERR 1 error indicator
|
||||
S1 1 stacker 1 select flag
|
||||
S2 1 stacker 2 select flag
|
||||
POS 32 position
|
||||
TIME 24 delay window for stacker select
|
||||
BUF[0:79] 8 reader buffer
|
||||
|
||||
CDP ERR 1 error indicator
|
||||
S4 1 stacker 4 select flag
|
||||
S8 1 stacker 8 select flag
|
||||
The card punch registers are:
|
||||
|
||||
STKR POS0 32 position, normal reader stack
|
||||
POS1 32 position, reader stacker 1
|
||||
POS2 32 position, shared stacker 2/8
|
||||
POS4 32 position, punch stacker 4
|
||||
ERR 1 error indicator
|
||||
S4 1 stacker 4 select flag
|
||||
S8 1 stacker 8 select flag
|
||||
|
||||
The stacker registers are:
|
||||
|
||||
POS0 32 position, normal reader stack
|
||||
POS1 32 position, reader stacker 1
|
||||
POS2 32 position, shared stacker 2/8
|
||||
POS4 32 position, punch stacker 4
|
||||
|
||||
Error handling is as follows:
|
||||
|
||||
@@ -423,7 +427,7 @@ devices can only accept single character input, without word marks.
|
||||
|
||||
2.7 Character Sets
|
||||
|
||||
The IBM 1401 used a 6b character code called BCD (binary coded decimal).
|
||||
The IBM 1401 uses a 6b character code called BCD (binary coded decimal).
|
||||
Some of the characters have no equivalent in ASCII and require different
|
||||
representations:
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* i1401_dp.c: IBM 1311 disk simulator
|
||||
|
||||
Copyright (c) 2002, Robert M. Supnik
|
||||
Copyright (c) 2002-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* i1401_iq.c: IBM 1407 inquiry terminal
|
||||
|
||||
Copyright (c) 1993-2002, Robert M. Supnik
|
||||
Copyright (c) 1993-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* i1401_lp.c: IBM 1403 line printer simulator
|
||||
|
||||
Copyright (c) 1993-2002, Robert M. Supnik
|
||||
Copyright (c) 1993-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -25,6 +25,7 @@
|
||||
|
||||
lpt 1403 line printer
|
||||
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
30-May-02 RMS Widened POS to 32b
|
||||
13-Apr-01 RMS Revised for register arrays
|
||||
*/
|
||||
@@ -87,7 +88,7 @@ UNIT lpt_unit = {
|
||||
|
||||
REG lpt_reg[] = {
|
||||
{ FLDATA (ERR, ind[IN_LPT], 0) },
|
||||
{ DRDATA (POS, lpt_unit.pos, 32), PV_LEFT },
|
||||
{ DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ BRDATA (CCT, cct, 8, 32, CCT_LNT) },
|
||||
{ DRDATA (LINES, lines, 8), PV_LEFT },
|
||||
{ DRDATA (CCTP, cctptr, 8), PV_LEFT },
|
||||
|
||||
@@ -25,6 +25,9 @@
|
||||
|
||||
mt 7-track magtape
|
||||
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
28-Mar-03 RMS Added multiformat support
|
||||
15-Mar-03 RMS Fixed end-of-record on load read yet again
|
||||
28-Feb-03 RMS Modified for magtape library
|
||||
31-Oct-02 RMS Added error record handling
|
||||
10-Oct-02 RMS Fixed end-of-record on load read writes WM plus GM
|
||||
@@ -101,17 +104,19 @@ UNIT mt_unit[] = {
|
||||
REG mt_reg[] = {
|
||||
{ FLDATA (END, ind[IN_END], 0) },
|
||||
{ FLDATA (ERR, ind[IN_TAP], 0) },
|
||||
{ DRDATA (POS1, mt_unit[1].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS2, mt_unit[2].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS3, mt_unit[3].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS4, mt_unit[4].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS5, mt_unit[5].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS6, mt_unit[6].pos, 32), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS1, mt_unit[1].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS2, mt_unit[2].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS3, mt_unit[3].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS4, mt_unit[4].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS5, mt_unit[5].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ DRDATA (POS6, mt_unit[6].pos, T_ADDR_W), PV_LEFT + REG_RO },
|
||||
{ NULL } };
|
||||
|
||||
MTAB mt_mod[] = {
|
||||
{ MTUF_WLK, 0, "write enabled", "WRITEENABLED", NULL },
|
||||
{ MTUF_WLK, MTUF_WLK, "write locked", "LOCKED", NULL },
|
||||
{ MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT",
|
||||
&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
|
||||
{ 0 } };
|
||||
|
||||
DEVICE mt_dev = {
|
||||
@@ -173,6 +178,12 @@ return mt_map_status (st);
|
||||
mod = modifier character
|
||||
Outputs:
|
||||
status = status
|
||||
|
||||
Fine point: after a read, the system writes a group mark just
|
||||
beyond the end of the record. However, first it checks for a
|
||||
GM + WM; if present, the GM + WM is not changed. Otherwise,
|
||||
an MCW read sets a GM, preserving the current WM; while an LCA
|
||||
read sets a GM and clears the WM.
|
||||
*/
|
||||
|
||||
t_stat mt_io (int32 unit, int32 flag, int32 mod)
|
||||
@@ -211,8 +222,9 @@ case BCD_R: /* read */
|
||||
if (ADDR_ERR (BS)) { /* check next BS */
|
||||
BS = BA | (BS % MAXMEMSIZE);
|
||||
return STOP_WRAP; } }
|
||||
if (flag == MD_WM) M[BS] = WM | BCD_GRPMRK; /* load? set WM */
|
||||
else M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* move? save WM */
|
||||
if (M[BS] != (BCD_GRPMRK + WM)) { /* not GM+WM at end? */
|
||||
if (flag == MD_WM) M[BS] = BCD_GRPMRK; /* LCA: clear WM */
|
||||
else M[BS] = (M[BS] & WM) | BCD_GRPMRK; } /* MCW: save WM */
|
||||
BS++; /* adv BS */
|
||||
if (ADDR_ERR (BS)) { /* check final BS */
|
||||
BS = BA | (BS % MAXMEMSIZE);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* i1401_sys.c: IBM 1401 simulator interface
|
||||
|
||||
Copyright (c) 1993-2002, Robert M. Supnik
|
||||
Copyright (c) 1993-2003, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -23,6 +23,7 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
16-Mar-03 RMS Fixed mnemonic for MCS
|
||||
03-Jun-02 RMS Added 1311 support
|
||||
18-May-02 RMS Added -D feature from Van Snyder
|
||||
26-Jan-02 RMS Fixed H, NOP with no trailing wm (found by Van Snyder)
|
||||
@@ -158,7 +159,7 @@ const char *opcode[64] = {
|
||||
NULL, "R", "W", "WR", "P", "RP", "WP", "WRP",
|
||||
"RF", "WF", NULL, "MA", "MUL", NULL, NULL, NULL,
|
||||
NULL, "CS", "S", NULL, "MTF", "BWZ", "BBE", NULL,
|
||||
"MZ", "MSZ", NULL, "SWM", "DIV", NULL, NULL, NULL,
|
||||
"MZ", "MCS", NULL, "SWM", "DIV", NULL, NULL, NULL,
|
||||
NULL, NULL, "SS", "LCA", "MCW", "NOP", NULL, "MCM",
|
||||
"SAR", NULL, "ZS", NULL, NULL, NULL, NULL, NULL,
|
||||
NULL, "A", "B", "C", "MN", "MCE", "CC", NULL,
|
||||
|
||||
Reference in New Issue
Block a user