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mirror of https://github.com/simh/simh.git synced 2026-02-11 18:46:08 +00:00

Notes For V3.0-0

Because some key files have changed, V3.0 should be unzipped to a
clean directory.

1. New Features in 3.0-0

1.1 SCP and Libraries

- Added ASSIGN/DEASSIGN (logical name) commands.
- Changed RESTORE to unconditionally detach files.
- Added E11 and TPC format support to magtape library.
- Fixed bug in SHOW CONNECTIONS.
- Added USE_ADDR64 support

1.2 All magtapes

- Magtapes support SIMH format, E11 format, and TPC format (read only).
- SET <tape_unit> FORMAT=format sets the specified tape unit's format.
- SHOW <tape_unit> FORMAT displays the specified tape unit's format.
- Tape format can also be set as part of the ATTACH command, using
  the -F switch.

1.3 VAX

- VAX can be compiled without USE_INT64.
- If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support
  files > 2GB.
- VAX ROM has speed control (SET ROM DELAY/NODELAY).

2. Bugs Fixed in 3.01-0

2.1 VAX

- Fixed CVTfi bug: integer overflow not set if exponent out of range
- Fixed EMODx bugs:
  o First and second operands reversed
  o Separated fraction received wrong exponent
  o Overflow calculation on separated integer incorrect
  o Fraction not set to zero if exponent out of range
- Fixed interval timer and ROM access to pass power-up self-test even on very
  fast host processors (fixes from Mark Pizzolato).

2.2 1401

- Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS.
- Fixed MCE bug, BS off by 1 if zero suppress.
- Fixed chaining bug, D lost if return to SCP.
- Fixed H branch, branch occurs after continue.
- Added check for invalid 8 character MCW, LCA.
- Fixed magtape load-mode end of record response.

2.3 Nova

- Fixed DSK variable size interaction with restore.

2.4 PDP-1

- Fixed DT variable size interaction with restore.

2.5 PDP-11

- Fixed DT variable size interaction with restore.
- Fixed bug in MMR1 update (found by Tim Stark).
- Added XQ features and fixed bugs:
  o Corrected XQ interrupts on IE state transition (code by Tom Evans).
  o Added XQ interrupt clear on soft reset.
  o Removed XQ interrupt when setting XL or RL (multiple people).
  o Added SET/SHOW XQ STATS.
  o Added SHOW XQ FILTERS.
  o Added ability to split received packet into multiple buffers.
  o Added explicit runt and giant packet processing.

2.6 PDP-18B

- Fixed DT, RF variable size interaction with restore.
- Fixed MT bug in MTTR.

2.7 PDP-8

- Fixed DT, DF, RF, RX variable size interaction with restore.
- Fixed MT bug in SKTR.

2.8 HP2100

- Fixed bug in DP (13210A controller only), DQ read status.
- Fixed bug in DP, DQ seek complete.

2.9 GRI

- Fixed bug in SC queue pointer management.

3. New Features in 3.0 vs prior releases

N/A

4. Bugs Fixed in 3.0 vs prior releases

N/A

5. General Notes

WARNING: The RESTORE command has changed.  RESTORE will now
detach an attached file on a unit, if that unit did not have
an attached file in the saved configuration.  This is required
to assure that the unit flags and the file state are consistent.

WARNING: The compilation scheme for the PDP-10, PDP-11, and VAX
has changed.  Use one of the supplied build files, or read the
documentation carefully, before compiling any of these simulators.
This commit is contained in:
Bob Supnik
2003-06-25 09:20:00 -07:00
committed by Mark Pizzolato
parent 43385c9616
commit 4ffd3be790
215 changed files with 12913 additions and 8563 deletions

View File

@@ -46,8 +46,8 @@ sim/ sim_defs.h
sim_tmxr.c
sim/interdata/ id_defs.h
id16_cpu.c [or id32_cpu.c]
id16_dboot.c [or id32_dboot.c]
id16_cpu.c [id32_cpu.c]
id16_dboot.c [id32_dboot.c]
id_dp.c
id_fd.c
id_fp.c
@@ -60,7 +60,7 @@ sim/interdata/ id_defs.h
id_tt.c
id_ttp.c
id_uvc.c
id16_sys.c [or id32_sys.c]
id16_sys.c [id32_sys.c]
2. Interdata Features
@@ -235,9 +235,6 @@ control registers for the interrupt system.
R0..R15 32 active general register set
GREG[32] 32 general register sets, 16 x 2
FR0..FR14 32 single precision floating point registers
if double precision floating point; for
microcoded floating point, floating point
registers are kept in memory locations 00 - 1F
D0H..D14H 32 double precision floating point registers,
high order
D0L..D14L 32 double precision floating point registers,
@@ -521,8 +518,8 @@ The programmable interval clock (PIC) implements these registers:
IENB 1 clock interrupt enable
IARM 1 clock interrupt armed
If the interval requested is longer than 1 msec, and a multiple of
1 msec, the programmable clock auto-calibrates; if not, it simply
If the interval requested is an exact multiple of 1 msec, the
programmable clock auto-calibrates; if not, it simply counts
counts instructions.
2.4.7 Floppy Disk Controller (FD)
@@ -587,7 +584,7 @@ or 8B. In UC mode, lower case input and output characters are converted
automatically to upper case. In 7B mode, input and output characters are
masked to 7 bits. In 8B mode, characters are not modified. The default
mode is UC. Each line (each unit of PASL) can also be set for modem
control with the command SET PASLn DATASET. The defaults are UC mode
control with the command SET PASLn DATASET. The defaults are 7b mode
and DATASET disabled.
Once PAS is attached and the simulator is running, the terminals listen