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Notes For V3.0-0
Because some key files have changed, V3.0 should be unzipped to a clean directory. 1. New Features in 3.0-0 1.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support 1.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 1.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 2. Bugs Fixed in 3.01-0 2.1 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). 2.2 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. 2.3 Nova - Fixed DSK variable size interaction with restore. 2.4 PDP-1 - Fixed DT variable size interaction with restore. 2.5 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. 2.6 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. 2.7 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. 2.8 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. 2.9 GRI - Fixed bug in SC queue pointer management. 3. New Features in 3.0 vs prior releases N/A 4. Bugs Fixed in 3.0 vs prior releases N/A 5. General Notes WARNING: The RESTORE command has changed. RESTORE will now detach an attached file on a unit, if that unit did not have an attached file in the saved configuration. This is required to assure that the unit flags and the file state are consistent. WARNING: The compilation scheme for the PDP-10, PDP-11, and VAX has changed. Use one of the supplied build files, or read the documentation carefully, before compiling any of these simulators.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
43385c9616
commit
4ffd3be790
@@ -1,4 +1,4 @@
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/* pdp11_tq.c: TQK50 tape controller simulator
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/* pdp11_tq.c: TMSCP tape controller simulator
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Copyright (c) 2002-2003, Robert M Supnik
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@@ -25,6 +25,9 @@
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tq TQK50 tape controller
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19-May-03 RMS Revised for new conditional compilation scheme
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25-Apr-03 RMS Revised for extended file support
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28-Mar-03 RMS Added multiformat support
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28-Feb-03 RMS Added variable controller, user-defined drive support
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26-Feb-03 RMS Fixed bug in vector calculation for VAXen
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22-Feb-03 RMS Fixed ordering bug in queue process
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@@ -33,15 +36,18 @@
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17-Oct-02 RMS Fixed bug in read reverse (found by Hans Pufal)
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*/
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#if defined (USE_INT64)
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#include "vax_defs.h"
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#define VM_VAX 1
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#define TQ_RDX 16
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#if defined (VM_PDP10) /* PDP10 version */
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#error "TQK50 not supported on PDP-10!"
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#else
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#elif defined (VM_VAX) /* VAX version */
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#include "vax_defs.h"
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extern int32 int_req[IPL_HLVL];
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extern int32 int_vec[IPL_HLVL][32];
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#else /* PDP-11 version */
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#include "pdp11_defs.h"
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#define VM_PDP11 1
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#define TQ_RDX 8
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extern int32 int_req[IPL_HLVL];
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extern int32 int_vec[IPL_HLVL][32];
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extern int32 cpu_18b, cpu_ubm;
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#endif
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@@ -167,6 +173,7 @@ struct tqpkt {
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#define TQU_FMT (TF_CTP|TF_CTP_LO) /* menu */
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#define TQU_MINC 30 /* min cap MB */
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#define TQU_MAXC 2000 /* max cap MB */
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#define TQU_EMAXC 2000000000 /* ext max cap MB */
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#define TQ_DRV(d) \
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d##_UQPM, \
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@@ -180,7 +187,7 @@ struct drvtyp {
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uint32 cmod; /* ctrl model */
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uint32 med; /* MSCP media */
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uint32 fmt; /* flags */
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uint32 cap; /* capacity */
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t_addr cap; /* capacity */
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uint32 umod; /* unit model */
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uint32 cver;
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uint32 fver;
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@@ -202,6 +209,7 @@ extern int32 tmr_poll, clk_tps;
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extern int32 cpu_log;
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extern UNIT cpu_unit;
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extern FILE *sim_log;
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extern uint32 sim_taddr_64;
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uint8 *tqxb = NULL; /* xfer buffer */
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uint32 tq_sa = 0; /* status, addr */
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@@ -353,28 +361,28 @@ UNIT tq_unit[] = {
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#define TQ_QUEUE (TQ_TIMER + 1)
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REG tq_reg[] = {
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{ GRDATA (SA, tq_sa, TQ_RDX, 16, 0) },
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{ GRDATA (SAW, tq_saw, TQ_RDX, 16, 0) },
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{ GRDATA (S1DAT, tq_s1dat, TQ_RDX, 16, 0) },
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{ GRDATA (CQBA, tq_cq.ba, TQ_RDX, 22, 0) },
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{ GRDATA (CQLNT, tq_cq.lnt, TQ_RDX, 8, 2), REG_NZ },
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{ GRDATA (CQIDX, tq_cq.idx, TQ_RDX, 8, 2) },
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{ GRDATA (TQBA, tq_rq.ba, TQ_RDX, 22, 0) },
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{ GRDATA (TQLNT, tq_rq.lnt, TQ_RDX, 8, 2), REG_NZ },
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{ GRDATA (TQIDX, tq_rq.idx, TQ_RDX, 8, 2) },
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{ GRDATA (SA, tq_sa, DEV_RDX, 16, 0) },
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{ GRDATA (SAW, tq_saw, DEV_RDX, 16, 0) },
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{ GRDATA (S1DAT, tq_s1dat, DEV_RDX, 16, 0) },
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{ GRDATA (CQBA, tq_cq.ba, DEV_RDX, 22, 0) },
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{ GRDATA (CQLNT, tq_cq.lnt, DEV_RDX, 8, 2), REG_NZ },
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{ GRDATA (CQIDX, tq_cq.idx, DEV_RDX, 8, 2) },
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{ GRDATA (TQBA, tq_rq.ba, DEV_RDX, 22, 0) },
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{ GRDATA (TQLNT, tq_rq.lnt, DEV_RDX, 8, 2), REG_NZ },
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{ GRDATA (TQIDX, tq_rq.idx, DEV_RDX, 8, 2) },
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{ DRDATA (FREE, tq_freq, 5) },
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{ DRDATA (RESP, tq_rspq, 5) },
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{ DRDATA (PBSY, tq_pbsy, 5) },
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{ GRDATA (CFLGS, tq_cflgs, TQ_RDX, 16, 0) },
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{ GRDATA (CSTA, tq_csta, TQ_RDX, 4, 0) },
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{ GRDATA (PERR, tq_perr, TQ_RDX, 9, 0) },
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{ GRDATA (CFLGS, tq_cflgs, DEV_RDX, 16, 0) },
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{ GRDATA (CSTA, tq_csta, DEV_RDX, 4, 0) },
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{ GRDATA (PERR, tq_perr, DEV_RDX, 9, 0) },
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{ DRDATA (CRED, tq_credits, 5) },
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{ DRDATA (HAT, tq_hat, 17) },
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{ DRDATA (HTMO, tq_htmo, 17) },
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{ URDATA (CPKT, tq_unit[0].cpkt, 10, 5, 0, TQ_NUMDR, 0) },
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{ URDATA (PKTQ, tq_unit[0].pktq, 10, 5, 0, TQ_NUMDR, 0) },
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{ URDATA (UFLG, tq_unit[0].uf, TQ_RDX, 16, 0, TQ_NUMDR, 0) },
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{ URDATA (POS, tq_unit[0].pos, 10, 32, 0, TQ_NUMDR, 0) },
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{ URDATA (UFLG, tq_unit[0].uf, DEV_RDX, 16, 0, TQ_NUMDR, 0) },
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{ URDATA (POS, tq_unit[0].pos, 10, T_ADDR_W, 0, TQ_NUMDR, 0) },
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{ URDATA (OBJP, tq_unit[0].objp, 10, 32, 0, TQ_NUMDR, 0) },
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{ FLDATA (PRGI, tq_prgi, 0), REG_HIDDEN },
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{ FLDATA (PIP, tq_pip, 0), REG_HIDDEN },
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@@ -383,11 +391,11 @@ REG tq_reg[] = {
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{ DRDATA (I4TIME, tq_itime4, 24), PV_LEFT + REG_NZ },
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{ DRDATA (QTIME, tq_qtime, 24), PV_LEFT + REG_NZ },
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{ DRDATA (XTIME, tq_xtime, 24), PV_LEFT + REG_NZ },
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{ BRDATA (PKTS, tq_pkt, TQ_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1)) },
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{ BRDATA (PKTS, tq_pkt, DEV_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1)) },
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{ DRDATA (DEVTYPE, tq_typ, 2), REG_HRO },
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{ DRDATA (DEVCAP, drv_tab[TQU_TYPE].cap, 31), REG_HRO },
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{ GRDATA (DEVADDR, tq_dib.ba, TQ_RDX, 32, 0), REG_HRO },
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{ GRDATA (DEVVEC, tq_dib.vec, TQ_RDX, 16, 0), REG_HRO },
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{ DRDATA (DEVCAP, drv_tab[TQU_TYPE].cap, T_ADDR_W), PV_LEFT | REG_HRO },
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{ GRDATA (DEVADDR, tq_dib.ba, DEV_RDX, 32, 0), REG_HRO },
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{ GRDATA (DEVVEC, tq_dib.vec, DEV_RDX, 16, 0), REG_HRO },
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{ NULL } };
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MTAB tq_mod[] = {
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@@ -415,6 +423,8 @@ MTAB tq_mod[] = {
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NULL, &tq_show_ctrl, NULL },
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{ MTAB_XTD | MTAB_VUN | MTAB_NMO, 0, "UNITQ", NULL,
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NULL, &tq_show_unitq, NULL },
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{ MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT",
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&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
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#if defined (VM_PDP11)
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{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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@@ -428,7 +438,7 @@ MTAB tq_mod[] = {
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DEVICE tq_dev = {
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"TQ", tq_unit, tq_reg, tq_mod,
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TQ_NUMDR + 2, 10, 31, 1, TQ_RDX, 8,
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TQ_NUMDR + 2, 10, 31, 1, DEV_RDX, 8,
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NULL, NULL, &tq_reset,
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&tq_boot, &tq_attach, &tq_detach,
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&tq_dib, DEV_DISABLE | DEV_UBUS | DEV_QBUS };
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@@ -478,7 +488,7 @@ return SCPE_OK;
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t_bool tq_step4 (void)
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{
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int32 i, lnt;
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t_addr base;
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uint32 base;
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uint16 zero[SA_COMM_MAX >> 1];
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tq_rq.ioff = SA_COMM_RI; /* set intr offset */
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@@ -1246,7 +1256,7 @@ uint32 st, skrec;
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*skipped = 0;
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while (*skipped < cnt) { /* loop */
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st = tq_spacef (uptr, INT_MAX, &skrec, TRUE); /* rec spc fwd */
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st = tq_spacef (uptr, 0x7FFFFFFF, &skrec, TRUE);/* rec spc fwd */
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if (st == ST_TMK) *skipped = *skipped + 1; /* count files */
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else if (st != ST_SUC) return st; }
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return ST_SUC;
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@@ -1274,7 +1284,7 @@ uint32 st, skrec;
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*skipped = 0;
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while (*skipped < cnt) { /* loopo */
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st = tq_spacer (uptr, INT_MAX, &skrec, TRUE); /* rec spc rev */
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st = tq_spacer (uptr, 0x7FFFFFFF, &skrec, TRUE);/* rec spc rev */
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if (st == ST_TMK) *skipped = *skipped + 1; /* tape mark? */
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else if (st != 0) return st; } /* error? */
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return ST_SUC;
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@@ -1459,8 +1469,7 @@ return;
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t_bool tq_getpkt (int32 *pkt)
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{
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uint32 desc;
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t_addr addr;
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uint32 addr, desc;
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if (!tq_getdesc (&tq_cq, &desc)) return ERR; /* get cmd desc */
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if ((desc & UQ_DESC_OWN) == 0) { /* none */
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@@ -1481,8 +1490,7 @@ return tq_putdesc (&tq_cq, desc); /* release desc */
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t_bool tq_putpkt (int32 pkt, t_bool qt)
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{
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uint32 desc, lnt, cr;
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t_addr addr;
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uint32 addr, desc, lnt, cr;
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if (pkt == 0) return OK; /* any packet? */
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if (DBG_LOG (LOG_TQ)) {
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@@ -1517,7 +1525,7 @@ return tq_putdesc (&tq_rq, desc); /* release desc */
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t_bool tq_getdesc (struct uq_ring *ring, uint32 *desc)
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{
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t_addr addr = ring->ba + ring->idx;
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uint32 addr = ring->ba + ring->idx;
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uint16 d[2];
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if (Map_ReadW (addr, 4, d, MAP)) /* fetch desc */
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@@ -1535,7 +1543,7 @@ return OK;
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t_bool tq_putdesc (struct uq_ring *ring, uint32 desc)
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{
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uint32 prvd, newd = (desc & ~UQ_DESC_OWN) | UQ_DESC_F;
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t_addr prva, addr = ring->ba + ring->idx;
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uint32 prva, addr = ring->ba + ring->idx;
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uint16 d[2];
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d[0] = newd & 0xFFFF; /* 32b to 16b */
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@@ -1638,7 +1646,7 @@ return;
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void tq_ring_int (struct uq_ring *ring)
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{
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t_addr iadr = tq_comm + ring->ioff; /* addr intr wd */
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uint32 iadr = tq_comm + ring->ioff; /* addr intr wd */
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uint16 flag = 1;
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Map_WriteW (iadr, 2, &flag, MAP); /* write flag */
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@@ -1976,7 +1984,8 @@ return SCPE_OK;
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tq_set_type (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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int32 i, cap;
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uint32 i, cap;
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uint32 max = sim_taddr_64? TQU_EMAXC: TQU_MAXC;
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t_stat r;
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if ((val < 0) || (val > TQU_TYPE) || ((val != TQU_TYPE) && cptr))
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@@ -1984,9 +1993,9 @@ if ((val < 0) || (val > TQU_TYPE) || ((val != TQU_TYPE) && cptr))
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for (i = 0; i < TQ_NUMDR; i++) {
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if (tq_unit[i].flags & UNIT_ATT) return SCPE_ALATT; }
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if (cptr) {
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cap = (int32) get_uint (cptr, 10, TQU_MAXC, &r);
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cap = (uint32) get_uint (cptr, 10, max, &r);
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if ((r != SCPE_OK) || (cap < TQU_MINC)) return SCPE_ARG;
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drv_tab[TQU_TYPE].cap = cap << 20; }
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drv_tab[TQU_TYPE].cap = ((t_addr) cap) << 20; }
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tq_typ = val;
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return SCPE_OK;
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}
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