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Notes For V3.7-0

1. New Features

1.1 3.7-0

1.1.1 SCP

- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
  execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
  Dave Bryan).

1.1.2 HP2100

- Added Double Integer instructions, 1000-F CPU, and Floating Point
  Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
  21xx binary loader protection (from Dave Bryan).

1.1.3 Interdata

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state.

1.1.4 PDP-11

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (WAIT instruction executed).
- Added TA11/TU60 cassette support.

1.1.5 PDP-8

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.

1.1.6 PDP-1

- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.

1.1.6 PDP-4/7/9/15

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).

1.1.7 VAX, VAX780

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).

1.1.8 PDP-10

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (operating system dependent).
- Added CD20 (CD11) support.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2007-02-03 14:59:00 -08:00
committed by Mark Pizzolato
parent 15919a2dd7
commit 53d02f7fa7
161 changed files with 18604 additions and 6903 deletions

View File

@@ -1,6 +1,6 @@
/* id_uvc.c: Interdata universal clock
Copyright (c) 2001-2005, Robert M. Supnik
Copyright (c) 2001-2006, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
pic precision incremental clock
lfc line frequency clock
18-Oct-06 RMS Changed LFC to be free running, export tmr_poll
23-Jul-05 RMS Fixed {} error in OC
01-Mar-03 RMS Added SET/SHOW LFC FREQ support
Changed precision clock algorithm for V7 UNIX
@@ -75,6 +76,7 @@ void pic_sched (t_bool strt);
uint32 pic_rd_cic (void);
int32 lfc_tps = 120; /* ticks per */
int32 lfc_poll = 8000;
uint32 lfc_arm = 0; /* int arm */
DEVICE lfc_dev;
@@ -314,8 +316,6 @@ return SCPE_OK;
uint32 lfc (uint32 dev, uint32 op, uint32 dat)
{
int32 t;
switch (op) { /* case IO op */
case IO_ADR: /* select */
@@ -323,10 +323,6 @@ switch (op) { /* case IO op */
case IO_OC: /* command */
lfc_arm = int_chg (v_LFC, dat, lfc_arm); /* upd int ctrl */
if (lfc_arm && !sim_is_active (&lfc_unit)) { /* starting? */
t = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
sim_activate (&lfc_unit, t); /* init clock */
}
break;
}
return 0;
@@ -336,13 +332,10 @@ return 0;
t_stat lfc_svc (UNIT *uptr)
{
int32 t;
lfc_poll = sim_rtcn_calb (lfc_tps, TMR_LFC); /* calibrate */
sim_activate (uptr, lfc_poll); /* reactivate */
if (lfc_arm) { /* armed? */
SET_INT (v_LFC); /* req intr */
if (pic_unit.flags & UNIT_DIAG) t = uptr->wait; /* diag? fixed delay */
else t = sim_rtcn_calb (lfc_tps, TMR_LFC); /* else calibrate */
sim_activate (uptr, t); /* reactivate */
}
return SCPE_OK;
}
@@ -351,7 +344,8 @@ return SCPE_OK;
t_stat lfc_reset (DEVICE *dptr)
{
sim_cancel (&lfc_unit); /* cancel unit */
lfc_poll = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
sim_activate_abs (&lfc_unit, lfc_poll); /* init clock */
CLR_INT (v_LFC); /* clear int */
CLR_ENB (v_LFC); /* disable int */
lfc_arm = 0; /* disarm int */