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Notes For V3.7-0
1. New Features 1.1 3.7-0 1.1.1 SCP - Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator execution rate and host resource utilization. - Added idle support (based on work by Mark Pizzolato). - Added -e to control error processing in nested DO commands (from Dave Bryan). 1.1.2 HP2100 - Added Double Integer instructions, 1000-F CPU, and Floating Point Processor (from Dave Bryan). - Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and 21xx binary loader protection (from Dave Bryan). 1.1.3 Interdata - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state. 1.1.4 PDP-11 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (WAIT instruction executed). - Added TA11/TU60 cassette support. 1.1.5 PDP-8 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). - Added TA8E/TU60 cassette support. 1.1.6 PDP-1 - Added support for 16-channel sequence break system. - Added support for PDP-1D extended features and timesharing clock. - Added support for Type 630 data communications subsystem. 1.1.6 PDP-4/7/9/15 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). 1.1.7 VAX, VAX780 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode). 1.1.8 PDP-10 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (operating system dependent). - Added CD20 (CD11) support. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
committed by
Mark Pizzolato
parent
15919a2dd7
commit
53d02f7fa7
@@ -1,6 +1,6 @@
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/* id_uvc.c: Interdata universal clock
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Copyright (c) 2001-2005, Robert M. Supnik
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Copyright (c) 2001-2006, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -26,6 +26,7 @@
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pic precision incremental clock
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lfc line frequency clock
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18-Oct-06 RMS Changed LFC to be free running, export tmr_poll
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23-Jul-05 RMS Fixed {} error in OC
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01-Mar-03 RMS Added SET/SHOW LFC FREQ support
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Changed precision clock algorithm for V7 UNIX
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@@ -75,6 +76,7 @@ void pic_sched (t_bool strt);
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uint32 pic_rd_cic (void);
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int32 lfc_tps = 120; /* ticks per */
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int32 lfc_poll = 8000;
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uint32 lfc_arm = 0; /* int arm */
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DEVICE lfc_dev;
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@@ -314,8 +316,6 @@ return SCPE_OK;
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uint32 lfc (uint32 dev, uint32 op, uint32 dat)
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{
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int32 t;
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switch (op) { /* case IO op */
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case IO_ADR: /* select */
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@@ -323,10 +323,6 @@ switch (op) { /* case IO op */
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case IO_OC: /* command */
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lfc_arm = int_chg (v_LFC, dat, lfc_arm); /* upd int ctrl */
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if (lfc_arm && !sim_is_active (&lfc_unit)) { /* starting? */
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t = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
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sim_activate (&lfc_unit, t); /* init clock */
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}
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break;
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}
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return 0;
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@@ -336,13 +332,10 @@ return 0;
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t_stat lfc_svc (UNIT *uptr)
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{
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int32 t;
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lfc_poll = sim_rtcn_calb (lfc_tps, TMR_LFC); /* calibrate */
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sim_activate (uptr, lfc_poll); /* reactivate */
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if (lfc_arm) { /* armed? */
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SET_INT (v_LFC); /* req intr */
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if (pic_unit.flags & UNIT_DIAG) t = uptr->wait; /* diag? fixed delay */
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else t = sim_rtcn_calb (lfc_tps, TMR_LFC); /* else calibrate */
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sim_activate (uptr, t); /* reactivate */
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}
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return SCPE_OK;
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}
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@@ -351,7 +344,8 @@ return SCPE_OK;
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t_stat lfc_reset (DEVICE *dptr)
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{
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sim_cancel (&lfc_unit); /* cancel unit */
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lfc_poll = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
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sim_activate_abs (&lfc_unit, lfc_poll); /* init clock */
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CLR_INT (v_LFC); /* clear int */
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CLR_ENB (v_LFC); /* disable int */
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lfc_arm = 0; /* disarm int */
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