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mirror of https://github.com/simh/simh.git synced 2026-04-25 19:51:25 +00:00

Notes For V3.7-0

1. New Features

1.1 3.7-0

1.1.1 SCP

- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
  execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
  Dave Bryan).

1.1.2 HP2100

- Added Double Integer instructions, 1000-F CPU, and Floating Point
  Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
  21xx binary loader protection (from Dave Bryan).

1.1.3 Interdata

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state.

1.1.4 PDP-11

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (WAIT instruction executed).
- Added TA11/TU60 cassette support.

1.1.5 PDP-8

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.

1.1.6 PDP-1

- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.

1.1.6 PDP-4/7/9/15

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).

1.1.7 VAX, VAX780

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).

1.1.8 PDP-10

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (operating system dependent).
- Added CD20 (CD11) support.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2007-02-03 14:59:00 -08:00
committed by Mark Pizzolato
parent 15919a2dd7
commit 53d02f7fa7
161 changed files with 18604 additions and 6903 deletions

View File

@@ -1,7 +1,7 @@
/* pdp11_xu.c: DEUNA/DELUA ethernet controller simulator
------------------------------------------------------------------------------
Copyright (c) 2003-2005, David T. Hittner
Copyright (c) 2003-2006, David T. Hittner
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -57,6 +57,7 @@
Modification history:
29-Oct-06 RMS Synced poll and clock
08-Dec-05 DTH Implemented ancilliary functions 022/023/024/025
18-Nov-05 DTH Corrected time between system ID packets
07-Sep-05 DTH Corrected runt packet processing (found by Tim Chapman),
@@ -83,7 +84,7 @@
#include "pdp11_xu.h"
extern int32 tmr_poll, clk_tps, cpu_astop;
extern int32 tmxr_poll, tmr_poll, clk_tps, cpu_astop;
extern FILE *sim_log;
t_stat xu_rd(int32* data, int32 PA, int32 access);
@@ -449,8 +450,8 @@ t_stat xu_svc(UNIT* uptr)
int queue_size;
t_stat status;
CTLR* xu = xu_unit2ctlr(uptr);
const int one_second = clk_tps * tmr_poll; /* recalibrate timer */
const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00};
const int one_second = clk_tps * tmr_poll;
/* First pump any queued packets into the system */
if ((xu->var->ReadQ.count > 0) && ((xu->var->pcsr1 & PCSR1_STATE) == STATE_RUNNING))
@@ -486,7 +487,7 @@ t_stat xu_svc(UNIT* uptr)
switch (xu->var->pcsr1 & PCSR1_STATE) {
case STATE_READY:
case STATE_RUNNING:
sim_activate(&xu->unit[0], one_second/XU_SERVICE_INTERVAL);
sim_activate(&xu->unit[0], tmxr_poll);
break;
};
@@ -522,7 +523,6 @@ void xu_setclrint(CTLR* xu, int32 bits)
t_stat xu_sw_reset (CTLR* xu)
{
t_stat status;
const int one_second = clk_tps * tmr_poll; /* recalibrate timer */
sim_debug(DBG_TRC, xu->dev, "xu_sw_reset()\n");
@@ -564,10 +564,9 @@ t_stat xu_sw_reset (CTLR* xu)
&xu->var->mac, xu->var->setup.multicast,
xu->var->setup.promiscuous);
/* activate device if not disabled - cancel first, just in case */
/* activate device if not disabled */
if ((xu->dev->flags & DEV_DIS) == 0) {
sim_cancel(&xu->unit[0]);
sim_activate(&xu->unit[0], one_second/XU_SERVICE_INTERVAL);
sim_activate_abs(&xu->unit[0], clk_cosched (tmxr_poll));
}
/* clear load_server address */
@@ -727,9 +726,9 @@ sim_debug(DBG_TRC, xu->dev, "FC_WAL: mtlen=%d\n", mtlen);
xu->var->rrlen = xu->var->udb[5];
xu->var->rxnext = 0;
xu->var->txnext = 0;
xu_dump_rxring(xu);
xu_dump_txring(xu);
/*cpu_astop=1;*/
// xu_dump_rxring(xu);
// xu_dump_txring(xu);
break;
case FC_RDCTR: /* read counters */
@@ -1072,7 +1071,7 @@ void xu_process_receive(CTLR* xu)
/* set or clear interrupt, depending on what happened */
xu_setclrint(xu, 0);
xu_dump_rxring(xu); /* debug receive ring */
// xu_dump_rxring(xu); /* debug receive ring */
}