Notes For V3.7-0

1. New Features

1.1 3.7-0

1.1.1 SCP

- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
  execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
  Dave Bryan).

1.1.2 HP2100

- Added Double Integer instructions, 1000-F CPU, and Floating Point
  Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
  21xx binary loader protection (from Dave Bryan).

1.1.3 Interdata

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state.

1.1.4 PDP-11

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (WAIT instruction executed).
- Added TA11/TU60 cassette support.

1.1.5 PDP-8

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.

1.1.6 PDP-1

- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.

1.1.6 PDP-4/7/9/15

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).

1.1.7 VAX, VAX780

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).

1.1.8 PDP-10

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (operating system dependent).
- Added CD20 (CD11) support.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.

VAX/vax780_stddev.c

@@ -29,6 +29,8 @@
    todr         TODR clock
    tmr          interval timer
 
+   29-Oct-2006  RMS     Added clock coscheduler function
+                        Synced keyboard to clock for idling
    11-May-06    RMS     Revised timer logic for EVKAE
    22-Nov-05    RMS     Revised for new terminal processing routines
    10-Mar-05    RMS     Fixed bug in timer schedule routine (from Mark Hittinger)
@@ -102,7 +104,7 @@
 #define TMR_CSR_WR      (TMR_CSR_IE | TMR_CSR_RUN)
 #define TMR_INC         10000                           /* usec/interval */
 #define CLK_DELAY       5000                            /* 100 Hz */
-#define TMXR_MULT       2                               /* 50 Hz */
+#define TMXR_MULT       1                               /* 100 Hz */
 
 /* Floppy definitions */
 
@@ -210,7 +212,7 @@ void fl_protocol_error (void);
    tti_reg      TTI register list
 */
 
-UNIT tti_unit = { UDATA (&tti_svc, TT_MODE_8B, 0), KBD_POLL_WAIT };
+UNIT tti_unit = { UDATA (&tti_svc, TT_MODE_8B, 0), 0 };
 
 REG tti_reg[] = {
     { HRDATA (RXDB, tti_buf, 16) },
@@ -219,7 +221,7 @@ REG tti_reg[] = {
     { FLDATA (DONE, tti_csr, CSR_V_DONE) },
     { FLDATA (IE, tti_csr, CSR_V_IE) },
     { DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
-    { DRDATA (TIME, tti_unit.wait, 24), REG_NZ + PV_LEFT },
+    { DRDATA (TIME, tti_unit.wait, 24), PV_LEFT },
     { NULL }
     };
 
@@ -253,7 +255,7 @@ REG tto_reg[] = {
     { FLDATA (DONE, tto_csr, CSR_V_DONE) },
     { FLDATA (IE, tto_csr, CSR_V_IE) },
     { DRDATA (POS, tto_unit.pos, T_ADDR_W), PV_LEFT },
-    { DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
+    { DRDATA (TIME, tto_unit.wait, 24), PV_LEFT + REG_NZ },
     { NULL }
     };
 
@@ -416,7 +418,7 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 c;
 
-sim_activate (uptr, uptr->wait);                        /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll));   /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c;       /* no char or error? */
 if (c & SCPE_BREAK)                                     /* break? */
     tti_buf = RXDB_ERR | RXDB_FRM;
@@ -434,7 +436,7 @@ t_stat tti_reset (DEVICE *dptr)
 tti_buf = 0;
 tti_csr = 0;
 tti_int = 0;
-sim_activate (&tti_unit, tti_unit.wait);                /* activate unit */
+sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
 return SCPE_OK;
 }
 
@@ -613,12 +615,22 @@ else tmr_use_100hz = 1;                                 /* let clk handle */
 return;
 }
 
+/* Clock coscheduling routine */
+
+int32 clk_cosched (int32 wait)
+{
+int32 t;
+
+t = sim_is_active (&clk_unit);
+return (t? t - 1: wait);
+}
+
 /* 100Hz clock reset */
 
 t_stat clk_reset (DEVICE *dptr)
 {
 tmr_poll = sim_rtcn_init (clk_unit.wait, TMR_CLK);      /* init 100Hz timer */
-sim_activate (&clk_unit, tmr_poll);                     /* activate 100Hz unit */
+sim_activate_abs (&clk_unit, tmr_poll);                 /* activate 100Hz unit */
 tmxr_poll = tmr_poll * TMXR_MULT;                       /* set mux poll */
 return SCPE_OK;
 }