Notes For V3.7-0

1. New Features

1.1 3.7-0

1.1.1 SCP

- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
  execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
  Dave Bryan).

1.1.2 HP2100

- Added Double Integer instructions, 1000-F CPU, and Floating Point
  Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
  21xx binary loader protection (from Dave Bryan).

1.1.3 Interdata

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state.

1.1.4 PDP-11

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (WAIT instruction executed).
- Added TA11/TU60 cassette support.

1.1.5 PDP-8

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.

1.1.6 PDP-1

- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.

1.1.6 PDP-4/7/9/15

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).

1.1.7 VAX, VAX780

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).

1.1.8 PDP-10

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (operating system dependent).
- Added CD20 (CD11) support.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.

VAX/vax_cpu1.c

@@ -111,6 +111,8 @@ extern t_bool chk_tb_ent (uint32 va);
 extern int32 ReadIPR (int32 rg);
 extern void WriteIPR (int32 rg, int32 val);
 extern t_bool BadCmPSL (int32 newpsl);
+extern int32 cpu_psl_ipl (int32 newpsl);
+
 extern jmp_buf save_env;
 
 /* Branch on bit and no modify
@@ -1079,9 +1081,9 @@ else {
         SP = KSP;                                       /* new stack */
         }
     }
-if (ei > 0) PSL = newpsl | (ipl << PSL_V_IPL);          /* if int, new IPL */
-else PSL = newpsl | ((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) |
-    (oldcur << PSL_V_PRV);
+if (ei > 0) PSL = cpu_psl_ipl (newpsl | (ipl << PSL_V_IPL)); /* if int, new IPL */
+else PSL = cpu_psl_ipl (newpsl |
+    ((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) | (oldcur << PSL_V_PRV));
 if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
     ">>IEX: PC=%08x, PSL=%08x, SP=%08x, VEC=%08x, nPSL=%08x, nSP=%08x\n",
     PC, oldpsl, oldsp, vec, PSL, SP);
@@ -1124,7 +1126,7 @@ Write (tsp - 8, PC, L_LONG, WA);                        /* push PC */
 Write (tsp - 4, PSL | cc, L_LONG, WA);                  /* push PSL */
 SP = tsp - 12;                                          /* set new stk */
 PSL = (mode << PSL_V_CUR) | (PSL & PSL_IPL) |           /* set new PSL */
-    (cur << PSL_V_PRV);
+    (cur << PSL_V_PRV);                                 /* IPL unchanged */
 last_chm = fault_PC;
 JUMP (newpc & ~03);                                     /* set new PC */
 return 0;                                               /* cc = 0 */
@@ -1184,7 +1186,7 @@ else STK[oldcur] = SP;
 if (DEBUG_PRI (cpu_dev, LOG_CPU_R)) fprintf (sim_deb,
     ">>REI: PC=%08x, PSL=%08x, SP=%08x, nPC=%08x, nPSL=%08x, nSP=%08x\n",
     PC, PSL, SP - 8, newpc, newpsl, ((newpsl & IS)? IS: STK[newcur]));
-PSL = (PSL & PSL_TP) | (newpsl & ~CC_MASK);             /* set new PSL */
+PSL = cpu_psl_ipl ((PSL & PSL_TP) | (newpsl & ~CC_MASK)); /* set new PSL */
 if (PSL & PSL_IS) SP = IS;                              /* set new stack */
 else {
     SP = STK[newcur];                                   /* if ~IS, chk AST */
@@ -1275,7 +1277,8 @@ if (PSL & PSL_IS) SP = SP + 8;                          /* int stack? */
 else {
     KSP = SP + 8;                                       /* pop kernel stack */
     SP = IS;                                            /* switch to int stk */
-    if ((PSL & PSL_IPL) == 0) PSL = PSL | PSL_IPL1;     /* make IPL > 0 */
+    if ((PSL & PSL_IPL) == 0)                           /* make IPL > 0 */
+         PSL = cpu_psl_ipl (PSL | PSL_IPL1);
     PSL = PSL | PSL_IS;                                 /* set PSL<is> */
     }
 pcbpa = PCBB & PAMASK;
@@ -1436,7 +1439,7 @@ switch (prn) {                                          /* case on reg # */
         break;
 
     case MT_IPL:                                        /* IPL */
-        PSL = (PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL);
+        PSL = cpu_psl_ipl ((PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL));
         break;
 
     case MT_ASTLVL:                                     /* ASTLVL */