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Notes For V3.7-0
1. New Features 1.1 3.7-0 1.1.1 SCP - Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator execution rate and host resource utilization. - Added idle support (based on work by Mark Pizzolato). - Added -e to control error processing in nested DO commands (from Dave Bryan). 1.1.2 HP2100 - Added Double Integer instructions, 1000-F CPU, and Floating Point Processor (from Dave Bryan). - Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and 21xx binary loader protection (from Dave Bryan). 1.1.3 Interdata - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state. 1.1.4 PDP-11 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (WAIT instruction executed). - Added TA11/TU60 cassette support. 1.1.5 PDP-8 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). - Added TA8E/TU60 cassette support. 1.1.6 PDP-1 - Added support for 16-channel sequence break system. - Added support for PDP-1D extended features and timesharing clock. - Added support for Type 630 data communications subsystem. 1.1.6 PDP-4/7/9/15 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). 1.1.7 VAX, VAX780 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode). 1.1.8 PDP-10 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (operating system dependent). - Added CD20 (CD11) support. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
committed by
Mark Pizzolato
parent
15919a2dd7
commit
53d02f7fa7
@@ -85,7 +85,7 @@
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#define CMERR_BUS 0x00000080 /* bus err NI */
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#define CMERR_SYN 0x0000007F /* syndrome NI */
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#define CMERR_W1C (CMERR_RDS | CMERR_FRQ | CMERR_CRD | \
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CMERR_DMA | CMERR_BUS)
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CMERR_DMA | CMERR_BUS)
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/* CMCTL control/status register */
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@@ -97,7 +97,7 @@
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#define CMCSR_DCM 0x00000080 /* diag mode NI */
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#define CMCSR_SYN 0x0000007F /* syndrome NI */
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#define CMCSR_MASK (CMCSR_PMI | CMCSR_CRD | CMCSR_DET | \
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CMCSR_FDT | CMCSR_DCM | CMCSR_SYN)
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CMCSR_FDT | CMCSR_DCM | CMCSR_SYN)
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/* KA655 boot/diagnostic register */
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@@ -276,6 +276,7 @@ extern void txcs_wr (int32 dat);
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extern void txdb_wr (int32 dat);
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extern void ioreset_wr (int32 dat);
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extern uint32 sim_os_msec();
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extern int32 cpu_psl_ipl (int32 newpsl);
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/* ROM data structures
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@@ -901,7 +902,7 @@ struct reglink { /* register linkage */
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uint32 low; /* low addr */
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uint32 high; /* high addr */
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t_stat (*read)(int32 pa); /* read routine */
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void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
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void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
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};
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struct reglink regtable[] = {
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@@ -1047,10 +1048,10 @@ int32 rg = (pa - KABASE) >> 2;
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switch (rg) {
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case 0: /* CACR */
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case 0: /* CACR */
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return ka_cacr;
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case 1: /* BDR */
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case 1: /* BDR */
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return ka_bdr;
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}
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@@ -1500,7 +1501,7 @@ else STK[temp] = SP; /* save stack */
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if (mapen) conpsl = conpsl | CON_MAPON; /* mapping on? */
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mapen = 0; /* turn off map */
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SP = IS; /* set SP from IS */
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PSL = PSL_IS | PSL_IPL1F; /* PSL = 41F0000 */
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PSL = cpu_psl_ipl (PSL_IS | PSL_IPL1F); /* PSL = 41F0000 */
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JUMP (ROMBASE); /* PC = 20040000 */
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return 0; /* new cc = 0 */
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}
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@@ -1514,7 +1515,7 @@ extern FILE *sim_log;
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t_stat r;
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PC = ROMBASE;
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PSL = PSL_IS | PSL_IPL1F;
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PSL = cpu_psl_ipl (PSL_IS | PSL_IPL1F);
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conpc = 0;
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conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
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if (rom == NULL) return SCPE_IERR;
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@@ -1569,4 +1570,3 @@ ssc_bto = 0;
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ssc_otp = 0;
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return SCPE_OK;
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}
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