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PDP10,PDP11,VAX: Addition of inter operable DUP11, DMC11 and KDP11 devices

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This is the results of external KDP development activities.  The KDP side done by Timothe Litt and DMC and DUP by Mark Pizzolato

Additionally, other PDP10 updates from Timothe Litt
This commit is contained in:
Mark Pizzolato
2013-11-25 07:00:17 -08:00
parent a7c2d7bf35
commit 55c5d20517
28 changed files with 7817 additions and 2627 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
PDP10/pdp10_defs.h
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@@ -115,7 +115,8 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
#define STOP_ILLIOC 10 /* invalid UBA num */
#define STOP_ASTOP 11 /* address stop */
#define STOP_CONSOLE 12 /* FE halt */
#define STOP_UNKNOWN 13 /* unknown stop */
#define STOP_IOALIGN 13 /* DMA word access to odd address */
#define STOP_UNKNOWN 14 /* unknown stop */
#define PAGE_FAIL -1 /* page fail */
#define INTERRUPT -2 /* interrupt */
#define ABORT(x) longjmp (save_env, (x)) /* abort */
@@ -614,6 +615,10 @@ struct pdp_dib {
int32 vec; /* value */
int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
uint32 ulnt; /* IO length per unit */
uint32 flags; /* Special flags */
#define DIB_M_REGSIZE 03 /* Device register size */
#define DIB_REG16BIT 00
#define DIB_REG18BIT 01
};
typedef struct pdp_dib DIB;
@@ -622,6 +627,8 @@ typedef struct pdp_dib DIB;
#define DZ_MUXES 4 /* max # of muxes */
#define DZ_LINES 8 /* lines per mux */
#define KMC_UNITS 1 /* max # of KMCs */
#define INITIAL_KMCS 0 /* Number initially enabled */
#define DUP_LINES 4 /* max # of DUP11's */
#define DIB_MAX 100 /* max DIBs */
@@ -700,9 +707,10 @@ typedef struct pdp_dib DIB;
#define INT_V_RP 6 /* RH11/RP,RM drives */
#define INT_V_TU 7 /* RH11/TM03/TU45 */
#define INT_V_DMCRX 13
#define INT_V_DMCTX 14
#define INT_V_XU 15 /* DEUNA/DELUA */
#define INT_V_KMCA 8 /* KMC11 */
#define INT_V_KMCB 9
#define INT_V_DMCRX 8 /* DMC11/DMR11 */
#define INT_V_DMCTX 9
#define INT_V_DZRX 16 /* DZ11 */
#define INT_V_DZTX 17
#define INT_V_RY 18 /* RX211 */
@@ -715,6 +723,8 @@ typedef struct pdp_dib DIB;
#define INT_RP (1u << INT_V_RP)
#define INT_TU (1u << INT_V_TU)
#define INT_KMCA (1u << INT_V_KMCA)
#define INT_KMCB (1u << INT_V_KMCB)
#define INT_DMCRX (1u << INT_V_DMCRX)
#define INT_DMCTX (1u << INT_V_DMCTX)
#define INT_XU (1u << INT_V_XU)
@@ -730,8 +740,8 @@ typedef struct pdp_dib DIB;
#define IPL_RP 6 /* int levels */
#define IPL_TU 6
#define IPL_DMCRX 5
#define IPL_DMCTX 5
#define IPL_KMCA 5
#define IPL_KMCB 5
#define IPL_XU 5
#define IPL_DZRX 5
#define IPL_DZTX 5
@@ -759,8 +769,6 @@ typedef struct pdp_dib DIB;
#define VEC_CR 0230
#define VEC_RP 0254
#define VEC_RY 0264
#define VEC_DZRX 0340
#define VEC_DZTX 0344
#define VEC_LP20 0754
#define VEC_AUTO 0 /* Set by Auto Configure */

4
PDP10/pdp10_fe.c
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@@ -265,8 +265,8 @@ if (M[FE_KEEPA] & INT64_C(0020000000000)) { /* KSRLD - "Forced" (ac
}
else if (M[FE_KEEPA] & INT64_C(0010000000000)) { /* KPACT */
d10 kav = M[FE_KEEPA] & INT64_C(0000000177400); /* KPALIV */
if (kaf_unit.u3 != (uint32)kav) {
kaf_unit.u3 = (uint32)kav;
if (kaf_unit.u3 != (int32)kav) {
kaf_unit.u3 = (int32)kav;
kaf_unit.u4 = 0;
}
else if (++kaf_unit.u4 >= 15) {

844
PDP10/pdp10_ksio.c
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File diff suppressed because it is too large Load Diff

2
PDP10/pdp10_pag.c
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@@ -429,7 +429,7 @@ else { /* TOPS-20 paging */
int32 pmi, vpn, xpte;
int32 flg, t;
t_bool stop;
a10 pa, csta;
a10 pa, csta = 0;
d10 ptr, cste;
d10 acc = PTE_T20_W | PTE_T20_C; /* init access bits */

4
PDP10/pdp10_rp.c
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@@ -1229,7 +1229,7 @@ return SCPE_OK;
static const d10 boot_rom_dec[] = {
INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ; uba # */
INT64_C(0201000140001), /* movei 0,140001 ; vld,fst,pg 1 */
INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
INT64_C(0713001000000)+((IOBA_UBMAP+1) & RMASK), /* wrio 0,763001(1); set ubmap */
INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */
INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
INT64_C(0713001000010), /* wrio 0,10(1) ; ->RPCS2 */
@@ -1293,7 +1293,7 @@ static const d10 boot_rom_dec[] = {
static const d10 boot_rom_its[] = {
INT64_C(0510040000001)+FE_RHBASE, /* boot:hllzi 1,FE_RHBASE ; uba # */
INT64_C(0201000140001), /* movei 0,140001 ; vld,fst,pg 1 */
INT64_C(0715000000000)+(IOBA_UBMAP+1 & RMASK), /* iowrq 0,763001 ; set ubmap */
INT64_C(0715000000000)+((IOBA_UBMAP+1) & RMASK), /* iowrq 0,763001 ; set ubmap */
INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */
INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
INT64_C(0715001000010), /* iowrq 0,10(1) ; ->RPCS2 */

5
PDP10/pdp10_sys.c
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@@ -56,6 +56,8 @@ extern DEVICE ry_dev;
extern DEVICE cr_dev;
extern DEVICE lp20_dev;
extern DEVICE dup_dev;
extern DEVICE kmc_dev;
extern DEVICE dmc_dev;
extern UNIT cpu_unit;
extern REG cpu_reg[];
extern d10 *M;
@@ -92,6 +94,8 @@ DEVICE *sim_devices[] = {
&tu_dev,
&dz_dev,
&dup_dev,
&kmc_dev,
&dmc_dev,
NULL
};
@@ -109,6 +113,7 @@ const char *sim_stop_messages[] = {
"Invalid I/O controller",
"Address stop",
"Console FE halt",
"Unaligned DMA",
"Panic stop"
};

6
PDP10/pdp10_tu.c
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@@ -810,7 +810,7 @@ return;
t_stat tu_svc (UNIT *uptr)
{
int32 fnc, fmt, i, j, k, wc10, ba10;
int32 ba, fc, wc, drv, mpa10, vpn;
int32 ba, fc, wc, drv, mpa10 = 0, vpn;
d10 val, v[4];
t_mtrlnt tbc;
t_stat st, r = SCPE_OK;
@@ -1258,7 +1258,7 @@ return sim_tape_detach (uptr);
static const d10 boot_rom_dec[] = {
INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ; uba # */
INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */
INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
INT64_C(0713001000000)+((IOBA_UBMAP+1) & RMASK), /* wrio 0,763001(1); set ubmap */
INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */
INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
INT64_C(0713001000010), /* wrio 0,10(1) ; ->MTFS */
@@ -1312,7 +1312,7 @@ static const d10 boot_rom_dec[] = {
static const d10 boot_rom_its[] = {
INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ; uba # - not used */
INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */
INT64_C(0714000000000)+(IOBA_UBMAP+1 & RMASK), /* iowri 0,763001 ; set ubmap */
INT64_C(0714000000000)+((IOBA_UBMAP+1) & RMASK), /* iowri 0,763001 ; set ubmap */
INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */
INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
INT64_C(0714001000010), /* iowri 0,10(1) ; ->MTFS */

52
PDP10/pdp10_xtnd.c
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@@ -155,41 +155,41 @@ d10 xlate (d10 by, a10 tblad, d10 *xflgs, int32 pflgs);
void filldst (d10 fill, int32 ac, d10 cnt, int32 pflgs);
static const d10 pwrs10[23][2] = {
INT64_C(0), INT64_C(0),
INT64_C(0), INT64_C(1),
INT64_C(0), INT64_C(10),
INT64_C(0), INT64_C(100),
INT64_C(0), INT64_C(1000),
INT64_C(0), INT64_C(10000),
INT64_C(0), INT64_C(100000),
INT64_C(0), INT64_C(1000000),
INT64_C(0), INT64_C(10000000),
INT64_C(0), INT64_C(100000000),
INT64_C(0), INT64_C(1000000000),
INT64_C(0), INT64_C(10000000000),
INT64_C(2), INT64_C(31280523264),
INT64_C(29), INT64_C(3567587328),
INT64_C(291), INT64_C(1316134912),
INT64_C(2910), INT64_C(13161349120),
INT64_C(29103), INT64_C(28534276096),
INT64_C(291038), INT64_C(10464854016),
INT64_C(2910383), INT64_C(1569325056),
INT64_C(29103830), INT64_C(15693250560),
INT64_C(291038304), INT64_C(19493552128),
INT64_C(2910383045), INT64_C(23136829440),
INT64_C(29103830456), INT64_C(25209864192)
{ INT64_C(0), INT64_C(0),},
{ INT64_C(0), INT64_C(1),},
{ INT64_C(0), INT64_C(10),},
{ INT64_C(0), INT64_C(100),},
{ INT64_C(0), INT64_C(1000),},
{ INT64_C(0), INT64_C(10000),},
{ INT64_C(0), INT64_C(100000),},
{ INT64_C(0), INT64_C(1000000),},
{ INT64_C(0), INT64_C(10000000),},
{ INT64_C(0), INT64_C(100000000),},
{ INT64_C(0), INT64_C(1000000000),},
{ INT64_C(0), INT64_C(10000000000),},
{ INT64_C(2), INT64_C(31280523264),},
{ INT64_C(29), INT64_C(3567587328),},
{ INT64_C(291), INT64_C(1316134912),},
{ INT64_C(2910), INT64_C(13161349120),},
{ INT64_C(29103), INT64_C(28534276096),},
{ INT64_C(291038), INT64_C(10464854016),},
{ INT64_C(2910383), INT64_C(1569325056),},
{ INT64_C(29103830), INT64_C(15693250560),},
{ INT64_C(291038304), INT64_C(19493552128),},
{ INT64_C(2910383045), INT64_C(23136829440),},
{ INT64_C(29103830456), INT64_C(25209864192),},
};
int xtend (int32 ac, int32 ea, int32 pflgs)
{
d10 b1, b2, ppi;
d10 xinst, xoff, digit, f1, f2, rs[2];
d10 xinst, xoff = 0, digit, f1, f2, rs[2];
d10 xflgs = 0;
a10 e1, entad;
a10 e1 = 0, entad;
int32 p1 = ADDAC (ac, 1);
int32 p3 = ADDAC (ac, 3);
int32 p4 = ADDAC (ac, 4);
int32 flg, i, s2, t, pp, pat, xop, xac, ret;
int32 flg, i, s2 = 0, t, pp, pat, xop, xac, ret;
xinst = Read (ea, MM_OPND); /* get extended instr */
xop = GET_OP (xinst); /* get opcode */