diff --git a/AltairZ80/altairz80_cpu.c b/AltairZ80/altairz80_cpu.c index ef837568..30f9af9e 100644 --- a/AltairZ80/altairz80_cpu.c +++ b/AltairZ80/altairz80_cpu.c @@ -27,7 +27,8 @@ Code for Z80 CPU from Frank D. Cringle ((c) 1995 under GNU license) */ -#include "altairz80_defs.h" +#include "m68k.h" +#include "assert.h" #include #define SWITCHCPU_DEFAULT 0xfd @@ -183,7 +184,7 @@ void out(const uint32 Port, const uint32 Value); uint32 in(const uint32 Port); void altairz80_init(void); t_stat sim_instr(void); -t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM); +t_stat install_bootrom(const int32 bootrom[], const int32 size, const int32 addr, const int32 makeROM); uint8 GetBYTEWrapper(const uint32 Addr); void PutBYTEWrapper(const uint32 Addr, const uint32 Value); uint8 GetByteDMA(const uint32 Addr); @@ -254,6 +255,9 @@ static uint16 pcq[PCQ_SIZE] = { 0 }; /* PC queue static int32 pcq_p = 0; /* PC queue ptr */ static REG *pcq_r = NULL; /* PC queue reg ptr */ +uint32 m68k_registers[M68K_REG_CPU_TYPE + 1]; /* M68K CPU registers */ + + /* data structure for IN/OUT instructions */ struct idev { int32 (*routine)(const int32, const int32, const int32); @@ -262,107 +266,275 @@ struct idev { static int32 switcherPort = SWITCHCPU_DEFAULT; static struct idev oldSwitcherDevice = { NULL }; +// CPU_INDEX_8080 is defined in altairz80_defs.h +#define CPU_INDEX_8086 26 +#define CPU_INDEX_M68K 53 + REG cpu_reg[] = { - { HRDATA (AF, AF_S, 16) }, - { HRDATA (BC, BC_S, 16) }, - { HRDATA (DE, DE_S, 16) }, - { HRDATA (HL, HL_S, 16) }, - { HRDATA (IX, IX_S, 16) }, - { HRDATA (IY, IY_S, 16) }, - { HRDATA (PC, PC_S, 16 + MAXBANKSLOG2) }, /* 8080 / Z80 PC [6] */ - { HRDATA (PCX, PCX_S, 16 + MAXBANKSLOG2) }, /* 8086 PC [7] */ - { HRDATA (SP, SP_S, 16) }, - { HRDATA (AF1, AF1_S, 16) }, - { HRDATA (BC1, BC1_S, 16) }, - { HRDATA (DE1, DE1_S, 16) }, - { HRDATA (HL1, HL1_S, 16) }, - { GRDATA (IFF, IFF_S, 2, 2, 0) }, - { FLDATA (IR, IR_S, 8) }, - { HRDATA (AX, AX_S, 16) }, /* 8086 */ - { GRDATA (AL, AX_S, 16, 8, 0) }, /* 8086, low 8 bits of AX */ - { GRDATA (AH, AX_S, 16, 8, 8) }, /* 8086, high 8 bits of AX */ - { HRDATA (BX, BX_S, 16) }, /* 8086 */ - { GRDATA (BL, BX_S, 16, 8, 0) }, /* 8086, low 8 bits of BX */ - { GRDATA (BH, BX_S, 16, 8, 8) }, /* 8086, high 8 bits of BX */ - { HRDATA (CX, CX_S, 16) }, /* 8086 */ - { GRDATA (CL, CX_S, 16, 8, 0) }, /* 8086, low 8 bits of CX */ - { GRDATA (CH, CX_S, 16, 8, 8) }, /* 8086, high 8 bits of CX */ - { HRDATA (DX, DX_S, 16) }, /* 8086 */ - { GRDATA (DL, DX_S, 16, 8, 0) }, /* 8086, low 8 bits of DX */ - { GRDATA (DH, DX_S, 16, 8, 8) }, /* 8086, high 8 bits of DX */ - { HRDATA (SPX, SPX_S, 16) }, /* 8086 */ - { HRDATA (BP, BP_S, 16) }, /* 8086, Base Pointer */ - { HRDATA (SI, SI_S, 16) }, /* 8086, Source Index */ - { HRDATA (DI, DI_S, 16) }, /* 8086, Destination Index */ - { HRDATA (CS, CS_S, 16) }, /* 8086, Code Segment */ - { HRDATA (DS, DS_S, 16) }, /* 8086, Data Segment */ - { HRDATA (ES, ES_S, 16) }, /* 8086, Extra Segment */ - { HRDATA (SS, SS_S, 16) }, /* 8086, Stack Segment */ - { HRDATA (FLAGS, FLAGS_S, 16) }, /* 8086, FLAGS */ - { HRDATA (IP, IP_S, 16), REG_RO }, /* 8086, set via PC */ - { FLDATA (OPSTOP, cpu_unit.flags, UNIT_CPU_V_OPSTOP), REG_HRO }, - { HRDATA (SR, SR, 8) }, - { HRDATA (BANK, bankSelect, MAXBANKSLOG2) }, - { HRDATA (COMMON, common, 32) }, - { HRDATA (SWITCHERPORT, switcherPort, 8), }, - { DRDATA (CLOCK, clockFrequency, 32) }, - { DRDATA (SLICE, sliceLength, 16) }, - { DRDATA (TSTATES, executedTStates, 32), REG_RO }, - { HRDATA (CAPACITY, cpu_unit.capac, 32), REG_RO }, - { HRDATA (PREVCAP, previousCapacity, 32), REG_RO }, - { BRDATA (PCQ, pcq, 16, 16, PCQ_SIZE), REG_RO + REG_CIRC }, - { DRDATA (PCQP, pcq_p, PCQ_SIZE_LOG2), REG_HRO }, - { HRDATA (WRU, sim_int_char, 8) }, + // 8080 and Z80 registers + { HRDATAD (AF, AF_S, 16, "8080 / Z80 Accumulator Flag register") + }, /* 0 */ + { HRDATAD (BC, BC_S, 16, "8080 / Z80 BC register") + }, /* 1 */ + { HRDATAD (DE, DE_S, 16, "8080 / Z80 DE register") + }, /* 2 */ + { HRDATAD (HL, HL_S, 16, "8080 / Z80 HL register") + }, /* 3 */ + { HRDATAD (PC, PC_S, 16 + MAXBANKSLOG2, "8080 / Z80 Program Counter register") + }, /* 4 8080 / Z80 */ + { HRDATAD (SP, SP_S, 16, "8080 / Z80 Stack Pointer register") + }, /* 5 */ + + // Z80 registers + { HRDATAD (IX, IX_S, 16, "Z80 IX register") + }, /* 8 */ + { HRDATAD (IY, IY_S, 16, "Z80 IY register") + }, /* 9 */ + { HRDATAD (AF1, AF1_S, 16, "Z80 Alternate Accumulator Flag register") + }, /* 10 */ + { HRDATAD (BC1, BC1_S, 16, "Z80 Alternate BC register") + }, /* 11 */ + { HRDATAD (DE1, DE1_S, 16, "Z80 Alternate DE register") + }, /* 12 */ + { HRDATAD (HL1, HL1_S, 16, "Z80 Alternate HL register") + }, /* 13 */ + { GRDATAD (IFF, IFF_S, 2, 2, 0, "Z80 Interrupt Flip Flop register") + }, /* 6 */ + { FLDATAD (IR, IR_S, 8, "8Z80 Interrupt (upper) / Refresh (lower) register") + }, /* 7 */ + + // 8086 registers + { HRDATAD (AX, AX_S, 16, "8086 AX register") + }, /* 14 8086 */ + { GRDATAD (AL, AX_S, 16, 8, 0, "8086 low bits of AX register") + }, /* 15 8086, low 8 bits of AX */ + { GRDATAD (AH, AX_S, 16, 8, 8, "8086 high bits of AX register") + }, /* 16 8086, high 8 bits of AX */ + { HRDATAD (BX, BX_S, 16, "8086 BX register") + }, /* 17 8086 */ + { GRDATAD (BL, BX_S, 16, 8, 0, "8086 low bits of BX register") + }, /* 18 8086, low 8 bits of BX */ + { GRDATAD (BH, BX_S, 16, 8, 8, "8086 high bits of BX register") + }, /* 19 8086, high 8 bits of BX */ + { HRDATAD (CX, CX_S, 16, "8086 CX register") + }, /* 20 8086 */ + { GRDATAD (CL, CX_S, 16, 8, 0, "8086 low bits of CX register") + }, /* 21 8086, low 8 bits of CX */ + { GRDATAD (CH, CX_S, 16, 8, 8, "8086 high bits of CX register") + }, /* 22 8086, high 8 bits of CX */ + { HRDATAD (DX, DX_S, 16, "8086 DX register") + }, /* 23 8086 */ + { GRDATAD (DL, DX_S, 16, 8, 0, "8086 low bits of DX register") + }, /* 24 8086, low 8 bits of DX */ + { GRDATAD (DH, DX_S, 16, 8, 8, "8086 high bits of DX register") + }, /* 25 8086, high 8 bits of DX */ + { HRDATAD (PCX, PCX_S, 16 + MAXBANKSLOG2, "8086 Program Counter register") + }, /* 26 8086, Program Counter */ + { HRDATAD (SPX, SPX_S, 16, "8086 Stack Pointer register") + }, /* 27 8086, Stack Pointer */ + { HRDATAD (BP, BP_S, 16, "8086 Base Pointer register") + }, /* 28 8086, Base Pointer */ + { HRDATAD (SI, SI_S, 16, "8086 Source Index register") + }, /* 29 8086, Source Index */ + { HRDATAD (DI, DI_S, 16, "8086 Destination Index register") + }, /* 30 8086, Destination Index */ + { HRDATAD (CS, CS_S, 16, "8086 Code Segment register") + }, /* 31 8086, Code Segment */ + { HRDATAD (DS, DS_S, 16, "8086 Data Segment register") + }, /* 32 8086, Data Segment */ + { HRDATAD (ES, ES_S, 16, "8086 Extra Segment register") + }, /* 33 8086, Extra Segment */ + { HRDATAD (SS, SS_S, 16, "8086 Stack Segment register") + }, /* 34 8086, Stack Segment */ + { HRDATAD (FLAGS, FLAGS_S, 16, "8086 Flag register") + }, /* 35 8086, FLAGS */ + { HRDATAD (IP, IP_S, 16, "8086 Instruction Pointer register"), + REG_RO }, /* 36 8086, set via PC */ + + // M68K registers + { HRDATAD (M68K_D0, m68k_registers[M68K_REG_D0], 32, "M68K D0 register"), + }, /* 37 M68K, D0 */ + { HRDATAD (M68K_D1, m68k_registers[M68K_REG_D1], 32, "M68K D1 register"), + }, /* 38 M68K, D1 */ + { HRDATAD (M68K_D2, m68k_registers[M68K_REG_D2], 32, "M68K D2 register"), + }, /* 39 M68K, D2 */ + { HRDATAD (M68K_D3, m68k_registers[M68K_REG_D3], 32, "M68K D3 register"), + }, /* 40 M68K, D3 */ + { HRDATAD (M68K_D4, m68k_registers[M68K_REG_D4], 32, "M68K D4 register"), + }, /* 41 M68K, D4 */ + { HRDATAD (M68K_D5, m68k_registers[M68K_REG_D5], 32, "M68K D5 register"), + }, /* 42 M68K, D5 */ + { HRDATAD (M68K_D6, m68k_registers[M68K_REG_D6], 32, "M68K D6 register"), + }, /* 43 M68K, D6 */ + { HRDATAD (M68K_D7, m68k_registers[M68K_REG_D7], 32, "M68K D7 register"), + }, /* 44 M68K, D7 */ + { HRDATAD (M68K_A0, m68k_registers[M68K_REG_A0], 32, "M68K A0 register"), + }, /* 45 M68K, A0 */ + { HRDATAD (M68K_A1, m68k_registers[M68K_REG_A1], 32, "M68K A1 register"), + }, /* 46 M68K, A1 */ + { HRDATAD (M68K_A2, m68k_registers[M68K_REG_A2], 32, "M68K A2 register"), + }, /* 47 M68K, A2 */ + { HRDATAD (M68K_A3, m68k_registers[M68K_REG_A3], 32, "M68K A3 register"), + }, /* 48 M68K, A3 */ + { HRDATAD (M68K_A4, m68k_registers[M68K_REG_A4], 32, "M68K A4 register"), + }, /* 49 M68K, A4 */ + { HRDATAD (M68K_A5, m68k_registers[M68K_REG_A5], 32, "M68K A5 register"), + }, /* 50 M68K, A5 */ + { HRDATAD (M68K_A6, m68k_registers[M68K_REG_A6], 32, "M68K A6 register"), + }, /* 51 M68K, A6 */ + { HRDATAD (M68K_A7, m68k_registers[M68K_REG_A7], 32, "M68K A7 register"), + }, /* 52 M68K, A7 */ + { HRDATAD (M68K_PC, m68k_registers[M68K_REG_PC], 32, "M68K Program Counter register"), + }, /* 53 M68K, PC */ + { HRDATAD (M68K_SR, m68k_registers[M68K_REG_SR], 32, "M68K Status Register"), + }, /* 54 M68K, SR */ + { HRDATAD (M68K_SP, m68k_registers[M68K_REG_SP], 32, "M68K Stack Pointer register"), + }, /* 55 M68K, SP */ + { HRDATAD (M68K_USP, m68k_registers[M68K_REG_USP], 32, "M68K User Stack Pointer register"), + }, /* 56 M68K, USP */ + { HRDATAD (M68K_ISP, m68k_registers[M68K_REG_ISP], 32, "M68K Interrupt Stack Pointer register"), + }, /* 57 M68K, ISP */ + { HRDATAD (M68K_MSP, m68k_registers[M68K_REG_MSP], 32, "M68K Master Stack Pointer register"), + }, /* 58 M68K, MSP */ + { HRDATAD (M68K_SFC, m68k_registers[M68K_REG_SFC], 32, "M68K Source Function Code register"), + }, /* 59 M68K, SFC */ + { HRDATAD (M68K_DFC, m68k_registers[M68K_REG_DFC], 32, "M68K Destination Function Code register"), + }, /* 60 M68K, DFC */ + { HRDATAD (M68K_VBR, m68k_registers[M68K_REG_VBR], 32, "M68K Vector Base Register"), + }, /* 61 M68K, VBR */ + { HRDATAD (M68K_CACR, m68k_registers[M68K_REG_CACR], 32, "M68K Cache Control Register"), + }, /* 62 M68K, CACR */ + { HRDATAD (M68K_CAAR, m68k_registers[M68K_REG_CAAR], 32, "M68K Cache Address Register"), + }, /* 63 M68K, CAAR */ + { HRDATAD (M68K_PREF_ADDR, m68k_registers[M68K_REG_PREF_ADDR], 32, "M68K Last Prefetch Address register"), + }, /* 64 M68K, PREF_ADDR */ + { HRDATAD (M68K_PREF_DATA, m68k_registers[M68K_REG_PREF_DATA], 32, "M68K Last Prefetch Data register"), + }, /* 65 M68K, PREF_DATA */ + { HRDATAD (M68K_PPC, m68k_registers[M68K_REG_PPC], 32, "M68K Previous Proram Counter register"), + }, /* 66 M68K, PPC */ + { HRDATAD (M68K_IR, m68k_registers[M68K_REG_IR], 32, "M68K Instruction Register"), + }, /* 67 M68K, IR */ + { HRDATAD (M68K_CPU_TYPE, m68k_registers[M68K_REG_CPU_TYPE], 32, "M68K CPU Type register"), + REG_RO }, /* 68 M68K, CPU_TYPE */ + + // Pseudo registers + { FLDATAD (OPSTOP, cpu_unit.flags, UNIT_CPU_V_OPSTOP, "Stop on invalid operation pseudo register"), + REG_HRO }, /* 69 */ + { HRDATAD (SR, SR, 8, "Front panel switches pseudo register"), + }, /* 70 */ + { HRDATAD (BANK, bankSelect, MAXBANKSLOG2, "Active bank pseudo register"), + }, /* 71 */ + { HRDATAD (COMMON, common, 32, "Starting address of common memory pseudo register"), + }, /* 72 */ + { HRDATAD (SWITCHERPORT, switcherPort, 8, "I/O port for CPU switcher pseudo register"), + }, /* 73 */ + { DRDATAD (CLOCK, clockFrequency, 32, "Clock frequency in kHz for 8080 / Z80 pseudo register"), + }, /* 74 */ + { DRDATAD (SLICE, sliceLength, 16, "Length of time slice for 8080 / Z80 pseudo register"), + }, /* 75 */ + { DRDATAD (TSTATES, executedTStates, 32, "Executed t-states for 8080 / Z80 pseudo register"), + REG_RO }, /* 76 */ + { HRDATAD (CAPACITY, cpu_unit.capac, 32, "Size of RAM pseudo register"), + REG_RO }, /* 77 */ + { HRDATAD (PREVCAP, previousCapacity, 32, "Previous size of RAM pseudo register"), + REG_RO }, /* 78 */ + { BRDATAD (PCQ, pcq, 16, 16, PCQ_SIZE, "Program counter circular buffer for 8080 /Z80 pseudo register"), + REG_RO + REG_CIRC }, /* 79 */ + { DRDATAD (PCQP, pcq_p, PCQ_SIZE_LOG2, "Circular buffer head for 8080 / Z80 pseudo register"), + REG_HRO }, /* 80 */ + { HRDATAD (WRU, sim_int_char, 8, "Interrupt character pseudo register"), + }, /* 81 */ { NULL } }; static MTAB cpu_mod[] = { - { MTAB_XTD | MTAB_VDV, CHIP_TYPE_8080, NULL, "8080", &cpu_set_chiptype }, - { MTAB_XTD | MTAB_VDV, CHIP_TYPE_Z80, NULL, "Z80", &cpu_set_chiptype }, - { MTAB_XTD | MTAB_VDV, CHIP_TYPE_8086, NULL, "8086", &cpu_set_chiptype }, - { UNIT_CPU_OPSTOP, UNIT_CPU_OPSTOP, "ITRAP", "ITRAP", NULL, &chip_show }, - { UNIT_CPU_OPSTOP, 0, "NOITRAP", "NOITRAP", NULL, &chip_show }, - { UNIT_CPU_STOPONHALT, UNIT_CPU_STOPONHALT,"STOPONHALT", "STOPONHALT", NULL }, - { UNIT_CPU_STOPONHALT, 0, "LOOPONHALT", "LOOPONHALT", NULL }, - { UNIT_CPU_BANKED, UNIT_CPU_BANKED, "BANKED", "BANKED", &cpu_set_banked }, - { UNIT_CPU_BANKED, 0, "NONBANKED", "NONBANKED", &cpu_set_nonbanked }, - { UNIT_CPU_ALTAIRROM, UNIT_CPU_ALTAIRROM, "ALTAIRROM", "ALTAIRROM", &cpu_set_altairrom }, - { UNIT_CPU_ALTAIRROM, 0, "NOALTAIRROM", "NOALTAIRROM", &cpu_set_noaltairrom}, - { UNIT_CPU_VERBOSE, UNIT_CPU_VERBOSE, "VERBOSE", "VERBOSE", NULL, &cpu_show }, - { UNIT_CPU_VERBOSE, 0, "QUIET", "QUIET", NULL }, - { MTAB_VDV, 0, NULL, "CLEARMEMORY", &cpu_clear_command }, - { UNIT_CPU_MMU, UNIT_CPU_MMU, "MMU", "MMU", NULL }, - { UNIT_CPU_MMU, 0, "NOMMU", "NOMMU", &cpu_set_nommu }, - { MTAB_XTD | MTAB_VDV, 0, NULL, "MEMORY", &cpu_set_memory }, - { UNIT_CPU_SWITCHER, UNIT_CPU_SWITCHER, "SWITCHER", "SWITCHER", &cpu_set_switcher, &cpu_show_switcher }, - { UNIT_CPU_SWITCHER, 0, "NOSWITCHER", "NOSWITCHER", &cpu_reset_switcher, &cpu_show_switcher }, - { MTAB_XTD | MTAB_VDV, 0, NULL, "AZ80", &cpu_set_ramtype }, - { MTAB_XTD | MTAB_VDV, 1, NULL, "HRAM", &cpu_set_ramtype }, - { MTAB_XTD | MTAB_VDV, 2, NULL, "VRAM", &cpu_set_ramtype }, - { MTAB_XTD | MTAB_VDV, 3, NULL, "CRAM", &cpu_set_ramtype }, - { MTAB_VDV, 4, NULL, "4KB", &cpu_set_size }, - { MTAB_VDV, 8, NULL, "8KB", &cpu_set_size }, - { MTAB_VDV, 12, NULL, "12KB", &cpu_set_size }, - { MTAB_VDV, 16, NULL, "16KB", &cpu_set_size }, - { MTAB_VDV, 20, NULL, "20KB", &cpu_set_size }, - { MTAB_VDV, 24, NULL, "24KB", &cpu_set_size }, - { MTAB_VDV, 28, NULL, "28KB", &cpu_set_size }, - { MTAB_VDV, 32, NULL, "32KB", &cpu_set_size }, - { MTAB_VDV, 36, NULL, "36KB", &cpu_set_size }, - { MTAB_VDV, 40, NULL, "40KB", &cpu_set_size }, - { MTAB_VDV, 44, NULL, "44KB", &cpu_set_size }, - { MTAB_VDV, 48, NULL, "48KB", &cpu_set_size }, - { MTAB_VDV, 52, NULL, "52KB", &cpu_set_size }, - { MTAB_VDV, 56, NULL, "56KB", &cpu_set_size }, - { MTAB_VDV, 60, NULL, "60KB", &cpu_set_size }, - { MTAB_VDV, 64, NULL, "64KB", &cpu_set_size }, + { MTAB_XTD | MTAB_VDV, CHIP_TYPE_8080, NULL, "8080", &cpu_set_chiptype, + NULL, NULL, "Chooses 8080 CPU"}, + { MTAB_XTD | MTAB_VDV, CHIP_TYPE_Z80, NULL, "Z80", &cpu_set_chiptype, + NULL, NULL, "Chooses Z80 CPU" }, + { MTAB_XTD | MTAB_VDV, CHIP_TYPE_8086, NULL, "8086", &cpu_set_chiptype, + NULL, NULL, "Chooses 8086 CPU" }, + { MTAB_XTD | MTAB_VDV, CHIP_TYPE_M68K, NULL, "M68K", &cpu_set_chiptype, + NULL, NULL, "Chooses M68K CPU" }, + { UNIT_CPU_OPSTOP, UNIT_CPU_OPSTOP, "ITRAP", "ITRAP", NULL, &chip_show, + NULL, "Stop on illegal instruction" }, + { UNIT_CPU_OPSTOP, 0, "NOITRAP", "NOITRAP", NULL, &chip_show, + NULL, "Do not stop on illegal instruction" }, + { UNIT_CPU_STOPONHALT, UNIT_CPU_STOPONHALT,"STOPONHALT", "STOPONHALT", NULL, + NULL, NULL, "Stop on halt instruction" }, + { UNIT_CPU_STOPONHALT, 0, "LOOPONHALT", "LOOPONHALT", NULL, + NULL, NULL, "Enter loop on halt instruction" }, + { UNIT_CPU_BANKED, UNIT_CPU_BANKED, "BANKED", "BANKED", &cpu_set_banked, + NULL, NULL, "Enable banked memory for 8080 / Z80" }, + { UNIT_CPU_BANKED, 0, "NONBANKED", "NONBANKED", &cpu_set_nonbanked, + NULL, NULL, "Disable banked memory for 8080 / Z80" }, + { UNIT_CPU_ALTAIRROM, UNIT_CPU_ALTAIRROM, "ALTAIRROM", "ALTAIRROM", &cpu_set_altairrom, + NULL, NULL, "Enable Altair ROM for 8080 / Z80" }, + { UNIT_CPU_ALTAIRROM, 0, "NOALTAIRROM", "NOALTAIRROM", &cpu_set_noaltairrom, + NULL, NULL, "Disable Altair ROM for 8080 / Z80"}, + { UNIT_CPU_VERBOSE, UNIT_CPU_VERBOSE, "VERBOSE", "VERBOSE", NULL, &cpu_show, + NULL, "Enable verbose messages" }, + { UNIT_CPU_VERBOSE, 0, "QUIET", "QUIET", NULL, NULL, + NULL, "Disable verbose messages" }, + { MTAB_VDV, 0, NULL, "CLEARMEMORY", &cpu_clear_command, + NULL, NULL, "Clears the RAM" }, + { UNIT_CPU_MMU, UNIT_CPU_MMU, "MMU", "MMU", NULL, NULL, + NULL, "Enable the Memory Management Unit for 8080 / Z80" }, + { UNIT_CPU_MMU, 0, "NOMMU", "NOMMU", &cpu_set_nommu, + NULL, NULL, "Disable the Memory Management Unit for 8080 / Z80" }, + { MTAB_XTD | MTAB_VDV, 0, NULL, "MEMORY", &cpu_set_memory, + NULL, NULL, "Sets the RAM size for 8080 / Z80 / 8086" }, + { UNIT_CPU_SWITCHER, UNIT_CPU_SWITCHER, "SWITCHER", "SWITCHER", &cpu_set_switcher, &cpu_show_switcher, + NULL, "Sets CPU switcher port for 8080 / Z80 / 8086" }, + { UNIT_CPU_SWITCHER, 0, "NOSWITCHER", "NOSWITCHER", &cpu_reset_switcher, &cpu_show_switcher, + NULL, "Resets CPU switcher port for 8080 / Z80 / 8086" }, + { MTAB_XTD | MTAB_VDV, 0, NULL, "AZ80", &cpu_set_ramtype, + NULL, NULL, "Sets the RAM type to AltairZ80 RAM for 8080 / Z80 / 8086" }, + { MTAB_XTD | MTAB_VDV, 1, NULL, "HRAM", &cpu_set_ramtype, + NULL, NULL, "Sets the RAM type to NorthStar HRAM for 8080 / Z80 / 8086" }, + { MTAB_XTD | MTAB_VDV, 2, NULL, "VRAM", &cpu_set_ramtype, + NULL, NULL, "Sets the RAM type to Vector RAM for 8080 / Z80 / 8086" }, + { MTAB_XTD | MTAB_VDV, 3, NULL, "CRAM", &cpu_set_ramtype, + NULL, NULL, "Sets the RAM type to Cromemco RAM for 8080 / Z80 / 8086" }, + { MTAB_VDV, 4, NULL, "4KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 4KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 8, NULL, "8KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 8KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 12, NULL, "12KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 12KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 16, NULL, "16KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 16KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 20, NULL, "20KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 20KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 24, NULL, "24KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 24KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 28, NULL, "28KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 28KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 32, NULL, "32KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 32KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 36, NULL, "36KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 36KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 40, NULL, "40KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 40KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 44, NULL, "44KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 44KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 48, NULL, "48KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 48KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 52, NULL, "52KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 52KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 56, NULL, "56KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 56KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 60, NULL, "60KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 60KB for 8080 / Z80 / 8086" }, + { MTAB_VDV, 64, NULL, "64KB", &cpu_set_size, + NULL, NULL, "Sets the RAM size to 64KB for 8080 / Z80 / 8086" }, { 0 } }; /* Debug Flags */ static DEBTAB cpu_dt[] = { - { "LOG_IN", IN_MSG }, - { "LOG_OUT", OUT_MSG }, + { "LOG_IN", IN_MSG, "Log IN operations" }, + { "LOG_OUT", OUT_MSG, "Log OUT operations" }, { NULL, 0 } }; @@ -449,7 +621,7 @@ static struct idev dev_table[256] = { static int32 ramtype = 0; #define MAX_RAM_TYPE 3 -int32 chiptype = CHIP_TYPE_8080; +ChipType chiptype = CHIP_TYPE_8080; void out(const uint32 Port, const uint32 Value) { if ((cpu_dev.dctrl & OUT_MSG) && sim_deb) { @@ -1555,9 +1727,9 @@ static void altairz80_print_tables(void) { #define LOG2PAGESIZE 8 #define PAGESIZE (1 << LOG2PAGESIZE) -static uint8 M[MAXMEMORY]; /* RAM which is present */ +static uint8 M[MAXMEMORY]; /* RAM which is present (for 8080, Z80 and 8086 */ -struct mdev { /* Structure to describe a 2^LOG2PAGESIZE byte page of address space */ +typedef struct { /* Structure to describe a 2^LOG2PAGESIZE byte page of address space */ /* There are four cases isRAM isEmpty routine code TRUE FALSE NULL W page is random access memory (RAM) @@ -1569,9 +1741,7 @@ struct mdev { /* Structure to describe a 2^LOG2PAGESIZE byte page of address spa uint32 isRAM; uint32 isEmpty; int32 (*routine)(const int32, const int32, const int32); -}; - -typedef struct mdev MDEV; +} MDEV; static MDEV ROM_PAGE = {FALSE, FALSE, NULL}; /* this makes a page ROM */ static MDEV RAM_PAGE = {TRUE, FALSE, NULL}; /* this makes a page RAM */ @@ -1852,13 +2022,15 @@ static int32 sim_brk_lookup (const t_addr loc, const int32 btyp) { int32 switch_cpu_now = TRUE; /* hharte */ t_stat sim_instr (void) { - uint32 i; t_stat result; - if ((chiptype == CHIP_TYPE_8086) || (cpu_unit.flags & UNIT_CPU_MMU)) + if (chiptype == CHIP_TYPE_M68K) { + result = sim_instr_m68k(); + } else if ((chiptype == CHIP_TYPE_8086) || (cpu_unit.flags & UNIT_CPU_MMU)) do { result = (chiptype == CHIP_TYPE_8086) ? sim_instr_8086() : sim_instr_mmu(); } while (switch_cpu_now == FALSE); else { + uint32 i; for (i = 0; i < MAXBANKSIZE; i++) MOPT[i] = M[i]; result = sim_instr_nommu(); @@ -6350,6 +6522,7 @@ static t_stat cpu_reset(DEVICE *dptr) { IFF_S = 3; setBankSelect(0); cpu8086reset(); + m68k_cpu_reset(); sim_brk_types = (SWMASK('E') | SWMASK('I') | SWMASK('M')); sim_brk_dflt = SWMASK('E'); for (i = 0; i < PCQ_SIZE; i++) @@ -6365,18 +6538,9 @@ static t_stat cpu_reset(DEVICE *dptr) { static t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs) { static t_addr returns[2] = {0, 0}; - if (chiptype == CHIP_TYPE_8086) { - switch (GetBYTE(PCX_S)) { - case 0x9a: /* i86op_call_far_IMM */ - case 0xe8: /* Ci86op_call_near_IMM */ - returns[0] = PCX_S + (1 - fprint_sym (stdnul, PCX_S, sim_eval, - &cpu_unit, SWMASK ('M'))); - *ret_addrs = returns; - return TRUE; - default: - return FALSE; - } - } else { // 8080 or Z80 + switch (chiptype) { + case CHIP_TYPE_8080: + case CHIP_TYPE_Z80: switch (GetBYTE(PC_S)) { case 0xc4: /* CALL NZ,nnnn */ case 0xcc: /* CALL Z,nnnn */ @@ -6393,10 +6557,42 @@ static t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs) { default: return FALSE; } + break; + + case CHIP_TYPE_8086: + switch (GetBYTE(PCX_S)) { + case 0x9a: /* i86op_call_far_IMM */ + case 0xe8: /* Ci86op_call_near_IMM */ + returns[0] = PCX_S + (1 - fprint_sym (stdnul, PCX_S, sim_eval, + &cpu_unit, SWMASK ('M'))); + *ret_addrs = returns; + return TRUE; + default: + return FALSE; + } + break; + + case CHIP_TYPE_M68K: { + const uint32 localPC = m68k_registers[M68K_REG_PC]; + const uint32 instr = m68k_cpu_read_word(localPC); + if (((instr & 0xff00) == 0x6100) || /* BSR */ + ((instr & 0xffc0) == 0x4e80)) { /* JSR */ + returns[0] = localPC + (1 - fprint_sym (stdnul, localPC, sim_eval, + &cpu_unit, SWMASK ('M'))); + *ret_addrs = returns; + return TRUE; + } + return FALSE; + } + break; + + default: + return FALSE; + break; } } -t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM) { +t_stat install_bootrom(const int32 bootrom[], const int32 size, const int32 addr, const int32 makeROM) { int32 i; if (addr & (PAGESIZE - 1)) return SCPE_IERR; @@ -6410,83 +6606,126 @@ t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM) { /* memory examine */ static t_stat cpu_ex(t_value *vptr, t_addr addr, UNIT *uptr, int32 sw) { - int32 oldBankSelect; - if (chiptype == CHIP_TYPE_8086) - *vptr = GetBYTEExtended(addr); - else { - oldBankSelect = getBankSelect(); + switch (chiptype) { + case CHIP_TYPE_8080: + case CHIP_TYPE_Z80: { + const int32 oldBankSelect = getBankSelect(); setBankSelect((addr >> MAXBANKSIZELOG2) & BANKMASK); *vptr = GetBYTE(addr & ADDRMASK); setBankSelect(oldBankSelect); + } + break; + + case CHIP_TYPE_8086: + *vptr = GetBYTEExtended(addr); + break; + + case CHIP_TYPE_M68K: + *vptr = m68k_cpu_read_byte(addr); + break; + + default: + return SCPE_AFAIL; + break; } return SCPE_OK; } /* memory deposit */ static t_stat cpu_dep(t_value val, t_addr addr, UNIT *uptr, int32 sw) { - int32 oldBankSelect; - if (chiptype == CHIP_TYPE_8086) - PutBYTEExtended(addr, val); - else { - oldBankSelect = getBankSelect(); + switch (chiptype) { + case CHIP_TYPE_8080: + case CHIP_TYPE_Z80: { + const int32 oldBankSelect = getBankSelect(); setBankSelect((addr >> MAXBANKSIZELOG2) & BANKMASK); PutBYTE(addr & ADDRMASK, val); setBankSelect(oldBankSelect); + + } + break; + + case CHIP_TYPE_8086: + PutBYTEExtended(addr, val); + break; + + case CHIP_TYPE_M68K: + m68k_cpu_write_byte(addr & M68K_MAX_RAM, val); + break; + + default: + return SCPE_AFAIL; + break; } return SCPE_OK; } -struct cpuflag { - int32 mask; /* bit mask within CPU status register */ - char name; /* character to print if flag is set */ -}; -typedef struct cpuflag CPUFLAG; +typedef struct { + uint32 mask; /* bit mask within CPU status register */ + const char* flagName; /* string to print if flag is set */ +} CPUFLAG; -static CPUFLAG cpuflags8086[] = { - {1 << 11, 'O'}, - {1 << 10, 'D'}, - {1 << 9, 'I'}, - {1 << 8, 'T'}, - {1 << 7, 'S'}, - {1 << 6, 'Z'}, - {1 << 4, 'A'}, - {1 << 2, 'P'}, - {1 << 0, 'C'}, +const static CPUFLAG cpuflags8080[] = { + {1 << 7, "S"}, + {1 << 6, "Z"}, + {1 << 4, "A"}, + {1 << 3, "P"}, + {1 << 1, "N"}, + {1 << 0, "C"}, {0, 0} /* last mask must be 0 */ }; -static CPUFLAG cpuflags8080[] = { - {1 << 7, 'S'}, - {1 << 6, 'Z'}, - {1 << 4, 'A'}, - {1 << 3, 'P'}, - {1 << 1, 'N'}, - {1 << 0, 'C'}, +const static CPUFLAG cpuflagsZ80[] = { + {1 << 7, "S"}, + {1 << 6, "Z"}, + {1 << 4, "A"}, + {1 << 3, "V"}, + {1 << 1, "N"}, + {1 << 0, "C"}, {0, 0} /* last mask must be 0 */ }; -static CPUFLAG cpuflagsZ80[] = { - {1 << 7, 'S'}, - {1 << 6, 'Z'}, - {1 << 4, 'A'}, - {1 << 3, 'V'}, - {1 << 1, 'N'}, - {1 << 0, 'C'}, +const static CPUFLAG cpuflags8086[] = { + {1 << 11, "O"}, + {1 << 10, "D"}, + {1 << 9, "I"}, + {1 << 8, "T"}, + {1 << 7, "S"}, + {1 << 6, "Z"}, + {1 << 4, "A"}, + {1 << 2, "P"}, + {1 << 0, "C"}, {0, 0} /* last mask must be 0 */ }; -/* needs to be set for each chiptype <= MAX_CHIP_TYPE */ -static char *chipTypeToString[] = { "8080", "Z80", "8086" }; -static int32 *flagregister[] = { &AF_S, &AF_S, &FLAGS_S }; -static CPUFLAG *cpuflags[] = { cpuflags8080, cpuflagsZ80, cpuflags8086 }; +const static CPUFLAG cpuflagsM68K[] = { + {1 << 15, "T1"}, /* Trace Enable T1 */ + {1 << 14, "T0"}, /* Trace Enable T0 */ + {1 << 13, "S"}, /* Supervisor / User State */ + {1 << 12, "M"}, /* Master / Interrupt State */ + {1 << 10, "I2"}, /* Interrupt Priority Mask I2 */ + {1 << 9, "I1"}, /* Interrupt Priority Mask I1 */ + {1 << 8, "I0"}, /* Interrupt Priority Mask I0 */ + {1 << 4, "X"}, /* Extend */ + {1 << 3, "N"}, /* Negative */ + {1 << 2, "Z"}, /* Zero */ + {1 << 1, "V"}, /* Overflow */ + {1 << 0, "C"}, /* Carry */ + {0, 0}, /* last mask must be 0 */ +}; + +/* needs to be set for each chiptype < NUM_CHIP_TYPE */ +const static uint32 *flagregister[NUM_CHIP_TYPE] = { (uint32*)&AF_S, (uint32*)&AF_S, + (uint32*)&FLAGS_S, &m68k_registers[M68K_REG_SR]}; +const static CPUFLAG *cpuflags[NUM_CHIP_TYPE] = { cpuflags8080, cpuflagsZ80, + cpuflags8086, cpuflagsM68K, }; /* needs to be set for each ramtype <= MAX_RAM_TYPE */ static char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM" }; static t_stat chip_show(FILE *st, UNIT *uptr, int32 val, void *desc) { fprintf(st, cpu_unit.flags & UNIT_CPU_OPSTOP ? "ITRAP, " : "NOITRAP, "); - if (chiptype <= MAX_CHIP_TYPE) - fprintf(st, "%s", chipTypeToString[chiptype]); + if (chiptype < NUM_CHIP_TYPE) + fprintf(st, "%s", cpu_mod[chiptype].mstring); fprintf(st, ", "); if (ramtype <= MAX_RAM_TYPE) fprintf(st, "%s", ramTypeToString[ramtype]); @@ -6498,7 +6737,9 @@ static t_stat cpu_show(FILE *st, UNIT *uptr, int32 val, void *desc) { MDEV m; maxBanks = ((cpu_unit.flags & UNIT_CPU_BANKED) || (chiptype == CHIP_TYPE_8086)) ? MAXBANKS : 1; - fprintf(st, "VERBOSE,\n "); + fprintf(st, "VERBOSE,"); + if (chiptype < CHIP_TYPE_M68K) { /* 8080, Z80, 8086 */ + fprintf(st, "\n "); for (i = 0; i < 4; i++) fprintf(st, "0123456789ABCDEF"); fprintf(st, " [16k]"); @@ -6526,16 +6767,17 @@ static t_stat cpu_show(FILE *st, UNIT *uptr, int32 val, void *desc) { fprintf(st, "%02X", i); } fprintf(st, "]"); - if (chiptype <= MAX_CHIP_TYPE) { + } + if (chiptype < NUM_CHIP_TYPE) { first = TRUE; /* show verbose CPU flags */ for (i = 0; cpuflags[chiptype][i].mask; i++) if (*flagregister[chiptype] & cpuflags[chiptype][i].mask) { if (first) { first = FALSE; - fprintf(st, " "); + fprintf(st, "\nFlags"); } - fprintf(st, "%c", cpuflags[chiptype][i].name); + fprintf(st, " %s", cpuflags[chiptype][i].flagName); } } return SCPE_OK; @@ -6551,6 +6793,7 @@ static void cpu_clear(void) { mmu_table[i] = EMPTY_PAGE; if (cpu_unit.flags & UNIT_CPU_ALTAIRROM) install_ALTAIRbootROM(); + m68k_clear_memory(); clockHasChanged = FALSE; } @@ -6699,9 +6942,8 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) { } } -static void cpu_set_chiptype_short(int32 value, uint32 need_cpu_clear) { - extern REG *sim_PC; - if ((chiptype == value) || (chiptype > MAX_CHIP_TYPE)) +static void cpu_set_chiptype_short(const int32 value) { + if ((chiptype == value) || (chiptype >= NUM_CHIP_TYPE)) return; /* nothing to do */ if (((chiptype == CHIP_TYPE_8080) && (value == CHIP_TYPE_Z80)) || ((chiptype == CHIP_TYPE_Z80) && (value == CHIP_TYPE_8080))) { @@ -6709,28 +6951,38 @@ static void cpu_set_chiptype_short(int32 value, uint32 need_cpu_clear) { return; } chiptype = value; - if (chiptype == CHIP_TYPE_8086) { + switch (chiptype) { + case CHIP_TYPE_8080: + case CHIP_TYPE_Z80: + MEMORYSIZE = previousCapacity; + cpu_dev.awidth = MAXBANKSIZELOG2; + sim_PC = &cpu_reg[CPU_INDEX_8080]; + break; + + case CHIP_TYPE_8086: if (MEMORYSIZE <= MAXBANKSIZE) previousCapacity = MEMORYSIZE; MEMORYSIZE = MAXMEMORY; cpu_unit.flags &= ~(UNIT_CPU_BANKED | UNIT_CPU_ALTAIRROM); cpu_unit.flags |= UNIT_CPU_MMU; cpu_dev.awidth = MAXBANKSIZELOG2 + MAXBANKSLOG2; - if (need_cpu_clear) - cpu_clear(); - sim_PC = &cpu_reg[7]; - } - else if ((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) { - MEMORYSIZE = previousCapacity; - cpu_dev.awidth = MAXBANKSIZELOG2; - if (need_cpu_clear) - cpu_clear(); - sim_PC = &cpu_reg[6]; + sim_PC = &cpu_reg[CPU_INDEX_8086]; + break; + + case CHIP_TYPE_M68K: + MEMORYSIZE = M68K_MAX_RAM + 1; + cpu_dev.awidth = M68K_MAX_RAM_LOG2; + sim_PC = &cpu_reg[CPU_INDEX_M68K]; + break; + + default: + break; } } static t_stat cpu_set_chiptype(UNIT *uptr, int32 value, char *cptr, void *desc) { - cpu_set_chiptype_short(value, TRUE); + cpu_set_chiptype_short(value); + cpu_clear(); return SCPE_OK; } @@ -6758,7 +7010,7 @@ static int32 switchcpu_io(const int32 port, const int32 io, const int32 data) { break; } - cpu_set_chiptype_short(new_chiptype, FALSE); + cpu_set_chiptype_short(new_chiptype); return(0xFF); /* Return High-Z Data */ } else { printf("%s: Set EXT_ADDR=%02x\n", __FUNCTION__, data); @@ -6854,7 +7106,13 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, char *cptr, void *desc) { /* set memory to 'size' kilo byte */ static t_stat set_size(uint32 size) { - uint32 maxsize = (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) && + uint32 maxsize; + if (chiptype == CHIP_TYPE_M68K) { // ignore for M68K + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("Setting memory size to %ikB ignored for M68K.\n", size); + return SCPE_OK; + } + maxsize = (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) && ((cpu_unit.flags & UNIT_CPU_BANKED) == 0)) ? MAXBANKSIZE : MAXMEMORY; size <<= KBLOG2; if (cpu_unit.flags & UNIT_CPU_BANKED) @@ -6910,6 +7168,41 @@ void (*sim_vm_init) (void) = &altairz80_init; #define PLURAL(x) (x), (x) == 1 ? "" : "s" +static t_stat sim_load_m68k(FILE *fileref, char *cptr, char *fnam, int flag) { + char gbuf[CBUFSIZE]; + int32 i; + t_addr j, lo, hi; + uint32 addr, org, cnt = 0; + char* result; + if (flag ) { + result = get_range(NULL, cptr, &lo, &hi, 16, M68K_MAX_RAM, 0); + if (result == NULL) + return SCPE_ARG; + for (j = lo; j <= hi; j++) { + if (putc(m68k_cpu_read_byte(j), fileref) == EOF) + return SCPE_IOERR; + } + printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam); + } else { + if (*cptr == 0) + addr = m68k_registers[M68K_REG_PC]; + else { + get_glyph(cptr, gbuf, 0); + addr = strtotv(cptr, &result, 16) & M68K_MAX_RAM; + if (cptr == result) + return SCPE_ARG; + } + org = addr; + while ((addr <= M68K_MAX_RAM) && ((i = getc(fileref)) != EOF)) { + m68k_cpu_write_byte(addr++, i); + cnt++; + } + printf("%d byte%s [%d page%s] loaded at %x.\n", + PLURAL(cnt), PLURAL((cnt + 0xff) >> 8), org); + } + return SCPE_OK; +} + t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) { int32 i; uint32 addr, cnt = 0, org, pagesModified = 0, makeROM = FALSE; @@ -6917,6 +7210,8 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) { char *result; MDEV m; char gbuf[CBUFSIZE]; + if (chiptype == CHIP_TYPE_M68K) + return sim_load_m68k(fileref, cptr, fnam, flag); if (flag) { result = get_range(NULL, cptr, &lo, &hi, 16, ADDRMASKEXTENDED, 0); if (result == NULL) @@ -6925,7 +7220,7 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) { if (putc(GetBYTEExtended(j), fileref) == EOF) return SCPE_IOERR; } - printf("%d byte%s dumped [%x - %x].\n", PLURAL(hi + 1 - lo), lo, hi); + printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam); } else { if (*cptr == 0) @@ -6940,7 +7235,8 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) { addr = strtotv(cptr, &result, 16) & ADDRMASKEXTENDED; if (cptr == result) return SCPE_ARG; - while (isspace(*result)) result++; + while (isspace(*result)) + result++; get_glyph(result, gbuf, 0); if (strcmp(gbuf, "ROM") == 0) makeROM = TRUE; @@ -6981,6 +7277,6 @@ void cpu_raise_interrupt(uint32 irq) { cpu8086_intr(irq); } else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { printf("Interrupts not fully supported for chiptype: %s\n", - (chiptype <= MAX_CHIP_TYPE) ? chipTypeToString[chiptype] : "????"); + (chiptype < NUM_CHIP_TYPE) ? cpu_mod[chiptype].mstring : "????"); } } diff --git a/AltairZ80/altairz80_defs.h b/AltairZ80/altairz80_defs.h index ef229502..20ab4774 100644 --- a/AltairZ80/altairz80_defs.h +++ b/AltairZ80/altairz80_defs.h @@ -26,6 +26,9 @@ Based on work by Charles E Owen (c) 1997 */ +#ifndef ALTAIRZ80_DEFS_H_ +#define ALTAIRZ80_DEFS_H_ 0 + #include "sim_defs.h" /* simulator definitions */ #define MAXBANKSIZE 65536 /* maximum memory size, a power of 2 */ @@ -48,10 +51,15 @@ #define UNIT_NO_OFFSET_1 0x37 /* LD A, */ #define UNIT_NO_OFFSET_2 0xb4 /* LD a,80h | */ -#define CHIP_TYPE_8080 0 -#define CHIP_TYPE_Z80 1 -#define CHIP_TYPE_8086 2 -#define MAX_CHIP_TYPE CHIP_TYPE_8086 +#define CPU_INDEX_8080 4 /* index of default PC register */ + +typedef enum { + CHIP_TYPE_8080 = 0, + CHIP_TYPE_Z80, + CHIP_TYPE_8086, + CHIP_TYPE_M68K, /* must come after 8080, Z80 and 8086 */ + NUM_CHIP_TYPE, /* must be last */ +} ChipType; /* simulator stop codes */ #define STOP_HALT 0 /* HALT */ @@ -81,7 +89,7 @@ #define UNIX_PLATFORM 0 #endif -#define ADDRESS_FORMAT "[0x%05x]" +#define ADDRESS_FORMAT "[0x%08x]" /* use NLP for new line printing while the simulation is running */ #if UNIX_PLATFORM @@ -100,3 +108,5 @@ typedef struct { uint32 io_base; /* I/O Base Address */ uint32 io_size; /* I/O Address Space requirement */ } PNP_INFO; + +#endif diff --git a/AltairZ80/altairz80_doc.pdf b/AltairZ80/altairz80_doc.pdf index 44c12e16..dca92adf 100644 Binary files a/AltairZ80/altairz80_doc.pdf and b/AltairZ80/altairz80_doc.pdf differ diff --git a/AltairZ80/altairz80_dsk.c b/AltairZ80/altairz80_dsk.c index 1fb93559..d599e340 100644 --- a/AltairZ80/altairz80_dsk.c +++ b/AltairZ80/altairz80_dsk.c @@ -106,6 +106,11 @@ T = Sector True, is a 1 when the sector is positioned to read or write. + ---------------------------------------------------------- + + 5/22/2014 - Updated by Mike Douglas to support the Altair Mini-Disk. + This disk uses 35 (vs 70) tracks of 16 (vs 32) sectors + of 137 bytes each. */ #include "altairz80_defs.h" @@ -131,21 +136,26 @@ #define NUM_OF_DSK_MASK (NUM_OF_DSK - 1) #define BOOTROM_SIZE_DSK 256 /* size of boot rom */ +#define MINI_DISK_SECT 16 /* mini disk sectors per track */ +#define MINI_DISK_TRACKS 35 /* number of tracks on mini disk */ +#define MINI_DISK_SIZE (MINI_DISK_TRACKS * MINI_DISK_SECT * DSK_SECTSIZE) +#define MINI_DISK_DELTA 4096 /* threshold for detecting mini disks */ int32 dsk10(const int32 port, const int32 io, const int32 data); int32 dsk11(const int32 port, const int32 io, const int32 data); int32 dsk12(const int32 port, const int32 io, const int32 data); static t_stat dsk_boot(int32 unitno, DEVICE *dptr); static t_stat dsk_reset(DEVICE *dptr); +static t_stat dsk_attach(UNIT *uptr, char *cptr); -extern REG *sim_PC; extern UNIT cpu_unit; extern uint32 PCX; -extern t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM); +extern t_stat install_bootrom(const int32 bootrom[], const int32 size, const int32 addr, const int32 makeROM); extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type, int32 (*routine)(const int32, const int32, const int32), uint8 unmap); void install_ALTAIRbootROM(void); +extern int32 find_unit_index(UNIT *uptr); /* global data on status */ @@ -156,6 +166,10 @@ static int32 current_track [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, static int32 current_sector [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static int32 current_byte [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static int32 current_flag [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static int32 sectors_per_track [NUM_OF_DSK] = { DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, + DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, + DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, + DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT }; static uint8 tracks [NUM_OF_DSK] = { MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, MAX_TRACKS, @@ -171,6 +185,41 @@ static int32 warnDSK11 = 0; static int32 warnDSK12 = 0; static int8 dskbuf[DSK_SECTSIZE]; /* data Buffer */ +const static int32 alt_bootrom_dsk[BOOTROM_SIZE_DSK] = { // boot ROM for mini disk support + 0x21, 0x13, 0xff, 0x11, 0x00, 0x4c, 0x0e, 0xe3, /* ff00-ff07 */ + 0x7e, 0x12, 0x23, 0x13, 0x0d, 0xc2, 0x08, 0xff, /* ff08-ff0f */ + 0xc3, 0x00, 0x4c, 0xf3, 0xaf, 0xd3, 0x22, 0x2f, /* ff10-ff17 */ + 0xd3, 0x23, 0x3e, 0x2c, 0xd3, 0x22, 0x3e, 0x03, /* ff18-ff1f */ + 0xd3, 0x10, 0xdb, 0xff, 0xe6, 0x11, 0x0f, 0x0f, /* ff20-ff27 */ + 0xc6, 0x10, 0xd3, 0x10, 0x31, 0x71, 0x4d, 0xaf, /* ff28-ff2f */ + 0xd3, 0x08, 0xdb, 0x08, 0xe6, 0x08, 0xc2, 0x1c, /* ff30-ff37 */ + 0x4c, 0x3e, 0x04, 0xd3, 0x09, 0xc3, 0x38, 0x4c, /* ff38-ff3f */ + 0xdb, 0x08, 0xe6, 0x02, 0xc2, 0x2d, 0x4c, 0x3e, /* ff40-ff47 */ + 0x02, 0xd3, 0x09, 0xdb, 0x08, 0xe6, 0x40, 0xc2, /* ff48-ff4f */ + 0x2d, 0x4c, 0x11, 0x00, 0x00, 0x06, 0x00, 0x3e, /* ff50-ff57 */ + 0x10, 0xf5, 0xd5, 0xc5, 0xd5, 0x11, 0x86, 0x80, /* ff58-ff5f */ + 0x21, 0xe3, 0x4c, 0xdb, 0x09, 0x1f, 0xda, 0x50, /* ff60-ff67 */ + 0x4c, 0xe6, 0x1f, 0xb8, 0xc2, 0x50, 0x4c, 0xdb, /* ff68-ff6f */ + 0x08, 0xb7, 0xfa, 0x5c, 0x4c, 0xdb, 0x0a, 0x77, /* ff70-ff77 */ + 0x23, 0x1d, 0xc2, 0x5c, 0x4c, 0xe1, 0x11, 0xe6, /* ff78-ff7f */ + 0x4c, 0x01, 0x80, 0x00, 0x1a, 0x77, 0xbe, 0xc2, /* ff80-ff87 */ + 0xc3, 0x4c, 0x80, 0x47, 0x13, 0x23, 0x0d, 0xc2, /* ff88-ff8f */ + 0x71, 0x4c, 0x1a, 0xfe, 0xff, 0xc2, 0x88, 0x4c, /* ff90-ff97 */ + 0x13, 0x1a, 0xb8, 0xc1, 0xeb, 0xc2, 0xba, 0x4c, /* ff98-ff9f */ + 0xf1, 0xf1, 0x2a, 0xe4, 0x4c, 0xcd, 0xdd, 0x4c, /* ffa0-ffa7 */ + 0xd2, 0xb3, 0x4c, 0x04, 0x04, 0x78, 0xfe, 0x10, /* ffa8-ffaf */ + 0xda, 0x44, 0x4c, 0x06, 0x01, 0xca, 0x44, 0x4c, /* ffb0-ffb7 */ + 0xdb, 0x08, 0xe6, 0x02, 0xc2, 0xa5, 0x4c, 0x3e, /* ffb8-ffbf */ + 0x01, 0xd3, 0x09, 0xc3, 0x42, 0x4c, 0x3e, 0x80, /* ffc0-ffc7 */ + 0xd3, 0x08, 0xc3, 0x00, 0x00, 0xd1, 0xf1, 0x3d, /* ffc8-ffcf */ + 0xc2, 0x46, 0x4c, 0x3e, 0x43, 0x01, 0x3e, 0x4d, /* ffd0-ffd7 */ + 0xfb, 0x32, 0x00, 0x00, 0x22, 0x01, 0x00, 0x47, /* ffd8-ffdf */ + 0x3e, 0x80, 0xd3, 0x08, 0x78, 0xd3, 0x01, 0xd3, /* ffe0-ffe7 */ + 0x11, 0xd3, 0x05, 0xd3, 0x23, 0xc3, 0xd2, 0x4c, /* ffe8-ffef */ + 0x7a, 0xbc, 0xc0, 0x7b, 0xbd, 0xc9, 0x00, 0x00, /* fff0-fff7 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* fff8-ffff */ +}; + /* Altair MITS modified BOOT EPROM, fits in upper 256 byte of memory */ int32 bootrom_dsk[BOOTROM_SIZE_DSK] = { 0xf3, 0x06, 0x80, 0x3e, 0x0e, 0xd3, 0xfe, 0x05, /* ff00-ff07 */ @@ -229,40 +278,62 @@ static UNIT dsk_unit[] = { }; static REG dsk_reg[] = { - { DRDATA (DISK, current_disk, 4) }, - { BRDATA (CURTRACK, current_track, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { BRDATA (CURSECTOR, current_sector, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { BRDATA (CURBYTE, current_byte, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { BRDATA (CURFLAG, current_flag, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { BRDATA (TRACKS, tracks, 10, 8, NUM_OF_DSK), REG_CIRC }, - { DRDATA (IN9COUNT, in9_count, 4), REG_RO }, - { DRDATA (IN9MESSAGE, in9_message, 4), REG_RO }, - { DRDATA (DIRTY, dirty, 4), REG_RO }, - { DRDATA (DSKWL, warnLevelDSK, 32) }, - { BRDATA (WARNLOCK, warnLock, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { BRDATA (WARNATTACHED, warnAttached, 10, 32, NUM_OF_DSK), REG_CIRC + REG_RO }, - { DRDATA (WARNDSK10, warnDSK10, 4), REG_RO }, - { DRDATA (WARNDSK11, warnDSK11, 4), REG_RO }, - { DRDATA (WARNDSK12, warnDSK12, 4), REG_RO }, - { BRDATA (DISKBUFFER, dskbuf, 10, 8, DSK_SECTSIZE), REG_CIRC + REG_RO }, + { DRDATAD (DISK, current_disk, 4, + "Selected disk register"), }, + { BRDATAD (CURTRACK, current_track, 10, 32, NUM_OF_DSK, + "Selected track register array"), REG_CIRC + REG_RO }, + { BRDATAD (CURSECTOR, current_sector, 10, 32, NUM_OF_DSK, + "Selected sector register array"), REG_CIRC + REG_RO }, + { BRDATAD (CURBYTE, current_byte, 10, 32, NUM_OF_DSK, + "Current byte register arrayr"), REG_CIRC + REG_RO }, + { BRDATAD (CURFLAG, current_flag, 10, 32, NUM_OF_DSK, + "Current flag register array"), REG_CIRC + REG_RO }, + { BRDATAD (TRACKS, tracks, 10, 8, NUM_OF_DSK, + "Number of tracks register array"), REG_CIRC }, + { BRDATAD (SECTPERTRACK,sectors_per_track, 10, 8, NUM_OF_DSK, + "Number of sectors per track register array"), REG_CIRC }, + { DRDATAD (IN9COUNT, in9_count, 4, + "Count of IN(9) register"), REG_RO }, + { DRDATAD (IN9MESSAGE, in9_message, 4, + "BOOL for IN(9) message register"), REG_RO }, + { DRDATAD (DIRTY, dirty, 4, + "BOOL for write needed register"), REG_RO }, + { DRDATAD (DSKWL, warnLevelDSK, 32, + "Warn level register") }, + { BRDATAD (WARNLOCK, warnLock, 10, 32, NUM_OF_DSK, + "Count of write to locked register array"), REG_CIRC + REG_RO }, + { BRDATAD (WARNATTACHED, warnAttached, 10, 32, NUM_OF_DSK, + "Count for selection of unattached disk register array"), REG_CIRC + REG_RO }, + { DRDATAD (WARNDSK10, warnDSK10, 4, + "Count of IN(8) on unattached disk register"), REG_RO }, + { DRDATAD (WARNDSK11, warnDSK11, 4, + "Count of IN/OUT(9) on unattached disk register"), REG_RO }, + { DRDATAD (WARNDSK12, warnDSK12, 4, + "Count of IN/OUT(10) on unattached disk register"), REG_RO }, + { BRDATAD (DISKBUFFER, dskbuf, 10, 8, DSK_SECTSIZE, + "Disk data buffer array"), REG_CIRC + REG_RO }, { NULL } }; +#define DSK_NAME "Altair Floppy Disk DSK" + static MTAB dsk_mod[] = { - { UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL }, - { UNIT_DSK_WLK, UNIT_DSK_WLK, "WRTLCK", "WRTLCK", NULL }, + { UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL, NULL, NULL, + "Enables " DSK_NAME "n for writing" }, + { UNIT_DSK_WLK, UNIT_DSK_WLK, "WRTLCK", "WRTLCK", NULL, NULL, NULL, + "Locks " DSK_NAME "n for writing" }, { 0 } }; /* Debug Flags */ static DEBTAB dsk_dt[] = { - { "IN", IN_MSG }, - { "OUT", OUT_MSG }, - { "READ", READ_MSG }, - { "WRITE", WRITE_MSG }, - { "SECTOR_STUCK", SECTOR_STUCK_MSG }, - { "TRACK_STUCK", TRACK_STUCK_MSG }, - { "VERBOSE", VERBOSE_MSG }, + { "IN", IN_MSG, "IN operations" }, + { "OUT", OUT_MSG, "OUT operations" }, + { "READ", READ_MSG, "Read operations" }, + { "WRITE", WRITE_MSG, "Write operations" }, + { "SECTOR_STUCK", SECTOR_STUCK_MSG, "Sector stuck" }, + { "TRACK_STUCK", TRACK_STUCK_MSG, "Track stuck" }, + { "VERBOSE", VERBOSE_MSG, "Verbose messages" }, { NULL, 0 } }; @@ -270,9 +341,9 @@ DEVICE dsk_dev = { "DSK", dsk_unit, dsk_reg, dsk_mod, NUM_OF_DSK, 10, 31, 1, 8, 8, NULL, NULL, &dsk_reset, - &dsk_boot, NULL, NULL, + &dsk_boot, &dsk_attach, NULL, NULL, (DEV_DISABLE | DEV_DEBUG), 0, - dsk_dt, NULL, "Altair Floppy Disk DSK" + dsk_dt, NULL, DSK_NAME }; static char* selectInOut(const int32 io) { @@ -291,7 +362,6 @@ static t_stat dsk_reset(DEVICE *dptr) { current_sector[i] = 0; current_byte[i] = 0; current_flag[i] = 0; - tracks[i] = MAX_TRACKS; } warnDSK10 = 0; warnDSK11 = 0; @@ -304,6 +374,28 @@ static t_stat dsk_reset(DEVICE *dptr) { sim_map_resource(0x0A, 1, RESOURCE_TYPE_IO, &dsk12, dptr->flags & DEV_DIS); return SCPE_OK; } +/* dsk_attach - determine type of drive attached based on disk image size */ + +static t_stat dsk_attach(UNIT *uptr, char *cptr) { + int32 thisUnitIndex; + int32 imageSize; + const t_stat r = attach_unit(uptr, cptr); /* attach unit */ + if (r != SCPE_OK) /* error? */ + return r; + + assert(uptr != NULL); + thisUnitIndex = find_unit_index(uptr); + assert((0 <= thisUnitIndex) && (thisUnitIndex < NUM_OF_DSK)); + + /* If the file size is close to the mini-disk image size, set the number of + tracks to 16, otherwise, 32 sectors per track. */ + + imageSize = sim_fsize(uptr -> fileref); + sectors_per_track[thisUnitIndex] = (((MINI_DISK_SIZE - MINI_DISK_DELTA < imageSize) && + (imageSize < MINI_DISK_SIZE + MINI_DISK_DELTA)) ? + MINI_DISK_SECT : DSK_SECT); + return SCPE_OK; +} void install_ALTAIRbootROM(void) { const t_bool result = (install_bootrom(bootrom_dsk, BOOTROM_SIZE_DSK, ALTAIR_ROM_LOW, TRUE) == @@ -316,8 +408,14 @@ void install_ALTAIRbootROM(void) { */ static t_stat dsk_boot(int32 unitno, DEVICE *dptr) { if (cpu_unit.flags & (UNIT_CPU_ALTAIRROM | UNIT_CPU_BANKED)) { + if (sectors_per_track[unitno] == MINI_DISK_SECT) { + const t_bool result = (install_bootrom(alt_bootrom_dsk, BOOTROM_SIZE_DSK, + ALTAIR_ROM_LOW, TRUE) == SCPE_OK); + assert(result); + } else { /* check whether we are really modifying an LD A,<> instruction */ - if ((bootrom_dsk[UNIT_NO_OFFSET_1 - 1] == LDA_INSTRUCTION) && (bootrom_dsk[UNIT_NO_OFFSET_2 - 1] == LDA_INSTRUCTION)) { + if ((bootrom_dsk[UNIT_NO_OFFSET_1 - 1] == LDA_INSTRUCTION) && + (bootrom_dsk[UNIT_NO_OFFSET_2 - 1] == LDA_INSTRUCTION)) { bootrom_dsk[UNIT_NO_OFFSET_1] = unitno & 0xff; /* LD A, */ bootrom_dsk[UNIT_NO_OFFSET_2] = 0x80 | (unitno & 0xff); /* LD a,80h | */ } @@ -327,12 +425,13 @@ static t_stat dsk_boot(int32 unitno, DEVICE *dptr) { } install_ALTAIRbootROM(); /* install modified ROM */ } + } *((int32 *) sim_PC->loc) = ALTAIR_ROM_LOW; return SCPE_OK; } static int32 dskseek(const UNIT *xptr) { - return sim_fseek(xptr -> fileref, DSK_TRACSIZE * current_track[current_disk] + + return sim_fseek(xptr -> fileref, DSK_SECTSIZE * sectors_per_track[current_disk] * current_track[current_disk] + DSK_SECTSIZE * current_sector[current_disk], SEEK_SET); } @@ -465,7 +564,7 @@ int32 dsk11(const int32 port, const int32 io, const int32 data) { writebuf(); if (current_flag[current_disk] & 0x04) { /* head loaded? */ current_sector[current_disk]++; - if (current_sector[current_disk] >= DSK_SECT) + if (current_sector[current_disk] >= sectors_per_track[current_disk]) current_sector[current_disk] = 0; current_byte[current_disk] = 0xff; return (((current_sector[current_disk] << 1) & 0x3e) /* return 'sector true' bit = 0 (true) */ diff --git a/AltairZ80/altairz80_hdsk.c b/AltairZ80/altairz80_hdsk.c index 7fa0d749..cfbaea66 100644 --- a/AltairZ80/altairz80_hdsk.c +++ b/AltairZ80/altairz80_hdsk.c @@ -26,7 +26,7 @@ Contains code from Howard M. Harte for defining and changing disk geometry. */ -#include "altairz80_defs.h" +#include "m68k.h" #include #include "sim_imd.h" @@ -56,7 +56,7 @@ static void verifyDiskInfo(const DISK_INFO *info, const char unitChar); #define HDSK_NUMBER_OF_TRACKS u3 /* number of tracks */ #define HDSK_FORMAT_TYPE u6 /* Disk Format Type */ #define HDSK_CAPACITY (2048*32*128) /* Default Altair HDSK Capacity */ -#define HDSK_NUMBER 8 /* number of hard disks */ +#define HDSK_NUMBER 16 /* number of hard disks */ #define CPM_OK 0 /* indicates to CP/M everything ok */ #define CPM_ERROR 1 /* indicates to CP/M an error condition */ #define CPM_EMPTY 0xe5 /* default value for non-existing bytes */ @@ -70,13 +70,13 @@ static void verifyDiskInfo(const DISK_INFO *info, const char unitChar); #define BOOTROM_SIZE_HDSK 256 extern uint32 PCX; -extern REG *sim_PC; extern UNIT cpu_unit; +extern ChipType chiptype; extern void install_ALTAIRbootROM(void); extern void PutBYTEWrapper(const uint32 Addr, const uint32 Value); extern uint8 GetBYTEWrapper(const uint32 Addr); -extern t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM); +extern t_stat install_bootrom(const int32 bootrom[], const int32 size, const int32 addr, const int32 makeROM); extern int32 bootrom_dsk[]; extern t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc); extern t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc); @@ -94,11 +94,40 @@ static int32 selectedDisk; static int32 selectedSector; static int32 selectedTrack; static int32 selectedDMA; +static int32 hdskStatus; + +void hdsk_prepareRead(void) { + hdskLastCommand = HDSK_READ; +} + +void hdsk_prepareWrite(void) { + hdskLastCommand = HDSK_WRITE; +} + +void hdsk_setSelectedDisk(const int32 disk) { + selectedDisk = disk; +} + +void hdsk_setSelectedSector(const int32 sector) { + selectedSector = sector; +} + +void hdsk_setSelectedTrack(const int32 track) { + selectedTrack = track; +} + +void hdsk_setSelectedDMA(const int32 dma) { + selectedDMA = dma; +} + +int32 hdsk_getStatus(void) { + return hdskStatus; +} typedef struct { char name[DPB_NAME_LENGTH + 1]; /* name of CP/M disk parameter block */ t_addr capac; /* capacity */ - uint16 spt; /* sectors per track */ + uint32 spt; /* sectors per track */ uint8 bsh; /* data allocation block shift factor */ uint8 blm; /* data allocation block mask */ uint8 exm; /* extent mask */ @@ -163,6 +192,9 @@ static DPB dpb[] = { { "HDSK", HDSK_CAPACITY, 32, 0x05, 0x1F, 0x01, 0x07f9, 0x03FF, 0xFF, 0x00, 0x0000, 0x0006, 0x00, 0x00, 0, 0, NULL }, /* AZ80 HDSK */ + { "CPM68K", (1 << 24), (1<<17),0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, NULL }, /* CP/M-68K HDSK */ + { "EZ80FL", 131072, 32, 0x03, 0x07, 0x00, 127, 0x003E, 0xC0, 0x00, 0x0000, 0x0000, 0x02, 0x03, 0, 0, NULL }, /* 128K FLASH */ @@ -204,31 +236,31 @@ static DPB dpb[] = { { "SSDD8", 512512, SPT52, 0x04, 0x0F, 0x01, 242, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x01, 0x01, 0, 0, NULL }, /* Standard 8" SS DD */ - + { "SSDD8S", 512512, SPT52, 0x04, 0x0F, 0x01, 242, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x01, 0x01, 0, 0, standard8 }, /* Standard 8" SS DD with skew */ - + { "DSDD8", 1025024, SPT52, 0x04, 0x0F, 0x00, 493, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x01, 0x01, 0, 0, NULL }, /* Standard 8" DS DD */ - + { "DSDD8S", 1025024, SPT52, 0x04, 0x0F, 0x00, 493, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x01, 0x01, 0, 0, NULL }, /* Standard 8" DS DD with skew */ - + {"512SSDD8",591360, 60, 0x04, 0x0F, 0x00, 280, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x02, 0x03, 0, 0, NULL }, /* Standard 8" SS DD with 512 byte sectors */ - + {"512DSDD8",1182720, 60, 0x04, 0x0F, 0x00, 569, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x02, 0x03, 0, 0, NULL }, /* Standard 8" DS DD with 512 byte sectors */ - + #if 0 /* CP/M 3 BIOS currently does not support physical sector size 1024 */ {"1024SSDD8",630784, 64, 0x04, 0x0F, 0x00, 299, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x03, 0x07, 0, 0, NULL }, /* Standard 8" SS DD with 1024 byte sectors */ - + {"1024DSDD8",1261568, 64, 0x04, 0x0F, 0x00, 607, 0x007F, 0xC0, 0x00, 0x0000, 0x0002, 0x03, 0x07, 0, 0, NULL }, /* Standard 8" DS DD with 1024 byte sectors */ #endif - + { "APPLE-DO",143360, SPT32, 0x03, 0x07, 0x00, 127, 0x003F, 0xC0, 0x00, 0x0000, 0x0003, 0x01, 0x01, 0, 0, apple_ii_DOS }, /* Apple II DOS 3.3 */ @@ -272,40 +304,60 @@ static UNIT hdsk_unit[] = { { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, - { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) } + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, + { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, }; static DISK_INFO* hdsk_imd[HDSK_NUMBER]; static REG hdsk_reg[] = { - { DRDATA (HDCMD, hdskLastCommand, 32), REG_RO }, - { DRDATA (HDPOS, hdskCommandPosition, 32), REG_RO }, - { DRDATA (HDDSK, selectedDisk, 32), REG_RO }, - { DRDATA (HDSEC, selectedSector, 32), REG_RO }, - { DRDATA (HDTRK, selectedTrack, 32), REG_RO }, - { DRDATA (HDDMA, selectedDMA, 32), REG_RO }, + { DRDATAD (HDCMD, hdskLastCommand, 32, "Last command"), + REG_RO }, + { DRDATAD (HDPOS, hdskCommandPosition, 32, "Commmand position"), + REG_RO }, + { DRDATAD (HDDSK, selectedDisk, 32, "Selected disk"), + REG_RO }, + { DRDATAD (HDSEC, selectedSector, 32, "Selected sector"), + REG_RO }, + { DRDATAD (HDTRK, selectedTrack, 32, "Selected track"), + REG_RO }, + { DRDATAD (HDDMA, selectedDMA, 32, "Selected Direct Memory Access address"), REG_RO }, { NULL } }; +#define HDSK_NAME "Hard Disk HDSK" + static MTAB hdsk_mod[] = { - { MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE", &set_iobase, &show_iobase, NULL }, - { MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT", &set_format, &show_format, NULL }, - { UNIT_HDSK_WLK, 0, "WRTENB", "WRTENB", NULL }, - { UNIT_HDSK_WLK, UNIT_HDSK_WLK, "WRTLCK", "WRTLCK", NULL }, - { MTAB_XTD|MTAB_VUN, 0, "GEOM", "GEOM", &set_geom, &show_geom, NULL }, + { MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE", + &set_iobase, &show_iobase, NULL, "Defines the I/O port assignment for device " HDSK_NAME }, + { MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT", + &set_format, &show_format, NULL, "Defines the format for unit " HDSK_NAME "n" }, + { UNIT_HDSK_WLK, 0, "WRTENB", "WRTENB", + NULL, NULL, NULL, "Enables " HDSK_NAME "n for writing" }, + { UNIT_HDSK_WLK, UNIT_HDSK_WLK, "WRTLCK", "WRTLCK", + NULL, NULL, NULL, "Locks " HDSK_NAME "n for writing" }, + { MTAB_XTD|MTAB_VUN, 0, "GEOM", "GEOM", + &set_geom, &show_geom, NULL, "Sets the disk geometry for unit " HDSK_NAME "n" }, { 0 } }; /* Debug Flags */ static DEBTAB hdsk_dt[] = { - { "READ", READ_MSG }, - { "WRITE", WRITE_MSG }, - { "VERBOSE", VERBOSE_MSG }, - { NULL, 0 } + { "READ", READ_MSG, "Disk read activity" }, + { "WRITE", WRITE_MSG, "Disk write activity" }, + { "VERBOSE", VERBOSE_MSG, "All disk activity" }, + { NULL, 0 } }; DEVICE hdsk_dev = { "HDSK", hdsk_unit, hdsk_reg, hdsk_mod, - 8, 10, 31, 1, 8, 8, + HDSK_NUMBER, 10, 31, 1, 8, 8, NULL, NULL, &hdsk_reset, &hdsk_boot, &hdsk_attach, &hdsk_detach, &hdsk_info_data, (DEV_DISABLE | DEV_DEBUG), 0, @@ -338,9 +390,9 @@ static uint32 is_imd(const UNIT *uptr) { static void assignFormat(UNIT *uptr) { uint32 i; - uptr -> HDSK_FORMAT_TYPE = -1; /* default to unknown format type */ - for (i = 0; dpb[i].capac != 0; i++) { /* find disk parameter block */ - if (dpb[i].capac == uptr -> capac) { /* found if correct capacity */ + uptr -> HDSK_FORMAT_TYPE = -1; /* default to unknown format type */ + for (i = 0; dpb[i].capac != 0; i++) { /* find disk parameter block */ + if (dpb[i].capac == uptr -> capac) { /* found if correct capacity */ uptr -> HDSK_FORMAT_TYPE = i; break; } @@ -376,15 +428,15 @@ static void verifyDiskInfo(const DISK_INFO *info, const char unitChar) { static t_stat hdsk_attach(UNIT *uptr, char *cptr) { int32 thisUnitIndex; char unitChar; - const t_stat r = attach_unit(uptr, cptr); /* attach unit */ - if (r != SCPE_OK) /* error? */ + const t_stat r = attach_unit(uptr, cptr); /* attach unit */ + if (r != SCPE_OK) /* error? */ return r; - + assert(uptr != NULL); thisUnitIndex = find_unit_index(uptr); unitChar = '0' + thisUnitIndex; assert((0 <= thisUnitIndex) && (thisUnitIndex < HDSK_NUMBER)); - + if (is_imd(uptr)) { if ((sim_fsize(uptr -> fileref) == 0) && (diskCreate(uptr -> fileref, "$Id: SIMH hdsk.c $") != SCPE_OK)) { @@ -412,28 +464,28 @@ static t_stat hdsk_attach(UNIT *uptr, char *cptr) { } return SCPE_OK; } - - /* Step 1: Determine capacity of this disk */ - uptr -> capac = sim_fsize(uptr -> fileref); /* the file length is a good indication */ - if (uptr -> capac == 0) { /* file does not exist or has length 0 */ + + /* Step 1: Determine capacity of this disk */ + uptr -> capac = sim_fsize(uptr -> fileref); /* the file length is a good indication */ + if (uptr -> capac == 0) { /* file does not exist or has length 0 */ uptr -> capac = (uptr -> HDSK_NUMBER_OF_TRACKS * uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE); if (uptr -> capac == 0) uptr -> capac = HDSK_CAPACITY; - } /* post condition: uptr -> capac > 0 */ + } /* post condition: uptr -> capac > 0 */ assert(uptr -> capac); - - /* Step 2: Determine format based on disk capacity */ + + /* Step 2: Determine format based on disk capacity */ assignFormat(uptr); - - /* Step 3: Set number of sectors per track and sector size */ - if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found */ + + /* Step 3: Set number of sectors per track and sector size */ + if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found */ uptr -> HDSK_FORMAT_TYPE = 0; printf("HDSK%c: WARNING: Unsupported disk capacity, assuming HDSK type with capacity %iKB.\n", unitChar, uptr -> capac / 1000); uptr -> flags |= UNIT_HDSK_WLK; printf("HDSK%c: WARNING: Forcing WRTLCK.\n", unitChar); - /* check whether capacity corresponds to setting of tracks, sectors per track and sector size */ + /* check whether capacity corresponds to setting of tracks, sectors per track and sector size */ if (uptr -> capac != (uint32)(uptr -> HDSK_NUMBER_OF_TRACKS * uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE)) { printf("HDSK%c: WARNING: Fixing geometry.\n", unitChar); @@ -443,20 +495,20 @@ static t_stat hdsk_attach(UNIT *uptr, char *cptr) { uptr -> HDSK_SECTOR_SIZE = 128; } } - else { /* Case 2: disk parameter block found */ + else { /* Case 2: disk parameter block found */ uptr -> HDSK_SECTORS_PER_TRACK = dpb[uptr -> HDSK_FORMAT_TYPE].spt >> dpb[uptr -> HDSK_FORMAT_TYPE].psh; uptr -> HDSK_SECTOR_SIZE = (128 << dpb[uptr -> HDSK_FORMAT_TYPE].psh); } assert((uptr -> HDSK_SECTORS_PER_TRACK) && (uptr -> HDSK_SECTOR_SIZE) && (uptr -> HDSK_FORMAT_TYPE >= 0)); - - /* Step 4: Number of tracks is smallest number to accomodate capacity */ + + /* Step 4: Number of tracks is smallest number to accomodate capacity */ uptr -> HDSK_NUMBER_OF_TRACKS = (uptr -> capac + uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE - 1) / (uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE); assert( ( (t_addr) ((uptr -> HDSK_NUMBER_OF_TRACKS - 1) * uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE) < uptr -> capac) && (uptr -> capac <= (t_addr) (uptr -> HDSK_NUMBER_OF_TRACKS * uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE) ) ); - + return SCPE_OK; } @@ -596,7 +648,9 @@ static int32 bootrom_hdsk[BOOTROM_SIZE_HDSK] = { static t_stat hdsk_boot(int32 unitno, DEVICE *dptr) { t_bool installSuccessful; - if (MEMORYSIZE < 24*KB) { + if (chiptype == CHIP_TYPE_M68K) + return m68k_hdsk_boot(unitno, dptr, VERBOSE_MSG, HDSK_NUMBER); + if (MEMORYSIZE < 24 * KB) { printf("Need at least 24KB RAM to boot from hard disk.\n"); return SCPE_ARG; } @@ -668,7 +722,7 @@ static t_stat hdsk_boot(int32 unitno, DEVICE *dptr) { */ /* check the parameters and return TRUE iff parameters are correct or have been repaired */ -static int32 checkParameters(void) { +t_bool hdsk_checkParameters(void) { UNIT *uptr; if ((selectedDisk < 0) || (selectedDisk >= HDSK_NUMBER)) { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT @@ -684,7 +738,7 @@ static int32 checkParameters(void) { } if ((selectedSector < 0) || (selectedSector >= uptr -> HDSK_SECTORS_PER_TRACK)) { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT - " Constraint violation 0 <= Sector=%02d < %d, will use sector 0 instead.\n", + " Constraint violation 0 <= Sector=%06d < %d, will use sector 0 instead.\n", selectedDisk, PCX, selectedSector, uptr -> HDSK_SECTORS_PER_TRACK); selectedSector = 0; } @@ -694,23 +748,36 @@ static int32 checkParameters(void) { selectedDisk, PCX, selectedTrack, uptr -> HDSK_NUMBER_OF_TRACKS); selectedTrack = 0; } - selectedDMA &= ADDRMASK; + if (chiptype == CHIP_TYPE_M68K) { + if (selectedDMA + uptr -> HDSK_SECTOR_SIZE > M68K_MAX_RAM) { + sim_debug(VERBOSE_MSG, &hdsk_dev, + "HDSK%d: " ADDRESS_FORMAT + " Error: DMA (0x%08x) + sector size (0x%02x) out of bounds. " + "Must be at most 0x%08x.\n", + selectedDisk, PCX, selectedDMA, uptr -> HDSK_SECTOR_SIZE, M68K_MAX_RAM); + return FALSE; + } + } else + selectedDMA &= ADDRMASK; if (hdskLastCommand == HDSK_READ) { sim_debug(READ_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT - " Read Track=%04d Sector=%02d Len=%04d DMA=%04x\n", - selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA); + " Read Track=%04d Sector=%06d Len=%04d DMA=%08x\n", + selectedDisk, PCX, selectedTrack, selectedSector, + uptr -> HDSK_SECTOR_SIZE, selectedDMA); } if (hdskLastCommand == HDSK_WRITE) { sim_debug(WRITE_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT - " Write Track=%04d Sector=%02d Len=%04d DMA=%04x\n", - selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA); + " Write Track=%04d Sector=%06d Len=%04d DMA=%08x\n", + selectedDisk, PCX, selectedTrack, selectedSector, + uptr -> HDSK_SECTOR_SIZE, selectedDMA); } return TRUE; } -/* pre-condition: checkParameters has been executed to repair any faulty parameters */ +/* pre-condition: hdsk_checkParameters has been executed to repair any faulty parameters */ static int32 doSeek(void) { UNIT *uptr = &hdsk_dev.units[selectedDisk]; + assert(uptr != NULL); int32 hostSector = (dpb[uptr -> HDSK_FORMAT_TYPE].skew == NULL) ? selectedSector : dpb[uptr -> HDSK_FORMAT_TYPE].skew[selectedSector]; int32 sectorSize = (dpb[uptr -> HDSK_FORMAT_TYPE].physicalSectorSize == 0) ? @@ -719,7 +786,7 @@ static int32 doSeek(void) { sectorSize * (uptr -> HDSK_SECTORS_PER_TRACK * selectedTrack + hostSector) + dpb[uptr -> HDSK_FORMAT_TYPE].offset, SEEK_SET)) { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT - " Could not access Sector=%02d[=%02d] Track=%04d.\n", + " Could not access Sector=%06d[=%06d] Track=%04d.\n", selectedDisk, PCX, selectedSector, hostSector, selectedTrack); return CPM_ERROR; } @@ -728,8 +795,8 @@ static int32 doSeek(void) { static uint8 hdskbuf[HDSK_MAX_SECTOR_SIZE] = { 0 }; /* data buffer */ -/* pre-condition: checkParameters has been executed to repair any faulty parameters */ -static int32 doRead(void) { +/* pre-condition: hdsk_checkParameters has been executed to repair any faulty parameters */ +int32 hdsk_read(void) { int32 i; t_stat result; DISK_INFO *thisDisk; @@ -761,30 +828,39 @@ static int32 doRead(void) { for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) hdskbuf[i] = CPM_EMPTY; sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d (IMD): " ADDRESS_FORMAT - " . Could not read Sector=%02d Track=%04d.\n", + " . Could not read Sector=%06d Track=%04d.\n", selectedDisk, PCX, selectedSector, selectedTrack); - return CPM_ERROR; + hdskStatus = CPM_ERROR; + return hdskStatus; } } else { - if (doSeek()) - return CPM_ERROR; + if (doSeek()) { + hdskStatus = CPM_ERROR; + return hdskStatus; + } if (sim_fread(hdskbuf, 1, uptr -> HDSK_SECTOR_SIZE, uptr -> fileref) != (size_t)(uptr -> HDSK_SECTOR_SIZE)) { for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) hdskbuf[i] = CPM_EMPTY; sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT - " Could not read Sector=%02d Track=%04d.\n", + " Could not read Sector=%06d Track=%04d.\n", selectedDisk, PCX, selectedSector, selectedTrack); - return CPM_OK; /* allows the creation of empty hard disks */ + hdskStatus = CPM_OK; + return hdskStatus; /* allows the creation of empty hard disks */ } } - for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) - PutBYTEWrapper(selectedDMA + i, hdskbuf[i]); - return CPM_OK; + if (chiptype == CHIP_TYPE_M68K) + for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) + m68k_cpu_write_byte_raw(selectedDMA + i, hdskbuf[i]); + else + for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) + PutBYTEWrapper(selectedDMA + i, hdskbuf[i]); + hdskStatus = CPM_OK; + return hdskStatus; } -/* pre-condition: checkParameters has been executed to repair any faulty parameters */ -static int32 doWrite(void) { +/* pre-condition: hdsk_checkParameters has been executed to repair any faulty parameters */ +int32 hdsk_write(void) { int32 i; t_stat result; DISK_INFO *thisDisk; @@ -797,9 +873,13 @@ static int32 doWrite(void) { size_t rtn; UNIT *uptr = &hdsk_dev.units[selectedDisk]; if (((uptr -> flags) & UNIT_HDSK_WLK) == 0) { /* write enabled */ - if (is_imd(uptr)) { + if (chiptype == CHIP_TYPE_M68K) + for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) + hdskbuf[i] = m68k_cpu_read_byte_raw(selectedDMA + i); + else for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) hdskbuf[i] = GetBYTEWrapper(selectedDMA + i); + if (is_imd(uptr)) { thisDisk = hdsk_imd[selectedDisk]; hostSector = ((dpb[uptr -> HDSK_FORMAT_TYPE].skew == NULL) ? selectedSector : dpb[uptr -> HDSK_FORMAT_TYPE].skew[selectedSector]) + thisDisk -> track[1][0].start_sector; @@ -818,31 +898,53 @@ static int32 doWrite(void) { sectorSize, &flags, &writelen); if (result != SCPE_OK) { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d (IMD): " ADDRESS_FORMAT - " . Could not write Sector=%02d Track=%04d.\n", + " . Could not write Sector=%06d Track=%04d.\n", selectedDisk, PCX, selectedSector, selectedTrack); - return CPM_ERROR; + hdskStatus = CPM_ERROR; + return hdskStatus; } } else { - if (doSeek()) - return CPM_ERROR; - for (i = 0; i < uptr -> HDSK_SECTOR_SIZE; i++) - hdskbuf[i] = GetBYTEWrapper(selectedDMA + i); + if (doSeek()) { + hdskStatus = CPM_ERROR; + return hdskStatus; + } rtn = sim_fwrite(hdskbuf, 1, uptr -> HDSK_SECTOR_SIZE, uptr -> fileref); if (rtn != (size_t)(uptr -> HDSK_SECTOR_SIZE)) { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT - " Could not write Sector=%02d Track=%04d Result=%zd.\n", + " Could not write Sector=%06d Track=%04d Result=%zd.\n", selectedDisk, PCX, selectedSector, selectedTrack, rtn); - return CPM_ERROR; + hdskStatus = CPM_ERROR; + return hdskStatus; } } } else { sim_debug(VERBOSE_MSG, &hdsk_dev, "HDSK%d: " ADDRESS_FORMAT - " Could not write to locked disk Sector=%02d Track=%04d.\n", + " Could not write to locked disk Sector=%06d Track=%04d.\n", selectedDisk, PCX, selectedSector, selectedTrack); - return CPM_ERROR; + hdskStatus = CPM_ERROR; + return hdskStatus; } - return CPM_OK; + hdskStatus = CPM_OK; + return hdskStatus; +} + +/* flush all attached drives. Returns CPM_OK if everything fine, otherwise CPM_ERROR */ +int32 hdsk_flush(void) { + uint32 drive; + hdskStatus = CPM_OK; + for (drive = 0; drive < HDSK_NUMBER; drive++) { + const UNIT *uptr = hdsk_dev.units + drive; + if ((uptr -> flags) & UNIT_ATT) { + const int result = fflush(uptr -> fileref); + sim_debug(VERBOSE_MSG, &hdsk_dev, + "HDSK%i: 0x%08x Drive flushed [%i = %s].\n", drive, PCX, + result, result == 0 ? "Ok" : "Error"); + if (result) + hdskStatus = CPM_ERROR; + } + } + return hdskStatus; } #define PARAMETER_BLOCK_SIZE 19 @@ -850,7 +952,7 @@ static uint8 parameterBlock[PARAMETER_BLOCK_SIZE]; static int32 hdsk_in(const int32 port) { if ((hdskCommandPosition == 6) && ((hdskLastCommand == HDSK_READ) || (hdskLastCommand == HDSK_WRITE))) { - int32 result = checkParameters() ? ((hdskLastCommand == HDSK_READ) ? doRead() : doWrite()) : CPM_ERROR; + int32 result = hdsk_checkParameters() ? ((hdskLastCommand == HDSK_READ) ? hdsk_read() : hdsk_write()) : CPM_ERROR; hdskLastCommand = HDSK_NONE; hdskCommandPosition = 0; return result; diff --git a/AltairZ80/altairz80_mhdsk.c b/AltairZ80/altairz80_mhdsk.c index b02ef997..9a3c655d 100755 --- a/AltairZ80/altairz80_mhdsk.c +++ b/AltairZ80/altairz80_mhdsk.c @@ -32,12 +32,12 @@ two platters as two separate drives. Each platter has 406 cylinders with 24 sectors per track and 256 bytes per sector. - The disk image file starts with head 0, track 0, sector 0 (0,0,0) through + The disk image file starts with head 0, track 0, sector 0 (0,0,0) through (0,0,23), followed by head 1, track 0, sector 0 (1,0,0) through (1,0,23). The pattern then repeats starting with (0,1,0). - The external hard disk is accessed through eight ports of a 4-PIO card - at I/O addresses A0h-A7h. + The external hard disk is accessed through eight ports of a 4-PIO card + at I/O addresses A0h-A7h. Written by Mike Douglas March, 2014 Disk images provided by Martin Eberhard @@ -54,7 +54,7 @@ #define HDSK_NUM_TRACKS 406 /* tracks per surface */ #define HDSK_TRACK_SIZE (HDSK_SECTOR_SIZE * HDSK_SECTORS_PER_TRACK) #define HDSK_CYLINDER_SIZE (HDSK_TRACK_SIZE * 2) -#define HDSK_CAPACITY (HDSK_CYLINDER_SIZE * HDSK_NUM_TRACKS) +#define HDSK_CAPACITY (HDSK_CYLINDER_SIZE * HDSK_NUM_TRACKS) #define HDSK_NUMBER 8 /* number of hard disks */ #define IO_IN 0 /* I/O operation is input */ #define IO_OUT 1 /* I/O operation is output */ @@ -71,7 +71,7 @@ extern uint32 PCX; #define BOOTROM_SIZE_MHDSK 256 #define MHDSK_BOOT_ADDRESS 0xfc00 static t_stat mhdsk_boot(int32 unitno, DEVICE *dptr); -extern t_stat install_bootrom(int32 bootrom[], int32 size, int32 addr, int32 makeROM); +extern t_stat install_bootrom(const int32 bootrom[], const int32 size, const int32 addr, const int32 makeROM); // Disk controller commands are in upper nibble of command high byte. @@ -115,7 +115,7 @@ static char* commandMessage[CMD_MAX] = { #define BUFFER_MASK 0x03 // mask - no shift needed #define TRACK_SHIFTH 8 // shift left 8 places into MSbyte -#define TRACK_MASKH 0x01 // msb of track number +#define TRACK_MASKH 0x01 // msb of track number #define TRACK_MASKL 0xff // entire lsb of track number #define HEAD_SHIFT 5 // shift right 5 places @@ -178,18 +178,22 @@ static UNIT dsk_unit[] = { { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }, { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }}; +#define MHDSK_NAME "MITS Hard Disk MHDSK" + static MTAB dsk_mod[] = { - { UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL }, - { UNIT_DSK_WLK, UNIT_DSK_WLK, "WRTLCK", "WRTLCK", NULL }, + { UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL, NULL, NULL, + "Enables " MHDSK_NAME "n for writing" }, + { UNIT_DSK_WLK, UNIT_DSK_WLK, "WRTLCK", "WRTLCK", NULL, NULL, NULL, + "Locks " MHDSK_NAME "n for writing" }, { 0 } }; /* Debug Flags */ static DEBTAB mhdsk_dt[] = { - { "READ", READ_MSG }, - { "WRITE", WRITE_MSG }, - { "VERBOSE", VERBOSE_MSG }, - { NULL, 0 } + { "READ", READ_MSG, "Read messages" }, + { "WRITE", WRITE_MSG, "Write messages" }, + { "VERBOSE", VERBOSE_MSG, "Verbose messages" }, + { NULL, 0 } }; DEVICE mhdsk_dev = { @@ -198,41 +202,41 @@ DEVICE mhdsk_dev = { NULL, NULL, &dsk_reset, &mhdsk_boot, NULL, NULL, NULL, (DEV_DISABLE | DEV_DEBUG), 0, - mhdsk_dt, NULL, "MITS Hard Disk MHDSK" + mhdsk_dt, NULL, MHDSK_NAME }; static int32 bootrom_mhdsk[BOOTROM_SIZE_MHDSK] = { - 0xf3, 0x31, 0x00, 0xf8, 0x21, 0x1b, 0x41, 0x2b, /* fc00-fc07 */ - 0x7c, 0xb5, 0xc2, 0x07, 0xfc, 0xe5, 0xd3, 0xa0, /* fc08-fc0f */ - 0xd3, 0xa2, 0xd3, 0xa4, 0xd3, 0xa6, 0xd3, 0xa1, /* fc10-fc17 */ - 0xd3, 0xa5, 0x2f, 0xd3, 0xa3, 0xd3, 0xa7, 0x3e, /* fc18-fc1f */ - 0x2c, 0xd3, 0xa0, 0xd3, 0xa4, 0xd3, 0xa6, 0x3e, /* fc20-fc27 */ - 0x24, 0xd3, 0xa2, 0xdb, 0xa1, 0x3e, 0x03, 0xd3, /* fc28-fc2f */ - 0x10, 0x3e, 0x11, 0xd3, 0x10, 0xcd, 0xe5, 0xfc, /* fc30-fc37 */ - 0x0d, 0x0a, 0x48, 0x44, 0x42, 0x4c, 0x20, 0x31, /* fc38-fc3f */ - 0x2e, 0x30, 0xb1, 0xcd, 0x77, 0xfc, 0x11, 0x2c, /* fc40-fc47 */ - 0x00, 0x7a, 0xbb, 0xdb, 0xa5, 0xd2, 0x54, 0xfc, /* fc48-fc4f */ - 0x6c, 0x61, 0x48, 0x47, 0x14, 0xc2, 0x49, 0xfc, /* fc50-fc57 */ - 0xcd, 0xe5, 0xfc, 0x0d, 0x0a, 0x4c, 0x4f, 0x41, /* fc58-fc5f */ - 0x44, 0x49, 0x4e, 0xc7, 0xd1, 0xd5, 0xcd, 0x77, /* fc60-fc67 */ - 0xfc, 0xdb, 0xa5, 0x12, 0x13, 0x05, 0xc2, 0x69, /* fc68-fc6f */ - 0xfc, 0x23, 0x0d, 0xc2, 0x66, 0xfc, 0xc9, 0xe5, /* fc70-fc77 */ - 0xd5, 0xc5, 0x01, 0xd0, 0xff, 0x11, 0xff, 0xff, /* fc78-fc7f */ - 0x13, 0x09, 0xda, 0x80, 0xfc, 0x7d, 0xc6, 0x30, /* fc80-fc87 */ - 0xeb, 0xfe, 0x18, 0xda, 0x90, 0xfc, 0xc6, 0x08, /* fc88-fc8f */ - 0x47, 0xcd, 0xaf, 0xfc, 0x26, 0x30, 0xdb, 0xff, /* fc90-fc97 */ - 0xe6, 0x03, 0x0f, 0x0f, 0xb0, 0xcd, 0xb0, 0xfc, /* fc98-fc9f */ - 0xdb, 0xa5, 0xdb, 0xa3, 0xaf, 0xd3, 0xa7, 0x3e, /* fca0-fca7 */ - 0x50, 0xd3, 0xa3, 0xc1, 0xd1, 0xe1, 0xc9, 0x7d, /* fca8-fcaf */ - 0xd3, 0xa7, 0xdb, 0xa1, 0xdb, 0xa3, 0xdb, 0xff, /* fcb0-fcb7 */ - 0xe6, 0x00, 0xb4, 0xd3, 0xa3, 0xdb, 0xa0, 0x07, /* fcb8-fcbf */ - 0xd2, 0xbd, 0xfc, 0xdb, 0xa1, 0xe6, 0x7f, 0xc8, /* fcc0-fcc7 */ - 0xfb, 0xf5, 0xcd, 0xe5, 0xfc, 0x0d, 0x0a, 0x4c, /* fcc8-fccf */ - 0x4f, 0x41, 0x44, 0x20, 0x45, 0x52, 0x52, 0x4f, /* fcd0-fcd7 */ - 0x52, 0xba, 0x21, 0x00, 0xfd, 0x34, 0xca, 0xde, /* fcd8-fcdf */ - 0xfc, 0xe3, 0xc3, 0xcf, 0xfd, 0xe3, 0xdb, 0x10, /* fce0-fce7 */ - 0xe6, 0x02, 0xca, 0xe6, 0xfc, 0x7e, 0xe6, 0x7f, /* fce8-fcef */ - 0xd3, 0x11, 0xbe, 0x23, 0xca, 0xe6, 0xfc, 0xe3, /* fcf0-fcf7 */ + 0xf3, 0x31, 0x00, 0xf8, 0x21, 0x1b, 0x41, 0x2b, /* fc00-fc07 */ + 0x7c, 0xb5, 0xc2, 0x07, 0xfc, 0xe5, 0xd3, 0xa0, /* fc08-fc0f */ + 0xd3, 0xa2, 0xd3, 0xa4, 0xd3, 0xa6, 0xd3, 0xa1, /* fc10-fc17 */ + 0xd3, 0xa5, 0x2f, 0xd3, 0xa3, 0xd3, 0xa7, 0x3e, /* fc18-fc1f */ + 0x2c, 0xd3, 0xa0, 0xd3, 0xa4, 0xd3, 0xa6, 0x3e, /* fc20-fc27 */ + 0x24, 0xd3, 0xa2, 0xdb, 0xa1, 0x3e, 0x03, 0xd3, /* fc28-fc2f */ + 0x10, 0x3e, 0x11, 0xd3, 0x10, 0xcd, 0xe5, 0xfc, /* fc30-fc37 */ + 0x0d, 0x0a, 0x48, 0x44, 0x42, 0x4c, 0x20, 0x31, /* fc38-fc3f */ + 0x2e, 0x30, 0xb1, 0xcd, 0x77, 0xfc, 0x11, 0x2c, /* fc40-fc47 */ + 0x00, 0x7a, 0xbb, 0xdb, 0xa5, 0xd2, 0x54, 0xfc, /* fc48-fc4f */ + 0x6c, 0x61, 0x48, 0x47, 0x14, 0xc2, 0x49, 0xfc, /* fc50-fc57 */ + 0xcd, 0xe5, 0xfc, 0x0d, 0x0a, 0x4c, 0x4f, 0x41, /* fc58-fc5f */ + 0x44, 0x49, 0x4e, 0xc7, 0xd1, 0xd5, 0xcd, 0x77, /* fc60-fc67 */ + 0xfc, 0xdb, 0xa5, 0x12, 0x13, 0x05, 0xc2, 0x69, /* fc68-fc6f */ + 0xfc, 0x23, 0x0d, 0xc2, 0x66, 0xfc, 0xc9, 0xe5, /* fc70-fc77 */ + 0xd5, 0xc5, 0x01, 0xd0, 0xff, 0x11, 0xff, 0xff, /* fc78-fc7f */ + 0x13, 0x09, 0xda, 0x80, 0xfc, 0x7d, 0xc6, 0x30, /* fc80-fc87 */ + 0xeb, 0xfe, 0x18, 0xda, 0x90, 0xfc, 0xc6, 0x08, /* fc88-fc8f */ + 0x47, 0xcd, 0xaf, 0xfc, 0x26, 0x30, 0xdb, 0xff, /* fc90-fc97 */ + 0xe6, 0x03, 0x0f, 0x0f, 0xb0, 0xcd, 0xb0, 0xfc, /* fc98-fc9f */ + 0xdb, 0xa5, 0xdb, 0xa3, 0xaf, 0xd3, 0xa7, 0x3e, /* fca0-fca7 */ + 0x50, 0xd3, 0xa3, 0xc1, 0xd1, 0xe1, 0xc9, 0x7d, /* fca8-fcaf */ + 0xd3, 0xa7, 0xdb, 0xa1, 0xdb, 0xa3, 0xdb, 0xff, /* fcb0-fcb7 */ + 0xe6, 0x00, 0xb4, 0xd3, 0xa3, 0xdb, 0xa0, 0x07, /* fcb8-fcbf */ + 0xd2, 0xbd, 0xfc, 0xdb, 0xa1, 0xe6, 0x7f, 0xc8, /* fcc0-fcc7 */ + 0xfb, 0xf5, 0xcd, 0xe5, 0xfc, 0x0d, 0x0a, 0x4c, /* fcc8-fccf */ + 0x4f, 0x41, 0x44, 0x20, 0x45, 0x52, 0x52, 0x4f, /* fcd0-fcd7 */ + 0x52, 0xba, 0x21, 0x00, 0xfd, 0x34, 0xca, 0xde, /* fcd8-fcdf */ + 0xfc, 0xe3, 0xc3, 0xcf, 0xfd, 0xe3, 0xdb, 0x10, /* fce0-fce7 */ + 0xe6, 0x02, 0xca, 0xe6, 0xfc, 0x7e, 0xe6, 0x7f, /* fce8-fcef */ + 0xd3, 0x11, 0xbe, 0x23, 0xca, 0xe6, 0xfc, 0xe3, /* fcf0-fcf7 */ 0xc9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* fcf8-fcff */ }; @@ -253,9 +257,9 @@ static char* cmdTranslate(const int32 cmd) { } /*---------------------------------------------------------------------------------- - + dsk_reset - install I/O handlers and initialize variables. - + ----------------------------------------------------------------------------------*/ static t_stat dsk_reset(DEVICE *dptr) { @@ -280,7 +284,7 @@ static t_stat dsk_reset(DEVICE *dptr) { } /*------------------------------------------------------------------------------------- - hdReturnReady - common I/O handler for several hard disk status ports which set + hdReturnReady - common I/O handler for several hard disk status ports which set bit 7 when the corresponding hard disk function is ready. In the emulator, we're always ready for the next step, so we simply return ready all the time. @@ -289,13 +293,13 @@ static t_stat dsk_reset(DEVICE *dptr) { 0xA2 - ACSTA register. Accessed through the status/control register of 4-PIO port 1-B. Returns the "command received" status byte. - - 0xA4 - CDSTA register. Accessed through the status/control register of 4-PIO + + 0xA4 - CDSTA register. Accessed through the status/control register of 4-PIO port 2-A. Returns the "command data available" status byte. - 0xA6 - ADSTA register. Accessed through the status/control register of 4-PIO + 0xA6 - ADSTA register. Accessed through the status/control register of 4-PIO port 2-B. Returns the "available to write" status byte. - + ---------------------------------------------------------------------------------------*/ static int32 hdReturnReady(const int32 port, const int32 io, const int32 data) { @@ -305,14 +309,14 @@ static int32 hdReturnReady(const int32 port, const int32 io, const int32 data) (port == 0xa4 ? "CDSTA" : (port == 0xa6 ? "ADSTA" : "?????"))))); return(0x80); // always indicate ready -// output operations have no effect + // output operations have no effect } /*------------------------------------------------------------ - hdCstat (0xA1) CSTAT register. Accessed through the + hdCstat (0xA1) CSTAT register. Accessed through the data register of 4-PIO port 1-A. - Comments: Returns error code byte of the most recent + Comments: Returns error code byte of the most recent operation. Reading this byte also clears the CRDY bit, but this isn't actually done in the emulation since we're always ready. @@ -323,11 +327,11 @@ static int32 hdCstat(const int32 port, const int32 io, const int32 data) " IN(%02X = %s) = %02x.\n", PCX, port, (port == 0xa1 ? "CSTAT" : "?????"), cstat); return(cstat); -// output operations have no effect + // output operations have no effect } /*------------------------------------------------------------ - hdAcmd (0xA3) ACMD register. Accessed through the + hdAcmd (0xA3) ACMD register. Accessed through the data register of 4-PIO port 1-B. Comments: The high byte of a command is written to @@ -386,12 +390,12 @@ static int32 hdAcmd(const int32 port, const int32 io, const int32 data) doRead(port, data, command); } -// READ or WRITE BUFFER command. Initiates reading/loading specified buffer. +// READ or WRITE BUFFER command. Initiates reading/loading specified buffer. else if ((command == CMD_WRITE_BUF) || (command == CMD_READ_BUF)) { selectedBuffer = buffer; maxBufferIdx = cmdLowByte; - if (maxBufferIdx == 0) + if (maxBufferIdx == 0) maxBufferIdx = 256; bufferIdx = 0; sim_debug(VERBOSE_MSG, &mhdsk_dev, "MHDSK: " ADDRESS_FORMAT @@ -440,9 +444,9 @@ static int32 hdAcmd(const int32 port, const int32 io, const int32 data) } /*------------------------------------------------------------ - hdCdata (0xA5) Cdata register. Accessed through the + hdCdata (0xA5) Cdata register. Accessed through the data register of 4-PIO port 1-B. - + Comments: Returns data from the read buffer -------------------------------------------------------------*/ static int32 hdCdata(const int32 port, const int32 io, const int32 data) @@ -464,10 +468,10 @@ static int32 hdCdata(const int32 port, const int32 io, const int32 data) /*------------------------------------------------------------ - hdAdata (0xA7) ADATA register. Accessed through the + hdAdata (0xA7) ADATA register. Accessed through the data register of 4-PIO port 2-B. - - Comments: Accepts data into the current buffer + + Comments: Accepts data into the current buffer and is also the low byte of a command. -------------------------------------------------------------*/ static int32 hdAdata(const int32 port, const int32 io, const int32 data) @@ -487,21 +491,21 @@ static int32 hdAdata(const int32 port, const int32 io, const int32 data) /*-- doRead ------------------------------------------------- Performs read from MITS Hard Disk image file - + Params: nothing Uses: selectedTrack, selectedHead, selectedSector selectedDisk, diskBuf[], mhdsk_dev Returns: nothing (updates cstat directly) - Comments: + Comments: -------------------------------------------------------------*/ static void doRead(const int32 port, const int32 data, const uint32 command) { UNIT *uptr; uint32 fileOffset; - + uptr = mhdsk_dev.units + selectedDisk; - fileOffset = HDSK_CYLINDER_SIZE * selectedTrack + - HDSK_TRACK_SIZE * (selectedHead & 0x01) + + fileOffset = HDSK_CYLINDER_SIZE * selectedTrack + + HDSK_TRACK_SIZE * (selectedHead & 0x01) + HDSK_SECTOR_SIZE * selectedSector; if (sim_fseek(uptr->fileref, fileOffset, SEEK_SET)) cstat = CSTAT_NOT_READY; /* seek error */ @@ -518,23 +522,23 @@ static void doRead(const int32 port, const int32 data, const uint32 command) /*-- doWrite ------------------------------------------------ Performs write to MITS Hard Disk image file - + Params: none Uses: selectedTrack, selectedHead, selectedSector selectedDisk, diskBuf[], mhdsk_dev Returns: nothing (updates cstat directly) - Comments: + Comments: -------------------------------------------------------------*/ static void doWrite(const int32 port, const int32 data, const uint32 command) { UNIT *uptr; uint32 fileOffset; - + uptr = mhdsk_dev.units + selectedDisk; if (((uptr->flags) & UNIT_DSK_WLK) == 0) { /* write enabled */ - fileOffset = HDSK_CYLINDER_SIZE * selectedTrack + - HDSK_TRACK_SIZE * (selectedHead & 0x01) + - HDSK_SECTOR_SIZE * selectedSector; + fileOffset = HDSK_CYLINDER_SIZE * selectedTrack + + HDSK_TRACK_SIZE * (selectedHead & 0x01) + + HDSK_SECTOR_SIZE * selectedSector; if (sim_fseek(uptr->fileref, fileOffset, SEEK_SET)) cstat = CSTAT_NOT_READY; /* seek error */ else if (sim_fwrite(diskBuf[selectedBuffer], 1, HDSK_SECTOR_SIZE, uptr->fileref) != diff --git a/AltairZ80/altairz80_net.c b/AltairZ80/altairz80_net.c index fe5074be..8c396a7c 100644 --- a/AltairZ80/altairz80_net.c +++ b/AltairZ80/altairz80_net.c @@ -77,30 +77,32 @@ static struct { static UNIT net_unit = { UDATA (&net_svc, UNIT_ATTABLE, 0), 0, /* wait, set in attach */ - 0, /* u3, unused */ - 0, /* u4, unused */ + 0, /* u3, unused */ + 0, /* u4, unused */ 0, /* u5, unused */ 0, /* u6, unused */ }; static REG net_reg[] = { - { DRDATA (POLL, net_unit.wait, 32) }, + { DRDATAD (POLL, net_unit.wait, 32, "Polling interval") }, { NULL } }; static MTAB net_mod[] = { - { UNIT_SERVER, 0, "CLIENT", "CLIENT", &set_net}, /* machine is a client */ - { UNIT_SERVER, UNIT_SERVER, "SERVER", "SERVER", &set_net}, /* machine is a server */ + { UNIT_SERVER, 0, "CLIENT", "CLIENT", &set_net, NULL, NULL, + "Sets machine to client mode"}, /* machine is a client */ + { UNIT_SERVER, UNIT_SERVER, "SERVER", "SERVER", &set_net, NULL, NULL, + "Sets machine to server mode"}, /* machine is a server */ { 0 } }; /* Debug Flags */ static DEBTAB net_dt[] = { - { "ACCEPT", ACCEPT_MSG }, - { "DROP", DROP_MSG }, - { "IN", IN_MSG }, - { "OUT", OUT_MSG }, - { NULL, 0 } + { "ACCEPT", ACCEPT_MSG, "Accept messages" }, + { "DROP", DROP_MSG, "Drop messages" }, + { "IN", IN_MSG, "Incoming messages" }, + { "OUT", OUT_MSG, "Outgoing messages" }, + { NULL, 0 } }; DEVICE net_dev = { diff --git a/AltairZ80/altairz80_sio.c b/AltairZ80/altairz80_sio.c index c864a14e..570539f3 100644 --- a/AltairZ80/altairz80_sio.c +++ b/AltairZ80/altairz80_sio.c @@ -64,27 +64,27 @@ uint8 *URLContents(const char *URL, uint32 *length); #ifndef URL_READER_SUPPORT -#define RESULT_BUFFER_LENGTH 1024 +#define RESULT_BUFFER_LENGTH 1024 #define RESULT_LEAD_IN "URL is not supported on this platform. START URL \"" #define RESULT_LEAD_OUT "\" URL END." uint8 *URLContents(const char *URL, uint32 *length) { - char str[RESULT_BUFFER_LENGTH] = RESULT_LEAD_IN; + char str[RESULT_BUFFER_LENGTH] = RESULT_LEAD_IN; char *result; - strncat(str, URL, RESULT_BUFFER_LENGTH - strlen(RESULT_LEAD_IN) - strlen(RESULT_LEAD_OUT) - 1); - strcat(str, RESULT_LEAD_OUT); + strncat(str, URL, RESULT_BUFFER_LENGTH - strlen(RESULT_LEAD_IN) - strlen(RESULT_LEAD_OUT) - 1); + strcat(str, RESULT_LEAD_OUT); result = (char*)malloc(strlen(str)); - strcpy(result, str); - *length = strlen(str); - return (uint8*)result; + strcpy(result, str); + *length = strlen(str); + return (uint8*)result; } #endif /* Debug flags */ -#define IN_MSG (1 << 0) -#define OUT_MSG (1 << 1) -#define CMD_MSG (1 << 2) -#define VERBOSE_MSG (1 << 3) -#define BUFFER_EMPTY_MSG (1 << 4) +#define IN_MSG (1 << 0) +#define OUT_MSG (1 << 1) +#define CMD_MSG (1 << 2) +#define VERBOSE_MSG (1 << 3) +#define BUFFER_EMPTY_MSG (1 << 4) #define UNIT_V_SIO_ANSI (UNIT_V_UF + 0) /* ANSI mode, strip bit 8 on output */ #define UNIT_SIO_ANSI (1 << UNIT_V_SIO_ANSI) @@ -172,12 +172,12 @@ extern volatile int32 stop_cpu; /* Debug Flags */ static DEBTAB generic_dt[] = { - { "IN", IN_MSG }, - { "OUT", OUT_MSG }, - { "CMD", CMD_MSG }, - { "VERBOSE", VERBOSE_MSG }, - { "BUFFEREMPTY", BUFFER_EMPTY_MSG }, - { NULL, 0 } + { "IN", IN_MSG, "IN messages" }, + { "OUT", OUT_MSG, "OUT messages" }, + { "CMD", CMD_MSG, "Commands" }, + { "VERBOSE", VERBOSE_MSG, "Verbose messages" }, + { "BUFFEREMPTY", BUFFER_EMPTY_MSG, "IN for empty buffer" }, + { NULL, 0 } }; /* SIMH pseudo device status registers */ @@ -225,10 +225,10 @@ static int32 lastCPMStatus = 0; /* result of last attachCPM comm static int32 lastCommand = 0; /* most recent command processed on port 0xfeh */ static int32 getCommonPos = 0; /* determines state for sending the 'common' register */ -/* CPU Clock Frequency related */ +/* CPU Clock Frequency related */ static uint32 newClockFrequency; -static int32 setClockFrequencyPos = 0; /* determines state for sending the clock frequency */ -static int32 getClockFrequencyPos = 0; /* determines state for receiving the clock frequency */ +static int32 setClockFrequencyPos = 0; /* determines state for sending the clock frequency */ +static int32 getClockFrequencyPos = 0; /* determines state for receiving the clock frequency */ /* support for wild card expansion */ #if UNIX_PLATFORM @@ -274,45 +274,76 @@ static UNIT sio_unit = { 100000, /* wait */ FALSE, /* u3 = FALSE, no character available in buffer */ FALSE, /* u4 = FALSE, terminal input is not attached to a file */ - 0, /* u5 = 0, not used */ + 0, /* u5 = 0, not used */ 0 /* u6 = 0, not used */ }; static REG sio_reg[] = { - { DRDATA (SIOWLEV, warnLevelSIO, 32) }, - { DRDATA (WRNUPTP, warnUnattachedPTP, 32) }, - { DRDATA (WRNUPTR, warnUnattachedPTR, 32) }, - { DRDATA (WRNPTRE, warnPTREOF, 32) }, - { DRDATA (WRUPORT, warnUnassignedPort, 32) }, - { HRDATA (FILEATT, sio_unit.u4, 8), REG_RO }, /* TRUE iff terminal input is attached to a file */ - { HRDATA (TSTATUS, sio_unit.u3, 8) }, /* TRUE iff a character available in sio_unit.buf */ - { DRDATA (TBUFFER, sio_unit.buf, 8) }, /* input buffer for one character */ - { DRDATA (KEYBDI, keyboardInterrupt, 3), REG_RO }, - { HRDATA (KEYBDH, keyboardInterruptHandler, 16) }, + { DRDATAD (SIOWLEV, warnLevelSIO, 32, + "Warn level SIO register") }, + { DRDATAD (WRNUPTP, warnUnattachedPTP, 32, + "Counter for unattached PTP access") }, + { DRDATAD (WRNUPTR, warnUnattachedPTR, 32, + "Counter for unattached PTR access") }, + { DRDATAD (WRNPTRE, warnPTREOF, 32, + "Counter for EOF reached for PTR") }, + { DRDATAD (WRUPORT, warnUnassignedPort, 32, + "Counter for unassigned port") }, + { HRDATAD (FILEATT, sio_unit.u4, 8, + "BOOL to determine whether terminal input is attached to a file"), REG_RO }, + /* TRUE iff terminal input is attached to a file */ + { HRDATAD (TSTATUS, sio_unit.u3, 8, + "BOOL to determine whethere a character is available") }, + /* TRUE iff a character available in sio_unit.buf */ + { DRDATAD (TBUFFER, sio_unit.buf, 8, + "Input buffer register") }, + /* input buffer for one character */ + { DRDATAD (KEYBDI, keyboardInterrupt, 3, + "BOOL to determine whether a keyboard interrupt is pending"), REG_RO }, + { HRDATAD (KEYBDH, keyboardInterruptHandler, 16, + "Address of keyboard interrupt handler") }, { NULL } }; static MTAB sio_mod[] = { - { UNIT_SIO_ANSI, 0, "TTY", "TTY", NULL }, /* keep bit 8 as is for output */ - { UNIT_SIO_ANSI, UNIT_SIO_ANSI, "ANSI", "ANSI", NULL }, /* set bit 8 to 0 before output */ - { UNIT_SIO_UPPER, 0, "ALL", "ALL", NULL }, /* do not change case of input characters */ - { UNIT_SIO_UPPER, UNIT_SIO_UPPER, "UPPER", "UPPER", NULL }, /* change input characters to upper case */ - { UNIT_SIO_BS, 0, "BS", "BS", NULL }, /* map delete to backspace */ - { UNIT_SIO_BS, UNIT_SIO_BS, "DEL", "DEL", NULL }, /* map backspace to delete */ - { UNIT_SIO_VERBOSE, 0, "QUIET", "QUIET", NULL }, /* quiet, no error messages */ - { UNIT_SIO_VERBOSE, UNIT_SIO_VERBOSE, "VERBOSE", "VERBOSE", NULL }, - /* verbose, display warning messages */ - { UNIT_SIO_MAP, 0, "NOMAP", "NOMAP", NULL }, /* disable character mapping */ - { UNIT_SIO_MAP, UNIT_SIO_MAP, "MAP", "MAP", NULL }, /* enable all character mapping */ - { UNIT_SIO_BELL, 0, "BELL", "BELL", NULL }, /* enable bell character */ - { UNIT_SIO_BELL, UNIT_SIO_BELL, "NOBELL", "NOBELL", NULL }, /* suppress ringing the bell */ - { UNIT_SIO_SLEEP, 0, "NOSLEEP", "NOSLEEP", NULL }, /* no sleep after keyboard status check */ - { UNIT_SIO_SLEEP, UNIT_SIO_SLEEP, "SLEEP", "SLEEP", NULL }, /* sleep after keyboard status check */ - /* no keyboard interrupts */ - { UNIT_SIO_INTERRUPT, 0, "NOINTERRUPT","NOINTERRUPT",&sio_dev_set_interruptoff }, - /* create keyboard interrupts */ - { UNIT_SIO_INTERRUPT, UNIT_SIO_INTERRUPT, "INTERRUPT","INTERRUPT",&sio_dev_set_interrupton }, - { MTAB_XTD|MTAB_VDV, 0, "PORT", "PORT", &sio_dev_set_port, &sio_dev_show_port }, + { UNIT_SIO_ANSI, 0, "TTY", "TTY", NULL, NULL, NULL, + "Do not touch bit 8 of console output"}, /* keep bit 8 as is for output */ + { UNIT_SIO_ANSI, UNIT_SIO_ANSI, "ANSI", "ANSI", NULL, NULL, NULL, + "Set bit 8 of console output to 0"}, /* set bit 8 to 0 before output */ + { UNIT_SIO_UPPER, 0, "ALL", "ALL", NULL, NULL, NULL, + "Console input remains unchanged" }, /* do not change case of input characters */ + { UNIT_SIO_UPPER, UNIT_SIO_UPPER, "UPPER", "UPPER", NULL, NULL, NULL, + "Convert console input to upper case" }, /* change input characters to upper case */ + { UNIT_SIO_BS, 0, "BS", "BS", NULL, NULL, NULL, + "Map delete to backspace" }, /* map delete to backspace */ + { UNIT_SIO_BS, UNIT_SIO_BS, "DEL", "DEL", NULL, NULL, NULL, + "Map backspace to delete" }, /* map backspace to delete */ + { UNIT_SIO_VERBOSE, 0, "QUIET", "QUIET", NULL, NULL, NULL, + "Do not display SIO error messages" }, /* quiet, no error messages */ + { UNIT_SIO_VERBOSE, UNIT_SIO_VERBOSE, "VERBOSE", "VERBOSE", NULL, NULL, NULL, + "Display verbose messages" }, /* verbose, display warning messages */ + { UNIT_SIO_MAP, 0, "NOMAP", "NOMAP", NULL, NULL, NULL, + "Do not map any character" }, /* disable character mapping */ + { UNIT_SIO_MAP, UNIT_SIO_MAP, "MAP", "MAP", NULL, NULL, NULL, + "Enable mapping of characters" }, /* enable all character mapping */ + { UNIT_SIO_BELL, 0, "BELL", "BELL", NULL, NULL, NULL, + "Control-G sounds the bell" }, /* enable bell character */ + { UNIT_SIO_BELL, UNIT_SIO_BELL, "NOBELL", "NOBELL", NULL, NULL, NULL, + "The bell sound is suppressed" }, /* suppress ringing the bell */ + { UNIT_SIO_SLEEP, 0, "NOSLEEP", "NOSLEEP", NULL, NULL, NULL, + "Do not sleep after SIO status checks" }, /* no sleep after keyboard status check */ + { UNIT_SIO_SLEEP, UNIT_SIO_SLEEP, "SLEEP", "SLEEP", NULL, NULL, NULL, + "Sleep after SIO status checks" }, /* sleep after keyboard status check */ + /* no keyboard interrupts */ + { UNIT_SIO_INTERRUPT, 0, "NOINTERRUPT", "NOINTERRUPT", + &sio_dev_set_interruptoff, NULL, NULL, "Status port 0 does not create interrupts" }, + /* create keyboard interrupts */ + { UNIT_SIO_INTERRUPT, UNIT_SIO_INTERRUPT, "INTERRUPT", "INTERRUPT", + &sio_dev_set_interrupton, NULL, NULL, + "Status port 0 creates an interrupt when a character becomes available" }, + { MTAB_XTD|MTAB_VDV, 0, "PORT", "PORT", + &sio_dev_set_port, &sio_dev_show_port, NULL, + "Set port to Port/Terminal/Read/NotRead/Write/Reset/Reset/Data" }, { 0 } }; @@ -334,7 +365,7 @@ static UNIT ptr_unit = { }; static REG ptr_reg[] = { - { HRDATA (STAT, ptr_unit.u3, 8) }, + { HRDATAD (STAT, ptr_unit.u3, 8, "Status register") }, { NULL } }; @@ -367,43 +398,70 @@ static UNIT simh_unit = { }; static REG simh_reg[] = { - { DRDATA (CZD, ClockZSDOSDelta, 32) }, - { DRDATA (SCZP, setClockZSDOSPos, 8), REG_RO }, - { HRDATA (SCZA, setClockZSDOSAdr, 16), REG_RO }, - { DRDATA (GCZP, getClockZSDOSPos, 8), REG_RO }, + { DRDATAD (CZD, ClockZSDOSDelta, 32, + "ZSDOS Clock - Delta between real clock and AltairZ80 clock") }, + { DRDATAD (SCZP, setClockZSDOSPos, 8, + "ZSDOS Clock - Status register for receiving address of parameter block"), REG_RO }, + { HRDATAD (SCZA, setClockZSDOSAdr, 16, + "ZSDOS Clock - Address of 6 byte parameter block for setting time"), REG_RO }, + { DRDATAD (GCZP, getClockZSDOSPos, 8, + "ZSDOS Clock - Status register for sending clock information"), REG_RO }, - { DRDATA (CC3D, ClockCPM3Delta, 32) }, - { DRDATA (SC3DP, setClockCPM3Pos, 8), REG_RO }, - { HRDATA (SC3DA, setClockCPM3Adr, 16), REG_RO }, - { DRDATA (GC3DP, getClockCPM3Pos, 8), REG_RO }, - { DRDATA (D3DO, daysCPM3SinceOrg, 32), REG_RO }, + { DRDATAD (CC3D, ClockCPM3Delta, 32, + "CP/M 3 Clock - Delta between real clock and AltairZ80 clock") }, + { DRDATAD (SC3DP, setClockCPM3Pos, 8, + "CP/M 3 Clock - Status register for receiving address of parameter block"), REG_RO }, + { HRDATAD (SC3DA, setClockCPM3Adr, 16, + "CP/M 3 Clock - Address of 5 byte parameter block for setting time"), REG_RO }, + { DRDATAD (GC3DP, getClockCPM3Pos, 8, + "CP/M 3 Clock - Status register for sending clock information"), REG_RO }, + { DRDATAD (D3DO, daysCPM3SinceOrg, 32, + "CP/M 3 Clock - Days since 1-Jan-1978"), REG_RO }, - { DRDATA (TOFNI, timeOfNextInterrupt, 32), REG_RO }, - { DRDATA (TIMI, timerInterrupt, 3) }, - { HRDATA (TIMH, timerInterruptHandler, 16) }, - { DRDATA (STIAP, setTimerInterruptAdrPos,8), REG_RO }, - { DRDATA (TIMD, timerDelta, 32) }, - { DRDATA (STDP, setTimerDeltaPos, 8), REG_RO }, - { DRDATA (SLEEP, SIMHSleep, 32) }, - { DRDATA (VOSLP, sleepAllowedStart, 32) }, + { DRDATAD (TOFNI, timeOfNextInterrupt, 32, + "Time when next interrupt is scheduled"), REG_RO }, + { DRDATAD (TIMI, timerInterrupt, 3, + "BOOL - determines whether a timer interrupt is pending") }, + { HRDATAD (TIMH, timerInterruptHandler, 16, + "Address of timer interrupt handling routine") }, + { DRDATAD (STIAP, setTimerInterruptAdrPos,8, + "Status register for receiving address of timer interrupt handler"), REG_RO }, + { DRDATAD (TIMD, timerDelta, 32, + "Time in milliseconds between timer interrupts") }, + { DRDATAD (STDP, setTimerDeltaPos, 8, + "Status register for receiving the timer delta"), REG_RO }, + { DRDATAD (SLEEP, SIMHSleep, 32, + "Sleep time in milliseconds after SIO status check (when enabled)") }, + { DRDATAD (VOSLP, sleepAllowedStart, 32, + "Only sleep when this many unsuccessful SIO status checks have been made") }, - { DRDATA (STPDT, stopWatchDelta, 32), REG_RO }, - { DRDATA (STPOS, getStopWatchDeltaPos, 8), REG_RO }, - { DRDATA (STPNW, stopWatchNow, 32), REG_RO }, - { DRDATA (MTSP, markTimeSP, 8), REG_RO }, + { DRDATAD (STPDT, stopWatchDelta, 32, + "Elapsed time of stop watch"), REG_RO }, + { DRDATAD (STPOS, getStopWatchDeltaPos, 8, + "Status register for receiving stop watch delta"), REG_RO }, + { DRDATAD (STPNW, stopWatchNow, 32, + "Starting time of stop watch"), REG_RO }, + { DRDATAD (MTSP, markTimeSP, 8, + "Stack pointer of timer stack"), REG_RO }, - { DRDATA (VPOS, versionPos, 8), REG_RO }, - { DRDATA (LCPMS, lastCPMStatus, 8), REG_RO }, - { DRDATA (LCMD, lastCommand, 8), REG_RO }, - { DRDATA (CPOS, getCommonPos, 8), REG_RO }, + { DRDATAD (VPOS, versionPos, 8, + "Status register for sending version information"), REG_RO }, + { DRDATAD (LCPMS, lastCPMStatus, 8, + "Result of last attachCPM command"), REG_RO }, + { DRDATAD (LCMD, lastCommand, 8, + "Last command processed on SIMH port"), REG_RO }, + { DRDATAD (CPOS, getCommonPos, 8, + "Status register for sending the COMMON register"), REG_RO }, { NULL } }; static MTAB simh_mod[] = { /* timer generated interrupts are off */ - { UNIT_SIMH_TIMERON, 0, "TIMEROFF", "TIMEROFF", &simh_dev_set_timeroff }, + { UNIT_SIMH_TIMERON, 0, "TIMEROFF", "TIMEROFF", &simh_dev_set_timeroff, + NULL, NULL, "Stop periodic timer interrupts" }, /* timer generated interrupts are on */ - { UNIT_SIMH_TIMERON, UNIT_SIMH_TIMERON, "TIMERON", "TIMERON", &simh_dev_set_timeron }, + { UNIT_SIMH_TIMERON, UNIT_SIMH_TIMERON, "TIMERON", "TIMERON", &simh_dev_set_timeron, + NULL, NULL, "Start periodic timer interrupts" }, { 0 } }; @@ -456,7 +514,7 @@ static t_stat sio_reset(DEVICE *dptr) { int32 i; sim_debug(VERBOSE_MSG, &sio_dev, "SIO: " ADDRESS_FORMAT " Reset\n", PCX); sio_unit.u3 = FALSE; /* no character in terminal input buffer */ - sio_unit.buf = 0; + sio_unit.buf = 0; resetSIOWarningFlags(); if (sio_unit.u4) /* is terminal input attached to a file? */ rewind(sio_unit.fileref); /* yes, rewind input */ @@ -472,7 +530,7 @@ static t_stat ptr_reset(DEVICE *dptr) { sim_debug(VERBOSE_MSG, &ptr_dev, "PTR: " ADDRESS_FORMAT " Reset\n", PCX); resetSIOWarningFlags(); ptr_unit.u3 = FALSE; /* End Of File not yet reached */ - ptr_unit.buf = 0; + ptr_unit.buf = 0; if (ptr_unit.flags & UNIT_ATT) /* attached? */ rewind(ptr_unit.fileref); sim_map_resource(0x12, 1, RESOURCE_TYPE_IO, &sio1s, dptr->flags & DEV_DIS); @@ -650,18 +708,18 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) { pollConnection(); if (io == 0) { /* IN */ if (sio_unit.u4) { /* attached to a file? */ - if (sio_unit.u3) /* character available? */ - return spi.sio_can_read | spi.sio_can_write; - ch = getc(sio_unit.fileref); - if (ch == EOF) { + if (sio_unit.u3) /* character available? */ + return spi.sio_can_read | spi.sio_can_write; + ch = getc(sio_unit.fileref); + if (ch == EOF) { sio_detach(&sio_unit); /* detach file and switch to keyboard input */ - return spi.sio_cannot_read | spi.sio_can_write; - } - else { - sio_unit.u3 = TRUE; /* indicate character available */ - sio_unit.buf = ch; /* store character in buffer */ - return spi.sio_can_read | spi.sio_can_write; - } + return spi.sio_cannot_read | spi.sio_can_write; + } + else { + sio_unit.u3 = TRUE; /* indicate character available */ + sio_unit.buf = ch; /* store character in buffer */ + return spi.sio_can_read | spi.sio_can_write; + } } if (sio_unit.flags & UNIT_ATT) { /* attached to a port? */ if (tmxr_rqln(&TerminalLines[spi.terminalLine])) @@ -692,8 +750,8 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) { return spi.sio_cannot_read | spi.sio_can_write; } /* OUT follows, no fall-through from IN */ if (spi.hasReset && (data == spi.sio_reset)) { /* reset command */ - if (!sio_unit.u4) /* only reset for regular console I/O */ - sio_unit.u3 = FALSE; /* indicate that no character is available */ + if (!sio_unit.u4) /* only reset for regular console I/O */ + sio_unit.u3 = FALSE; /* indicate that no character is available */ sim_debug(CMD_MSG, &sio_dev, "\tSIO_S: " ADDRESS_FORMAT " Command OUT(0x%03x) = 0x%02x\n", PCX, port, data); } @@ -723,7 +781,7 @@ static int32 sio0dCore(const int32 port, const int32 io, const int32 data) { if ((sio_unit.flags & UNIT_ATT) && (!sio_unit.u4)) return mapCharacter(tmxr_getc_ln(&TerminalLines[spi.terminalLine])); if (!sio_unit.u3) { - sim_debug(BUFFER_EMPTY_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT + sim_debug(BUFFER_EMPTY_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT " IN(0x%03x) for empty character buffer\n", PCX, port); } sio_unit.u3 = FALSE; /* no character is available any more */ @@ -733,9 +791,9 @@ static int32 sio0dCore(const int32 port, const int32 io, const int32 data) { ch = sio_unit.flags & UNIT_SIO_ANSI ? data & 0x7f : data; /* clear highest bit in ANSI mode */ if ((ch != CONTROLG_CHAR) || !(sio_unit.flags & UNIT_SIO_BELL)) { voidSleep(); - if ((sio_unit.flags & UNIT_ATT) && (!sio_unit.u4)) { /* attached to a port and not to a file */ + if ((sio_unit.flags & UNIT_ATT) && (!sio_unit.u4)) { /* attached to a port and not to a file */ tmxr_putc_ln(&TerminalLines[spi.terminalLine], ch); /* status ignored */ - tmxr_poll_tx(&altairTMXR); /* poll xmt */ + tmxr_poll_tx(&altairTMXR); /* poll xmt */ } else sim_putchar(ch); @@ -745,15 +803,15 @@ static int32 sio0dCore(const int32 port, const int32 io, const int32 data) { } static char* printable(char* result, int32 data, const int32 isIn) { - result[0] = 0; - data &= 0x7f; - if ((0x20 <= data) && (data < 0x7f)) - sprintf(result, isIn ? " <-\"%c\"" : " ->\"%c\"", data); - return result; + result[0] = 0; + data &= 0x7f; + if ((0x20 <= data) && (data < 0x7f)) + sprintf(result, isIn ? " <-\"%c\"" : " ->\"%c\"", data); + return result; } int32 sio0d(const int32 port, const int32 io, const int32 data) { - char buffer[8]; + char buffer[8]; const int32 result = sio0dCore(port, io, data); if (io == 0) { sim_debug(IN_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT @@ -799,7 +857,7 @@ int32 sio1s(const int32 port, const int32 io, const int32 data) { " IN(0x%02x) = 0x%02x\n", PCX, port, result); sim_debug(IN_MSG, &ptp_dev, "PTP_S: " ADDRESS_FORMAT " IN(0x%02x) = 0x%02x\n", PCX, port, result); - } + } else if (io) { sim_debug(OUT_MSG, &ptr_dev, "PTR_S: " ADDRESS_FORMAT " OUT(0x%02x) = 0x%02x\n", PCX, port, data); @@ -1070,11 +1128,11 @@ static int32 fromBCD(const int32 x) { out (0feh),a ld a, out (0feh),a - ... ; send all parameters + ... ; send all parameters in a,(0feh) ; contains first byte of result in a,(0feh) ; contains second byte of result ... - + */ enum simhPseudoDeviceCommands { /* do not change order or remove commands, add only at the end */ @@ -1108,10 +1166,10 @@ enum simhPseudoDeviceCommands { /* do not change order or remove commands, add o SIMHSleepCmd, /* 27 let SIMH sleep for SIMHSleep microseconds */ getHostOSPathSeparatorCmd, /* 28 obtain the file path separator of the OS under which SIMH runs */ getHostFilenamesCmd, /* 29 perform wildcard expansion and obtain list of file names */ - readURLCmd, /* 30 read the contents of an URL */ - getCPUClockFrequency, /* 31 get the clock frequency of the CPU */ - setCPUClockFrequency, /* 32 set the clock frequency of the CPU */ - kSimhPseudoDeviceCommands + readURLCmd, /* 30 read the contents of an URL */ + getCPUClockFrequency, /* 31 get the clock frequency of the CPU */ + setCPUClockFrequency, /* 32 set the clock frequency of the CPU */ + kSimhPseudoDeviceCommands }; static char *cmdNames[kSimhPseudoDeviceCommands] = { @@ -1145,9 +1203,9 @@ static char *cmdNames[kSimhPseudoDeviceCommands] = { "SIMHSleep", "getHostOSPathSeparator", "getHostFilenames", - "readURL", - "getCPUClockFrequency", - "setCPUClockFrequency", + "readURL", + "getCPUClockFrequency", + "setCPUClockFrequency", }; #define CPM_COMMAND_LINE_LENGTH 128 @@ -1157,7 +1215,7 @@ static struct tm currentTime; static int32 currentTimeValid = FALSE; static char version[] = "SIMH004"; -#define URL_MAX_LENGTH 1024 +#define URL_MAX_LENGTH 1024 static uint32 urlPointer; static char urlStore[URL_MAX_LENGTH]; static uint8 *urlResult = NULL; @@ -1184,15 +1242,14 @@ static t_stat simh_dev_reset(DEVICE *dptr) { lastCommand = 0; lastCPMStatus = SCPE_OK; timerInterrupt = FALSE; - urlPointer = 0; - getClockFrequencyPos = 0; - setClockFrequencyPos = 0; - if (urlResult != NULL) { - free(urlResult); - urlResult = NULL; - } - if (simh_unit.flags & UNIT_SIMH_TIMERON) - simh_dev_set_timeron(NULL, 0, NULL, NULL); + urlPointer = 0; + getClockFrequencyPos = 0; + setClockFrequencyPos = 0; + if (urlResult != NULL) { + free(urlResult); + urlResult = NULL; + } + simh_dev_set_timeron(NULL, 0, NULL, NULL); return SCPE_OK; } @@ -1202,42 +1259,37 @@ static void warnNoRealTimeClock(void) { } static t_stat simh_dev_set_timeron(UNIT *uptr, int32 value, char *cptr, void *desc) { - if (rtc_avail) { - timeOfNextInterrupt = sim_os_msec() + timerDelta; - return sim_activate(&simh_unit, simh_unit.wait); /* activate unit */ - } - warnNoRealTimeClock(); - return SCPE_ARG; + timeOfNextInterrupt = sim_os_msec() + timerDelta; + return sim_activate(&simh_unit, simh_unit.wait); /* activate unit */ } static t_stat simh_dev_set_timeroff(UNIT *uptr, int32 value, char *cptr, void *desc) { timerInterrupt = FALSE; - if (rtc_avail) - sim_cancel(&simh_unit); return SCPE_OK; } static t_stat simh_svc(UNIT *uptr) { - uint32 now = sim_os_msec(); - if (now >= timeOfNextInterrupt) { - timerInterrupt = TRUE; - if (timerDelta == 0) - timeOfNextInterrupt = now + DEFAULT_TIMER_DELTA; - else { - uint32 newTimeOfNextInterrupt = now + timerDelta - (now - timeOfNextInterrupt) % timerDelta; - if (newTimeOfNextInterrupt != timeOfNextInterrupt + timerDelta) { - sim_debug(VERBOSE_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT - " Timer interrupts skipped %i. Delta %i. Expect %i. Got %i.\n", - PCX, (newTimeOfNextInterrupt - timeOfNextInterrupt) / timerDelta - 1, - timerDelta, timeOfNextInterrupt + timerDelta - now, - newTimeOfNextInterrupt - now); + if (simh_unit.flags & UNIT_SIMH_TIMERON) { + uint32 now = sim_os_msec(); + if (now >= timeOfNextInterrupt) { + timerInterrupt = TRUE; + if (timerDelta == 0) + timeOfNextInterrupt = now + DEFAULT_TIMER_DELTA; + else { + uint32 newTimeOfNextInterrupt = now + timerDelta - (now - timeOfNextInterrupt) % timerDelta; + if (newTimeOfNextInterrupt != timeOfNextInterrupt + timerDelta) { + sim_debug(VERBOSE_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT + " Timer interrupts skipped %i. Delta %i. Expect %i. Got %i.\n", + PCX, (newTimeOfNextInterrupt - timeOfNextInterrupt) / timerDelta - 1, + timerDelta, timeOfNextInterrupt + timerDelta - now, + newTimeOfNextInterrupt - now); + } + timeOfNextInterrupt = newTimeOfNextInterrupt; } - timeOfNextInterrupt = newTimeOfNextInterrupt; } + /* post condition: now < timeOfNextInterrupt */ } - /* post condition: now < timeOfNextInterrupt */ - if (simh_unit.flags & UNIT_SIMH_TIMERON) - sim_activate(&simh_unit, simh_unit.wait); /* activate unit */ + sim_activate(&simh_unit, simh_unit.wait); /* activate unit */ return SCPE_OK; } @@ -1321,26 +1373,26 @@ static void setClockCPM3(void) { static int32 simh_in(const int32 port) { int32 result = 0; switch(lastCommand) { - case readURLCmd: + case readURLCmd: if (isInReadPhase) { - if (showAvailability) { - if (resultPointer < resultLength) - result = 1; - else { - if (urlResult != NULL) - free(urlResult); - urlResult = NULL; - lastCommand = 0; - } - } - else if (resultPointer < resultLength) - result = urlResult[resultPointer++]; - showAvailability = 1 - showAvailability; + if (showAvailability) { + if (resultPointer < resultLength) + result = 1; + else { + if (urlResult != NULL) + free(urlResult); + urlResult = NULL; + lastCommand = 0; + } + } + else if (resultPointer < resultLength) + result = urlResult[resultPointer++]; + showAvailability = 1 - showAvailability; } else lastCommand = 0; - break; - + break; + case getHostFilenamesCmd: #if UNIX_PLATFORM if (globValid) { @@ -1481,7 +1533,7 @@ static int32 simh_in(const int32 port) { } break; - case getCPUClockFrequency: + case getCPUClockFrequency: if (getClockFrequencyPos == 0) { result = getClockFrequency() & 0xff; getClockFrequencyPos = 1; @@ -1491,7 +1543,7 @@ static int32 simh_in(const int32 port) { getClockFrequencyPos = lastCommand = 0; } break; - + case hasBankedMemoryCmd: result = cpu_unit.flags & UNIT_CPU_BANKED ? MAXBANKS : 0; lastCommand = 0; @@ -1544,7 +1596,7 @@ void do_SIMH_sleep(void) { static int32 simh_out(const int32 port, const int32 data) { time_t now; switch(lastCommand) { - case readURLCmd: + case readURLCmd: if (isInReadPhase) lastCommand = 0; else { @@ -1561,9 +1613,9 @@ static int32 simh_out(const int32 port, const int32 data) { showAvailability = 1; isInReadPhase = TRUE; } - } - break; - + } + break; + case setClockZSDOSCmd: if (setClockZSDOSPos == 0) { setClockZSDOSAdr = data; @@ -1575,7 +1627,7 @@ static int32 simh_out(const int32 port, const int32 data) { setClockZSDOSPos = lastCommand = 0; } break; - + case setClockCPM3Cmd: if (setClockCPM3Pos == 0) { setClockCPM3Adr = data; @@ -1587,18 +1639,18 @@ static int32 simh_out(const int32 port, const int32 data) { setClockCPM3Pos = lastCommand = 0; } break; - - case setCPUClockFrequency: - if (setClockFrequencyPos == 0) { - newClockFrequency = data; - setClockFrequencyPos = 1; - } - else { - setClockFrequency((data << 8) | newClockFrequency); + + case setCPUClockFrequency: + if (setClockFrequencyPos == 0) { + newClockFrequency = data; + setClockFrequencyPos = 1; + } + else { + setClockFrequency((data << 8) | newClockFrequency); setClockFrequencyPos = lastCommand = 0; - } - break; - + } + break; + case setBankSelectCmd: if (cpu_unit.flags & UNIT_CPU_BANKED) setBankSelect(data & BANKMASK); @@ -1608,7 +1660,7 @@ static int32 simh_out(const int32 port, const int32 data) { PCX, data & 3); lastCommand = 0; break; - + case setTimerDeltaCmd: if (setTimerDeltaPos == 0) { timerDelta = data; @@ -1625,7 +1677,7 @@ static int32 simh_out(const int32 port, const int32 data) { } } break; - + case setTimerInterruptAdrCmd: if (setTimerInterruptAdrPos == 0) { timerInterruptHandler = data; @@ -1636,21 +1688,21 @@ static int32 simh_out(const int32 port, const int32 data) { setTimerInterruptAdrPos = lastCommand = 0; } break; - + default: /* lastCommand not yet set */ sim_debug(CMD_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT " CMD(0x%02x) <- %i (0x%02x, '%s')\n", PCX, port, data, data, (0 <= data) && (data < kSimhPseudoDeviceCommands) ? cmdNames[data] : "Unknown command"); - + lastCommand = data; switch(data) { - case readURLCmd: - urlPointer = 0; + case readURLCmd: + urlPointer = 0; isInReadPhase = FALSE; - break; - + break; + case getHostFilenamesCmd: #if UNIX_PLATFORM if (!globValid) { @@ -1685,18 +1737,18 @@ static int32 simh_out(const int32 port, const int32 data) { } #endif break; - + case SIMHSleepCmd: do_SIMH_sleep(); break; - + case printTimeCmd: /* print time */ if (rtc_avail) printf("SIMH: " ADDRESS_FORMAT " Current time in milliseconds = %d." NLP, PCX, sim_os_msec()); else warnNoRealTimeClock(); break; - + case startTimerCmd: /* create a new timer on top of stack */ if (rtc_avail) if (markTimeSP < TIMER_STACK_LIMIT) @@ -1706,7 +1758,7 @@ static int32 simh_out(const int32 port, const int32 data) { else warnNoRealTimeClock(); break; - + case stopTimerCmd: /* stop timer on top of stack and show time difference */ if (rtc_avail) if (markTimeSP > 0) { @@ -1718,23 +1770,23 @@ static int32 simh_out(const int32 port, const int32 data) { else warnNoRealTimeClock(); break; - + case resetPTRCmd: /* reset ptr device */ ptr_reset(&ptr_dev); break; - + case attachPTRCmd: /* attach ptr to the file with name at beginning of CP/M command line */ attachCPM(&ptr_unit); break; - + case detachPTRCmd: /* detach ptr */ detach_unit(&ptr_unit); break; - + case getSIMHVersionCmd: versionPos = 0; break; - + case getClockZSDOSCmd: time(&now); now += ClockZSDOSDelta; @@ -1742,11 +1794,11 @@ static int32 simh_out(const int32 port, const int32 data) { currentTimeValid = TRUE; getClockZSDOSPos = 0; break; - + case setClockZSDOSCmd: setClockZSDOSPos = 0; break; - + case getClockCPM3Cmd: time(&now); now += ClockCPM3Delta; @@ -1755,29 +1807,29 @@ static int32 simh_out(const int32 port, const int32 data) { daysCPM3SinceOrg = (int32) ((now - mkCPM3Origin()) / SECONDS_PER_DAY); getClockCPM3Pos = 0; break; - + case setClockCPM3Cmd: setClockCPM3Pos = 0; break; - - case getCommonCmd: - getCommonPos = 0; - break; - - case getCPUClockFrequency: - getClockFrequencyPos = 0; - break; - - case setCPUClockFrequency: - setClockFrequencyPos = 0; - break; - + + case getCommonCmd: + getCommonPos = 0; + break; + + case getCPUClockFrequency: + getClockFrequencyPos = 0; + break; + + case setCPUClockFrequency: + setClockFrequencyPos = 0; + break; + case getBankSelectCmd: case setBankSelectCmd: case hasBankedMemoryCmd: case getHostOSPathSeparatorCmd: break; - + case resetSIMHInterfaceCmd: markTimeSP = 0; lastCommand = 0; @@ -1795,7 +1847,7 @@ static int32 simh_out(const int32 port, const int32 data) { } #endif break; - + case showTimerCmd: /* show time difference to timer on top of stack */ if (rtc_avail) if (markTimeSP > 0) { @@ -1807,52 +1859,52 @@ static int32 simh_out(const int32 port, const int32 data) { else warnNoRealTimeClock(); break; - + case attachPTPCmd: /* attach ptp to the file with name at beginning of CP/M command line */ attachCPM(&ptp_unit); break; - + case detachPTPCmd: /* detach ptp */ detach_unit(&ptp_unit); break; - + case setZ80CPUCmd: chiptype = CHIP_TYPE_Z80; break; - + case set8080CPUCmd: chiptype = CHIP_TYPE_8080; break; - + case startTimerInterruptsCmd: if (simh_dev_set_timeron(NULL, 0, NULL, NULL) == SCPE_OK) { timerInterrupt = FALSE; simh_unit.flags |= UNIT_SIMH_TIMERON; } break; - + case stopTimerInterruptsCmd: simh_unit.flags &= ~UNIT_SIMH_TIMERON; simh_dev_set_timeroff(NULL, 0, NULL, NULL); break; - + case setTimerDeltaCmd: setTimerDeltaPos = 0; break; - + case setTimerInterruptAdrCmd: setTimerInterruptAdrPos = 0; break; - + case resetStopWatchCmd: stopWatchNow = rtc_avail ? sim_os_msec() : 0; break; - + case readStopWatchCmd: getStopWatchDeltaPos = 0; stopWatchDelta = rtc_avail ? sim_os_msec() - stopWatchNow : 0; break; - + default: sim_debug(CMD_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT " Unknown command (%i) to SIMH pseudo device on port %03xh ignored.\n", diff --git a/AltairZ80/altairz80_sys.c b/AltairZ80/altairz80_sys.c index 4218f4bd..8e1574ba 100644 --- a/AltairZ80/altairz80_sys.c +++ b/AltairZ80/altairz80_sys.c @@ -26,11 +26,11 @@ Based on work by Charles E Owen (c) 1997 Disassembler from Marat Fayzullin ((c) 1995, 1996, 1997 - Commercial use prohibited) - 03/27/14 -- MWD Add MITS Hard Disk device (mhdsk_dev) + 03/27/14 -- MWD Add MITS Hard Disk device (mhdsk_dev) */ +#include "m68k.h" #include -#include "altairz80_defs.h" #define SIM_EMAX 6 @@ -72,10 +72,6 @@ extern DEVICE wdi2_dev; extern DEVICE scp300f_dev; -#ifdef USE_FPC -extern DEVICE fpc_dev; -#endif /* USE_FPC */ - extern int32 chiptype; extern long disasm (unsigned char *data, char *output, int segsize, long offset); @@ -98,7 +94,7 @@ t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc); */ char sim_name[] = "Altair 8800 (Z80)"; -REG *sim_PC = &cpu_reg[6]; +REG *sim_PC = &cpu_reg[CPU_INDEX_8080]; int32 sim_emax = SIM_EMAX; DEVICE *sim_devices[] = { /* AltairZ80 Devices */ @@ -380,6 +376,7 @@ static void printHex4(char* string, const uint32 value) { addr = current PC Outputs: *S = output text + return = length of instruction in bytes DAsm is Copyright (C) Marat Fayzullin 1995,1996,1997 You are not allowed to distribute this software @@ -494,7 +491,7 @@ static int32 DAsm(char *S, const uint32 *val, const int32 useZ80Mnemonics, const t_stat fprint_sym(FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw) { char disasm_result[128]; int32 ch = val[0] & 0x7f; - long r; + long r = 1; unsigned char vals[SIM_EMAX]; int32 i; if (sw & (SWMASK('A') | SWMASK('C'))) { @@ -503,13 +500,26 @@ t_stat fprint_sym(FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw) { } if (!(sw & SWMASK('M'))) return SCPE_ARG; - if (chiptype == CHIP_TYPE_8086) { - for (i = 0; i < SIM_EMAX; i++) - vals[i] = val[i] & 0xff; - r = disasm(vals, disasm_result, 16, addr); + switch (chiptype) { + case CHIP_TYPE_8080: + r = DAsm(disasm_result, val, FALSE, addr); + break; + + case CHIP_TYPE_Z80: + r = DAsm(disasm_result, val, TRUE, addr); + break; + + case CHIP_TYPE_8086: + for (i = 0; i < SIM_EMAX; i++) + vals[i] = val[i] & 0xff; + r = disasm(vals, disasm_result, 16, addr); + break; + + case CHIP_TYPE_M68K: + r = m68k_disassemble(disasm_result, addr, M68K_CPU_TYPE_68000); + break; + } - else - r = DAsm(disasm_result, val, chiptype == CHIP_TYPE_Z80, addr); fprintf(of, "%s", disasm_result); return 1 - r; } @@ -700,7 +710,7 @@ static int32 parse_X80(const char *cptr, const int32 addr, uint32 *val, char *co return -3; /* three additional bytes returned */ } else - return -1; /* one additional byte returned */ + return -1; /* one additional byte returned */ } } @@ -731,7 +741,7 @@ static int32 parse_X80(const char *cptr, const int32 addr, uint32 *val, char *co return -2; /* two additional bytes returned */ } else - return -1; /* one additional byte returned */ + return -1; /* one additional byte returned */ } } @@ -769,14 +779,19 @@ static int32 parse_X80(const char *cptr, const int32 addr, uint32 *val, char *co status = error status */ t_stat parse_sym(char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw) { - static t_bool symbolicInputNotImplementedMessage = FALSE; -#define NO_SYMBOLIC_INPUT_MESSAGE "Symbolic input is not supported for the 8086.\n" - if (chiptype == CHIP_TYPE_8086) { - if (!symbolicInputNotImplementedMessage) { - printf(NO_SYMBOLIC_INPUT_MESSAGE); - if (sim_log) - fprintf(sim_log, NO_SYMBOLIC_INPUT_MESSAGE); - symbolicInputNotImplementedMessage = TRUE; + static t_bool symbolicInputNotImplementedMessage8086 = FALSE; + static t_bool symbolicInputNotImplementedMessageM68K = FALSE; + if ((sw & (SWMASK('M'))) && (chiptype == CHIP_TYPE_8086)) { + if (!symbolicInputNotImplementedMessage8086) { + sim_printf("Symbolic input is not supported for the 8086.\n"); + symbolicInputNotImplementedMessage8086 = TRUE; + } + return SCPE_NOFNC; + } + if ((sw & (SWMASK('M'))) && (chiptype == CHIP_TYPE_M68K)) { + if (!symbolicInputNotImplementedMessageM68K) { + sim_printf("Symbolic input is not supported for the M68K.\n"); + symbolicInputNotImplementedMessageM68K = TRUE; } return SCPE_NOFNC; } diff --git a/AltairZ80/flashwriter2.c b/AltairZ80/flashwriter2.c index ba11478f..6ba1e691 100644 --- a/AltairZ80/flashwriter2.c +++ b/AltairZ80/flashwriter2.c @@ -88,11 +88,15 @@ static UNIT fw2_unit[] = { { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) } }; +#define FWII_NAME "Vector Graphic Flashwriter 2 FWII" + static MTAB fw2_mod[] = { /* quiet, no warning messages */ - { UNIT_FW2_VERBOSE, 0, "QUIET", "QUIET", NULL }, + { UNIT_FW2_VERBOSE, 0, "QUIET", "QUIET", NULL, NULL, NULL, + "No verbose messages for unit " FWII_NAME "n" }, /* verbose, show warning messages */ - { UNIT_FW2_VERBOSE, UNIT_FW2_VERBOSE, "VERBOSE", "VERBOSE", NULL }, + { UNIT_FW2_VERBOSE, UNIT_FW2_VERBOSE, "VERBOSE", "VERBOSE", NULL, NULL, NULL, + "Verbose messages for unit " FWII_NAME "n" }, { 0 } }; @@ -102,7 +106,7 @@ DEVICE fw2_dev = { NULL, NULL, NULL, NULL, &fw2_attach, &fw2_detach, NULL, (DEV_DISABLE | DEV_DIS), 0, - NULL, NULL, "Vector Graphic Flashwriter 2 FWII" + NULL, NULL, FWII_NAME }; /* Attach routine */ diff --git a/AltairZ80/i8272.c b/AltairZ80/i8272.c index bf7451da..5702caef 100644 --- a/AltairZ80/i8272.c +++ b/AltairZ80/i8272.c @@ -143,8 +143,6 @@ extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_typ extern void PutByteDMA(const uint32 Addr, const uint32 Value); extern uint8 GetByteDMA(const uint32 Addr); -#define UNIT_V_I8272_WLK (UNIT_V_UF + 0) /* write locked */ -#define UNIT_I8272_WLK (1 << UNIT_V_I8272_WLK) #define UNIT_V_I8272_VERBOSE (UNIT_V_UF + 1) /* verbose mode, i.e. show error messages */ #define UNIT_I8272_VERBOSE (1 << UNIT_V_I8272_VERBOSE) #define I8272_CAPACITY (77*2*16*256) /* Default Micropolis Disk Capacity */ @@ -191,29 +189,32 @@ static UNIT i8272_unit[] = { { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, I8272_CAPACITY) } }; +#define I8272_NAME "Intel/NEC(765) FDC Core I8272" + static MTAB i8272_mod[] = { - { MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE", &set_iobase, &show_iobase, NULL }, - { UNIT_I8272_WLK, 0, "WRTENB", "WRTENB", NULL }, - { UNIT_I8272_WLK, UNIT_I8272_WLK, "WRTLCK", "WRTLCK", NULL }, + { MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE", + &set_iobase, &show_iobase, NULL, "Sets disk controller I/O base address" }, /* quiet, no warning messages */ - { UNIT_I8272_VERBOSE, 0, "QUIET", "QUIET", NULL }, + { UNIT_I8272_VERBOSE, 0, "QUIET", "QUIET", + NULL, NULL, NULL, "No verbose messages for unit " I8272_NAME "n" }, /* verbose, show warning messages */ - { UNIT_I8272_VERBOSE, UNIT_I8272_VERBOSE, "VERBOSE", "VERBOSE", NULL }, + { UNIT_I8272_VERBOSE, UNIT_I8272_VERBOSE, "VERBOSE", "VERBOSE", + NULL, NULL, NULL, "Verbose messages for unit " I8272_NAME "n" }, { 0 } }; /* Debug Flags */ static DEBTAB i8272_dt[] = { - { "ERROR", ERROR_MSG }, - { "SEEK", SEEK_MSG }, - { "CMD", CMD_MSG }, - { "RDDATA", RD_DATA_MSG }, - { "WRDATA", WR_DATA_MSG }, - { "STATUS", STATUS_MSG }, - { "FMT", FMT_MSG }, - { "VERBOSE",VERBOSE_MSG }, - { "IRQ", IRQ_MSG }, - { NULL, 0 } + { "ERROR", ERROR_MSG, "Error messages" }, + { "SEEK", SEEK_MSG, "Seek messages" }, + { "CMD", CMD_MSG, "Command messages" }, + { "READ", RD_DATA_MSG, "Read messages" }, + { "WRITE", WR_DATA_MSG, "Write messages" }, + { "STATUS", STATUS_MSG, "Status messages" }, + { "FMT", FMT_MSG, "Format messages" }, + { "VERBOSE", VERBOSE_MSG, "Verbose messages" }, + { "IRQ", IRQ_MSG, "IRQ messages" }, + { NULL, 0 } }; DEVICE i8272_dev = { @@ -222,7 +223,7 @@ DEVICE i8272_dev = { NULL, NULL, &i8272_reset, NULL, &i8272_attach, &i8272_detach, &i8272_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG, - i8272_dt, NULL, "Intel/NEC(765) FDC Core I8272" + i8272_dt, NULL, I8272_NAME }; static uint8 I8272_Setup_Cmd(uint8 fdc_cmd); diff --git a/AltairZ80/m68k.h b/AltairZ80/m68k.h new file mode 100755 index 00000000..85550763 --- /dev/null +++ b/AltairZ80/m68k.h @@ -0,0 +1,339 @@ +#ifndef M68K__HEADER +#define M68K__HEADER + +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ +/* + * MUSASHI + * Version 3.3 + * + * A portable Motorola M680x0 processor emulation engine. + * Copyright 1998-2001 Karl Stenerud. All rights reserved. + * + * This code may be freely used for non-commercial purposes as long as this + * copyright notice remains unaltered in the source code and any binary files + * containing this code in compiled form. + * + * All other lisencing terms must be negotiated with the author + * (Karl Stenerud). + * + * The latest version of this code can be obtained at: + * http://kstenerud.cjb.net + */ + + + +/* ======================================================================== */ +/* ============================ GENERAL DEFINES =========================== */ + +/* ======================================================================== */ + +/* There are 7 levels of interrupt to the 68K. + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). + */ +#define M68K_IRQ_NONE 0 +#define M68K_IRQ_1 1 +#define M68K_IRQ_2 2 +#define M68K_IRQ_3 3 +#define M68K_IRQ_4 4 +#define M68K_IRQ_5 5 +#define M68K_IRQ_6 6 +#define M68K_IRQ_7 7 + + +/* Special interrupt acknowledge values. + * Use these as special returns from the interrupt acknowledge callback + * (specified later in this header). + */ + +/* Causes an interrupt autovector (0x18 + interrupt level) to be taken. + * This happens in a real 68K if VPA or AVEC is asserted during an interrupt + * acknowledge cycle instead of DTACK. + */ +#define M68K_INT_ACK_AUTOVECTOR 0xffffffff + +/* Causes the spurious interrupt vector (0x18) to be taken + * This happens in a real 68K if BERR is asserted during the interrupt + * acknowledge cycle (i.e. no devices responded to the acknowledge). + */ +#define M68K_INT_ACK_SPURIOUS 0xfffffffe + + +/* CPU types for use in m68k_set_cpu_type() */ +enum +{ + M68K_CPU_TYPE_INVALID, + M68K_CPU_TYPE_68000, + M68K_CPU_TYPE_68010, + M68K_CPU_TYPE_68EC020, + M68K_CPU_TYPE_68020, + M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */ + M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */ +}; + +/* Registers used by m68k_get_reg() and m68k_set_reg() */ +typedef enum +{ + /* Real registers */ + M68K_REG_D0, /* Data registers */ + M68K_REG_D1, + M68K_REG_D2, + M68K_REG_D3, + M68K_REG_D4, + M68K_REG_D5, + M68K_REG_D6, + M68K_REG_D7, + M68K_REG_A0, /* Address registers */ + M68K_REG_A1, + M68K_REG_A2, + M68K_REG_A3, + M68K_REG_A4, + M68K_REG_A5, + M68K_REG_A6, + M68K_REG_A7, + M68K_REG_PC, /* Program Counter */ + M68K_REG_SR, /* Status Register */ + M68K_REG_SP, /* The current Stack Pointer (located in A7) */ + M68K_REG_USP, /* User Stack Pointer */ + M68K_REG_ISP, /* Interrupt Stack Pointer */ + M68K_REG_MSP, /* Master Stack Pointer */ + M68K_REG_SFC, /* Source Function Code */ + M68K_REG_DFC, /* Destination Function Code */ + M68K_REG_VBR, /* Vector Base Register */ + M68K_REG_CACR, /* Cache Control Register */ + M68K_REG_CAAR, /* Cache Address Register */ + + /* Assumed registers */ + /* These are cheat registers which emulate the 1-longword prefetch + * present in the 68000 and 68010. + */ + M68K_REG_PREF_ADDR, /* Last prefetch address */ + M68K_REG_PREF_DATA, /* Last prefetch data */ + + /* Convenience registers */ + M68K_REG_PPC, /* Previous value in the program counter */ + M68K_REG_IR, /* Instruction register */ + M68K_REG_CPU_TYPE /* Type of CPU being run */ +} m68k_register_t; + +/* ======================================================================== */ +/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */ +/* ======================================================================== */ + +/* You will have to implement these functions */ + +/* read/write functions called by the CPU to access memory. + * while values used are 32 bits, only the appropriate number + * of bits are relevant (i.e. in write_memory_8, only the lower 8 bits + * of value should be written to memory). + * + * NOTE: I have separated the immediate and PC-relative memory fetches + * from the other memory fetches because some systems require + * differentiation between PROGRAM and DATA fetches (usually + * for security setups such as encryption). + * This separation can either be achieved by setting + * M68K_SEPARATE_READS in m68kconf.h and defining + * the read functions, or by setting M68K_EMULATE_FC and + * making a function code callback function. + * Using the callback offers better emulation coverage + * because you can also monitor whether the CPU is in SYSTEM or + * USER mode, but it is also slower. + */ + +/* Read from anywhere */ +unsigned int m68k_read_memory_8(unsigned int address); +unsigned int m68k_read_memory_16(unsigned int address); +unsigned int m68k_read_memory_32(unsigned int address); + +/* Read data immediately following the PC */ +unsigned int m68k_read_immediate_16(unsigned int address); +unsigned int m68k_read_immediate_32(unsigned int address); + +/* Read data relative to the PC */ +unsigned int m68k_read_pcrelative_8(unsigned int address); +unsigned int m68k_read_pcrelative_16(unsigned int address); +unsigned int m68k_read_pcrelative_32(unsigned int address); + +/* Memory access for the disassembler */ +unsigned int m68k_read_disassembler_8 (unsigned int address); +unsigned int m68k_read_disassembler_16 (unsigned int address); +unsigned int m68k_read_disassembler_32 (unsigned int address); + +/* Write to anywhere */ +void m68k_write_memory_8(unsigned int address, unsigned int value); +void m68k_write_memory_16(unsigned int address, unsigned int value); +void m68k_write_memory_32(unsigned int address, unsigned int value); + + + +/* ======================================================================== */ +/* ============================== CALLBACKS =============================== */ +/* ======================================================================== */ + +/* These functions allow you to set callbacks to the host when specific events + * occur. Note that you must enable the corresponding value in m68kconf.h + * in order for these to do anything useful. + * Note: I have defined default callbacks which are used if you have enabled + * the corresponding #define in m68kconf.h but either haven't assigned a + * callback or have assigned a callback of NULL. + */ + +/* Set the callback for an interrupt acknowledge. + * You must enable M68K_EMULATE_INT_ACK in m68kconf.h. + * The CPU will call the callback with the interrupt level being acknowledged. + * The host program must return either a vector from 0x02-0xff, or one of the + * special interrupt acknowledge values specified earlier in this header. + * If this is not implemented, the CPU will always assume an autovectored + * interrupt, and will automatically clear the interrupt request when it + * services the interrupt. + * Default behavior: return M68K_INT_ACK_AUTOVECTOR. + */ +void m68k_set_int_ack_callback(int (*callback)(int int_level)); + + +/* Set the callback for a breakpoint acknowledge (68010+). + * You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h. + * The CPU will call the callback with whatever was in the data field of the + * BKPT instruction for 68020+, or 0 for 68010. + * Default behavior: do nothing. + */ +void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data)); + + +/* Set the callback for the RESET instruction. + * You must enable M68K_EMULATE_RESET in m68kconf.h. + * The CPU calls this callback every time it encounters a RESET instruction. + * Default behavior: do nothing. + */ +void m68k_set_reset_instr_callback(void (*callback)(void)); + + +/* Set the callback for informing of a large PC change. + * You must enable M68K_MONITOR_PC in m68kconf.h. + * The CPU calls this callback with the new PC value every time the PC changes + * by a large value (currently set for changes by longwords). + * Default behavior: do nothing. + */ +void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc)); + + +/* Set the callback for CPU function code changes. + * You must enable M68K_EMULATE_FC in m68kconf.h. + * The CPU calls this callback with the function code before every memory + * access to set the CPU's function code according to what kind of memory + * access it is (supervisor/user, program/data and such). + * Default behavior: do nothing. + */ +void m68k_set_fc_callback(void (*callback)(unsigned int new_fc)); + + +/* Set a callback for the instruction cycle of the CPU. + * You must enable M68K_INSTRUCTION_HOOK in m68kconf.h. + * The CPU calls this callback just before fetching the opcode in the + * instruction cycle. + * Default behavior: do nothing. + */ +void m68k_set_instr_hook_callback(void (*callback)(void)); + + + +/* ======================================================================== */ +/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */ +/* ======================================================================== */ + +/* Use this function to set the CPU type you want to emulate. + * Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68010, + * M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020. + */ +void m68k_set_cpu_type(unsigned int cpu_type); + +/* Pulse the RESET pin on the CPU. + * You *MUST* reset the CPU at least once to initialize the emulation + * Note: If you didn't call m68k_set_cpu_type() before resetting + * the CPU for the first time, the CPU will be set to + * M68K_CPU_TYPE_68000. + */ +void m68k_pulse_reset(void); + +/* execute num_cycles worth of instructions. returns number of cycles used */ +int m68k_execute(int num_cycles); + +/* These functions let you read/write/modify the number of cycles left to run + * while m68k_execute() is running. + * These are useful if the 68k accesses a memory-mapped port on another device + * that requires immediate processing by another CPU. + */ +int m68k_cycles_run(void); /* Number of cycles run so far */ +int m68k_cycles_remaining(void); /* Number of cycles left */ +void m68k_modify_timeslice(int cycles); /* Modify cycles left */ +void m68k_end_timeslice(void); /* End timeslice now */ + +/* Set the IPL0-IPL2 pins on the CPU (IRQ). + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). + * Setting IRQ to 0 will clear an interrupt request. + */ +void m68k_set_irq(unsigned int int_level); + + +/* Halt the CPU as if you pulsed the HALT pin. */ +void m68k_pulse_halt(void); + + +/* Context switching to allow multiple CPUs */ + +/* Get the size of the cpu context in bytes */ +unsigned int m68k_context_size(void); + +/* Get a cpu context */ +unsigned int m68k_get_context(void* dst); + +/* set the current cpu context */ +void m68k_set_context(void* dst); + +/* Save the current cpu context to disk. + * You must provide a function pointer of the form: + * void save_value(char* identifier, unsigned int value) + */ +void m68k_save_context( void (*save_value)(char* identifier, unsigned int value)); + +/* Load a cpu context from disk. + * You must provide a function pointer of the form: + * unsigned int load_value(char* identifier) + */ +void m68k_load_context(unsigned int (*load_value)(char* identifier)); + + + +/* Peek at the internals of a CPU context. This can either be a context + * retrieved using m68k_get_context() or the currently running context. + * If context is NULL, the currently running CPU context will be used. + */ +unsigned int m68k_get_reg(void* context, m68k_register_t reg); + +/* Poke values into the internals of the currently running CPU context */ +void m68k_set_reg(m68k_register_t reg, unsigned int value); + +/* Check if an instruction is valid for the specified CPU type */ +unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type); + +/* Disassemble 1 instruction using the epecified CPU type at pc. Stores + * disassembly in str_buff and returns the size of the instruction in bytes. + */ +unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type); + + +/* ======================================================================== */ +/* ============================= CONFIGURATION ============================ */ +/* ======================================================================== */ + +/* Import the configuration for this build */ +#include "m68kconf.h" + + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68K__HEADER */ diff --git a/AltairZ80/m68kconf.h b/AltairZ80/m68kconf.h new file mode 100644 index 00000000..3e954c58 --- /dev/null +++ b/AltairZ80/m68kconf.h @@ -0,0 +1,193 @@ +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ +/* + * MUSASHI + * Version 3.3 + * + * A portable Motorola M680x0 processor emulation engine. + * Copyright 1998-2001 Karl Stenerud. All rights reserved. + * + * This code may be freely used for non-commercial purposes as long as this + * copyright notice remains unaltered in the source code and any binary files + * containing this code in compiled form. + * + * All other lisencing terms must be negotiated with the author + * (Karl Stenerud). + * + * The latest version of this code can be obtained at: + * http://kstenerud.cjb.net + */ + + + +#ifndef M68KCONF__HEADER +#define M68KCONF__HEADER + + +/* Configuration switches. + * Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks. + * OPT_SPECIFY_HANDLER causes the core to link directly to the function + * or macro you specify, rather than using callback functions whose pointer + * must be passed in using m68k_set_xxx_callback(). + */ +#define OPT_OFF 0 +#define OPT_ON 1 +#define OPT_SPECIFY_HANDLER 2 + + +/* ======================================================================== */ +/* ============================== MAME STUFF ============================== */ +/* ======================================================================== */ + +/* If you're compiling this for MAME, only change M68K_COMPILE_FOR_MAME + * to OPT_ON and use m68kmame.h to configure the 68k core. + */ +#ifndef M68K_COMPILE_FOR_MAME +#define M68K_COMPILE_FOR_MAME OPT_OFF +#endif /* M68K_COMPILE_FOR_MAME */ + +#if M68K_COMPILE_FOR_MAME == OPT_ON +#include "m68kmame.h" +#else + + + +/* ======================================================================== */ +/* ============================= CONFIGURATION ============================ */ +/* ======================================================================== */ + +/* Turn on if you want to use the following M68K variants */ +#define M68K_EMULATE_010 OPT_OFF +#define M68K_EMULATE_EC020 OPT_OFF +#define M68K_EMULATE_020 OPT_OFF + + +/* If on, the CPU will call m68k_read_immediate_xx() for immediate addressing + * and m68k_read_pcrelative_xx() for PC-relative addressing. + * If off, all read requests from the CPU will be redirected to m68k_read_xx() + */ +#define M68K_SEPARATE_READS OPT_OFF + + +/* If on, CPU will call the interrupt acknowledge callback when it services an + * interrupt. + * If off, all interrupts will be autovectored and all interrupt requests will + * auto-clear when the interrupt is serviced. + */ +#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER +#define M68K_INT_ACK_CALLBACK(A) m68k_cpu_irq_ack(A) + + +/* If on, CPU will call the breakpoint acknowledge callback when it encounters + * a breakpoint instruction and it is running a 68010+. + */ +#define M68K_EMULATE_BKPT_ACK OPT_OFF +#define M68K_BKPT_ACK_CALLBACK() your_bkpt_ack_handler_function() + + +/* If on, the CPU will monitor the trace flags and take trace exceptions + */ +#define M68K_EMULATE_TRACE OPT_OFF + + +/* If on, CPU will call the output reset callback when it encounters a reset + * instruction. + */ +#define M68K_EMULATE_RESET OPT_SPECIFY_HANDLER +#define M68K_RESET_CALLBACK() m68k_cpu_pulse_reset() + + +/* If on, CPU will call the set fc callback on every memory access to + * differentiate between user/supervisor, program/data access like a real + * 68000 would. This should be enabled and the callback should be set if you + * want to properly emulate the m68010 or higher. (moves uses function codes + * to read/write data from different address spaces) + */ +#define M68K_EMULATE_FC OPT_SPECIFY_HANDLER +#define M68K_SET_FC_CALLBACK(A) m68k_cpu_set_fc(A) + + +/* If on, CPU will call the pc changed callback when it changes the PC by a + * large value. This allows host programs to be nicer when it comes to + * fetching immediate data and instructions on a banked memory system. + */ +#define M68K_MONITOR_PC OPT_OFF +#define M68K_SET_PC_CALLBACK(A) your_pc_changed_handler_function(A) + + +/* If on, CPU will call the instruction hook callback before every + * instruction. + */ +#define M68K_INSTRUCTION_HOOK OPT_OFF +#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function() + + +/* If on, the CPU will emulate the 4-byte prefetch queue of a real 68000 */ +#define M68K_EMULATE_PREFETCH OPT_ON + + +/* If on, the CPU will generate address error exceptions if it tries to + * access a word or longword at an odd address. + * NOTE: Do not enable this! It is not working! + */ +#define M68K_EMULATE_ADDRESS_ERROR OPT_OFF + + +/* Turn on to enable logging of illegal instruction calls. + * M68K_LOG_FILEHANDLE must be #defined to a stdio file stream. + * Turn on M68K_LOG_1010_1111 to log all 1010 and 1111 calls. + */ +#define M68K_LOG_ENABLE OPT_OFF +#define M68K_LOG_1010_1111 OPT_OFF +#define M68K_LOG_FILEHANDLE some_file_handle + + +/* ----------------------------- COMPATIBILITY ---------------------------- */ + +/* The following options set optimizations that violate the current ANSI + * standard, but will be compliant under the forthcoming C9X standard. + */ + + +/* If on, the emulation core will use 64-bit integers to speed up some + * operations. +*/ +#define M68K_USE_64_BIT OPT_ON + + +/* Set to your compiler's static inline keyword to enable it, or + * set it to blank to disable it. + * If you define INLINE in the makefile, it will override this value. + * NOTE: not enabling inline functions will SEVERELY slow down emulation. + */ +#ifndef INLINE +#define INLINE static __inline +#endif /* INLINE */ + + +/* If your environment requires special prefixes for system callback functions + * such as the argument to qsort(), then set them here or in the makefile. + */ +#ifndef DECL_SPEC +#define DECL_SPEC +#endif + +#endif /* M68K_COMPILE_FOR_MAME */ + +#include "m68ksim.h" + +#define m68k_read_memory_8(A) m68k_cpu_read_byte(A) +#define m68k_read_memory_16(A) m68k_cpu_read_word(A) +#define m68k_read_memory_32(A) m68k_cpu_read_long(A) + +#define m68k_write_memory_8(A, V) m68k_cpu_write_byte(A, V) +#define m68k_write_memory_16(A, V) m68k_cpu_write_word(A, V) +#define m68k_write_memory_32(A, V) m68k_cpu_write_long(A, V) + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KCONF__HEADER */ diff --git a/AltairZ80/m68kcpu.c b/AltairZ80/m68kcpu.c new file mode 100755 index 00000000..561a5385 --- /dev/null +++ b/AltairZ80/m68kcpu.c @@ -0,0 +1,894 @@ +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ + +#if 0 +static const char* copyright_notice = +"MUSASHI\n" +"Version 3.3 (2001-01-29)\n" +"A portable Motorola M680x0 processor emulation engine.\n" +"Copyright 1998-2001 Karl Stenerud. All rights reserved.\n" +"\n" +"This code may be freely used for non-commercial purpooses as long as this\n" +"copyright notice remains unaltered in the source code and any binary files\n" +"containing this code in compiled form.\n" +"\n" +"All other lisencing terms must be negotiated with the author\n" +"(Karl Stenerud).\n" +"\n" +"The latest version of this code can be obtained at:\n" +"http://kstenerud.cjb.net\n" +; +#endif + + +/* ======================================================================== */ +/* ================================= NOTES ================================ */ +/* ======================================================================== */ + + + +/* ======================================================================== */ +/* ================================ INCLUDES ============================== */ +/* ======================================================================== */ + +#include "m68kops.h" +#include "m68kcpu.h" + +/* ======================================================================== */ +/* ================================= DATA ================================= */ +/* ======================================================================== */ + +int m68ki_initial_cycles; +int m68ki_remaining_cycles = 0; /* Number of clocks remaining */ +uint m68ki_tracing = 0; +uint m68ki_address_space; + +#ifdef M68K_LOG_ENABLE +char* m68ki_cpu_names[9] = +{ + "Invalid CPU", + "M68000", + "M68010", + "Invalid CPU", + "M68EC020" + "Invalid CPU", + "Invalid CPU", + "Invalid CPU", + "M68020" +}; +#endif /* M68K_LOG_ENABLE */ + +/* The CPU core */ +m68ki_cpu_core m68ki_cpu = {0}; + +#if M68K_EMULATE_ADDRESS_ERROR +jmp_buf m68ki_address_error_trap; +#endif /* M68K_EMULATE_ADDRESS_ERROR */ + +/* Used by shift & rotate instructions */ +uint8 m68ki_shift_8_table[65] = +{ + 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff +}; +uint16 m68ki_shift_16_table[65] = +{ + 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00, + 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff +}; +uint m68ki_shift_32_table[65] = +{ + 0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000, + 0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000, + 0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000, + 0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00, + 0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8, + 0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff +}; + + +/* Number of clock cycles to use for exception processing. + * I used 4 for any vectors that are undocumented for processing times. + */ +uint8 m68ki_exception_cycle_table[3][256] = +{ + { /* 000 */ + 4, /* 0: Reset - Initial Stack Pointer */ + 4, /* 1: Reset - Initial Program Counter */ + 50, /* 2: Bus Error (unemulated) */ + 50, /* 3: Address Error (unemulated) */ + 34, /* 4: Illegal Instruction */ + 38, /* 5: Divide by Zero -- ASG: changed from 42 */ + 40, /* 6: CHK -- ASG: chanaged from 44 */ + 34, /* 7: TRAPV */ + 34, /* 8: Privilege Violation */ + 34, /* 9: Trace */ + 4, /* 10: 1010 */ + 4, /* 11: 1111 */ + 4, /* 12: RESERVED */ + 4, /* 13: Coprocessor Protocol Violation (unemulated) */ + 4, /* 14: Format Error */ + 44, /* 15: Uninitialized Interrupt */ + 4, /* 16: RESERVED */ + 4, /* 17: RESERVED */ + 4, /* 18: RESERVED */ + 4, /* 19: RESERVED */ + 4, /* 20: RESERVED */ + 4, /* 21: RESERVED */ + 4, /* 22: RESERVED */ + 4, /* 23: RESERVED */ + 44, /* 24: Spurious Interrupt */ + 44, /* 25: Level 1 Interrupt Autovector */ + 44, /* 26: Level 2 Interrupt Autovector */ + 44, /* 27: Level 3 Interrupt Autovector */ + 44, /* 28: Level 4 Interrupt Autovector */ + 44, /* 29: Level 5 Interrupt Autovector */ + 44, /* 30: Level 6 Interrupt Autovector */ + 44, /* 31: Level 7 Interrupt Autovector */ + 34, /* 32: TRAP #0 -- ASG: chanaged from 38 */ + 34, /* 33: TRAP #1 */ + 34, /* 34: TRAP #2 */ + 34, /* 35: TRAP #3 */ + 34, /* 36: TRAP #4 */ + 34, /* 37: TRAP #5 */ + 34, /* 38: TRAP #6 */ + 34, /* 39: TRAP #7 */ + 34, /* 40: TRAP #8 */ + 34, /* 41: TRAP #9 */ + 34, /* 42: TRAP #10 */ + 34, /* 43: TRAP #11 */ + 34, /* 44: TRAP #12 */ + 34, /* 45: TRAP #13 */ + 34, /* 46: TRAP #14 */ + 34, /* 47: TRAP #15 */ + 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */ + 4, /* 49: FP Inexact Result (unemulated) */ + 4, /* 50: FP Divide by Zero (unemulated) */ + 4, /* 51: FP Underflow (unemulated) */ + 4, /* 52: FP Operand Error (unemulated) */ + 4, /* 53: FP Overflow (unemulated) */ + 4, /* 54: FP Signaling NAN (unemulated) */ + 4, /* 55: FP Unimplemented Data Type (unemulated) */ + 4, /* 56: MMU Configuration Error (unemulated) */ + 4, /* 57: MMU Illegal Operation Error (unemulated) */ + 4, /* 58: MMU Access Level Violation Error (unemulated) */ + 4, /* 59: RESERVED */ + 4, /* 60: RESERVED */ + 4, /* 61: RESERVED */ + 4, /* 62: RESERVED */ + 4, /* 63: RESERVED */ + /* 64-255: User Defined */ + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4 + }, + { /* 010 */ + 4, /* 0: Reset - Initial Stack Pointer */ + 4, /* 1: Reset - Initial Program Counter */ + 126, /* 2: Bus Error (unemulated) */ + 126, /* 3: Address Error (unemulated) */ + 38, /* 4: Illegal Instruction */ + 44, /* 5: Divide by Zero */ + 44, /* 6: CHK */ + 34, /* 7: TRAPV */ + 38, /* 8: Privilege Violation */ + 38, /* 9: Trace */ + 4, /* 10: 1010 */ + 4, /* 11: 1111 */ + 4, /* 12: RESERVED */ + 4, /* 13: Coprocessor Protocol Violation (unemulated) */ + 4, /* 14: Format Error */ + 44, /* 15: Uninitialized Interrupt */ + 4, /* 16: RESERVED */ + 4, /* 17: RESERVED */ + 4, /* 18: RESERVED */ + 4, /* 19: RESERVED */ + 4, /* 20: RESERVED */ + 4, /* 21: RESERVED */ + 4, /* 22: RESERVED */ + 4, /* 23: RESERVED */ + 46, /* 24: Spurious Interrupt */ + 46, /* 25: Level 1 Interrupt Autovector */ + 46, /* 26: Level 2 Interrupt Autovector */ + 46, /* 27: Level 3 Interrupt Autovector */ + 46, /* 28: Level 4 Interrupt Autovector */ + 46, /* 29: Level 5 Interrupt Autovector */ + 46, /* 30: Level 6 Interrupt Autovector */ + 46, /* 31: Level 7 Interrupt Autovector */ + 38, /* 32: TRAP #0 */ + 38, /* 33: TRAP #1 */ + 38, /* 34: TRAP #2 */ + 38, /* 35: TRAP #3 */ + 38, /* 36: TRAP #4 */ + 38, /* 37: TRAP #5 */ + 38, /* 38: TRAP #6 */ + 38, /* 39: TRAP #7 */ + 38, /* 40: TRAP #8 */ + 38, /* 41: TRAP #9 */ + 38, /* 42: TRAP #10 */ + 38, /* 43: TRAP #11 */ + 38, /* 44: TRAP #12 */ + 38, /* 45: TRAP #13 */ + 38, /* 46: TRAP #14 */ + 38, /* 47: TRAP #15 */ + 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */ + 4, /* 49: FP Inexact Result (unemulated) */ + 4, /* 50: FP Divide by Zero (unemulated) */ + 4, /* 51: FP Underflow (unemulated) */ + 4, /* 52: FP Operand Error (unemulated) */ + 4, /* 53: FP Overflow (unemulated) */ + 4, /* 54: FP Signaling NAN (unemulated) */ + 4, /* 55: FP Unimplemented Data Type (unemulated) */ + 4, /* 56: MMU Configuration Error (unemulated) */ + 4, /* 57: MMU Illegal Operation Error (unemulated) */ + 4, /* 58: MMU Access Level Violation Error (unemulated) */ + 4, /* 59: RESERVED */ + 4, /* 60: RESERVED */ + 4, /* 61: RESERVED */ + 4, /* 62: RESERVED */ + 4, /* 63: RESERVED */ + /* 64-255: User Defined */ + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4 + }, + { /* 020 */ + 4, /* 0: Reset - Initial Stack Pointer */ + 4, /* 1: Reset - Initial Program Counter */ + 50, /* 2: Bus Error (unemulated) */ + 50, /* 3: Address Error (unemulated) */ + 20, /* 4: Illegal Instruction */ + 38, /* 5: Divide by Zero */ + 40, /* 6: CHK */ + 20, /* 7: TRAPV */ + 34, /* 8: Privilege Violation */ + 25, /* 9: Trace */ + 20, /* 10: 1010 */ + 20, /* 11: 1111 */ + 4, /* 12: RESERVED */ + 4, /* 13: Coprocessor Protocol Violation (unemulated) */ + 4, /* 14: Format Error */ + 30, /* 15: Uninitialized Interrupt */ + 4, /* 16: RESERVED */ + 4, /* 17: RESERVED */ + 4, /* 18: RESERVED */ + 4, /* 19: RESERVED */ + 4, /* 20: RESERVED */ + 4, /* 21: RESERVED */ + 4, /* 22: RESERVED */ + 4, /* 23: RESERVED */ + 30, /* 24: Spurious Interrupt */ + 30, /* 25: Level 1 Interrupt Autovector */ + 30, /* 26: Level 2 Interrupt Autovector */ + 30, /* 27: Level 3 Interrupt Autovector */ + 30, /* 28: Level 4 Interrupt Autovector */ + 30, /* 29: Level 5 Interrupt Autovector */ + 30, /* 30: Level 6 Interrupt Autovector */ + 30, /* 31: Level 7 Interrupt Autovector */ + 20, /* 32: TRAP #0 */ + 20, /* 33: TRAP #1 */ + 20, /* 34: TRAP #2 */ + 20, /* 35: TRAP #3 */ + 20, /* 36: TRAP #4 */ + 20, /* 37: TRAP #5 */ + 20, /* 38: TRAP #6 */ + 20, /* 39: TRAP #7 */ + 20, /* 40: TRAP #8 */ + 20, /* 41: TRAP #9 */ + 20, /* 42: TRAP #10 */ + 20, /* 43: TRAP #11 */ + 20, /* 44: TRAP #12 */ + 20, /* 45: TRAP #13 */ + 20, /* 46: TRAP #14 */ + 20, /* 47: TRAP #15 */ + 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */ + 4, /* 49: FP Inexact Result (unemulated) */ + 4, /* 50: FP Divide by Zero (unemulated) */ + 4, /* 51: FP Underflow (unemulated) */ + 4, /* 52: FP Operand Error (unemulated) */ + 4, /* 53: FP Overflow (unemulated) */ + 4, /* 54: FP Signaling NAN (unemulated) */ + 4, /* 55: FP Unimplemented Data Type (unemulated) */ + 4, /* 56: MMU Configuration Error (unemulated) */ + 4, /* 57: MMU Illegal Operation Error (unemulated) */ + 4, /* 58: MMU Access Level Violation Error (unemulated) */ + 4, /* 59: RESERVED */ + 4, /* 60: RESERVED */ + 4, /* 61: RESERVED */ + 4, /* 62: RESERVED */ + 4, /* 63: RESERVED */ + /* 64-255: User Defined */ + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, + 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4 + } +}; + +uint8 m68ki_ea_idx_cycle_table[64] = +{ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, /* ..01.000 no memory indirect, base NULL */ + 5, /* ..01..01 memory indirect, base NULL, outer NULL */ + 7, /* ..01..10 memory indirect, base NULL, outer 16 */ + 7, /* ..01..11 memory indirect, base NULL, outer 32 */ + 0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7, + 2, /* ..10.000 no memory indirect, base 16 */ + 7, /* ..10..01 memory indirect, base 16, outer NULL */ + 9, /* ..10..10 memory indirect, base 16, outer 16 */ + 9, /* ..10..11 memory indirect, base 16, outer 32 */ + 0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9, + 6, /* ..11.000 no memory indirect, base 32 */ + 11, /* ..11..01 memory indirect, base 32, outer NULL */ + 13, /* ..11..10 memory indirect, base 32, outer 16 */ + 13, /* ..11..11 memory indirect, base 32, outer 32 */ + 0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13 +}; + + + +/* ======================================================================== */ +/* =============================== CALLBACKS ============================== */ +/* ======================================================================== */ + +/* Default callbacks used if the callback hasn't been set yet, or if the + * callback is set to NULL + */ + +/* Interrupt acknowledge */ +static int default_int_ack_callback_data; +static int default_int_ack_callback(int int_level) +{ + default_int_ack_callback_data = int_level; + CPU_INT_LEVEL = 0; + return M68K_INT_ACK_AUTOVECTOR; +} + +/* Breakpoint acknowledge */ +static unsigned int default_bkpt_ack_callback_data; +static void default_bkpt_ack_callback(unsigned int data) +{ + default_bkpt_ack_callback_data = data; +} + +/* Called when a reset instruction is executed */ +static void default_reset_instr_callback(void) +{ +} + +/* Called when the program counter changed by a large value */ +static unsigned int default_pc_changed_callback_data; +static void default_pc_changed_callback(unsigned int new_pc) +{ + default_pc_changed_callback_data = new_pc; +} + +/* Called every time there's bus activity (read/write to/from memory */ +static unsigned int default_set_fc_callback_data; +static void default_set_fc_callback(unsigned int new_fc) +{ + default_set_fc_callback_data = new_fc; +} + +/* Called every instruction cycle prior to execution */ +static void default_instr_hook_callback(void) +{ +} + + + +/* ======================================================================== */ +/* ================================= API ================================== */ +/* ======================================================================== */ + +/* Access the internals of the CPU */ +unsigned int m68k_get_reg(void* context, m68k_register_t regnum) +{ + m68ki_cpu_core* cpu = context != NULL ?(m68ki_cpu_core*)context : &m68ki_cpu; + + switch(regnum) + { + case M68K_REG_D0: return cpu->dar[0]; + case M68K_REG_D1: return cpu->dar[1]; + case M68K_REG_D2: return cpu->dar[2]; + case M68K_REG_D3: return cpu->dar[3]; + case M68K_REG_D4: return cpu->dar[4]; + case M68K_REG_D5: return cpu->dar[5]; + case M68K_REG_D6: return cpu->dar[6]; + case M68K_REG_D7: return cpu->dar[7]; + case M68K_REG_A0: return cpu->dar[8]; + case M68K_REG_A1: return cpu->dar[9]; + case M68K_REG_A2: return cpu->dar[10]; + case M68K_REG_A3: return cpu->dar[11]; + case M68K_REG_A4: return cpu->dar[12]; + case M68K_REG_A5: return cpu->dar[13]; + case M68K_REG_A6: return cpu->dar[14]; + case M68K_REG_A7: return cpu->dar[15]; + case M68K_REG_PC: return MASK_OUT_ABOVE_32(cpu->pc); + case M68K_REG_SR: return cpu->t1_flag | + cpu->t0_flag | + (cpu->s_flag << 11) | + (cpu->m_flag << 11) | + cpu->int_mask | + ((cpu->x_flag & XFLAG_SET) >> 4) | + ((cpu->n_flag & NFLAG_SET) >> 4) | + ((!cpu->not_z_flag) << 2) | + ((cpu->v_flag & VFLAG_SET) >> 6) | + ((cpu->c_flag & CFLAG_SET) >> 8); + case M68K_REG_SP: return cpu->dar[15]; + case M68K_REG_USP: return cpu->s_flag ? cpu->sp[0] : cpu->dar[15]; + case M68K_REG_ISP: return cpu->s_flag && !cpu->m_flag ? cpu->dar[15] : cpu->sp[4]; + case M68K_REG_MSP: return cpu->s_flag && cpu->m_flag ? cpu->dar[15] : cpu->sp[6]; + case M68K_REG_SFC: return cpu->sfc; + case M68K_REG_DFC: return cpu->dfc; + case M68K_REG_VBR: return cpu->vbr; + case M68K_REG_CACR: return cpu->cacr; + case M68K_REG_CAAR: return cpu->caar; + case M68K_REG_PREF_ADDR: return cpu->pref_addr; + case M68K_REG_PREF_DATA: return cpu->pref_data; + case M68K_REG_PPC: return MASK_OUT_ABOVE_32(cpu->ppc); + case M68K_REG_IR: return cpu->ir; + case M68K_REG_CPU_TYPE: + switch(cpu->cpu_type) + { + case CPU_TYPE_000: return (unsigned int)M68K_CPU_TYPE_68000; + case CPU_TYPE_010: return (unsigned int)M68K_CPU_TYPE_68010; + case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020; + case CPU_TYPE_020: return (unsigned int)M68K_CPU_TYPE_68020; + } + return M68K_CPU_TYPE_INVALID; + default: return 0; + } + return 0; +} + +void m68k_set_reg(m68k_register_t regnum, unsigned int value) +{ + switch(regnum) + { + case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return; + case M68K_REG_SR: m68ki_set_sr(value); return; + case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_USP: if(FLAG_S) + REG_USP = MASK_OUT_ABOVE_32(value); + else + REG_SP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_ISP: if(FLAG_S && !FLAG_M) + REG_SP = MASK_OUT_ABOVE_32(value); + else + REG_ISP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_MSP: if(FLAG_S && FLAG_M) + REG_SP = MASK_OUT_ABOVE_32(value); + else + REG_MSP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_VBR: REG_VBR = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_SFC: REG_SFC = value & 7; return; + case M68K_REG_DFC: REG_DFC = value & 7; return; + case M68K_REG_CACR: REG_CACR = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_CAAR: REG_CAAR = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_PPC: REG_PPC = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return; + case M68K_REG_CPU_TYPE: m68k_set_cpu_type(value); return; + default: return; + } +} + +/* Set the callbacks */ +void m68k_set_int_ack_callback(int (*callback)(int int_level)) +{ + CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback; +} + +void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data)) +{ + CALLBACK_BKPT_ACK = callback ? callback : default_bkpt_ack_callback; +} + +void m68k_set_reset_instr_callback(void (*callback)(void)) +{ + CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback; +} + +void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc)) +{ + CALLBACK_PC_CHANGED = callback ? callback : default_pc_changed_callback; +} + +void m68k_set_fc_callback(void (*callback)(unsigned int new_fc)) +{ + CALLBACK_SET_FC = callback ? callback : default_set_fc_callback; +} + +void m68k_set_instr_hook_callback(void (*callback)(void)) +{ + CALLBACK_INSTR_HOOK = callback ? callback : default_instr_hook_callback; +} + +#include +/* Set the CPU type. */ +void m68k_set_cpu_type(unsigned int cpu_type) +{ + switch(cpu_type) + { + case M68K_CPU_TYPE_68000: + CPU_TYPE = CPU_TYPE_000; + CPU_ADDRESS_MASK = 0x00ffffff; + CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + CYC_INSTRUCTION = m68ki_cycles[0]; + CYC_EXCEPTION = m68ki_exception_cycle_table[0]; + CYC_BCC_NOTAKE_B = -2; + CYC_BCC_NOTAKE_W = 2; + CYC_DBCC_F_NOEXP = -2; + CYC_DBCC_F_EXP = 2; + CYC_SCC_R_FALSE = 2; + CYC_MOVEM_W = 2; + CYC_MOVEM_L = 3; + CYC_SHIFT = 1; + CYC_RESET = 132; + return; + case M68K_CPU_TYPE_68010: + CPU_TYPE = CPU_TYPE_010; + CPU_ADDRESS_MASK = 0x00ffffff; + CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + CYC_INSTRUCTION = m68ki_cycles[1]; + CYC_EXCEPTION = m68ki_exception_cycle_table[1]; + CYC_BCC_NOTAKE_B = -4; + CYC_BCC_NOTAKE_W = 0; + CYC_DBCC_F_NOEXP = 0; + CYC_DBCC_F_EXP = 6; + CYC_SCC_R_FALSE = 0; + CYC_MOVEM_W = 2; + CYC_MOVEM_L = 3; + CYC_SHIFT = 1; + CYC_RESET = 130; + return; + case M68K_CPU_TYPE_68EC020: + CPU_TYPE = CPU_TYPE_EC020; + CPU_ADDRESS_MASK = 0x00ffffff; + CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + CYC_INSTRUCTION = m68ki_cycles[2]; + CYC_EXCEPTION = m68ki_exception_cycle_table[2]; + CYC_BCC_NOTAKE_B = -2; + CYC_BCC_NOTAKE_W = 0; + CYC_DBCC_F_NOEXP = 0; + CYC_DBCC_F_EXP = 4; + CYC_SCC_R_FALSE = 0; + CYC_MOVEM_W = 2; + CYC_MOVEM_L = 2; + CYC_SHIFT = 0; + CYC_RESET = 518; + return; + case M68K_CPU_TYPE_68020: + CPU_TYPE = CPU_TYPE_020; + CPU_ADDRESS_MASK = 0xffffffff; + CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + CYC_INSTRUCTION = m68ki_cycles[2]; + CYC_EXCEPTION = m68ki_exception_cycle_table[2]; + CYC_BCC_NOTAKE_B = -2; + CYC_BCC_NOTAKE_W = 0; + CYC_DBCC_F_NOEXP = 0; + CYC_DBCC_F_EXP = 4; + CYC_SCC_R_FALSE = 0; + CYC_MOVEM_W = 2; + CYC_MOVEM_L = 2; + CYC_SHIFT = 0; + CYC_RESET = 518; + return; + } +} + +/* Execute some instructions until we use up num_cycles clock cycles */ +/* ASG: removed per-instruction interrupt checks */ +int m68k_execute(int num_cycles) +{ + /* Make sure we're not stopped */ + if(!CPU_STOPPED) + { + /* Set our pool of clock cycles available */ + SET_CYCLES(num_cycles); + m68ki_initial_cycles = num_cycles; + + /* ASG: update cycles */ + USE_CYCLES(CPU_INT_CYCLES); + CPU_INT_CYCLES = 0; + + /* Return point if we had an address error */ + m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */ + + /* Main loop. Keep going until we run out of clock cycles */ + do + { + /* Set tracing accodring to T1. (T0 is done inside instruction) */ + m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */ + + /* Set the address space for reads */ + m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */ + + /* Call external hook to peek at CPU */ + m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */ + + /* Record previous program counter */ + REG_PPC = REG_PC; + + /* Read an instruction and call its handler */ + REG_IR = m68ki_read_imm_16(); + m68ki_instruction_jump_table[REG_IR](); + USE_CYCLES(CYC_INSTRUCTION[REG_IR]); + + /* Trace m68k_exception, if necessary */ + m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */ + } while(GET_CYCLES() > 0); + + /* set previous PC to current PC for the next entry into the loop */ + REG_PPC = REG_PC; + + /* ASG: update cycles */ + USE_CYCLES(CPU_INT_CYCLES); + CPU_INT_CYCLES = 0; + + /* return how many clocks we used */ + return m68ki_initial_cycles - GET_CYCLES(); + } + + /* We get here if the CPU is stopped or halted */ + SET_CYCLES(0); + CPU_INT_CYCLES = 0; + + return num_cycles; +} + + +int m68k_cycles_run(void) +{ + return m68ki_initial_cycles - GET_CYCLES(); +} + +int m68k_cycles_remaining(void) +{ + return GET_CYCLES(); +} + +/* Change the timeslice */ +void m68k_modify_timeslice(int cycles) +{ + m68ki_initial_cycles += cycles; + ADD_CYCLES(cycles); +} + + +void m68k_end_timeslice(void) +{ + m68ki_initial_cycles = GET_CYCLES(); + SET_CYCLES(0); +} + + +/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */ +/* KS: Modified so that IPL* bits match with mask positions in the SR + * and cleaned out remenants of the interrupt controller. + */ +void m68k_set_irq(unsigned int int_level) +{ + uint old_level = CPU_INT_LEVEL; + CPU_INT_LEVEL = int_level << 8; + + /* A transition from < 7 to 7 always interrupts (NMI) */ + /* Note: Level 7 can also level trigger like a normal IRQ */ + if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700) + m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */ + else + m68ki_check_interrupts(); /* Level triggered (IRQ) */ +} + + +/* Pulse the RESET line on the CPU */ +void m68k_pulse_reset(void) +{ + static uint emulation_initialized = 0; + + /* The first call to this function initializes the opcode handler jump table */ + if(!emulation_initialized) + { + m68ki_build_opcode_table(); + m68k_set_int_ack_callback(NULL); + m68k_set_bkpt_ack_callback(NULL); + m68k_set_reset_instr_callback(NULL); + m68k_set_pc_changed_callback(NULL); + m68k_set_fc_callback(NULL); + m68k_set_instr_hook_callback(NULL); + + emulation_initialized = 1; + } + + + if(CPU_TYPE == 0) /* KW 990319 */ + m68k_set_cpu_type(M68K_CPU_TYPE_68000); + + /* Clear all stop levels and eat up all remaining cycles */ + CPU_STOPPED = 0; + SET_CYCLES(0); + + /* Turn off tracing */ + FLAG_T1 = FLAG_T0 = 0; + m68ki_clear_trace(); + /* Interrupt mask to level 7 */ + FLAG_INT_MASK = 0x0700; + /* Reset VBR */ + REG_VBR = 0; + /* Go to supervisor mode */ + m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR); + + /* Invalidate the prefetch queue */ +#if M68K_EMULATE_PREFETCH + /* Set to arbitrary number since our first fetch is from 0 */ + CPU_PREF_ADDR = 0x1000; +#endif /* M68K_EMULATE_PREFETCH */ + + /* Read the initial stack pointer and program counter */ + m68ki_jump(0); + REG_SP = m68ki_read_imm_32(); + REG_PC = m68ki_read_imm_32(); + m68ki_jump(REG_PC); +} + +/* Pulse the HALT line on the CPU */ +void m68k_pulse_halt(void) +{ + CPU_STOPPED |= STOP_LEVEL_HALT; +} + + +/* Get and set the current CPU context */ +/* This is to allow for multiple CPUs */ +unsigned int m68k_context_size() +{ + return sizeof(m68ki_cpu_core); +} + +unsigned int m68k_get_context(void* dst) +{ + if(dst) *(m68ki_cpu_core*)dst = m68ki_cpu; + return sizeof(m68ki_cpu_core); +} + +void m68k_set_context(void* src) +{ + if(src) m68ki_cpu = *(m68ki_cpu_core*)src; +} + +void m68k_save_context( void (*save_value)(char*, unsigned int)) +{ + if(!save_value) + return; + + save_value("CPU_TYPE" , m68k_get_reg(NULL, M68K_REG_CPU_TYPE)); + save_value("D0" , REG_D[0]); + save_value("D1" , REG_D[1]); + save_value("D2" , REG_D[2]); + save_value("D3" , REG_D[3]); + save_value("D4" , REG_D[4]); + save_value("D5" , REG_D[5]); + save_value("D6" , REG_D[6]); + save_value("D7" , REG_D[7]); + save_value("A0" , REG_A[0]); + save_value("A1" , REG_A[1]); + save_value("A2" , REG_A[2]); + save_value("A3" , REG_A[3]); + save_value("A4" , REG_A[4]); + save_value("A5" , REG_A[5]); + save_value("A6" , REG_A[6]); + save_value("A7" , REG_A[7]); + save_value("PPC" , REG_PPC); + save_value("PC" , REG_PC); + save_value("USP" , REG_USP); + save_value("ISP" , REG_ISP); + save_value("MSP" , REG_MSP); + save_value("VBR" , REG_VBR); + save_value("SFC" , REG_SFC); + save_value("DFC" , REG_DFC); + save_value("CACR" , REG_CACR); + save_value("CAAR" , REG_CAAR); + save_value("SR" , m68ki_get_sr()); + save_value("INT_LEVEL" , CPU_INT_LEVEL); + save_value("INT_CYCLES", CPU_INT_CYCLES); + save_value("STOPPED" , (CPU_STOPPED & STOP_LEVEL_STOP) != 0); + save_value("HALTED" , (CPU_STOPPED & STOP_LEVEL_HALT) != 0); + save_value("PREF_ADDR" , CPU_PREF_ADDR); + save_value("PREF_DATA" , CPU_PREF_DATA); +} + +void m68k_load_context(unsigned int (*load_value)(char*)) +{ + unsigned int temp; + + m68k_set_cpu_type(load_value("CPU_TYPE")); + REG_PPC = load_value("PPC"); + REG_PC = load_value("PC"); + m68ki_jump(REG_PC); + CPU_INT_LEVEL = 0; + m68ki_set_sr_noint(load_value("SR")); + REG_D[0] = load_value("D0"); + REG_D[1] = load_value("D1"); + REG_D[2] = load_value("D2"); + REG_D[3] = load_value("D3"); + REG_D[4] = load_value("D4"); + REG_D[5] = load_value("D5"); + REG_D[6] = load_value("D6"); + REG_D[7] = load_value("D7"); + REG_A[0] = load_value("A0"); + REG_A[1] = load_value("A1"); + REG_A[2] = load_value("A2"); + REG_A[3] = load_value("A3"); + REG_A[4] = load_value("A4"); + REG_A[5] = load_value("A5"); + REG_A[6] = load_value("A6"); + REG_A[7] = load_value("A7"); + REG_USP = load_value("USP"); + REG_ISP = load_value("ISP"); + REG_MSP = load_value("MSP"); + REG_VBR = load_value("VBR"); + REG_SFC = load_value("SFC"); + REG_DFC = load_value("DFC"); + REG_CACR = load_value("CACR"); + REG_CAAR = load_value("CAAR"); + CPU_INT_LEVEL = load_value("INT_LEVEL"); + CPU_INT_CYCLES = load_value("INT_CYCLES"); + + CPU_STOPPED = 0; + temp = load_value("STOPPED"); + if(temp) CPU_STOPPED |= STOP_LEVEL_STOP; + temp = load_value("HALTED"); + if(temp) CPU_STOPPED |= STOP_LEVEL_HALT; + + CPU_PREF_ADDR = load_value("PREF_ADDR"); + CPU_PREF_DATA = load_value("PREF_DATA"); +} + + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ diff --git a/AltairZ80/m68kcpu.h b/AltairZ80/m68kcpu.h new file mode 100755 index 00000000..78e4595e --- /dev/null +++ b/AltairZ80/m68kcpu.h @@ -0,0 +1,1841 @@ +#include +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ +/* + * MUSASHI + * Version 3.3 + * + * A portable Motorola M680x0 processor emulation engine. + * Copyright 1998-2001 Karl Stenerud. All rights reserved. + * + * This code may be freely used for non-commercial purposes as long as this + * copyright notice remains unaltered in the source code and any binary files + * containing this code in compiled form. + * + * All other lisencing terms must be negotiated with the author + * (Karl Stenerud). + * + * The latest version of this code can be obtained at: + * http://kstenerud.cjb.net + */ + + + + +#ifndef M68KCPU__HEADER +#define M68KCPU__HEADER + +#include "m68k.h" +#include + +#if M68K_EMULATE_ADDRESS_ERROR +#include +#endif /* M68K_EMULATE_ADDRESS_ERROR */ + +/* ======================================================================== */ +/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */ +/* ======================================================================== */ + +/* Check for > 32bit sizes */ +#if UINT_MAX > 0xffffffff + #define M68K_INT_GT_32_BIT 1 +#endif + +/* Data types used in this emulation core */ +#undef sint8 +#undef sint16 +#undef sint32 +#undef sint64 +#undef uint8 +#undef uint16 +#undef uint32 +#undef uint64 +#undef sint +#undef uint + +#define sint8 signed char /* ASG: changed from char to signed char */ +#define sint16 signed short +#define sint32 signed long +#define uint8 unsigned char +#define uint16 unsigned short +#define uint32 unsigned long + +/* signed and unsigned int must be at least 32 bits wide */ +#define sint signed int +#define uint unsigned int + + +#if M68K_USE_64_BIT +#define sint64 signed long long +#define uint64 unsigned long long +#else +#define sint64 sint32 +#define uint64 uint32 +#endif /* M68K_USE_64_BIT */ + + + +/* Allow for architectures that don't have 8-bit sizes */ +#if UCHAR_MAX == 0xff + #define MAKE_INT_8(A) (sint8)(A) +#else + #undef sint8 + #define sint8 signed int + #undef uint8 + #define uint8 unsigned int + INLINE sint MAKE_INT_8(uint value) + { + return (value & 0x80) ? value | ~0xff : value & 0xff; + } +#endif /* UCHAR_MAX == 0xff */ + + +/* Allow for architectures that don't have 16-bit sizes */ +#if USHRT_MAX == 0xffff + #define MAKE_INT_16(A) (sint16)(A) +#else + #undef sint16 + #define sint16 signed int + #undef uint16 + #define uint16 unsigned int + INLINE sint MAKE_INT_16(uint value) + { + return (value & 0x8000) ? value | ~0xffff : value & 0xffff; + } +#endif /* USHRT_MAX == 0xffff */ + + +/* Allow for architectures that don't have 32-bit sizes */ +#if ULONG_MAX == 0xffffffff + #define MAKE_INT_32(A) (sint32)(A) +#else + #undef sint32 + #define sint32 signed int + #undef uint32 + #define uint32 unsigned int + INLINE sint MAKE_INT_32(uint value) + { + return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff; + } +#endif /* ULONG_MAX == 0xffffffff */ + + + + +/* ======================================================================== */ +/* ============================ GENERAL DEFINES =========================== */ +/* ======================================================================== */ + +/* Exception Vectors handled by emulation */ +#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */ +#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */ +#define EXCEPTION_ILLEGAL_INSTRUCTION_M68K 4 +#define EXCEPTION_ZERO_DIVIDE 5 +#define EXCEPTION_CHK 6 +#define EXCEPTION_TRAPV 7 +#define EXCEPTION_PRIVILEGE_VIOLATION 8 +#define EXCEPTION_TRACE 9 +#define EXCEPTION_1010 10 +#define EXCEPTION_1111 11 +#define EXCEPTION_FORMAT_ERROR 14 +#define EXCEPTION_UNINITIALIZED_INTERRUPT 15 +#define EXCEPTION_SPURIOUS_INTERRUPT 24 +#define EXCEPTION_INTERRUPT_AUTOVECTOR 24 +#define EXCEPTION_TRAP_BASE 32 + +/* Function codes set by CPU during data/address bus activity */ +#define FUNCTION_CODE_USER_DATA 1 +#define FUNCTION_CODE_USER_PROGRAM 2 +#define FUNCTION_CODE_SUPERVISOR_DATA 5 +#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6 +#define FUNCTION_CODE_CPU_SPACE 7 + +/* CPU types for deciding what to emulate */ +#define CPU_TYPE_000 1 +#define CPU_TYPE_010 2 +#define CPU_TYPE_EC020 4 +#define CPU_TYPE_020 8 + +/* Different ways to stop the CPU */ +#define STOP_LEVEL_STOP 1 +#define STOP_LEVEL_HALT 2 + +#ifndef NULL +#define NULL ((void*)0) +#endif + +/* ======================================================================== */ +/* ================================ MACROS ================================ */ +/* ======================================================================== */ + + +/* ---------------------------- General Macros ---------------------------- */ + +/* Bit Isolation Macros */ +#define BIT_0(A) ((A) & 0x00000001) +#define BIT_1(A) ((A) & 0x00000002) +#define BIT_2(A) ((A) & 0x00000004) +#define BIT_3(A) ((A) & 0x00000008) +#define BIT_4(A) ((A) & 0x00000010) +#define BIT_5(A) ((A) & 0x00000020) +#define BIT_6(A) ((A) & 0x00000040) +#define BIT_7(A) ((A) & 0x00000080) +#define BIT_8(A) ((A) & 0x00000100) +#define BIT_9(A) ((A) & 0x00000200) +#define BIT_A(A) ((A) & 0x00000400) +#define BIT_B(A) ((A) & 0x00000800) +#define BIT_C(A) ((A) & 0x00001000) +#define BIT_D(A) ((A) & 0x00002000) +#define BIT_E(A) ((A) & 0x00004000) +#define BIT_F(A) ((A) & 0x00008000) +#define BIT_10(A) ((A) & 0x00010000) +#define BIT_11(A) ((A) & 0x00020000) +#define BIT_12(A) ((A) & 0x00040000) +#define BIT_13(A) ((A) & 0x00080000) +#define BIT_14(A) ((A) & 0x00100000) +#define BIT_15(A) ((A) & 0x00200000) +#define BIT_16(A) ((A) & 0x00400000) +#define BIT_17(A) ((A) & 0x00800000) +#define BIT_18(A) ((A) & 0x01000000) +#define BIT_19(A) ((A) & 0x02000000) +#define BIT_1A(A) ((A) & 0x04000000) +#define BIT_1B(A) ((A) & 0x08000000) +#define BIT_1C(A) ((A) & 0x10000000) +#define BIT_1D(A) ((A) & 0x20000000) +#define BIT_1E(A) ((A) & 0x40000000) +#define BIT_1F(A) ((A) & 0x80000000) + +/* Get the most significant bit for specific sizes */ +#define GET_MSB_8(A) ((A) & 0x80) +#define GET_MSB_9(A) ((A) & 0x100) +#define GET_MSB_16(A) ((A) & 0x8000) +#define GET_MSB_17(A) ((A) & 0x10000) +#define GET_MSB_32(A) ((A) & 0x80000000) +#if M68K_USE_64_BIT +#define GET_MSB_33(A) ((A) & 0x100000000) +#endif /* M68K_USE_64_BIT */ + +/* Isolate nibbles */ +#define LOW_NIBBLE(A) ((A) & 0x0f) +#define HIGH_NIBBLE(A) ((A) & 0xf0) + +/* These are used to isolate 8, 16, and 32 bit sizes */ +#define MASK_OUT_ABOVE_2(A) ((A) & 3) +#define MASK_OUT_ABOVE_8(A) ((A) & 0xff) +#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff) +#define MASK_OUT_BELOW_2(A) ((A) & ~3) +#define MASK_OUT_BELOW_8(A) ((A) & ~0xff) +#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff) + +/* No need to mask if we are 32 bit */ +#if M68K_INT_GT_32BIT || M68K_USE_64_BIT + #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff) + #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff) +#else + #define MASK_OUT_ABOVE_32(A) (A) + #define MASK_OUT_BELOW_32(A) 0 +#endif /* M68K_INT_GT_32BIT || M68K_USE_64_BIT */ + +/* Simulate address lines of 68k family */ +#define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK) + + +/* Shift & Rotate Macros. */ +#define LSL(A, C) ((A) << (C)) +#define LSR(A, C) ((A) >> (C)) + +/* Some > 32-bit optimizations */ +#if M68K_INT_GT_32BIT + /* Shift left and right */ + #define LSR_32(A, C) ((A) >> (C)) + #define LSL_32(A, C) ((A) << (C)) +#else + /* We have to do this because the morons at ANSI decided that shifts + * by >= data size are undefined. + */ + #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0) + #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0) +#endif /* M68K_INT_GT_32BIT */ + +#if M68K_USE_64_BIT + #define LSL_32_64(A, C) ((A) << (C)) + #define LSR_32_64(A, C) ((A) >> (C)) + #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C))) + #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C))) +#endif /* M68K_USE_64_BIT */ + +#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))) +#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C))) +#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))) +#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C))) +#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))) +#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C))) + +#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))) +#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C))) +#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))) +#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C))) +#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))) +#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C))) + + + +/* ------------------------------ CPU Access ------------------------------ */ + +/* Access the CPU registers */ +#define CPU_TYPE m68ki_cpu.cpu_type + +#define REG_DA m68ki_cpu.dar /* easy access to data and address regs */ +#define REG_D m68ki_cpu.dar +#define REG_A (m68ki_cpu.dar+8) +#define REG_PPC m68ki_cpu.ppc +#define REG_PC m68ki_cpu.pc +#define REG_SP_BASE m68ki_cpu.sp +#define REG_USP m68ki_cpu.sp[0] +#define REG_ISP m68ki_cpu.sp[4] +#define REG_MSP m68ki_cpu.sp[6] +#define REG_SP m68ki_cpu.dar[15] +#define REG_VBR m68ki_cpu.vbr +#define REG_SFC m68ki_cpu.sfc +#define REG_DFC m68ki_cpu.dfc +#define REG_CACR m68ki_cpu.cacr +#define REG_CAAR m68ki_cpu.caar +#define REG_IR m68ki_cpu.ir + +#define FLAG_T1 m68ki_cpu.t1_flag +#define FLAG_T0 m68ki_cpu.t0_flag +#define FLAG_S m68ki_cpu.s_flag +#define FLAG_M m68ki_cpu.m_flag +#define FLAG_X m68ki_cpu.x_flag +#define FLAG_N m68ki_cpu.n_flag +#define FLAG_Z m68ki_cpu.not_z_flag +#define FLAG_V m68ki_cpu.v_flag +#define FLAG_C m68ki_cpu.c_flag +#define FLAG_INT_MASK m68ki_cpu.int_mask + +#define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */ +#define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */ +#define CPU_STOPPED m68ki_cpu.stopped +#define CPU_PREF_ADDR m68ki_cpu.pref_addr +#define CPU_PREF_DATA m68ki_cpu.pref_data +#define CPU_ADDRESS_MASK m68ki_cpu.address_mask +#define CPU_SR_MASK m68ki_cpu.sr_mask + +#define CYC_INSTRUCTION m68ki_cpu.cyc_instruction +#define CYC_EXCEPTION m68ki_cpu.cyc_exception +#define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b +#define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w +#define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp +#define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp +#define CYC_SCC_R_FALSE m68ki_cpu.cyc_scc_r_false +#define CYC_MOVEM_W m68ki_cpu.cyc_movem_w +#define CYC_MOVEM_L m68ki_cpu.cyc_movem_l +#define CYC_SHIFT m68ki_cpu.cyc_shift +#define CYC_RESET m68ki_cpu.cyc_reset + + +#define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback +#define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback +#define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback +#define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback +#define CALLBACK_SET_FC m68ki_cpu.set_fc_callback +#define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback + + + +/* ----------------------------- Configuration ---------------------------- */ + +/* These defines are dependant on the configuration defines in m68kconf.h */ + +/* Disable certain comparisons if we're not using all CPU types */ +#if M68K_EMULATE_020 + #define CPU_TYPE_IS_020_PLUS(A) ((A) & CPU_TYPE_020) + #define CPU_TYPE_IS_020_LESS(A) 1 +#else + #define CPU_TYPE_IS_020_PLUS(A) 0 + #define CPU_TYPE_IS_020_LESS(A) 1 +#endif + +#if M68K_EMULATE_EC020 + #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020)) + #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010 | CPU_TYPE_EC020)) +#else + #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A) + #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A) +#endif + +#if M68K_EMULATE_010 + #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010) + #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020)) + #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010)) +#else + #define CPU_TYPE_IS_010(A) 0 + #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A) + #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A) +#endif + +#if M68K_EMULATE_020 || M68K_EMULATE_EC020 + #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020)) +#else + #define CPU_TYPE_IS_020_VARIANT(A) 0 +#endif + +#if M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010 + #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000) +#else + #define CPU_TYPE_IS_000(A) 1 +#endif + + +#if !M68K_SEPARATE_READS +#define m68k_read_immediate_16(A) m68ki_read_program_16(A) +#define m68k_read_immediate_32(A) m68ki_read_program_32(A) + +#define m68k_read_pcrelative_8(A) m68ki_read_program_8(A) +#define m68k_read_pcrelative_16(A) m68ki_read_program_16(A) +#define m68k_read_pcrelative_32(A) m68ki_read_program_32(A) +#endif /* M68K_SEPARATE_READS */ + + +/* Enable or disable callback functions */ +#if M68K_EMULATE_INT_ACK + #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER + #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A) + #else + #define m68ki_int_ack(A) CALLBACK_INT_ACK(A) + #endif +#else + /* Default action is to used autovector mode, which is most common */ + #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR +#endif /* M68K_EMULATE_INT_ACK */ + +#if M68K_EMULATE_BKPT_ACK + #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER + #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A) + #else + #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A) + #endif +#else + #define m68ki_bkpt_ack(A) +#endif /* M68K_EMULATE_BKPT_ACK */ + +#if M68K_EMULATE_RESET + #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER + #define m68ki_output_reset() M68K_RESET_CALLBACK() + #else + #define m68ki_output_reset() CALLBACK_RESET_INSTR() + #endif +#else + #define m68ki_output_reset() +#endif /* M68K_EMULATE_RESET */ + +#if M68K_INSTRUCTION_HOOK + #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER + #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK() + #else + #define m68ki_instr_hook() CALLBACK_INSTR_HOOK() + #endif +#else + #define m68ki_instr_hook() +#endif /* M68K_INSTRUCTION_HOOK */ + +#if M68K_MONITOR_PC + #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER + #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A)) + #else + #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A)) + #endif +#else + #define m68ki_pc_changed(A) +#endif /* M68K_MONITOR_PC */ + + +/* Enable or disable function code emulation */ +#if M68K_EMULATE_FC + #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER + #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A) + #else + #define m68ki_set_fc(A) CALLBACK_SET_FC(A) + #endif + #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA + #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM + #define m68ki_get_address_space() m68ki_address_space +#else + #define m68ki_set_fc(A) + #define m68ki_use_data_space() + #define m68ki_use_program_space() + #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA +#endif /* M68K_EMULATE_FC */ + + +/* Enable or disable trace emulation */ +#if M68K_EMULATE_TRACE + /* Initiates trace checking before each instruction (t1) */ + #define m68ki_trace_t1() m68ki_tracing = FLAG_T1 + /* adds t0 to trace checking if we encounter change of flow */ + #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0 + /* Clear all tracing */ + #define m68ki_clear_trace() m68ki_tracing = 0 + /* Cause a trace exception if we are tracing */ + #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace() +#else + #define m68ki_trace_t1() + #define m68ki_trace_t0() + #define m68ki_clear_trace() + #define m68ki_exception_if_trace() +#endif /* M68K_EMULATE_TRACE */ + + + +/* Address error */ +#if M68K_EMULATE_ADDRESS_ERROR + extern jmp_buf m68ki_address_error_trap; + #define m68ki_set_address_error_trap() if(setjmp(m68ki_address_error_trap)) m68ki_exception_address_error(); + #define m68ki_check_address_error(A) if((A)&1) longjmp(m68ki_address_error_jump, 1); +#else + #define m68ki_set_address_error_trap() + #define m68ki_check_address_error(A) +#endif /* M68K_ADDRESS_ERROR */ + +/* Logging */ +#if M68K_LOG_ENABLE + #include + extern FILE* M68K_LOG_FILEHANDLE + extern char* m68ki_cpu_names[]; + + #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A + #if M68K_LOG_1010_1111 + #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A + #else + #define M68K_DO_LOG_EMU(A) + #endif +#else + #define M68K_DO_LOG(A) + #define M68K_DO_LOG_EMU(A) +#endif + + + +/* -------------------------- EA / Operand Access ------------------------- */ + +/* + * The general instruction format follows this pattern: + * .... XXX. .... .YYY + * where XXX is register X and YYY is register Y + */ +/* Data Register Isolation */ +#define DX (REG_D[(REG_IR >> 9) & 7]) +#define DY (REG_D[REG_IR & 7]) +/* Address Register Isolation */ +#define AX (REG_A[(REG_IR >> 9) & 7]) +#define AY (REG_A[REG_IR & 7]) + + +/* Effective Address Calculations */ +#define EA_AY_AI_8() AY /* address register indirect */ +#define EA_AY_AI_16() EA_AY_AI_8() +#define EA_AY_AI_32() EA_AY_AI_8() +#define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */ +#define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */ +#define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */ +#define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */ +#define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */ +#define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */ +#define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */ +#define EA_AY_DI_16() EA_AY_DI_8() +#define EA_AY_DI_32() EA_AY_DI_8() +#define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */ +#define EA_AY_IX_16() EA_AY_IX_8() +#define EA_AY_IX_32() EA_AY_IX_8() + +#define EA_AX_AI_8() AX +#define EA_AX_AI_16() EA_AX_AI_8() +#define EA_AX_AI_32() EA_AX_AI_8() +#define EA_AX_PI_8() (AX++) +#define EA_AX_PI_16() ((AX+=2)-2) +#define EA_AX_PI_32() ((AX+=4)-4) +#define EA_AX_PD_8() (--AX) +#define EA_AX_PD_16() (AX-=2) +#define EA_AX_PD_32() (AX-=4) +#define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16())) +#define EA_AX_DI_16() EA_AX_DI_8() +#define EA_AX_DI_32() EA_AX_DI_8() +#define EA_AX_IX_8() m68ki_get_ea_ix(AX) +#define EA_AX_IX_16() EA_AX_IX_8() +#define EA_AX_IX_32() EA_AX_IX_8() + +#define EA_A7_PI_8() ((REG_A[7]+=2)-2) +#define EA_A7_PD_8() (REG_A[7]-=2) + +#define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */ +#define EA_AW_16() EA_AW_8() +#define EA_AW_32() EA_AW_8() +#define EA_AL_8() m68ki_read_imm_32() /* absolute long */ +#define EA_AL_16() EA_AL_8() +#define EA_AL_32() EA_AL_8() +#define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */ +#define EA_PCDI_16() EA_PCDI_8() +#define EA_PCDI_32() EA_PCDI_8() +#define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */ +#define EA_PCIX_16() EA_PCIX_8() +#define EA_PCIX_32() EA_PCIX_8() + + +#define OPER_I_8() m68ki_read_imm_8() +#define OPER_I_16() m68ki_read_imm_16() +#define OPER_I_32() m68ki_read_imm_32() + + + +/* --------------------------- Status Register ---------------------------- */ + +/* Flag Calculation Macros */ +#define CFLAG_8(A) (A) +#define CFLAG_16(A) ((A)>>8) + +#if M68K_INT_GT_32_BIT + #define CFLAG_ADD_32(S, D, R) ((R)>>24) + #define CFLAG_SUB_32(S, D, R) ((R)>>24) +#else + #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23) + #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23) +#endif /* M68K_INT_GT_32_BIT */ + +#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R)) +#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8) +#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24) + +#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D)) +#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8) +#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24) + +#define NFLAG_8(A) (A) +#define NFLAG_16(A) ((A)>>8) +#define NFLAG_32(A) ((A)>>24) +#define NFLAG_64(A) ((A)>>56) + +#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A) +#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A) +#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A) + + +/* Flag values */ +#define NFLAG_SET 0x80 +#define NFLAG_CLEAR 0 +#define CFLAG_SET 0x100 +#define CFLAG_CLEAR 0 +#define XFLAG_SET 0x100 +#define XFLAG_CLEAR 0 +#define VFLAG_SET 0x80 +#define VFLAG_CLEAR 0 +#define ZFLAG_SET 0 +#define ZFLAG_CLEAR 0xffffffff + +#define SFLAG_SET 4 +#define SFLAG_CLEAR 0 +#define MFLAG_SET 2 +#define MFLAG_CLEAR 0 + +/* Turn flag values into 1 or 0 */ +#define XFLAG_AS_1() ((FLAG_X>>8)&1) +#define NFLAG_AS_1() ((FLAG_N>>7)&1) +#define VFLAG_AS_1() ((FLAG_V>>7)&1) +#define ZFLAG_AS_1() (!FLAG_Z) +#define CFLAG_AS_1() ((FLAG_C>>8)&1) + + +/* Conditions */ +#define COND_CS() (FLAG_C&0x100) +#define COND_CC() (!COND_CS()) +#define COND_VS() (FLAG_V&0x80) +#define COND_VC() (!COND_VS()) +#define COND_NE() FLAG_Z +#define COND_EQ() (!COND_NE()) +#define COND_MI() (FLAG_N&0x80) +#define COND_PL() (!COND_MI()) +#define COND_LT() ((FLAG_N^FLAG_V)&0x80) +#define COND_GE() (!COND_LT()) +#define COND_HI() (COND_CC() && COND_NE()) +#define COND_LS() (COND_CS() || COND_EQ()) +#define COND_GT() (COND_GE() && COND_NE()) +#define COND_LE() (COND_LT() || COND_EQ()) + +/* Reversed conditions */ +#define COND_NOT_CS() COND_CC() +#define COND_NOT_CC() COND_CS() +#define COND_NOT_VS() COND_VC() +#define COND_NOT_VC() COND_VS() +#define COND_NOT_NE() COND_EQ() +#define COND_NOT_EQ() COND_NE() +#define COND_NOT_MI() COND_PL() +#define COND_NOT_PL() COND_MI() +#define COND_NOT_LT() COND_GE() +#define COND_NOT_GE() COND_LT() +#define COND_NOT_HI() COND_LS() +#define COND_NOT_LS() COND_HI() +#define COND_NOT_GT() COND_LE() +#define COND_NOT_LE() COND_GT() + +/* Not real conditions, but here for convenience */ +#define COND_XS() (FLAG_X&0x100) +#define COND_XC() (!COND_XS) + + +/* Get the condition code register */ +#define m68ki_get_ccr() ((COND_XS() >> 4) | \ + (COND_MI() >> 4) | \ + (COND_EQ() << 2) | \ + (COND_VS() >> 6) | \ + (COND_CS() >> 8)) + +/* Get the status register */ +#define m68ki_get_sr() ( FLAG_T1 | \ + FLAG_T0 | \ + (FLAG_S << 11) | \ + (FLAG_M << 11) | \ + FLAG_INT_MASK | \ + m68ki_get_ccr()) + + + +/* ---------------------------- Cycle Counting ---------------------------- */ + +#define ADD_CYCLES(A) m68ki_remaining_cycles += (A) +#define USE_CYCLES(A) m68ki_remaining_cycles -= (A) +#define SET_CYCLES(A) m68ki_remaining_cycles = A +#define GET_CYCLES() m68ki_remaining_cycles +#define USE_ALL_CYCLES() m68ki_remaining_cycles = 0 + + + +/* ----------------------------- Read / Write ----------------------------- */ + +/* Read from the current address space */ +#define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space()) +#define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space()) +#define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space()) + +/* Write to the current data space */ +#define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V) +#define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V) +#define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V) + +/* map read immediate 8 to read immediate 16 */ +#define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16()) + +/* Map PC-relative reads */ +#define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A) +#define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A) +#define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A) + +/* Read from the program space */ +#define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) +#define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) +#define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) + +/* Read from the data space */ +#define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) + + + +/* ======================================================================== */ +/* =============================== PROTOTYPES ============================= */ +/* ======================================================================== */ + +typedef struct +{ + uint cpu_type; /* CPU Type: 68000, 68010, 68EC020, or 68020 */ + uint dar[16]; /* Data and Address Registers */ + uint ppc; /* Previous program counter */ + uint pc; /* Program Counter */ + uint sp[7]; /* User, Interrupt, and Master Stack Pointers */ + uint vbr; /* Vector Base Register (m68010+) */ + uint sfc; /* Source Function Code Register (m68010+) */ + uint dfc; /* Destination Function Code Register (m68010+) */ + uint cacr; /* Cache Control Register (m68020, unemulated) */ + uint caar; /* Cache Address Register (m68020, unemulated) */ + uint ir; /* Instruction Register */ + uint t1_flag; /* Trace 1 */ + uint t0_flag; /* Trace 0 */ + uint s_flag; /* Supervisor */ + uint m_flag; /* Master/Interrupt state */ + uint x_flag; /* Extend */ + uint n_flag; /* Negative */ + uint not_z_flag; /* Zero, inverted for speedups */ + uint v_flag; /* Overflow */ + uint c_flag; /* Carry */ + uint int_mask; /* I0-I2 */ + uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ + uint int_cycles; /* ASG: extra cycles from generated interrupts */ + uint stopped; /* Stopped state */ + uint pref_addr; /* Last prefetch address */ + uint pref_data; /* Data in the prefetch queue */ + uint address_mask; /* Available address pins */ + uint sr_mask; /* Implemented status register bits */ + + /* Clocks required for instructions / exceptions */ + uint cyc_bcc_notake_b; + uint cyc_bcc_notake_w; + uint cyc_dbcc_f_noexp; + uint cyc_dbcc_f_exp; + uint cyc_scc_r_false; + uint cyc_movem_w; + uint cyc_movem_l; + uint cyc_shift; + uint cyc_reset; + uint8* cyc_instruction; + uint8* cyc_exception; + + /* Callbacks to host */ + int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */ + void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */ + void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */ + void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */ + void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */ + void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */ + +} m68ki_cpu_core; + + +extern m68ki_cpu_core m68ki_cpu; +extern sint m68ki_remaining_cycles; +extern uint m68ki_tracing; +extern uint8 m68ki_shift_8_table[]; +extern uint16 m68ki_shift_16_table[]; +extern uint m68ki_shift_32_table[]; +extern uint8 m68ki_exception_cycle_table[][256]; +extern uint m68ki_address_space; +extern uint8 m68ki_ea_idx_cycle_table[]; + + +/* Read data immediately after the program counter */ +INLINE uint m68ki_read_imm_16(void); +INLINE uint m68ki_read_imm_32(void); + +/* Read data with specific function code */ +INLINE uint m68ki_read_8_fc (uint address, uint fc); +INLINE uint m68ki_read_16_fc (uint address, uint fc); +INLINE uint m68ki_read_32_fc (uint address, uint fc); + +/* Write data with specific function code */ +INLINE void m68ki_write_8_fc (uint address, uint fc, uint value); +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value); +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value); + +/* Indexed and PC-relative ea fetching */ +INLINE uint m68ki_get_ea_pcdi(void); +INLINE uint m68ki_get_ea_pcix(void); +INLINE uint m68ki_get_ea_ix(uint An); + +/* Operand fetching */ +INLINE uint OPER_AY_AI_8(void); +INLINE uint OPER_AY_AI_16(void); +INLINE uint OPER_AY_AI_32(void); +INLINE uint OPER_AY_PI_8(void); +INLINE uint OPER_AY_PI_16(void); +INLINE uint OPER_AY_PI_32(void); +INLINE uint OPER_AY_PD_8(void); +INLINE uint OPER_AY_PD_16(void); +INLINE uint OPER_AY_PD_32(void); +INLINE uint OPER_AY_DI_8(void); +INLINE uint OPER_AY_DI_16(void); +INLINE uint OPER_AY_DI_32(void); +INLINE uint OPER_AY_IX_8(void); +INLINE uint OPER_AY_IX_16(void); +INLINE uint OPER_AY_IX_32(void); + +INLINE uint OPER_AX_AI_8(void); +INLINE uint OPER_AX_AI_16(void); +INLINE uint OPER_AX_AI_32(void); +INLINE uint OPER_AX_PI_8(void); +INLINE uint OPER_AX_PI_16(void); +INLINE uint OPER_AX_PI_32(void); +INLINE uint OPER_AX_PD_8(void); +INLINE uint OPER_AX_PD_16(void); +INLINE uint OPER_AX_PD_32(void); +INLINE uint OPER_AX_DI_8(void); +INLINE uint OPER_AX_DI_16(void); +INLINE uint OPER_AX_DI_32(void); +INLINE uint OPER_AX_IX_8(void); +INLINE uint OPER_AX_IX_16(void); +INLINE uint OPER_AX_IX_32(void); + +INLINE uint OPER_A7_PI_8(void); +INLINE uint OPER_A7_PD_8(void); + +INLINE uint OPER_AW_8(void); +INLINE uint OPER_AW_16(void); +INLINE uint OPER_AW_32(void); +INLINE uint OPER_AL_8(void); +INLINE uint OPER_AL_16(void); +INLINE uint OPER_AL_32(void); +INLINE uint OPER_PCDI_8(void); +INLINE uint OPER_PCDI_16(void); +INLINE uint OPER_PCDI_32(void); +INLINE uint OPER_PCIX_8(void); +INLINE uint OPER_PCIX_16(void); +INLINE uint OPER_PCIX_32(void); + +/* Stack operations */ +INLINE void m68ki_push_16(uint value); +INLINE void m68ki_push_32(uint value); +INLINE uint m68ki_pull_16(void); +INLINE uint m68ki_pull_32(void); + +/* Program flow operations */ +INLINE void m68ki_jump(uint new_pc); +INLINE void m68ki_jump_vector(uint vector); +INLINE void m68ki_branch_8(uint offset); +INLINE void m68ki_branch_16(uint offset); +INLINE void m68ki_branch_32(uint offset); + +/* Status register operations. */ +INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */ +INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */ +INLINE void m68ki_set_ccr(uint value); /* set the condition code register */ +INLINE void m68ki_set_sr(uint value); /* set the status register */ +INLINE void m68ki_set_sr_noint(uint value); /* set the status register */ + +/* Exception processing */ +INLINE uint m68ki_init_exception(void); /* Initial exception processing */ + +INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */ +INLINE void m68ki_stack_frame_buserr(uint pc, uint sr, uint address, uint write, uint instruction, uint fc); + +INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector); +INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector); +INLINE void m68ki_stack_frame_0010(uint sr, uint vector); +#if 0 +INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector); +INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc); +INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc); +#endif + +INLINE void m68ki_exception_trap(uint vector); +INLINE void m68ki_exception_trapN(uint vector); +INLINE void m68ki_exception_trace(void); +INLINE void m68ki_exception_privilege_violation(void); +INLINE void m68ki_exception_1010(void); +INLINE void m68ki_exception_1111(void); +INLINE void m68ki_exception_illegal(void); +INLINE void m68ki_exception_format_error(void); +INLINE void m68ki_exception_address_error(void); +INLINE void m68ki_exception_interrupt(uint int_level); +INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */ + +/* quick disassembly (used for logging) */ +char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type); + + +/* ======================================================================== */ +/* =========================== UTILITY FUNCTIONS ========================== */ +/* ======================================================================== */ + + +/* ---------------------------- Read Immediate ---------------------------- */ + +/* Handles all immediate reads, does address error check, function code setting, + * and prefetching if they are enabled in m68kconf.h + */ +INLINE uint m68ki_read_imm_16(void) +{ + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */ +#if M68K_EMULATE_PREFETCH + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR)); + } + REG_PC += 2; + return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3)); +#else + REG_PC += 2; + return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2)); +#endif /* M68K_EMULATE_PREFETCH */ +} +INLINE uint m68ki_read_imm_32(void) +{ +#if M68K_EMULATE_PREFETCH + uint temp_val; + + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */ + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR)); + } + temp_val = CPU_PREF_DATA; + REG_PC += 2; + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR)); + temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16)); + } + REG_PC += 2; + + return temp_val; +#else + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */ + REG_PC += 4; + return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4)); +#endif /* M68K_EMULATE_PREFETCH */ +} + + + +/* ------------------------- Top level read/write ------------------------- */ + +/* Handles all memory accesses (except for immediate reads if they are + * configured to use separate functions in m68kconf.h). + * All memory accesses must go through these top level functions. + * These functions will also check for address error and set the function + * code if they are enabled in m68kconf.h. + */ +INLINE uint m68ki_read_8_fc(uint address, uint fc) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + return m68k_read_memory_8(ADDRESS_68K(address)); +} +INLINE uint m68ki_read_16_fc(uint address, uint fc) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */ + return m68k_read_memory_16(ADDRESS_68K(address)); +} +INLINE uint m68ki_read_32_fc(uint address, uint fc) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */ + return m68k_read_memory_32(ADDRESS_68K(address)); +} + +INLINE void m68ki_write_8_fc(uint address, uint fc, uint value) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + m68k_write_memory_8(ADDRESS_68K(address), value); +} +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */ + m68k_write_memory_16(ADDRESS_68K(address), value); +} +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value) +{ + m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */ + m68k_write_memory_32(ADDRESS_68K(address), value); +} + + + +/* --------------------- Effective Address Calculation -------------------- */ + +/* The program counter relative addressing modes cause operands to be + * retrieved from program space, not data space. + */ +INLINE uint m68ki_get_ea_pcdi(void) +{ + uint old_pc = REG_PC; + m68ki_use_program_space(); /* auto-disable */ + return old_pc + MAKE_INT_16(m68ki_read_imm_16()); +} + + +INLINE uint m68ki_get_ea_pcix(void) +{ + m68ki_use_program_space(); /* auto-disable */ + return m68ki_get_ea_ix(REG_PC); +} + +/* Indexed addressing modes are encoded as follows: + * + * Base instruction format: + * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0 + * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An) + * + * Base instruction format for destination EA in move instructions: + * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0 + * x x x x | BASE REG | 1 1 0 | X X X X X X (An) + * + * Brief extension format: + * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0 + * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT + * + * Full extension format: + * F E D C B A 9 8 7 6 5 4 3 2 1 0 + * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS + * BASE DISPLACEMENT (0, 16, 32 bit) (bd) + * OUTER DISPLACEMENT (0, 16, 32 bit) (od) + * + * D/A: 0 = Dn, 1 = An (Xn) + * W/L: 0 = W (sign extend), 1 = L (.SIZE) + * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE) + * BS: 0=add base reg, 1=suppress base reg (An suppressed) + * IS: 0=add index, 1=suppress index (Xn suppressed) + * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd) + * + * IS I/IS Operation + * 0 000 No Memory Indirect + * 0 001 indir prex with null outer + * 0 010 indir prex with word outer + * 0 011 indir prex with long outer + * 0 100 reserved + * 0 101 indir postx with null outer + * 0 110 indir postx with word outer + * 0 111 indir postx with long outer + * 1 000 no memory indirect + * 1 001 mem indir with null outer + * 1 010 mem indir with word outer + * 1 011 mem indir with long outer + * 1 100-111 reserved + */ +INLINE uint m68ki_get_ea_ix(uint An) +{ + /* An = base register */ + uint extension = m68ki_read_imm_16(); + uint Xn = 0; /* Index register */ + uint bd = 0; /* Base Displacement */ + uint od = 0; /* Outer Displacement */ + + if(CPU_TYPE_IS_010_LESS(CPU_TYPE)) + { + /* Calculate index */ + Xn = REG_DA[extension>>12]; /* Xn */ + if(!BIT_B(extension)) /* W/L */ + Xn = MAKE_INT_16(Xn); + + /* Add base register and displacement and return */ + return An + Xn + MAKE_INT_8(extension); + } + + /* Brief extension format */ + if(!BIT_8(extension)) + { + /* Calculate index */ + Xn = REG_DA[extension>>12]; /* Xn */ + if(!BIT_B(extension)) /* W/L */ + Xn = MAKE_INT_16(Xn); + /* Add scale if proper CPU type */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + Xn <<= (extension>>9) & 3; /* SCALE */ + + /* Add base register and displacement and return */ + return An + Xn + MAKE_INT_8(extension); + } + + /* Full extension format */ + + USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]); + + /* Check if base register is present */ + if(BIT_7(extension)) /* BS */ + An = 0; /* An */ + + /* Check if index is present */ + if(!BIT_6(extension)) /* IS */ + { + Xn = REG_DA[extension>>12]; /* Xn */ + if(!BIT_B(extension)) /* W/L */ + Xn = MAKE_INT_16(Xn); + Xn <<= (extension>>9) & 3; /* SCALE */ + } + + /* Check if base displacement is present */ + if(BIT_5(extension)) /* BD SIZE */ + bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); + + /* If no indirect action, we are done */ + if(!(extension&7)) /* No Memory Indirect */ + return An + bd + Xn; + + /* Check if outer displacement is present */ + if(BIT_1(extension)) /* I/IS: od */ + od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); + + /* Postindex */ + if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */ + return m68ki_read_32(An + bd) + Xn + od; + + /* Preindex */ + return m68ki_read_32(An + bd + Xn) + od; +} + + +/* Fetch operands */ +INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);} + +INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);} + +INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); } + +INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);} +INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); } +INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);} +INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);} +INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); } +INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);} +INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);} + + + +/* ---------------------------- Stack Functions --------------------------- */ + +/* Push/pull data from the stack */ +INLINE void m68ki_push_16(uint value) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2); + m68ki_write_16(REG_SP, value); +} + +INLINE void m68ki_push_32(uint value) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4); + m68ki_write_32(REG_SP, value); +} + +INLINE uint m68ki_pull_16(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2); + return m68ki_read_16(REG_SP-2); +} + +INLINE uint m68ki_pull_32(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4); + return m68ki_read_32(REG_SP-4); +} + + +/* Increment/decrement the stack as if doing a push/pull but + * don't do any memory access. + */ +INLINE void m68ki_fake_push_16(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2); +} + +INLINE void m68ki_fake_push_32(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4); +} + +INLINE void m68ki_fake_pull_16(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2); +} + +INLINE void m68ki_fake_pull_32(void) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4); +} + + +/* ----------------------------- Program Flow ----------------------------- */ + +/* Jump to a new program location or vector. + * These functions will also call the pc_changed callback if it was enabled + * in m68kconf.h. + */ +INLINE void m68ki_jump(uint new_pc) +{ + REG_PC = new_pc; + m68ki_pc_changed(REG_PC); +} + +INLINE void m68ki_jump_vector(uint vector) +{ + REG_PC = (vector<<2) + REG_VBR; + REG_PC = m68ki_read_data_32(REG_PC); + m68ki_pc_changed(REG_PC); +} + + +/* Branch to a new memory location. + * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h. + * So far I've found no problems with not calling pc_changed for 8 or 16 + * bit branches. + */ +INLINE void m68ki_branch_8(uint offset) +{ + REG_PC += MAKE_INT_8(offset); +} + +INLINE void m68ki_branch_16(uint offset) +{ + REG_PC += MAKE_INT_16(offset); +} + +INLINE void m68ki_branch_32(uint offset) +{ + REG_PC += offset; + m68ki_pc_changed(REG_PC); +} + + + +/* ---------------------------- Status Register --------------------------- */ + +/* Set the S flag and change the active stack pointer. + * Note that value MUST be 4 or 0. + */ +INLINE void m68ki_set_s_flag(uint value) +{ + /* Backup the old stack pointer */ + REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP; + /* Set the S flag */ + FLAG_S = value; + /* Set the new stack pointer */ + REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)]; +} + +/* Set the S and M flags and change the active stack pointer. + * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M). + */ +INLINE void m68ki_set_sm_flag(uint value) +{ + /* Backup the old stack pointer */ + REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP; + /* Set the S and M flags */ + FLAG_S = value & SFLAG_SET; + FLAG_M = value & MFLAG_SET; + /* Set the new stack pointer */ + REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)]; +} + + +/* Set the condition code register */ +INLINE void m68ki_set_ccr(uint value) +{ + FLAG_X = BIT_4(value) << 4; + FLAG_N = BIT_3(value) << 4; + FLAG_Z = !BIT_2(value); + FLAG_V = BIT_1(value) << 6; + FLAG_C = BIT_0(value) << 8; +} + +/* Set the status register but don't check for interrupts */ +INLINE void m68ki_set_sr_noint(uint value) +{ + /* Mask out the "unimplemented" bits */ + value &= CPU_SR_MASK; + + /* Now set the status register */ + FLAG_T1 = BIT_F(value); + FLAG_T0 = BIT_E(value); + FLAG_INT_MASK = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_sm_flag((value >> 11) & 6); +} + +/* Set the status register and check for interrupts */ +INLINE void m68ki_set_sr(uint value) +{ + m68ki_set_sr_noint(value); + m68ki_check_interrupts(); +} + + +/* ------------------------- Exception Processing ------------------------- */ + +/* Initiate exception processing */ +INLINE uint m68ki_init_exception(void) +{ + /* Save the old status register */ + uint sr = m68ki_get_sr(); + + /* Turn off trace flag, clear pending traces */ + FLAG_T1 = FLAG_T0 = 0; + m68ki_clear_trace(); + /* Enter supervisor mode */ + m68ki_set_s_flag(SFLAG_SET); + + return sr; +} + +/* 3 word stack frame (68000 only) */ +INLINE void m68ki_stack_frame_3word(uint pc, uint sr) +{ + m68ki_push_32(pc); + m68ki_push_16(sr); +} + +/* Format 0 stack frame. + * This is the standard stack frame for 68010+. + */ +INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector) +{ + /* Stack a 3-word frame if we are 68000 */ + if(CPU_TYPE == CPU_TYPE_000) + { + m68ki_stack_frame_3word(pc, sr); + return; + } + m68ki_push_16(vector<<2); + m68ki_push_32(pc); + m68ki_push_16(sr); +} + +/* Format 1 stack frame (68020). + * For 68020, this is the 4 word throwaway frame. + */ +INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector) +{ + m68ki_push_16(0x1000 | (vector<<2)); + m68ki_push_32(pc); + m68ki_push_16(sr); +} + +/* Format 2 stack frame. + * This is used only by 68020 for trap exceptions. + */ +INLINE void m68ki_stack_frame_0010(uint sr, uint vector) +{ + m68ki_push_32(REG_PPC); + m68ki_push_16(0x2000 | (vector<<2)); + m68ki_push_32(REG_PC); + m68ki_push_16(sr); +} + + +/* Bus error stack frame (68000 only). + */ +INLINE void m68ki_stack_frame_buserr(uint pc, uint sr, uint address, uint write, uint instruction, uint fc) +{ + m68ki_push_32(pc); + m68ki_push_16(sr); + m68ki_push_16(REG_IR); + m68ki_push_32(address); /* access address */ + /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC + * R/W 0 = write, 1 = read + * I/N 0 = instruction, 1 = not + * FC 3-bit function code + */ + m68ki_push_16(((!write)<<4) | ((!instruction)<<3) | fc); +} + +#if 0 +/* Format 8 stack frame (68010). + * 68010 only. This is the 29 word bus/address error frame. + */ +void m68ki_stack_frame_1000(uint pc, uint sr, uint vector) +{ + /* VERSION + * NUMBER + * INTERNAL INFORMATION, 16 WORDS + */ + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + + /* INSTRUCTION INPUT BUFFER */ + m68ki_push_16(0); + + /* UNUSED, RESERVED (not written) */ + m68ki_fake_push_16(); + + /* DATA INPUT BUFFER */ + m68ki_push_16(0); + + /* UNUSED, RESERVED (not written) */ + m68ki_fake_push_16(); + + /* DATA OUTPUT BUFFER */ + m68ki_push_16(0); + + /* UNUSED, RESERVED (not written) */ + m68ki_fake_push_16(); + + /* FAULT ADDRESS */ + m68ki_push_32(0); + + /* SPECIAL STATUS WORD */ + m68ki_push_16(0); + + /* 1000, VECTOR OFFSET */ + m68ki_push_16(0x8000 | (vector<<2)); + + /* PROGRAM COUNTER */ + m68ki_push_32(pc); + + /* STATUS REGISTER */ + m68ki_push_16(sr); +} + +/* Format A stack frame (short bus fault). + * This is used only by 68020 for bus fault and address error + * if the error happens at an instruction boundary. + * PC stacked is address of next instruction. + */ +void m68ki_stack_frame_1010(uint sr, uint vector, uint pc) +{ + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* DATA OUTPUT BUFFER (2 words) */ + m68ki_push_32(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* DATA CYCLE FAULT ADDRESS (2 words) */ + m68ki_push_32(0); + + /* INSTRUCTION PIPE STAGE B */ + m68ki_push_16(0); + + /* INSTRUCTION PIPE STAGE C */ + m68ki_push_16(0); + + /* SPECIAL STATUS REGISTER */ + m68ki_push_16(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* 1010, VECTOR OFFSET */ + m68ki_push_16(0xa000 | (vector<<2)); + + /* PROGRAM COUNTER */ + m68ki_push_32(pc); + + /* STATUS REGISTER */ + m68ki_push_16(sr); +} + +/* Format B stack frame (long bus fault). + * This is used only by 68020 for bus fault and address error + * if the error happens during instruction execution. + * PC stacked is address of instruction in progress. + */ +void m68ki_stack_frame_1011(uint sr, uint vector, uint pc) +{ + /* INTERNAL REGISTERS (18 words) */ + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + + /* VERSION# (4 bits), INTERNAL INFORMATION */ + m68ki_push_16(0); + + /* INTERNAL REGISTERS (3 words) */ + m68ki_push_32(0); + m68ki_push_16(0); + + /* DATA INTPUT BUFFER (2 words) */ + m68ki_push_32(0); + + /* INTERNAL REGISTERS (2 words) */ + m68ki_push_32(0); + + /* STAGE B ADDRESS (2 words) */ + m68ki_push_32(0); + + /* INTERNAL REGISTER (4 words) */ + m68ki_push_32(0); + m68ki_push_32(0); + + /* DATA OUTPUT BUFFER (2 words) */ + m68ki_push_32(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* DATA CYCLE FAULT ADDRESS (2 words) */ + m68ki_push_32(0); + + /* INSTRUCTION PIPE STAGE B */ + m68ki_push_16(0); + + /* INSTRUCTION PIPE STAGE C */ + m68ki_push_16(0); + + /* SPECIAL STATUS REGISTER */ + m68ki_push_16(0); + + /* INTERNAL REGISTER */ + m68ki_push_16(0); + + /* 1011, VECTOR OFFSET */ + m68ki_push_16(0xb000 | (vector<<2)); + + /* PROGRAM COUNTER */ + m68ki_push_32(pc); + + /* STATUS REGISTER */ + m68ki_push_16(sr); +} +#endif + +/* Used for Group 2 exceptions. + * These stack a type 2 frame on the 020. + */ +INLINE void m68ki_exception_trap(uint vector) +{ + uint sr = m68ki_init_exception(); + + if(CPU_TYPE_IS_010_LESS(CPU_TYPE)) + m68ki_stack_frame_0000(REG_PC, sr, vector); + else + m68ki_stack_frame_0010(sr, vector); + + m68ki_jump_vector(vector); + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[vector]); +} + +/* Trap#n stacks a 0 frame but behaves like group2 otherwise */ +INLINE void m68ki_exception_trapN(uint vector) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC, sr, vector); + m68ki_jump_vector(vector); + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[vector]); +} + +/* Exception for trace mode */ +INLINE void m68ki_exception_trace(void) +{ + uint sr = m68ki_init_exception(); + + if(CPU_TYPE_IS_010_LESS(CPU_TYPE)) + m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE); + else + m68ki_stack_frame_0010(sr, EXCEPTION_TRACE); + + m68ki_jump_vector(EXCEPTION_TRACE); + + /* Trace nullifies a STOP instruction */ + CPU_STOPPED &= ~STOP_LEVEL_STOP; + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]); +} + +/* Exception for privilege violation */ +INLINE void m68ki_exception_privilege_violation(void) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_PRIVILEGE_VIOLATION); + m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for A-Line instructions */ +INLINE void m68ki_exception_1010(void) +{ + uint sr; +#if M68K_LOG_1010_1111 == OPT_ON + M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR, + m68ki_disassemble_quick(ADDRESS_68K(REG_PPC)))); +#endif + + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC-2, sr, EXCEPTION_1010); + m68ki_jump_vector(EXCEPTION_1010); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for F-Line instructions */ +INLINE void m68ki_exception_1111(void) +{ + uint sr; + +#if M68K_LOG_1010_1111 == OPT_ON + M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR, + m68ki_disassemble_quick(ADDRESS_68K(REG_PPC)))); +#endif + + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC-2, sr, EXCEPTION_1111); + m68ki_jump_vector(EXCEPTION_1111); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for illegal instructions */ +INLINE void m68ki_exception_illegal(void) +{ + uint sr; + + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR, + m68ki_disassemble_quick(ADDRESS_68K(REG_PPC)))); + + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_ILLEGAL_INSTRUCTION_M68K); + m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION_M68K); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION_M68K] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for format errror in RTE */ +INLINE void m68ki_exception_format_error(void) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR); + m68ki_jump_vector(EXCEPTION_FORMAT_ERROR); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for address error */ +INLINE void m68ki_exception_address_error(void) +{ + /* Not emulated yet */ +} + + +/* Service an interrupt request and start exception processing */ +void m68ki_exception_interrupt(uint int_level) +{ + uint vector; + uint sr; + uint new_pc; + + /* Turn off the stopped state */ + CPU_STOPPED &= ~STOP_LEVEL_STOP; + + /* If we are halted, don't do anything */ + if(CPU_STOPPED) + return; + + /* Acknowledge the interrupt */ + vector = m68ki_int_ack(int_level); + + /* Get the interrupt vector */ + if(vector == M68K_INT_ACK_AUTOVECTOR) + /* Use the autovectors. This is the most commonly used implementation */ + vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level; + else if(vector == M68K_INT_ACK_SPURIOUS) + /* Called if no devices respond to the interrupt acknowledge */ + vector = EXCEPTION_SPURIOUS_INTERRUPT; + else if(vector > 255) + { + M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector)); + return; + } + + /* Start exception processing */ + sr = m68ki_init_exception(); + + /* Set the interrupt mask to the level of the one being serviced */ + FLAG_INT_MASK = int_level<<8; + + /* Get the new PC */ + new_pc = m68ki_read_data_32((vector<<2) + REG_VBR); + + /* If vector is uninitialized, call the uninitialized interrupt vector */ + if(new_pc == 0) + new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR); + + /* Generate a stack frame */ + m68ki_stack_frame_0000(REG_PC, sr, vector); + if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Create throwaway frame */ + m68ki_set_sm_flag(FLAG_S); /* clear M */ + sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */ + m68ki_stack_frame_0001(REG_PC, sr, vector); + } + + m68ki_jump(new_pc); + + /* Defer cycle counting until later */ + CPU_INT_CYCLES += CYC_EXCEPTION[vector]; + +#if !M68K_EMULATE_INT_ACK + /* Automatically clear IRQ if we are not using an acknowledge scheme */ + CPU_INT_LEVEL = 0; +#endif /* M68K_EMULATE_INT_ACK */ +} + + +/* ASG: Check for interrupts */ +INLINE void m68ki_check_interrupts(void) +{ + if(CPU_INT_LEVEL > FLAG_INT_MASK) + m68ki_exception_interrupt(CPU_INT_LEVEL>>8); +} + + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KCPU__HEADER */ diff --git a/AltairZ80/m68kdasm.c b/AltairZ80/m68kdasm.c new file mode 100755 index 00000000..941c789e --- /dev/null +++ b/AltairZ80/m68kdasm.c @@ -0,0 +1,3443 @@ +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ +/* + * MUSASHI + * Version 3.3 + * + * A portable Motorola M680x0 processor emulation engine. + * Copyright 1998-2001 Karl Stenerud. All rights reserved. + * + * This code may be freely used for non-commercial purposes as long as this + * copyright notice remains unaltered in the source code and any binary files + * containing this code in compiled form. + * + * All other lisencing terms must be negotiated with the author + * (Karl Stenerud). + * + * The latest version of this code can be obtained at: + * http://kstenerud.cjb.net + */ + + + +/* ======================================================================== */ +/* ================================ INCLUDES ============================== */ +/* ======================================================================== */ + +#include +#include +#include +#include "m68k.h" + +/* ======================================================================== */ +/* ============================ GENERAL DEFINES =========================== */ +/* ======================================================================== */ + +/* unsigned int and int must be at least 32 bits wide */ +#undef uint +#define uint unsigned int + +/* Bit Isolation Functions */ +#define BIT_0(A) ((A) & 0x00000001) +#define BIT_1(A) ((A) & 0x00000002) +#define BIT_2(A) ((A) & 0x00000004) +#define BIT_3(A) ((A) & 0x00000008) +#define BIT_4(A) ((A) & 0x00000010) +#define BIT_5(A) ((A) & 0x00000020) +#define BIT_6(A) ((A) & 0x00000040) +#define BIT_7(A) ((A) & 0x00000080) +#define BIT_8(A) ((A) & 0x00000100) +#define BIT_9(A) ((A) & 0x00000200) +#define BIT_A(A) ((A) & 0x00000400) +#define BIT_B(A) ((A) & 0x00000800) +#define BIT_C(A) ((A) & 0x00001000) +#define BIT_D(A) ((A) & 0x00002000) +#define BIT_E(A) ((A) & 0x00004000) +#define BIT_F(A) ((A) & 0x00008000) +#define BIT_10(A) ((A) & 0x00010000) +#define BIT_11(A) ((A) & 0x00020000) +#define BIT_12(A) ((A) & 0x00040000) +#define BIT_13(A) ((A) & 0x00080000) +#define BIT_14(A) ((A) & 0x00100000) +#define BIT_15(A) ((A) & 0x00200000) +#define BIT_16(A) ((A) & 0x00400000) +#define BIT_17(A) ((A) & 0x00800000) +#define BIT_18(A) ((A) & 0x01000000) +#define BIT_19(A) ((A) & 0x02000000) +#define BIT_1A(A) ((A) & 0x04000000) +#define BIT_1B(A) ((A) & 0x08000000) +#define BIT_1C(A) ((A) & 0x10000000) +#define BIT_1D(A) ((A) & 0x20000000) +#define BIT_1E(A) ((A) & 0x40000000) +#define BIT_1F(A) ((A) & 0x80000000) + +/* These are the CPU types understood by this disassembler */ +#define TYPE_68000 1 +#define TYPE_68010 2 +#define TYPE_68020 4 +#define TYPE_68030 8 +#define TYPE_68040 16 + +#define M68000_ONLY TYPE_68000 + +#define M68010_ONLY TYPE_68010 +#define M68010_LESS (TYPE_68000 | TYPE_68010) +#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040) + +#define M68020_ONLY TYPE_68020 +#define M68020_LESS (TYPE_68010 | TYPE_68020) +#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040) + +#define M68030_ONLY TYPE_68030 +#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030) +#define M68030_PLUS (TYPE_68030 | TYPE_68040) + +#define M68040_PLUS TYPE_68040 + + +/* Extension word formats */ +#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff) +#define EXT_FULL(A) BIT_8(A) +#define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0) +#define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A)) +#define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A)) +#define EXT_INDEX_REGISTER(A) (((A)>>12)&7) +#define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3) +#define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0) +#define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4) +#define EXT_INDEX_SCALE(A) (((A)>>9)&3) +#define EXT_INDEX_LONG(A) BIT_B(A) +#define EXT_INDEX_AR(A) BIT_F(A) +#define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10) +#define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20) +#define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30) +#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44) +#define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44) +#define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44) + + + +/* ======================================================================== */ +/* =============================== PROTOTYPES ============================= */ +/* ======================================================================== */ + +/* Read data at the PC and increment PC */ +uint read_imm_8(void); +uint read_imm_16(void); +uint read_imm_32(void); + +/* Read data at the PC but don't imcrement the PC */ +uint peek_imm_8(void); +uint peek_imm_16(void); +uint peek_imm_32(void); + +/* make signed integers 100% portably */ +static int make_int_8(int value); +static int make_int_16(int value); + +/* make a string of a hex value */ +static char* make_signed_hex_str_8(uint val); +static char* make_signed_hex_str_16(uint val); +static char* make_signed_hex_str_32(uint val); + +/* make string of ea mode */ +static char* get_ea_mode_str(uint instruction, uint size); + +char* get_ea_mode_str_8(uint instruction); +char* get_ea_mode_str_16(uint instruction); +char* get_ea_mode_str_32(uint instruction); + +/* make string of immediate value */ +static char* get_imm_str_s(uint size); +static char* get_imm_str_u(uint size); + +char* get_imm_str_s8(void); +char* get_imm_str_s16(void); +char* get_imm_str_s32(void); + +/* Stuff to build the opcode handler jump table */ +static void build_opcode_table(void); +static int valid_ea(uint opcode, uint mask); +static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr); + +/* used to build opcode handler jump table */ +typedef struct +{ + void (*opcode_handler)(void); /* handler function */ + uint mask; /* mask on opcode */ + uint match; /* what to match after masking */ + uint ea_mask; /* what ea modes are allowed */ +} opcode_struct; + + + +/* ======================================================================== */ +/* ================================= DATA ================================= */ +/* ======================================================================== */ + +/* Opcode handler jump table */ +static void (*g_instruction_table[0x10000])(void); +/* Flag if disassembler initialized */ +static int g_initialized = 0; + +/* Address mask to simulate address lines */ +static unsigned int g_address_mask = 0xffffffff; + +static char g_dasm_str[100]; /* string to hold disassembly */ +static char g_helper_str[100]; /* string to hold helpful info */ +static uint g_cpu_pc; /* program counter */ +static uint g_cpu_ir; /* instruction register */ +static uint g_cpu_type; + +/* used by ops like asr, ror, addq, etc */ +static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7}; + +static uint g_5bit_data_table[32] = +{ + 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 +}; + +static char* g_cc[16] = +{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"}; + +static char* g_cpcc[64] = +{/* 000 001 010 011 100 101 110 111 */ + "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */ + "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */ + "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */ + "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */ + "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */ +}; + + +/* ======================================================================== */ +/* =========================== UTILITY FUNCTIONS ========================== */ +/* ======================================================================== */ + +#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \ + if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \ + { \ + d68000_illegal(); \ + return; \ + } + +#define read_imm_8() (m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)&0xff) +#define read_imm_16() m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask) +#define read_imm_32() m68k_read_disassembler_32(((g_cpu_pc+=4)-4)&g_address_mask) + +#define peek_imm_8() (m68k_read_disassembler_16(g_cpu_pc & g_address_mask)&0xff) +#define peek_imm_16() m68k_read_disassembler_16(g_cpu_pc & g_address_mask) +#define peek_imm_32() m68k_read_disassembler_32(g_cpu_pc & g_address_mask) + +/* Fake a split interface */ +#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0) +#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1) +#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2) + +#define get_imm_str_s8() get_imm_str_s(0) +#define get_imm_str_s16() get_imm_str_s(1) +#define get_imm_str_s32() get_imm_str_s(2) + +#define get_imm_str_u8() get_imm_str_u(0) +#define get_imm_str_u16() get_imm_str_u(1) +#define get_imm_str_u32() get_imm_str_u(2) + + +/* 100% portable signed int generators */ +static int make_int_8(int value) +{ + return (value & 0x80) ? value | ~0xff : value & 0xff; +} + +static int make_int_16(int value) +{ + return (value & 0x8000) ? value | ~0xffff : value & 0xffff; +} + + +/* Get string representation of hex values */ +static char* make_signed_hex_str_8(uint val) +{ + static char str[20]; + + val &= 0xff; + + if(val == 0x80) + sprintf(str, "-$80"); + else if(val & 0x80) + sprintf(str, "-$%x", (0-val) & 0x7f); + else + sprintf(str, "$%x", val & 0x7f); + + return str; +} + +static char* make_signed_hex_str_16(uint val) +{ + static char str[20]; + + val &= 0xffff; + + if(val == 0x8000) + sprintf(str, "-$8000"); + else if(val & 0x8000) + sprintf(str, "-$%x", (0-val) & 0x7fff); + else + sprintf(str, "$%x", val & 0x7fff); + + return str; +} + +static char* make_signed_hex_str_32(uint val) +{ + static char str[20]; + + val &= 0xffffffff; + + if(val == 0x80000000) + sprintf(str, "-$80000000"); + else if(val & 0x80000000) + sprintf(str, "-$%x", (0-val) & 0x7fffffff); + else + sprintf(str, "$%x", val & 0x7fffffff); + + return str; +} + + +/* make string of immediate value */ +static char* get_imm_str_s(uint size) +{ + static char str[15]; + if(size == 0) + sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8())); + else if(size == 1) + sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16())); + else + sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32())); + return str; +} + +static char* get_imm_str_u(uint size) +{ + static char str[15]; + if(size == 0) + sprintf(str, "#$%x", read_imm_8() & 0xff); + else if(size == 1) + sprintf(str, "#$%x", read_imm_16() & 0xffff); + else + sprintf(str, "#$%x", read_imm_32() & 0xffffffff); + return str; +} + +/* Make string of effective address mode */ +static char* get_ea_mode_str(uint instruction, uint size) +{ + static char b1[64]; + static char b2[64]; + static char* mode = b2; + uint extension; + uint base; + uint outer; + char base_reg[4]; + char index_reg[8]; + uint preindex; + uint postindex; + uint comma = 0; + uint temp_value; + + /* Switch buffers so we don't clobber on a double-call to this function */ + mode = mode == b1 ? b2 : b1; + + switch(instruction & 0x3f) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + /* data register direct */ + sprintf(mode, "D%d", instruction&7); + break; + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + /* address register direct */ + sprintf(mode, "A%d", instruction&7); + break; + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + /* address register indirect */ + sprintf(mode, "(A%d)", instruction&7); + break; + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + /* address register indirect with postincrement */ + sprintf(mode, "(A%d)+", instruction&7); + break; + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + /* address register indirect with predecrement */ + sprintf(mode, "-(A%d)", instruction&7); + break; + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + /* address register indirect with displacement*/ + sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7); + break; + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + /* address register indirect with index */ + extension = read_imm_16(); + + if(EXT_FULL(extension)) + { + if(EXT_EFFECTIVE_ZERO(extension)) + { + strcpy(mode, "0"); + break; + } + base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0; + outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0; + if(EXT_BASE_REGISTER_PRESENT(extension)) + sprintf(base_reg, "A%d", instruction&7); + else + *base_reg = 0; + if(EXT_INDEX_REGISTER_PRESENT(extension)) + { + sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + if(EXT_INDEX_SCALE(extension)) + sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension)); + } + else + *index_reg = 0; + preindex = (extension&7) > 0 && (extension&7) < 4; + postindex = (extension&7) > 4; + + strcpy(mode, "("); + if(preindex || postindex) + strcat(mode, "["); + if(base) + { + strcat(mode, make_signed_hex_str_16(base)); + comma = 1; + } + if(*base_reg) + { + if(comma) + strcat(mode, ","); + strcat(mode, base_reg); + comma = 1; + } + if(postindex) + { + strcat(mode, "]"); + comma = 1; + } + if(*index_reg) + { + if(comma) + strcat(mode, ","); + strcat(mode, index_reg); + comma = 1; + } + if(preindex) + { + strcat(mode, "]"); + comma = 1; + } + if(outer) + { + if(comma) + strcat(mode, ","); + strcat(mode, make_signed_hex_str_16(outer)); + } + strcat(mode, ")"); + break; + } + + if(EXT_8BIT_DISPLACEMENT(extension) == 0) + sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + else + sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + if(EXT_INDEX_SCALE(extension)) + sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension)); + strcat(mode, ")"); + break; + case 0x38: + /* absolute short address */ + sprintf(mode, "$%x.w", read_imm_16()); + break; + case 0x39: + /* absolute long address */ + sprintf(mode, "$%x.l", read_imm_32()); + break; + case 0x3a: + /* program counter with displacement */ + temp_value = read_imm_16(); + sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value)); + sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff); + break; + case 0x3b: + /* program counter with index */ + extension = read_imm_16(); + + if(EXT_FULL(extension)) + { + if(EXT_EFFECTIVE_ZERO(extension)) + { + strcpy(mode, "0"); + break; + } + base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0; + outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0; + if(EXT_BASE_REGISTER_PRESENT(extension)) + strcpy(base_reg, "PC"); + else + *base_reg = 0; + if(EXT_INDEX_REGISTER_PRESENT(extension)) + { + sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + if(EXT_INDEX_SCALE(extension)) + sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension)); + } + else + *index_reg = 0; + preindex = (extension&7) > 0 && (extension&7) < 4; + postindex = (extension&7) > 4; + + strcpy(mode, "("); + if(preindex || postindex) + strcat(mode, "["); + if(base) + { + strcat(mode, make_signed_hex_str_16(base)); + comma = 1; + } + if(*base_reg) + { + if(comma) + strcat(mode, ","); + strcat(mode, base_reg); + comma = 1; + } + if(postindex) + { + strcat(mode, "]"); + comma = 1; + } + if(*index_reg) + { + if(comma) + strcat(mode, ","); + strcat(mode, index_reg); + comma = 1; + } + if(preindex) + { + strcat(mode, "]"); + comma = 1; + } + if(outer) + { + if(comma) + strcat(mode, ","); + strcat(mode, make_signed_hex_str_16(outer)); + } + strcat(mode, ")"); + break; + } + + if(EXT_8BIT_DISPLACEMENT(extension) == 0) + sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + else + sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w'); + if(EXT_INDEX_SCALE(extension)) + sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension)); + strcat(mode, ")"); + break; + case 0x3c: + /* Immediate */ + sprintf(mode, "%s", get_imm_str_u(size)); + break; + default: + sprintf(mode, "INVALID %x", instruction & 0x3f); + } + return mode; +} + + + +/* ======================================================================== */ +/* ========================= INSTRUCTION HANDLERS ========================= */ +/* ======================================================================== */ +/* Instruction handler function names follow this convention: + * + * d68000_NAME_EXTENSIONS(void) + * where NAME is the name of the opcode it handles and EXTENSIONS are any + * extensions for special instances of that opcode. + * + * Examples: + * d68000_add_er_8(): add opcode, from effective address to register, + * size = byte + * + * d68000_asr_s_8(): arithmetic shift right, static count, size = byte + * + * + * Common extensions: + * 8 : size = byte + * 16 : size = word + * 32 : size = long + * rr : register to register + * mm : memory to memory + * r : register + * s : static + * er : effective address -> register + * re : register -> effective address + * ea : using effective address mode of operation + * d : data register direct + * a : address register direct + * ai : address register indirect + * pi : address register indirect with postincrement + * pd : address register indirect with predecrement + * di : address register indirect with displacement + * ix : address register indirect with index + * aw : absolute word + * al : absolute long + */ + +static void d68000_illegal(void) +{ + sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir); +} + +static void d68000_1010(void) +{ + sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir); +} + + +static void d68000_1111(void) +{ + sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir); +} + + +static void d68000_abcd_rr(void) +{ + sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + + +static void d68000_abcd_mm(void) +{ + sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_add_er_8(void) +{ + sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + + +static void d68000_add_er_16(void) +{ + sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_add_er_32(void) +{ + sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_add_re_8(void) +{ + sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_add_re_16(void) +{ + sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_add_re_32(void) +{ + sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_adda_16(void) +{ + sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_adda_32(void) +{ + sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_addi_8(void) +{ + char* str = get_imm_str_s8(); + sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_addi_16(void) +{ + char* str = get_imm_str_s16(); + sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_addi_32(void) +{ + char* str = get_imm_str_s32(); + sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_addq_8(void) +{ + sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_addq_16(void) +{ + sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_addq_32(void) +{ + sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_addx_rr_8(void) +{ + sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_addx_rr_16(void) +{ + sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_addx_rr_32(void) +{ + sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_addx_mm_8(void) +{ + sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_addx_mm_16(void) +{ + sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_addx_mm_32(void) +{ + sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_and_er_8(void) +{ + sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_and_er_16(void) +{ + sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_and_er_32(void) +{ + sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_and_re_8(void) +{ + sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_and_re_16(void) +{ + sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_and_re_32(void) +{ + sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_andi_8(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_andi_16(void) +{ + char* str = get_imm_str_u16(); + sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_andi_32(void) +{ + char* str = get_imm_str_u32(); + sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_andi_to_ccr(void) +{ + sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8()); +} + +static void d68000_andi_to_sr(void) +{ + sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16()); +} + +static void d68000_asr_s_8(void) +{ + sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asr_s_16(void) +{ + sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asr_s_32(void) +{ + sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asr_r_8(void) +{ + sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asr_r_16(void) +{ + sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asr_r_32(void) +{ + sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asr_ea(void) +{ + sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_asl_s_8(void) +{ + sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asl_s_16(void) +{ + sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asl_s_32(void) +{ + sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_asl_r_8(void) +{ + sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asl_r_16(void) +{ + sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asl_r_32(void) +{ + sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_asl_ea(void) +{ + sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_bcc_8(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir)); +} + +static void d68000_bcc_16(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16())); +} + +static void d68020_bcc_32(void) +{ + uint temp_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "b%-2s %x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32()); +} + +static void d68000_bchg_r(void) +{ + sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_bchg_s(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_bclr_r(void) +{ + sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_bclr_s(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68010_bkpt(void) +{ + LIMIT_CPU_TYPES(M68010_PLUS); + sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7); +} + +static void d68020_bfchg(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfclr(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfexts(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfextu(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfffo(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfins(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bfset(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68020_bftst(void) +{ + uint extension; + char offset[3]; + char width[3]; + + LIMIT_CPU_TYPES(M68020_PLUS); + + extension = read_imm_16(); + + if(BIT_B(extension)) + sprintf(offset, "D%d", (extension>>6)&7); + else + sprintf(offset, "%d", (extension>>6)&31); + if(BIT_5(extension)) + sprintf(width, "D%d", extension&7); + else + sprintf(width, "%d", g_5bit_data_table[extension&31]); + sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width); +} + +static void d68000_bra_8(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "bra %x", temp_pc + make_int_8(g_cpu_ir)); +} + +static void d68000_bra_16(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "bra %x", temp_pc + make_int_16(read_imm_16())); +} + +static void d68020_bra_32(void) +{ + uint temp_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "bra %x; (2+)", temp_pc + read_imm_32()); +} + +static void d68000_bset_r(void) +{ + sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_bset_s(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_bsr_8(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_8(g_cpu_ir)); +} + +static void d68000_bsr_16(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_16(read_imm_16())); +} + +static void d68020_bsr_32(void) +{ + uint temp_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "bsr %x; (2+)", temp_pc + peek_imm_32()); +} + +static void d68000_btst_r(void) +{ + sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_btst_s(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_callm(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_ONLY); + str = get_imm_str_u8(); + + sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cas_8(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cas_16(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_cas_32(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_cas2_16(void) +{ +/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2) +f e d c b a 9 8 7 6 5 4 3 2 1 0 + DARn1 0 0 0 Du1 0 0 0 Dc1 + DARn2 0 0 0 Du2 0 0 0 Dc2 +*/ + + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_32(); + sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)", + (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7, + BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7, + BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68020_cas2_32(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_32(); + sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)", + (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7, + BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7, + BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68000_chk_16(void) +{ + sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68020_chk_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68020_chk2_cmp2_8(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68020_chk2_cmp2_16(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68020_chk2_cmp2_32(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68040_cinv(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + switch((g_cpu_ir>>3)&3) + { + case 0: + sprintf(g_dasm_str, "cinv (illegal scope); (4)"); + break; + case 1: + sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7); + break; + case 2: + sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7); + break; + case 3: + sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3); + break; + } +} + +static void d68000_clr_8(void) +{ + sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_clr_16(void) +{ + sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_clr_32(void) +{ + sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_cmp_8(void) +{ + sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_cmp_16(void) +{ + sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_cmp_32(void) +{ + sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_cmpa_16(void) +{ + sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_cmpa_32(void) +{ + sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_cmpi_8(void) +{ + char* str = get_imm_str_s8(); + sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cmpi_pcdi_8(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s8(); + sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cmpi_pcix_8(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s8(); + sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_cmpi_16(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s16(); + sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_cmpi_pcdi_16(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s16(); + sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_cmpi_pcix_16(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s16(); + sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_cmpi_32(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s32(); + sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_cmpi_pcdi_32(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s32(); + sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_cmpi_pcix_32(void) +{ + char* str; + LIMIT_CPU_TYPES(M68020_PLUS); + str = get_imm_str_s32(); + sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_cmpm_8(void) +{ + sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_cmpm_16(void) +{ + sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_cmpm_32(void) +{ + sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68020_cpbcc_16(void) +{ + uint extension; + uint new_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + new_pc += make_int_16(peek_imm_16()); + sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension); +} + +static void d68020_cpbcc_32(void) +{ + uint extension; + uint new_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + new_pc += peek_imm_32(); + sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension); +} + +static void d68020_cpdbcc(void) +{ + uint extension1; + uint extension2; + uint new_pc = g_cpu_pc; + LIMIT_CPU_TYPES(M68020_PLUS); + extension1 = read_imm_16(); + extension2 = read_imm_16(); + new_pc += make_int_16(peek_imm_16()); + sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2); +} + +static void d68020_cpgen(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32()); +} + +static void d68020_cprestore(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cpsave(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_cpscc(void) +{ + uint extension1; + uint extension2; + LIMIT_CPU_TYPES(M68020_PLUS); + extension1 = read_imm_16(); + extension2 = read_imm_16(); + sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2); +} + +static void d68020_cptrapcc_0(void) +{ + uint extension1; + uint extension2; + LIMIT_CPU_TYPES(M68020_PLUS); + extension1 = read_imm_16(); + extension2 = read_imm_16(); + sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2); +} + +static void d68020_cptrapcc_16(void) +{ + uint extension1; + uint extension2; + LIMIT_CPU_TYPES(M68020_PLUS); + extension1 = read_imm_16(); + extension2 = read_imm_16(); + sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2); +} + +static void d68020_cptrapcc_32(void) +{ + uint extension1; + uint extension2; + LIMIT_CPU_TYPES(M68020_PLUS); + extension1 = read_imm_16(); + extension2 = read_imm_16(); + sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2); +} + +static void d68040_cpush(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + switch((g_cpu_ir>>3)&3) + { + case 0: + sprintf(g_dasm_str, "cpush (illegal scope); (4)"); + break; + case 1: + sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7); + break; + case 2: + sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7); + break; + case 3: + sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3); + break; + } +} + +static void d68000_dbra(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "dbra D%d, %x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16())); +} + +static void d68000_dbcc(void) +{ + uint temp_pc = g_cpu_pc; + sprintf(g_dasm_str, "db%-2s D%d, %x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16())); +} + +static void d68000_divs(void) +{ + sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_divu(void) +{ + sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68020_divl(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + + if(BIT_A(extension)) + sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7); + else if((extension&7) == ((extension>>12)&7)) + sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7); + else + sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7); +} + +static void d68000_eor_8(void) +{ + sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_eor_16(void) +{ + sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_eor_32(void) +{ + sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_eori_8(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_eori_16(void) +{ + char* str = get_imm_str_u16(); + sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_eori_32(void) +{ + char* str = get_imm_str_u32(); + sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_eori_to_ccr(void) +{ + sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8()); +} + +static void d68000_eori_to_sr(void) +{ + sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16()); +} + +static void d68000_exg_dd(void) +{ + sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_exg_aa(void) +{ + sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_exg_da(void) +{ + sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_ext_16(void) +{ + sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7); +} + +static void d68000_ext_32(void) +{ + sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7); +} + +static void d68020_extb_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7); +} + +static void d68000_jmp(void) +{ + sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_jsr(void) +{ + sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_lea(void) +{ + sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_link_16(void) +{ + sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16()); +} + +static void d68020_link_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32()); +} + +static void d68000_lsr_s_8(void) +{ + sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsr_s_16(void) +{ + sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsr_s_32(void) +{ + sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsr_r_8(void) +{ + sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsr_r_16(void) +{ + sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsr_r_32(void) +{ + sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsr_ea(void) +{ + sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_lsl_s_8(void) +{ + sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsl_s_16(void) +{ + sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsl_s_32(void) +{ + sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_lsl_r_8(void) +{ + sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsl_r_16(void) +{ + sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsl_r_32(void) +{ + sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_lsl_ea(void) +{ + sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_move_8(void) +{ + char* str = get_ea_mode_str_8(g_cpu_ir); + sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38))); +} + +static void d68000_move_16(void) +{ + char* str = get_ea_mode_str_16(g_cpu_ir); + sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38))); +} + +static void d68000_move_32(void) +{ + char* str = get_ea_mode_str_32(g_cpu_ir); + sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38))); +} + +static void d68000_movea_16(void) +{ + sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_movea_32(void) +{ + sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_move_to_ccr(void) +{ + sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68010_move_fr_ccr(void) +{ + LIMIT_CPU_TYPES(M68010_PLUS); + sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_move_fr_sr(void) +{ + sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_move_to_sr(void) +{ + sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_move_fr_usp(void) +{ + sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7); +} + +static void d68000_move_to_usp(void) +{ + sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7); +} + +static void d68010_movec(void) +{ + uint extension; + char* reg_name; + char* processor; + LIMIT_CPU_TYPES(M68010_PLUS); + extension = read_imm_16(); + + switch(extension & 0xfff) + { + case 0x000: + reg_name = "SFC"; + processor = "1+"; + break; + case 0x001: + reg_name = "DFC"; + processor = "1+"; + break; + case 0x800: + reg_name = "USP"; + processor = "1+"; + break; + case 0x801: + reg_name = "VBR"; + processor = "1+"; + break; + case 0x002: + reg_name = "CACR"; + processor = "2+"; + break; + case 0x802: + reg_name = "CAAR"; + processor = "2,3"; + break; + case 0x803: + reg_name = "MSP"; + processor = "2+"; + break; + case 0x804: + reg_name = "ISP"; + processor = "2+"; + break; + case 0x003: + reg_name = "TC"; + processor = "4+"; + break; + case 0x004: + reg_name = "ITT0"; + processor = "4+"; + break; + case 0x005: + reg_name = "ITT1"; + processor = "4+"; + break; + case 0x006: + reg_name = "DTT0"; + processor = "4+"; + break; + case 0x007: + reg_name = "DTT1"; + processor = "4+"; + break; + case 0x805: + reg_name = "MMUSR"; + processor = "4+"; + break; + case 0x806: + reg_name = "URP"; + processor = "4+"; + break; + case 0x807: + reg_name = "SRP"; + processor = "4+"; + break; + default: + reg_name = make_signed_hex_str_16(extension & 0xfff); + processor = "?"; + } + + if(BIT_1(g_cpu_ir)) + sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor); + else + sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor); +} + +static void d68000_movem_pd_16(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1<<(15-i))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(15-i))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "D%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(7-i))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(7-i))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_movem_pd_32(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1<<(15-i))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(15-i))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "D%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(7-i))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(7-i))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_movem_er_16(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1< 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(i+8))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(i+8))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer); +} + +static void d68000_movem_er_32(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1< 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(i+8))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(i+8))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer); +} + +static void d68000_movem_re_16(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1< 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(i+8))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(i+8))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_movem_re_32(void) +{ + uint data = read_imm_16(); + char buffer[40]; + uint first; + uint run_length; + uint i; + + buffer[0] = 0; + for(i=0;i<8;i++) + { + if(data&(1< 0) + sprintf(buffer+strlen(buffer), "-D%d", first + run_length); + } + } + for(i=0;i<8;i++) + { + if(data&(1<<(i+8))) + { + first = i; + run_length = 0; + for(i++;i<8;i++) + if(data&(1<<(i+8))) + run_length++; + if(buffer[0] != 0) + strcat(buffer, "/"); + sprintf(buffer+strlen(buffer), "A%d", first); + if(run_length > 0) + sprintf(buffer+strlen(buffer), "-A%d", first + run_length); + } + } + sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_movep_re_16(void) +{ + sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7); +} + +static void d68000_movep_re_32(void) +{ + sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7); +} + +static void d68000_movep_er_16(void) +{ + sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_movep_er_32(void) +{ + sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68010_moves_8(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68010_PLUS); + extension = read_imm_16(); + if(BIT_B(extension)) + sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir)); + else + sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68010_moves_16(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68010_PLUS); + extension = read_imm_16(); + if(BIT_B(extension)) + sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir)); + else + sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68010_moves_32(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68010_PLUS); + extension = read_imm_16(); + if(BIT_B(extension)) + sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir)); + else + sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7); +} + +static void d68000_moveq(void) +{ + sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68040_move16_pi_pi(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7); +} + +static void d68040_move16_pi_al(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32()); +} + +static void d68040_move16_al_pi(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7); +} + +static void d68040_move16_ai_al(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32()); +} + +static void d68040_move16_al_ai(void) +{ + LIMIT_CPU_TYPES(M68040_PLUS); + sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7); +} + +static void d68000_muls(void) +{ + sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_mulu(void) +{ + sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68020_mull(void) +{ + uint extension; + LIMIT_CPU_TYPES(M68020_PLUS); + extension = read_imm_16(); + + if(BIT_A(extension)) + sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7); + else + sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7); +} + +static void d68000_nbcd(void) +{ + sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_neg_8(void) +{ + sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_neg_16(void) +{ + sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_neg_32(void) +{ + sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_negx_8(void) +{ + sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_negx_16(void) +{ + sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_negx_32(void) +{ + sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_nop(void) +{ + sprintf(g_dasm_str, "nop"); +} + +static void d68000_not_8(void) +{ + sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_not_16(void) +{ + sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_not_32(void) +{ + sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_or_er_8(void) +{ + sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_or_er_16(void) +{ + sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_or_er_32(void) +{ + sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_or_re_8(void) +{ + sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_or_re_16(void) +{ + sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_or_re_32(void) +{ + sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_ori_8(void) +{ + char* str = get_imm_str_u8(); + sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_ori_16(void) +{ + char* str = get_imm_str_u16(); + sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_ori_32(void) +{ + char* str = get_imm_str_u32(); + sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_ori_to_ccr(void) +{ + sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8()); +} + +static void d68000_ori_to_sr(void) +{ + sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16()); +} + +static void d68020_pack_rr(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16()); +} + +static void d68020_pack_mm(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16()); +} + +static void d68000_pea(void) +{ + sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_reset(void) +{ + sprintf(g_dasm_str, "reset"); +} + +static void d68000_ror_s_8(void) +{ + sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_ror_s_16(void) +{ + sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7); +} + +static void d68000_ror_s_32(void) +{ + sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_ror_r_8(void) +{ + sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_ror_r_16(void) +{ + sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_ror_r_32(void) +{ + sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_ror_ea(void) +{ + sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_rol_s_8(void) +{ + sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_rol_s_16(void) +{ + sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_rol_s_32(void) +{ + sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_rol_r_8(void) +{ + sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_rol_r_16(void) +{ + sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_rol_r_32(void) +{ + sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_rol_ea(void) +{ + sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_roxr_s_8(void) +{ + sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_roxr_s_16(void) +{ + sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + + +static void d68000_roxr_s_32(void) +{ + sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_roxr_r_8(void) +{ + sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxr_r_16(void) +{ + sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxr_r_32(void) +{ + sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxr_ea(void) +{ + sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_roxl_s_8(void) +{ + sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_roxl_s_16(void) +{ + sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_roxl_s_32(void) +{ + sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7); +} + +static void d68000_roxl_r_8(void) +{ + sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxl_r_16(void) +{ + sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxl_r_32(void) +{ + sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7); +} + +static void d68000_roxl_ea(void) +{ + sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68010_rtd(void) +{ + LIMIT_CPU_TYPES(M68010_PLUS); + sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16()); +} + +static void d68000_rte(void) +{ + sprintf(g_dasm_str, "rte"); +} + +static void d68020_rtm(void) +{ + LIMIT_CPU_TYPES(M68020_ONLY); + sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7); +} + +static void d68000_rtr(void) +{ + sprintf(g_dasm_str, "rtr"); +} + +static void d68000_rts(void) +{ + sprintf(g_dasm_str, "rts"); +} + +static void d68000_sbcd_rr(void) +{ + sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_sbcd_mm(void) +{ + sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_scc(void) +{ + sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_stop(void) +{ + sprintf(g_dasm_str, "stop %s", get_imm_str_s16()); +} + +static void d68000_sub_er_8(void) +{ + sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_sub_er_16(void) +{ + sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_sub_er_32(void) +{ + sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_sub_re_8(void) +{ + sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_sub_re_16(void) +{ + sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_sub_re_32(void) +{ + sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_suba_16(void) +{ + sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_suba_32(void) +{ + sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7); +} + +static void d68000_subi_8(void) +{ + char* str = get_imm_str_s8(); + sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_subi_16(void) +{ + char* str = get_imm_str_s16(); + sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_subi_32(void) +{ + char* str = get_imm_str_s32(); + sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_subq_8(void) +{ + sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_subq_16(void) +{ + sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_subq_32(void) +{ + sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_subx_rr_8(void) +{ + sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_subx_rr_16(void) +{ + sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_subx_rr_32(void) +{ + sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_subx_mm_8(void) +{ + sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_subx_mm_16(void) +{ + sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_subx_mm_32(void) +{ + sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7); +} + +static void d68000_swap(void) +{ + sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7); +} + +static void d68000_tas(void) +{ + sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_trap(void) +{ + sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf); +} + +static void d68020_trapcc_0(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]); +} + +static void d68020_trapcc_16(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16()); +} + +static void d68020_trapcc_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32()); +} + +static void d68000_trapv(void) +{ + sprintf(g_dasm_str, "trapv"); +} + +static void d68000_tst_8(void) +{ + sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_tst_pcdi_8(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_tst_pcix_8(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68020_tst_i_8(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir)); +} + +static void d68000_tst_16(void) +{ + sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_tst_a_16(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_tst_pcdi_16(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_tst_pcix_16(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68020_tst_i_16(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir)); +} + +static void d68000_tst_32(void) +{ + sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_tst_a_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_tst_pcdi_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_tst_pcix_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68020_tst_i_32(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir)); +} + +static void d68000_unlk(void) +{ + sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7); +} + +static void d68020_unpk_rr(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16()); +} + +static void d68020_unpk_mm(void) +{ + LIMIT_CPU_TYPES(M68020_PLUS); + sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16()); +} + + + +/* ======================================================================== */ +/* ======================= INSTRUCTION TABLE BUILDER ====================== */ +/* ======================================================================== */ + +/* EA Masks: +800 = data register direct +400 = address register direct +200 = address register indirect +100 = ARI postincrement + 80 = ARI pre-decrement + 40 = ARI displacement + 20 = ARI index + 10 = absolute short + 8 = absolute long + 4 = immediate / sr + 2 = pc displacement + 1 = pc idx +*/ + +static opcode_struct g_opcode_info[] = +{ +/* opcode handler mask match ea mask */ + {d68000_1010 , 0xf000, 0xa000, 0x000}, + {d68000_1111 , 0xf000, 0xf000, 0x000}, + {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000}, + {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000}, + {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff}, + {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff}, + {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff}, + {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8}, + {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8}, + {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8}, + {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff}, + {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff}, + {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8}, + {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8}, + {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8}, + {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8}, + {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8}, + {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8}, + {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000}, + {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000}, + {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000}, + {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000}, + {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000}, + {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000}, + {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff}, + {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff}, + {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff}, + {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8}, + {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8}, + {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8}, + {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000}, + {d68000_andi_to_sr , 0xffff, 0x027c, 0x000}, + {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8}, + {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8}, + {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8}, + {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000}, + {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000}, + {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000}, + {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000}, + {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000}, + {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000}, + {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8}, + {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000}, + {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000}, + {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000}, + {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000}, + {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000}, + {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000}, + {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8}, + {d68000_bcc_8 , 0xf000, 0x6000, 0x000}, + {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000}, + {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000}, + {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8}, + {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8}, + {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8}, + {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8}, + {d68020_bfchg , 0xffc0, 0xeac0, 0xa78}, + {d68020_bfclr , 0xffc0, 0xecc0, 0xa78}, + {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b}, + {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b}, + {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b}, + {d68020_bfins , 0xffc0, 0xefc0, 0xa78}, + {d68020_bfset , 0xffc0, 0xeec0, 0xa78}, + {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b}, + {d68010_bkpt , 0xfff8, 0x4848, 0x000}, + {d68000_bra_8 , 0xff00, 0x6000, 0x000}, + {d68000_bra_16 , 0xffff, 0x6000, 0x000}, + {d68020_bra_32 , 0xffff, 0x60ff, 0x000}, + {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8}, + {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8}, + {d68000_bsr_8 , 0xff00, 0x6100, 0x000}, + {d68000_bsr_16 , 0xffff, 0x6100, 0x000}, + {d68020_bsr_32 , 0xffff, 0x61ff, 0x000}, + {d68000_btst_r , 0xf1c0, 0x0100, 0xbff}, + {d68000_btst_s , 0xffc0, 0x0800, 0xbfb}, + {d68020_callm , 0xffc0, 0x06c0, 0x27b}, + {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8}, + {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8}, + {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8}, + {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000}, + {d68020_cas2_32 , 0xffff, 0x0efc, 0x000}, + {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff}, + {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff}, + {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b}, + {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b}, + {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b}, + {d68040_cinv , 0xff20, 0xf400, 0x000}, + {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8}, + {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8}, + {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8}, + {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff}, + {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff}, + {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff}, + {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff}, + {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff}, + {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8}, + {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000}, + {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000}, + {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8}, + {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000}, + {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000}, + {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8}, + {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000}, + {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000}, + {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000}, + {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000}, + {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000}, + {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000}, + {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000}, + {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000}, + {d68020_cpgen , 0xf1c0, 0xf000, 0x000}, + {d68020_cprestore , 0xf1c0, 0xf140, 0x37f}, + {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8}, + {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8}, + {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000}, + {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000}, + {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000}, + {d68040_cpush , 0xff20, 0xf420, 0x000}, + {d68000_dbcc , 0xf0f8, 0x50c8, 0x000}, + {d68000_dbra , 0xfff8, 0x51c8, 0x000}, + {d68000_divs , 0xf1c0, 0x81c0, 0xbff}, + {d68000_divu , 0xf1c0, 0x80c0, 0xbff}, + {d68020_divl , 0xffc0, 0x4c40, 0xbff}, + {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8}, + {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8}, + {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8}, + {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000}, + {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000}, + {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8}, + {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8}, + {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8}, + {d68000_exg_dd , 0xf1f8, 0xc140, 0x000}, + {d68000_exg_aa , 0xf1f8, 0xc148, 0x000}, + {d68000_exg_da , 0xf1f8, 0xc188, 0x000}, + {d68020_extb_32 , 0xfff8, 0x49c0, 0x000}, + {d68000_ext_16 , 0xfff8, 0x4880, 0x000}, + {d68000_ext_32 , 0xfff8, 0x48c0, 0x000}, + {d68000_illegal , 0xffff, 0x4afc, 0x000}, + {d68000_jmp , 0xffc0, 0x4ec0, 0x27b}, + {d68000_jsr , 0xffc0, 0x4e80, 0x27b}, + {d68000_lea , 0xf1c0, 0x41c0, 0x27b}, + {d68000_link_16 , 0xfff8, 0x4e50, 0x000}, + {d68020_link_32 , 0xfff8, 0x4808, 0x000}, + {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000}, + {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000}, + {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000}, + {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000}, + {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000}, + {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000}, + {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8}, + {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000}, + {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000}, + {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000}, + {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000}, + {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000}, + {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000}, + {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8}, + {d68000_move_8 , 0xf000, 0x1000, 0xbff}, + {d68000_move_16 , 0xf000, 0x3000, 0xfff}, + {d68000_move_32 , 0xf000, 0x2000, 0xfff}, + {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff}, + {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff}, + {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff}, + {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8}, + {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff}, + {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8}, + {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000}, + {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000}, + {d68010_movec , 0xfffe, 0x4e7a, 0x000}, + {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000}, + {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000}, + {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8}, + {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8}, + {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b}, + {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b}, + {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000}, + {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000}, + {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000}, + {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000}, + {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8}, + {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8}, + {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8}, + {d68000_moveq , 0xf100, 0x7000, 0x000}, + {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000}, + {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000}, + {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000}, + {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000}, + {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000}, + {d68000_muls , 0xf1c0, 0xc1c0, 0xbff}, + {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff}, + {d68020_mull , 0xffc0, 0x4c00, 0xbff}, + {d68000_nbcd , 0xffc0, 0x4800, 0xbf8}, + {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8}, + {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8}, + {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8}, + {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8}, + {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8}, + {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8}, + {d68000_nop , 0xffff, 0x4e71, 0x000}, + {d68000_not_8 , 0xffc0, 0x4600, 0xbf8}, + {d68000_not_16 , 0xffc0, 0x4640, 0xbf8}, + {d68000_not_32 , 0xffc0, 0x4680, 0xbf8}, + {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff}, + {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff}, + {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff}, + {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8}, + {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8}, + {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8}, + {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000}, + {d68000_ori_to_sr , 0xffff, 0x007c, 0x000}, + {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8}, + {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8}, + {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8}, + {d68020_pack_rr , 0xf1f8, 0x8140, 0x000}, + {d68020_pack_mm , 0xf1f8, 0x8148, 0x000}, + {d68000_pea , 0xffc0, 0x4840, 0x27b}, + {d68000_reset , 0xffff, 0x4e70, 0x000}, + {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000}, + {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000}, + {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000}, + {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000}, + {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000}, + {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000}, + {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8}, + {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000}, + {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000}, + {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000}, + {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000}, + {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000}, + {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000}, + {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8}, + {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000}, + {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000}, + {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000}, + {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000}, + {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000}, + {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000}, + {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8}, + {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000}, + {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000}, + {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000}, + {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000}, + {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000}, + {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000}, + {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8}, + {d68010_rtd , 0xffff, 0x4e74, 0x000}, + {d68000_rte , 0xffff, 0x4e73, 0x000}, + {d68020_rtm , 0xfff0, 0x06c0, 0x000}, + {d68000_rtr , 0xffff, 0x4e77, 0x000}, + {d68000_rts , 0xffff, 0x4e75, 0x000}, + {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000}, + {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000}, + {d68000_scc , 0xf0c0, 0x50c0, 0xbf8}, + {d68000_stop , 0xffff, 0x4e72, 0x000}, + {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff}, + {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff}, + {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff}, + {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8}, + {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8}, + {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8}, + {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff}, + {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff}, + {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8}, + {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8}, + {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8}, + {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8}, + {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8}, + {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8}, + {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000}, + {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000}, + {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000}, + {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000}, + {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000}, + {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000}, + {d68000_swap , 0xfff8, 0x4840, 0x000}, + {d68000_tas , 0xffc0, 0x4ac0, 0xbf8}, + {d68000_trap , 0xfff0, 0x4e40, 0x000}, + {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000}, + {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000}, + {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000}, + {d68000_trapv , 0xffff, 0x4e76, 0x000}, + {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8}, + {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000}, + {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000}, + {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000}, + {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8}, + {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000}, + {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000}, + {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000}, + {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000}, + {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8}, + {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000}, + {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000}, + {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000}, + {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000}, + {d68000_unlk , 0xfff8, 0x4e58, 0x000}, + {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000}, + {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000}, + {0, 0, 0, 0} +}; + +/* Check if opcode is using a valid ea mode */ +static int valid_ea(uint opcode, uint mask) +{ + if(mask == 0) + return 1; + + switch(opcode & 0x3f) + { + case 0x00: case 0x01: case 0x02: case 0x03: + case 0x04: case 0x05: case 0x06: case 0x07: + return (mask & 0x800) != 0; + case 0x08: case 0x09: case 0x0a: case 0x0b: + case 0x0c: case 0x0d: case 0x0e: case 0x0f: + return (mask & 0x400) != 0; + case 0x10: case 0x11: case 0x12: case 0x13: + case 0x14: case 0x15: case 0x16: case 0x17: + return (mask & 0x200) != 0; + case 0x18: case 0x19: case 0x1a: case 0x1b: + case 0x1c: case 0x1d: case 0x1e: case 0x1f: + return (mask & 0x100) != 0; + case 0x20: case 0x21: case 0x22: case 0x23: + case 0x24: case 0x25: case 0x26: case 0x27: + return (mask & 0x080) != 0; + case 0x28: case 0x29: case 0x2a: case 0x2b: + case 0x2c: case 0x2d: case 0x2e: case 0x2f: + return (mask & 0x040) != 0; + case 0x30: case 0x31: case 0x32: case 0x33: + case 0x34: case 0x35: case 0x36: case 0x37: + return (mask & 0x020) != 0; + case 0x38: + return (mask & 0x010) != 0; + case 0x39: + return (mask & 0x008) != 0; + case 0x3a: + return (mask & 0x002) != 0; + case 0x3b: + return (mask & 0x001) != 0; + case 0x3c: + return (mask & 0x004) != 0; + } + return 0; + +} + +/* Used by qsort */ +static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr) +{ + uint a = ((const opcode_struct*)aptr)->mask; + uint b = ((const opcode_struct*)bptr)->mask; + + a = ((a & 0xAAAA) >> 1) + (a & 0x5555); + a = ((a & 0xCCCC) >> 2) + (a & 0x3333); + a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F); + a = ((a & 0xFF00) >> 8) + (a & 0x00FF); + + b = ((b & 0xAAAA) >> 1) + (b & 0x5555); + b = ((b & 0xCCCC) >> 2) + (b & 0x3333); + b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F); + b = ((b & 0xFF00) >> 8) + (b & 0x00FF); + + return b - a; /* reversed to get greatest to least sorting */ +} + +/* build the opcode handler jump table */ +static void build_opcode_table(void) +{ + uint i; + uint opcode; + opcode_struct* ostruct; + uint opcode_info_length = 0; + + for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++) + opcode_info_length++; + + qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits); + + for(i=0;i<0x10000;i++) + { + g_instruction_table[i] = d68000_illegal; /* default to illegal */ + opcode = i; + /* search through opcode info for a match */ + for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++) + { + /* match opcode mask and allowed ea modes */ + if((opcode & ostruct->mask) == ostruct->match) + { + /* Handle destination ea for move instructions */ + if((ostruct->opcode_handler == d68000_move_8 || + ostruct->opcode_handler == d68000_move_16 || + ostruct->opcode_handler == d68000_move_32) && + !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8)) + continue; + if(valid_ea(opcode, ostruct->ea_mask)) + { + g_instruction_table[i] = ostruct->opcode_handler; + break; + } + } + } + } +} + + + +/* ======================================================================== */ +/* ================================= API ================================== */ +/* ======================================================================== */ + +/* Disasemble one instruction at pc and store in str_buff */ +unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type) +{ + if(!g_initialized) + { + build_opcode_table(); + g_initialized = 1; + } + switch(cpu_type) + { + case M68K_CPU_TYPE_68000: + g_cpu_type = TYPE_68000; + g_address_mask = 0x00ffffff; + break; + case M68K_CPU_TYPE_68010: + g_cpu_type = TYPE_68010; + g_address_mask = 0x00ffffff; + break; + case M68K_CPU_TYPE_68EC020: + g_cpu_type = TYPE_68020; + g_address_mask = 0x00ffffff; + break; + case M68K_CPU_TYPE_68020: + g_cpu_type = TYPE_68020; + g_address_mask = 0xffffffff; + break; + case M68K_CPU_TYPE_68030: + g_cpu_type = TYPE_68030; + g_address_mask = 0xffffffff; + break; + case M68K_CPU_TYPE_68040: + g_cpu_type = TYPE_68040; + g_address_mask = 0xffffffff; + break; + default: + return 0; + } + + g_cpu_pc = pc; + g_helper_str[0] = 0; + g_cpu_ir = read_imm_16(); + g_instruction_table[g_cpu_ir](); + sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str); + return g_cpu_pc - pc; +} + +char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type) +{ + static char buff[100]; + buff[0] = 0; + m68k_disassemble(buff, pc, cpu_type); + return buff; +} + +/* Check if the instruction is a valid one */ +unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type) +{ + if(!g_initialized) + { + build_opcode_table(); + g_initialized = 1; + } + + instruction &= 0xffff; + if(g_instruction_table[instruction] == d68000_illegal) + return 0; + + switch(cpu_type) + { + case M68K_CPU_TYPE_68000: + if(g_instruction_table[instruction] == d68010_bkpt) + return 0; + if(g_instruction_table[instruction] == d68010_move_fr_ccr) + return 0; + if(g_instruction_table[instruction] == d68010_movec) + return 0; + if(g_instruction_table[instruction] == d68010_moves_8) + return 0; + if(g_instruction_table[instruction] == d68010_moves_16) + return 0; + if(g_instruction_table[instruction] == d68010_moves_32) + return 0; + if(g_instruction_table[instruction] == d68010_rtd) + return 0; + case M68K_CPU_TYPE_68010: + if(g_instruction_table[instruction] == d68020_bcc_32) + return 0; + if(g_instruction_table[instruction] == d68020_bfchg) + return 0; + if(g_instruction_table[instruction] == d68020_bfclr) + return 0; + if(g_instruction_table[instruction] == d68020_bfexts) + return 0; + if(g_instruction_table[instruction] == d68020_bfextu) + return 0; + if(g_instruction_table[instruction] == d68020_bfffo) + return 0; + if(g_instruction_table[instruction] == d68020_bfins) + return 0; + if(g_instruction_table[instruction] == d68020_bfset) + return 0; + if(g_instruction_table[instruction] == d68020_bftst) + return 0; + if(g_instruction_table[instruction] == d68020_bra_32) + return 0; + if(g_instruction_table[instruction] == d68020_bsr_32) + return 0; + if(g_instruction_table[instruction] == d68020_callm) + return 0; + if(g_instruction_table[instruction] == d68020_cas_8) + return 0; + if(g_instruction_table[instruction] == d68020_cas_16) + return 0; + if(g_instruction_table[instruction] == d68020_cas_32) + return 0; + if(g_instruction_table[instruction] == d68020_cas2_16) + return 0; + if(g_instruction_table[instruction] == d68020_cas2_32) + return 0; + if(g_instruction_table[instruction] == d68020_chk_32) + return 0; + if(g_instruction_table[instruction] == d68020_chk2_cmp2_8) + return 0; + if(g_instruction_table[instruction] == d68020_chk2_cmp2_16) + return 0; + if(g_instruction_table[instruction] == d68020_chk2_cmp2_32) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcix_8) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcix_16) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32) + return 0; + if(g_instruction_table[instruction] == d68020_cmpi_pcix_32) + return 0; + if(g_instruction_table[instruction] == d68020_cpbcc_16) + return 0; + if(g_instruction_table[instruction] == d68020_cpbcc_32) + return 0; + if(g_instruction_table[instruction] == d68020_cpdbcc) + return 0; + if(g_instruction_table[instruction] == d68020_cpgen) + return 0; + if(g_instruction_table[instruction] == d68020_cprestore) + return 0; + if(g_instruction_table[instruction] == d68020_cpsave) + return 0; + if(g_instruction_table[instruction] == d68020_cpscc) + return 0; + if(g_instruction_table[instruction] == d68020_cptrapcc_0) + return 0; + if(g_instruction_table[instruction] == d68020_cptrapcc_16) + return 0; + if(g_instruction_table[instruction] == d68020_cptrapcc_32) + return 0; + if(g_instruction_table[instruction] == d68020_divl) + return 0; + if(g_instruction_table[instruction] == d68020_extb_32) + return 0; + if(g_instruction_table[instruction] == d68020_link_32) + return 0; + if(g_instruction_table[instruction] == d68020_mull) + return 0; + if(g_instruction_table[instruction] == d68020_pack_rr) + return 0; + if(g_instruction_table[instruction] == d68020_pack_mm) + return 0; + if(g_instruction_table[instruction] == d68020_rtm) + return 0; + if(g_instruction_table[instruction] == d68020_trapcc_0) + return 0; + if(g_instruction_table[instruction] == d68020_trapcc_16) + return 0; + if(g_instruction_table[instruction] == d68020_trapcc_32) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcdi_8) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcix_8) + return 0; + if(g_instruction_table[instruction] == d68020_tst_i_8) + return 0; + if(g_instruction_table[instruction] == d68020_tst_a_16) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcdi_16) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcix_16) + return 0; + if(g_instruction_table[instruction] == d68020_tst_i_16) + return 0; + if(g_instruction_table[instruction] == d68020_tst_a_32) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcdi_32) + return 0; + if(g_instruction_table[instruction] == d68020_tst_pcix_32) + return 0; + if(g_instruction_table[instruction] == d68020_tst_i_32) + return 0; + if(g_instruction_table[instruction] == d68020_unpk_rr) + return 0; + if(g_instruction_table[instruction] == d68020_unpk_mm) + return 0; + case M68K_CPU_TYPE_68EC020: + case M68K_CPU_TYPE_68020: + case M68K_CPU_TYPE_68030: + if(g_instruction_table[instruction] == d68040_cinv) + return 0; + if(g_instruction_table[instruction] == d68040_cpush) + return 0; + if(g_instruction_table[instruction] == d68040_move16_pi_pi) + return 0; + if(g_instruction_table[instruction] == d68040_move16_pi_al) + return 0; + if(g_instruction_table[instruction] == d68040_move16_al_pi) + return 0; + if(g_instruction_table[instruction] == d68040_move16_ai_al) + return 0; + if(g_instruction_table[instruction] == d68040_move16_al_ai) + return 0; + } + if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 && + (g_instruction_table[instruction] == d68020_callm || + g_instruction_table[instruction] == d68020_rtm)) + return 0; + + return 1; +} + + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ diff --git a/AltairZ80/m68kopac.c b/AltairZ80/m68kopac.c new file mode 100644 index 00000000..a44f9418 --- /dev/null +++ b/AltairZ80/m68kopac.c @@ -0,0 +1,11948 @@ +#include "m68kcpu.h" + +/* ======================================================================== */ +/* ========================= INSTRUCTION HANDLERS ========================= */ +/* ======================================================================== */ + + +void m68k_op_1010(void) +{ + m68ki_exception_1010(); +} + + +void m68k_op_1111(void) +{ + m68ki_exception_1111(); +} + + +void m68k_op_abcd_8_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_N = NFLAG_8(res); /* officially undefined */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +void m68k_op_abcd_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_N = NFLAG_8(res); /* officially undefined */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_abcd_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_N = NFLAG_8(res); /* officially undefined */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_abcd_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_N = NFLAG_8(res); /* officially undefined */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_abcd_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_N = NFLAG_8(res); /* officially undefined */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_add_8_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pi7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pd7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_8_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_a(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_16_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_add_32_er_d(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_a(void) +{ + uint* r_dst = &DX; + uint src = AY; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_32_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_add_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_add_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_adda_16_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY)); +} + + +void m68k_op_adda_16_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY)); +} + + +void m68k_op_adda_16_ai(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_AI_16())); +} + + +void m68k_op_adda_16_pi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PI_16())); +} + + +void m68k_op_adda_16_pd(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PD_16())); +} + + +void m68k_op_adda_16_di(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_DI_16())); +} + + +void m68k_op_adda_16_ix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_IX_16())); +} + + +void m68k_op_adda_16_aw(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AW_16())); +} + + +void m68k_op_adda_16_al(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AL_16())); +} + + +void m68k_op_adda_16_pcdi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCDI_16())); +} + + +void m68k_op_adda_16_pcix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCIX_16())); +} + + +void m68k_op_adda_16_i(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_I_16())); +} + + +void m68k_op_adda_32_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY); +} + + +void m68k_op_adda_32_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY); +} + + +void m68k_op_adda_32_ai(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_AI_32()); +} + + +void m68k_op_adda_32_pi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PI_32()); +} + + +void m68k_op_adda_32_pd(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PD_32()); +} + + +void m68k_op_adda_32_di(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_DI_32()); +} + + +void m68k_op_adda_32_ix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_IX_32()); +} + + +void m68k_op_adda_32_aw(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AW_32()); +} + + +void m68k_op_adda_32_al(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AL_32()); +} + + +void m68k_op_adda_32_pcdi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCDI_32()); +} + + +void m68k_op_adda_32_pcix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCIX_32()); +} + + +void m68k_op_adda_32_i(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_I_32()); +} + + +void m68k_op_addi_8_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_addi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addi_16_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_addi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addi_32_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_addi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_8_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_addq_8_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_pi7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_pd7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_8_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_addq_16_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_addq_16_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1); +} + + +void m68k_op_addq_16_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_16_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_addq_32_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_addq_32_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1); +} + + +void m68k_op_addq_32_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addq_32_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_addx_8_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +void m68k_op_addx_16_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +void m68k_op_addx_32_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +void m68k_op_addx_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_addx_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_addx_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_addx_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_addx_16_mm(void) +{ + uint src = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_addx_32_mm(void) +{ + uint src = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_8_er_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_ai(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_AI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pi7(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pd(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PD_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pd7(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PD_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_di(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_DI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_ix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_IX_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_aw(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AW_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_al(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AL_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pcdi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCDI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_pcix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCIX_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_er_i(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_I_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_ai(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_AI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_pi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_pd(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PD_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_di(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_DI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_ix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_IX_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_aw(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AW_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_al(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AL_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_pcdi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCDI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_pcix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCIX_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_16_er_i(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_I_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_d(void) +{ + FLAG_Z = DX &= DY; + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_ai(void) +{ + FLAG_Z = DX &= OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_pi(void) +{ + FLAG_Z = DX &= OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_pd(void) +{ + FLAG_Z = DX &= OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_di(void) +{ + FLAG_Z = DX &= OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_ix(void) +{ + FLAG_Z = DX &= OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_aw(void) +{ + FLAG_Z = DX &= OPER_AW_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_al(void) +{ + FLAG_Z = DX &= OPER_AL_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_pcdi(void) +{ + FLAG_Z = DX &= OPER_PCDI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_pcix(void) +{ + FLAG_Z = DX &= OPER_PCIX_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_32_er_i(void) +{ + FLAG_Z = DX &= OPER_I_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_and_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_and_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_and_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_8_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_andi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +void m68k_op_andi_16_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_andi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +void m68k_op_andi_32_d(void) +{ + FLAG_Z = DY &= (OPER_I_32()); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_andi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +void m68k_op_andi_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); +} + + +void m68k_op_andi_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() & src); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_asr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(GET_MSB_8(src)) + res |= m68ki_shift_8_table[shift]; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +void m68k_op_asr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + if(GET_MSB_16(src)) + res |= m68ki_shift_16_table[shift]; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +void m68k_op_asr_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = src >> shift; + + if(GET_MSB_32(src)) + res |= m68ki_shift_32_table[shift]; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +void m68k_op_asr_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> (shift - 1))<<8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + if(GET_MSB_16(src)) + { + *r_dst |= 0xffff; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_asr_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> (shift - 1))<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + if(GET_MSB_32(src)) + { + *r_dst = 0xffffffff; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_asr_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +void m68k_op_asl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_X = FLAG_C = src << shift; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + src &= m68ki_shift_8_table[shift + 1]; + FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; +} + + +void m68k_op_asl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (8-shift); + src &= m68ki_shift_16_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; +} + + +void m68k_op_asl_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (24-shift); + src &= m68ki_shift_32_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; +} + + +void m68k_op_asl_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift<> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + src &= m68ki_shift_16_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = (!(src == 0))<<7; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_asl_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift<> (32 - shift)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + src &= m68ki_shift_32_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = (!(src == 0))<<7; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_asl_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_asl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +void m68k_op_bhi_8(void) +{ + if(COND_HI()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bls_8(void) +{ + if(COND_LS()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bcc_8(void) +{ + if(COND_CC()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bcs_8(void) +{ + if(COND_CS()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bne_8(void) +{ + if(COND_NE()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_beq_8(void) +{ + if(COND_EQ()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bvc_8(void) +{ + if(COND_VC()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bvs_8(void) +{ + if(COND_VS()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bpl_8(void) +{ + if(COND_PL()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bmi_8(void) +{ + if(COND_MI()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bge_8(void) +{ + if(COND_GE()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_blt_8(void) +{ + if(COND_LT()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bgt_8(void) +{ + if(COND_GT()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_ble_8(void) +{ + if(COND_LE()) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +void m68k_op_bhi_16(void) +{ + if(COND_HI()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bls_16(void) +{ + if(COND_LS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bcc_16(void) +{ + if(COND_CC()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bcs_16(void) +{ + if(COND_CS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bne_16(void) +{ + if(COND_NE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_beq_16(void) +{ + if(COND_EQ()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bvc_16(void) +{ + if(COND_VC()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bvs_16(void) +{ + if(COND_VS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bpl_16(void) +{ + if(COND_PL()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bmi_16(void) +{ + if(COND_MI()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bge_16(void) +{ + if(COND_GE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_blt_16(void) +{ + if(COND_LT()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bgt_16(void) +{ + if(COND_GT()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_ble_16(void) +{ + if(COND_LE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +void m68k_op_bhi_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_HI()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bls_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LS()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bcc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CC()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bcs_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CS()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bne_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_NE()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_beq_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_EQ()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bvc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VC()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bvs_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VS()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bpl_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_PL()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bmi_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_MI()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bge_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GE()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_blt_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LT()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bgt_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GT()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_ble_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LE()) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bchg_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst ^= mask; +} + + +void m68k_op_bchg_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst ^= mask; +} + + +void m68k_op_bchg_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bchg_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +void m68k_op_bclr_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst &= ~mask; +} + + +void m68k_op_bclr_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst &= ~mask; +} + + +void m68k_op_bclr_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bclr_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +void m68k_op_bfchg_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint* data = &DY; + uint64 mask; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + offset &= 31; + width = ((width-1) & 31) + 1; + + mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask = ROR_32(mask, offset); + + FLAG_N = NFLAG_32(*data<>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long ^ mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfchg_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long ^ mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfchg_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long ^ mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfchg_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long ^ mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfchg_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long ^ mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfclr_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint* data = &DY; + uint64 mask; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + + offset &= 31; + width = ((width-1) & 31) + 1; + + + mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask = ROR_32(mask, offset); + + FLAG_N = NFLAG_32(*data<>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long & ~mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfclr_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long & ~mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfclr_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long & ~mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfclr_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long & ~mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfclr_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long & ~mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint64 data = DY; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + offset &= 31; + width = ((width-1) & 31) + 1; + + data = ROL_32(data, offset); + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2>>12)&7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_PCDI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfexts_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_PCIX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data = MAKE_INT_32(data) >> (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint64 data = DY; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + offset &= 31; + width = ((width-1) & 31) + 1; + + data = ROL_32(data, offset); + FLAG_N = NFLAG_32(data); + data >>= 32 - width; + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2>>12)&7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_PCDI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfextu_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint data; + uint ea = EA_PCIX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + REG_D[(word2 >> 12) & 7] = data; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint64 data = DY; + uint bit; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + offset &= 31; + width = ((width-1) & 31) + 1; + + data = ROL_32(data, offset); + FLAG_N = NFLAG_32(data); + data >>= 32 - width; + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_PCDI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfffo_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + sint local_offset; + uint width = word2; + uint data; + uint bit; + uint ea = EA_PCIX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + local_offset = offset % 8; + if(local_offset < 0) + { + local_offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + data = m68ki_read_32(ea); + data = MASK_OUT_ABOVE_32(data< 32) + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; + + FLAG_N = NFLAG_32(data); + data >>= (32 - width); + + FLAG_Z = data; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) + offset++; + + REG_D[(word2>>12)&7] = offset; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint* data = &DY; + uint64 mask; + uint64 insert = REG_D[(word2>>12)&7]; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + + offset &= 31; + width = ((width-1) & 31) + 1; + + + mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask = ROR_32(mask, offset); + + insert = MASK_OUT_ABOVE_32(insert << (32 - width)); + FLAG_N = NFLAG_32(insert); + FLAG_Z = insert; + insert = ROR_32(insert, offset); + + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + *data &= ~mask; + *data |= insert; + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint insert_base = REG_D[(word2>>12)&7]; + uint insert_long; + uint insert_byte; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); + FLAG_N = NFLAG_32(insert_base); + FLAG_Z = insert_base; + insert_long = insert_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + insert_byte = MASK_OUT_ABOVE_8(insert_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint insert_base = REG_D[(word2>>12)&7]; + uint insert_long; + uint insert_byte; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); + FLAG_N = NFLAG_32(insert_base); + FLAG_Z = insert_base; + insert_long = insert_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + insert_byte = MASK_OUT_ABOVE_8(insert_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint insert_base = REG_D[(word2>>12)&7]; + uint insert_long; + uint insert_byte; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); + FLAG_N = NFLAG_32(insert_base); + FLAG_Z = insert_base; + insert_long = insert_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + insert_byte = MASK_OUT_ABOVE_8(insert_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint insert_base = REG_D[(word2>>12)&7]; + uint insert_long; + uint insert_byte; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); + FLAG_N = NFLAG_32(insert_base); + FLAG_Z = insert_base; + insert_long = insert_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + insert_byte = MASK_OUT_ABOVE_8(insert_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfins_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint insert_base = REG_D[(word2>>12)&7]; + uint insert_long; + uint insert_byte; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); + FLAG_N = NFLAG_32(insert_base); + FLAG_Z = insert_base; + insert_long = insert_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + insert_byte = MASK_OUT_ABOVE_8(insert_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfset_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint* data = &DY; + uint64 mask; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + + offset &= 31; + width = ((width-1) & 31) + 1; + + + mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask = ROR_32(mask, offset); + + FLAG_N = NFLAG_32(*data<>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_AI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long | mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfset_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_DI_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long | mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfset_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_IX_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long | mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfset_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AW_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long | mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bfset_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AL_8(); + + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = NFLAG_32(data_long << offset); + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, data_long | mask_long); + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint offset = (word2>>6)&31; + uint width = word2; + uint* data = &DY; + uint64 mask; + + + if(BIT_B(word2)) + offset = REG_D[offset&7]; + if(BIT_5(word2)) + width = REG_D[width&7]; + + + offset &= 31; + width = ((width-1) & 31) + 1; + + + mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask = ROR_32(mask, offset); + + FLAG_N = NFLAG_32(*data<>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_AI_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_DI_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AY_IX_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AW_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_AL_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_PCDI_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bftst_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + sint offset = (word2>>6)&31; + uint width = word2; + uint mask_base; + uint data_long; + uint mask_long; + uint data_byte = 0; + uint mask_byte = 0; + uint ea = EA_PCIX_8(); + + if(BIT_B(word2)) + offset = MAKE_INT_32(REG_D[offset&7]); + if(BIT_5(word2)) + width = REG_D[width&7]; + + /* Offset is signed so we have to use ugly math =( */ + ea += offset / 8; + offset %= 8; + if(offset < 0) + { + offset += 8; + ea--; + } + width = ((width-1) & 31) + 1; + + + mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); + mask_long = mask_base >> offset; + + data_long = m68ki_read_32(ea); + FLAG_N = ((data_long & (0x80000000 >> offset))<>24; + FLAG_Z = data_long & mask_long; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + if((width + offset) > 32) + { + mask_byte = MASK_OUT_ABOVE_8(mask_base); + data_byte = m68ki_read_8(ea+4); + FLAG_Z |= (data_byte & mask_byte); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bkpt(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */ + } + m68ki_exception_illegal(); +} + + +void m68k_op_bra_8(void) +{ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_bra_16(void) +{ + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_bra_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint offset = OPER_I_32(); + REG_PC -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_bset_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst |= mask; +} + + +void m68k_op_bset_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst |= mask; +} + + +void m68k_op_bset_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bset_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +void m68k_op_bsr_8(void) +{ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); +} + + +void m68k_op_bsr_16(void) +{ + uint offset = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + REG_PC -= 2; + m68ki_branch_16(offset); +} + + +void m68k_op_bsr_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint offset = OPER_I_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + REG_PC -= 4; + m68ki_branch_32(offset); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_btst_32_r_d(void) +{ + FLAG_Z = DY & (1 << (DX & 0x1f)); +} + + +void m68k_op_btst_8_r_ai(void) +{ + FLAG_Z = OPER_AY_AI_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pi(void) +{ + FLAG_Z = OPER_AY_PI_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pi7(void) +{ + FLAG_Z = OPER_A7_PI_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pd(void) +{ + FLAG_Z = OPER_AY_PD_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pd7(void) +{ + FLAG_Z = OPER_A7_PD_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_di(void) +{ + FLAG_Z = OPER_AY_DI_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_ix(void) +{ + FLAG_Z = OPER_AY_IX_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_aw(void) +{ + FLAG_Z = OPER_AW_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_al(void) +{ + FLAG_Z = OPER_AL_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pcdi(void) +{ + FLAG_Z = OPER_PCDI_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_pcix(void) +{ + FLAG_Z = OPER_PCIX_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_8_r_i(void) +{ + FLAG_Z = OPER_I_8() & (1 << (DX & 7)); +} + + +void m68k_op_btst_32_s_d(void) +{ + FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f)); +} + + +void m68k_op_btst_8_s_ai(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_AI_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pi(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_PI_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pi7(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_A7_PI_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pd(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_PD_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pd7(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_A7_PD_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_di(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_DI_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_ix(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_IX_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_aw(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AW_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_al(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AL_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pcdi(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_PCDI_8() & (1 << bit); +} + + +void m68k_op_btst_8_s_pcix(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_PCIX_8() & (1 << bit); +} + + +void m68k_op_callm_32_ai(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_AY_AI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_di(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_AY_DI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_ix(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_AY_IX_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_aw(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_AW_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_al(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_AL_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_pcdi(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_PCDI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_callm_32_pcix(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + uint ea = EA_PCIX_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_PC += 2; +(void)ea; /* just to avoid an 'unused variable' warning */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_pi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_pi7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_A7_PI_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_pd(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_pd7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_A7_PD_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_8_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_8(); + uint dest = m68ki_read_8(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_8(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(*compare, dest, res); + FLAG_C = CFLAG_8(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_8(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_pi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_pd(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_16_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_16(); + uint dest = m68ki_read_16(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - MASK_OUT_ABOVE_16(*compare); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(*compare, dest, res); + FLAG_C = CFLAG_16(res); + + if(COND_NE()) + *compare = MASK_OUT_BELOW_16(*compare) | dest; + else + { + USE_CYCLES(3); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7])); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_pi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_pd(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_32(); + uint dest = m68ki_read_32(ea); + uint* compare = ®_D[word2 & 7]; + uint res = dest - *compare; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(*compare, dest, res); + FLAG_C = CFLAG_SUB_32(*compare, dest, res); + + if(COND_NE()) + *compare = dest; + else + { + USE_CYCLES(3); + m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]); + } + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas2_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_32(); + uint* compare1 = ®_D[(word2 >> 16) & 7]; + uint ea1 = REG_DA[(word2 >> 28) & 15]; + uint dest1 = m68ki_read_16(ea1); + uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1); + uint* compare2 = ®_D[word2 & 7]; + uint ea2 = REG_DA[(word2 >> 12) & 15]; + uint dest2 = m68ki_read_16(ea2); + uint res2; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_16(res1); + FLAG_Z = MASK_OUT_ABOVE_16(res1); + FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1); + FLAG_C = CFLAG_16(res1); + + if(COND_EQ()) + { + res2 = dest2 - MASK_OUT_ABOVE_16(*compare2); + + FLAG_N = NFLAG_16(res2); + FLAG_Z = MASK_OUT_ABOVE_16(res2); + FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2); + FLAG_C = CFLAG_16(res2); + + if(COND_EQ()) + { + USE_CYCLES(3); + m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]); + m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]); + return; + } + } + *compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1; + *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cas2_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_32(); + uint* compare1 = ®_D[(word2 >> 16) & 7]; + uint ea1 = REG_DA[(word2 >> 28) & 15]; + uint dest1 = m68ki_read_32(ea1); + uint res1 = dest1 - *compare1; + uint* compare2 = ®_D[word2 & 7]; + uint ea2 = REG_DA[(word2 >> 12) & 15]; + uint dest2 = m68ki_read_32(ea2); + uint res2; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + FLAG_N = NFLAG_32(res1); + FLAG_Z = MASK_OUT_ABOVE_32(res1); + FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1); + FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1); + + if(COND_EQ()) + { + res2 = dest2 - *compare2; + + FLAG_N = NFLAG_32(res2); + FLAG_Z = MASK_OUT_ABOVE_32(res2); + FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2); + FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2); + + if(COND_EQ()) + { + USE_CYCLES(3); + m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]); + m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]); + return; + } + } + *compare1 = dest1; + *compare2 = dest2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_16_d(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(DY); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_ai(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_AI_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_pi(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_PI_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_pd(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_PD_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_di(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_DI_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_ix(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_IX_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_aw(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AW_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_al(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AL_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_pcdi(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_PCDI_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_pcix(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_PCIX_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_16_i(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_I_16()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +void m68k_op_chk_32_d(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(DY); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AY_AI_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_pi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AY_PI_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_pd(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AY_PD_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AY_DI_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AY_IX_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AW_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_AL_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_PCDI_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_PCIX_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk_32_i(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + sint src = MAKE_INT_32(DX); + sint bound = MAKE_INT_32(OPER_I_32()); + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_AI_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_DI_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_IX_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AW_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AL_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCDI_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_8_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCIX_8(); + uint lower_bound = m68ki_read_8(ea); + uint upper_bound = m68ki_read_8(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_8(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_AI_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_DI_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_IX_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AW_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AL_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCDI_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_16_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCIX_16(); + uint lower_bound = m68ki_read_16(ea); + uint upper_bound = m68ki_read_16(ea + 1); + + if(!BIT_F(word2)) + compare = MAKE_INT_16(compare); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C); + FLAG_C = CFLAG_16(FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_ai(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_AI_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_di(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_DI_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_ix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AY_IX_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_aw(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AW_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_al(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_AL_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCDI_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_chk2cmp2_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint compare = REG_DA[(word2 >> 12) & 15]; + uint ea = EA_PCIX_32(); + uint lower_bound = m68ki_read_32(ea); + uint upper_bound = m68ki_read_32(ea + 1); + + FLAG_C = compare - lower_bound; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C); + if(COND_CS()) + { + if(BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + return; + } + + FLAG_C = upper_bound - compare; + FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C); + FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); + + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_clr_8_d(void) +{ + DY &= 0xffffff00; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_d(void) +{ + DY &= 0xffff0000; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_ai(void) +{ + m68ki_write_16(EA_AY_AI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_pi(void) +{ + m68ki_write_16(EA_AY_PI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_pd(void) +{ + m68ki_write_16(EA_AY_PD_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_di(void) +{ + m68ki_write_16(EA_AY_DI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_ix(void) +{ + m68ki_write_16(EA_AY_IX_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_aw(void) +{ + m68ki_write_16(EA_AW_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_16_al(void) +{ + m68ki_write_16(EA_AL_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_d(void) +{ + DY = 0; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_ai(void) +{ + m68ki_write_32(EA_AY_AI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_pi(void) +{ + m68ki_write_32(EA_AY_PI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_pd(void) +{ + m68ki_write_32(EA_AY_PD_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_di(void) +{ + m68ki_write_32(EA_AY_DI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_ix(void) +{ + m68ki_write_32(EA_AY_IX_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_aw(void) +{ + m68ki_write_32(EA_AW_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_clr_32_al(void) +{ + m68ki_write_32(EA_AL_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +void m68k_op_cmp_8_d(void) +{ + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_ai(void) +{ + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pi(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pi7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pd(void) +{ + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pd7(void) +{ + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_di(void) +{ + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_ix(void) +{ + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_aw(void) +{ + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_al(void) +{ + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pcdi(void) +{ + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_pcix(void) +{ + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_8_i(void) +{ + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmp_16_d(void) +{ + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_a(void) +{ + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_ai(void) +{ + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_pi(void) +{ + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_pd(void) +{ + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_di(void) +{ + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_ix(void) +{ + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_aw(void) +{ + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_al(void) +{ + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_pcdi(void) +{ + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_pcix(void) +{ + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_16_i(void) +{ + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmp_32_d(void) +{ + uint src = DY; + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_a(void) +{ + uint src = AY; + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_ai(void) +{ + uint src = OPER_AY_AI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_pi(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_pd(void) +{ + uint src = OPER_AY_PD_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_di(void) +{ + uint src = OPER_AY_DI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_ix(void) +{ + uint src = OPER_AY_IX_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_aw(void) +{ + uint src = OPER_AW_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_al(void) +{ + uint src = OPER_AL_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_pcdi(void) +{ + uint src = OPER_PCDI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_pcix(void) +{ + uint src = OPER_PCIX_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmp_32_i(void) +{ + uint src = OPER_I_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_d(void) +{ + uint src = MAKE_INT_16(DY); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_a(void) +{ + uint src = MAKE_INT_16(AY); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_ai(void) +{ + uint src = MAKE_INT_16(OPER_AY_AI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_pi(void) +{ + uint src = MAKE_INT_16(OPER_AY_PI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_pd(void) +{ + uint src = MAKE_INT_16(OPER_AY_PD_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_di(void) +{ + uint src = MAKE_INT_16(OPER_AY_DI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_ix(void) +{ + uint src = MAKE_INT_16(OPER_AY_IX_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_aw(void) +{ + uint src = MAKE_INT_16(OPER_AW_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_al(void) +{ + uint src = MAKE_INT_16(OPER_AL_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_pcdi(void) +{ + uint src = MAKE_INT_16(OPER_PCDI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_pcix(void) +{ + uint src = MAKE_INT_16(OPER_PCIX_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_16_i(void) +{ + uint src = MAKE_INT_16(OPER_I_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_d(void) +{ + uint src = DY; + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_a(void) +{ + uint src = AY; + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_ai(void) +{ + uint src = OPER_AY_AI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_pi(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_pd(void) +{ + uint src = OPER_AY_PD_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_di(void) +{ + uint src = OPER_AY_DI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_ix(void) +{ + uint src = OPER_AY_IX_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_aw(void) +{ + uint src = OPER_AW_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_al(void) +{ + uint src = OPER_AL_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_pcdi(void) +{ + uint src = OPER_PCDI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_pcix(void) +{ + uint src = OPER_PCIX_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpa_32_i(void) +{ + uint src = OPER_I_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_8_d(void) +{ + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(DY); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_ai(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_AI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_pi(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_pd(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_PD_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_A7_PD_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_di(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_DI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_ix(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_IX_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_aw(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AW_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_al(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AL_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpi_8_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_8(); + uint dst = OPER_PCDI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpi_8_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_8(); + uint dst = OPER_PCIX_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpi_16_d(void) +{ + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(DY); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_ai(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_AI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_pi(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_PI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_pd(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_PD_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_di(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_DI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_ix(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_IX_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_aw(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AW_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_al(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AL_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpi_16_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_16(); + uint dst = OPER_PCDI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpi_16_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_16(); + uint dst = OPER_PCIX_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpi_32_d(void) +{ + uint src = OPER_I_32(); + uint dst = DY; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_ai(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_AI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_pi(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_PI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_pd(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_PD_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_di(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_DI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_ix(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_IX_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_aw(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AW_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_al(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AL_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cmpi_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_32(); + uint dst = OPER_PCDI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpi_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_I_32(); + uint dst = OPER_PCIX_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_cmpm_8_ax7(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpm_8_ay7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = OPER_AX_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpm_8_axy7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpm_8(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = OPER_AX_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +void m68k_op_cmpm_16(void) +{ + uint src = OPER_AY_PI_16(); + uint dst = OPER_AX_PI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +void m68k_op_cmpm_32(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = OPER_AX_PI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +void m68k_op_cpbcc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_1111(); +} + + +void m68k_op_cpdbcc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_1111(); +} + + +void m68k_op_cpgen_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_1111(); +} + + +void m68k_op_cpscc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_1111(); +} + + +void m68k_op_cptrapcc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_1111(); +} + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + + diff --git a/AltairZ80/m68kopdm.c b/AltairZ80/m68kopdm.c new file mode 100644 index 00000000..66a4d1d0 --- /dev/null +++ b/AltairZ80/m68kopdm.c @@ -0,0 +1,13221 @@ +#include "m68kcpu.h" + +/* ======================================================================== */ +/* ========================= INSTRUCTION HANDLERS ========================= */ +/* ======================================================================== */ + + +void m68k_op_dbt_16(void) +{ + REG_PC += 2; +} + + +void m68k_op_dbf_16(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbhi_16(void) +{ + if(COND_NOT_HI()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbls_16(void) +{ + if(COND_NOT_LS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbcc_16(void) +{ + if(COND_NOT_CC()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbcs_16(void) +{ + if(COND_NOT_CS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbne_16(void) +{ + if(COND_NOT_NE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbeq_16(void) +{ + if(COND_NOT_EQ()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbvc_16(void) +{ + if(COND_NOT_VC()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbvs_16(void) +{ + if(COND_NOT_VS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbpl_16(void) +{ + if(COND_NOT_PL()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbmi_16(void) +{ + if(COND_NOT_MI()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbge_16(void) +{ + if(COND_NOT_GE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dblt_16(void) +{ + if(COND_NOT_LT()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dbgt_16(void) +{ + if(COND_NOT_GT()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_dble_16(void) +{ + if(COND_NOT_LE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +void m68k_op_divs_16_d(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(DY); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_ai(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_AI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_pi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_pd(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PD_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_di(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_DI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_ix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_IX_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_aw(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AW_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_al(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AL_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_pcdi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCDI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_pcix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCIX_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divs_16_i(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_I_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divu_16_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +void m68k_op_divl_32_d(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = DY; + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = DY; + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_ai(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AY_AI_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AY_AI_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_pi(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AY_PI_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AY_PI_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_pd(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AY_PD_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AY_PD_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_di(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AY_DI_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AY_DI_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_ix(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AY_IX_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AY_IX_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_aw(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AW_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AW_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_al(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_AL_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_AL_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_pcdi(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_PCDI_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_PCDI_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_pcix(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_PCIX_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_PCIX_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_divl_32_i(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 divisor = OPER_I_32(); + uint64 dividend = 0; + uint64 quotient = 0; + uint64 remainder = 0; + + if(divisor != 0) + { + if(BIT_A(word2)) /* 64 bit */ + { + dividend = REG_D[word2 & 7]; + dividend <<= 32; + dividend |= REG_D[(word2 >> 12) & 7]; + + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); + if((sint64)quotient != (sint64)((sint32)quotient)) + { + FLAG_V = VFLAG_SET; + return; + } + } + else /* unsigned */ + { + quotient = dividend / divisor; + if(quotient > 0xffffffff) + { + FLAG_V = VFLAG_SET; + return; + } + remainder = dividend % divisor; + } + } + else /* 32 bit */ + { + dividend = REG_D[(word2 >> 12) & 7]; + if(BIT_B(word2)) /* signed */ + { + quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); + remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); + } + else /* unsigned */ + { + quotient = dividend / divisor; + remainder = dividend % divisor; + } + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint divisor = OPER_I_32(); + uint dividend_hi = REG_D[word2 & 7]; + uint dividend_lo = REG_D[(word2 >> 12) & 7]; + uint quotient = 0; + uint remainder = 0; + uint dividend_neg = 0; + uint divisor_neg = 0; + sint i; + uint overflow; + + if(divisor != 0) + { + /* quad / long : long quotient, long remainder */ + if(BIT_A(word2)) + { + if(BIT_B(word2)) /* signed */ + { + /* special case in signed divide */ + if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + REG_D[word2 & 7] = 0; + REG_D[(word2 >> 12) & 7] = 0x80000000; + + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + if(GET_MSB_32(dividend_hi)) + { + dividend_neg = 1; + dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); + dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); + } + if(GET_MSB_32(divisor)) + { + divisor_neg = 1; + divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); + + } + } + + /* if the upper long is greater than the divisor, we're overflowing. */ + if(dividend_hi >= divisor) + { + FLAG_V = VFLAG_SET; + return; + } + + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + remainder = (remainder << 1) + ((dividend_hi >> i) & 1); + if(remainder >= divisor) + { + remainder -= divisor; + quotient++; + } + } + for(i = 31; i >= 0; i--) + { + quotient <<= 1; + overflow = GET_MSB_32(remainder); + remainder = (remainder << 1) + ((dividend_lo >> i) & 1); + if(remainder >= divisor || overflow) + { + remainder -= divisor; + quotient++; + } + } + + if(BIT_B(word2)) /* signed */ + { + if(quotient > 0x7fffffff) + { + FLAG_V = VFLAG_SET; + return; + } + if(dividend_neg) + { + remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + if(divisor_neg) + quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); + } + + REG_D[word2 & 7] = remainder; + REG_D[(word2 >> 12) & 7] = quotient; + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + + /* long / long: long quotient, maybe long remainder */ + if(BIT_B(word2)) /* signed */ + { + /* Special case in divide */ + if(dividend_lo == 0x80000000 && divisor == 0xffffffff) + { + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + REG_D[(word2 >> 12) & 7] = 0x80000000; + REG_D[word2 & 7] = 0; + return; + } + REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); + } + else + { + REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); + quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); + } + + FLAG_N = NFLAG_32(quotient); + FLAG_Z = quotient; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_eor_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX)); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_8_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX)); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_16_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_d(void) +{ + uint res = DY ^= DX; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eor_32_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8()); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16()); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_d(void) +{ + uint res = DY ^= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_eori_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); +} + + +void m68k_op_eori_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() ^ src); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_exg_32_dd(void) +{ + uint* reg_a = &DX; + uint* reg_b = &DY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +void m68k_op_exg_32_aa(void) +{ + uint* reg_a = &AX; + uint* reg_b = &AY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +void m68k_op_exg_32_da(void) +{ + uint* reg_a = &DX; + uint* reg_b = &AY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +void m68k_op_ext_16(void) +{ + uint* r_dst = &DY; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0); + + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_ext_32(void) +{ + uint* r_dst = &DY; + + *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0); + + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_extb_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint* r_dst = &DY; + + *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0); + + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_illegal(void) +{ + m68ki_exception_illegal(); +} + + +void m68k_op_jmp_32_ai(void) +{ + m68ki_jump(EA_AY_AI_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_di(void) +{ + m68ki_jump(EA_AY_DI_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_ix(void) +{ + m68ki_jump(EA_AY_IX_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_aw(void) +{ + m68ki_jump(EA_AW_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_al(void) +{ + m68ki_jump(EA_AL_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_pcdi(void) +{ + m68ki_jump(EA_PCDI_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jmp_32_pcix(void) +{ + m68ki_jump(EA_PCIX_32()); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(REG_PC == REG_PPC) + USE_ALL_CYCLES(); +} + + +void m68k_op_jsr_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_di(void) +{ + uint ea = EA_AY_DI_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_aw(void) +{ + uint ea = EA_AW_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_al(void) +{ + uint ea = EA_AL_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_pcdi(void) +{ + uint ea = EA_PCDI_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_jsr_32_pcix(void) +{ + uint ea = EA_PCIX_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +void m68k_op_lea_32_ai(void) +{ + AX = EA_AY_AI_32(); +} + + +void m68k_op_lea_32_di(void) +{ + AX = EA_AY_DI_32(); +} + + +void m68k_op_lea_32_ix(void) +{ + AX = EA_AY_IX_32(); +} + + +void m68k_op_lea_32_aw(void) +{ + AX = EA_AW_32(); +} + + +void m68k_op_lea_32_al(void) +{ + AX = EA_AL_32(); +} + + +void m68k_op_lea_32_pcdi(void) +{ + AX = EA_PCDI_32(); +} + + +void m68k_op_lea_32_pcix(void) +{ + AX = EA_PCIX_32(); +} + + +void m68k_op_link_16_a7(void) +{ + REG_A[7] -= 4; + m68ki_write_32(REG_A[7], REG_A[7]); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); +} + + +void m68k_op_link_16(void) +{ + uint* r_dst = &AY; + + m68ki_push_32(*r_dst); + *r_dst = REG_A[7]; + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); +} + + +void m68k_op_link_32_a7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_A[7] -= 4; + m68ki_write_32(REG_A[7], REG_A[7]); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_link_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint* r_dst = &AY; + + m68ki_push_32(*r_dst); + *r_dst = REG_A[7]; + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_lsr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = src >> shift; + + *r_dst = res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> (shift - 1))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift<> (shift - 1))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0); + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src << shift; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (8-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (24-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift<> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift<> (32 - shift)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_lsl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_move_8_d_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_di(void) +{ + uint res = OPER_AY_DI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_aw(void) +{ + uint res = OPER_AW_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_al(void) +{ + uint res = OPER_AL_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_d_i(void) +{ + uint res = OPER_I_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ai_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_AI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi7_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_A7_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pi_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_PI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd7_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_A7_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_pd_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_PD_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_di_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_DI_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_ix_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_IX_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_aw_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AW_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_8_al_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AL_8(); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_di(void) +{ + uint res = OPER_AY_DI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_aw(void) +{ + uint res = OPER_AW_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_al(void) +{ + uint res = OPER_AL_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_d_i(void) +{ + uint res = OPER_I_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ai_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_AI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pi_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_PI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_pd_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_PD_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_di_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_DI_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_ix_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_IX_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_aw_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AW_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_16_al_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AL_16(); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_d(void) +{ + uint res = DY; + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_a(void) +{ + uint res = AY; + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_di(void) +{ + uint res = OPER_AY_DI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_aw(void) +{ + uint res = OPER_AW_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_al(void) +{ + uint res = OPER_AL_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_d_i(void) +{ + uint res = OPER_I_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_d(void) +{ + uint res = DY; + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_a(void) +{ + uint res = AY; + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ai_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_AI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_d(void) +{ + uint res = DY; + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_a(void) +{ + uint res = AY; + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pi_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_PI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_d(void) +{ + uint res = DY; + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_a(void) +{ + uint res = AY; + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_pd_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_PD_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_d(void) +{ + uint res = DY; + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_a(void) +{ + uint res = AY; + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_di_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_DI_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_d(void) +{ + uint res = DY; + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_a(void) +{ + uint res = AY; + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_ix_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_IX_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_d(void) +{ + uint res = DY; + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_a(void) +{ + uint res = AY; + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_aw_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AW_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_d(void) +{ + uint res = DY; + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_a(void) +{ + uint res = AY; + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_move_32_al_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AL_32(); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_movea_16_d(void) +{ + AX = MAKE_INT_16(DY); +} + + +void m68k_op_movea_16_a(void) +{ + AX = MAKE_INT_16(AY); +} + + +void m68k_op_movea_16_ai(void) +{ + AX = MAKE_INT_16(OPER_AY_AI_16()); +} + + +void m68k_op_movea_16_pi(void) +{ + AX = MAKE_INT_16(OPER_AY_PI_16()); +} + + +void m68k_op_movea_16_pd(void) +{ + AX = MAKE_INT_16(OPER_AY_PD_16()); +} + + +void m68k_op_movea_16_di(void) +{ + AX = MAKE_INT_16(OPER_AY_DI_16()); +} + + +void m68k_op_movea_16_ix(void) +{ + AX = MAKE_INT_16(OPER_AY_IX_16()); +} + + +void m68k_op_movea_16_aw(void) +{ + AX = MAKE_INT_16(OPER_AW_16()); +} + + +void m68k_op_movea_16_al(void) +{ + AX = MAKE_INT_16(OPER_AL_16()); +} + + +void m68k_op_movea_16_pcdi(void) +{ + AX = MAKE_INT_16(OPER_PCDI_16()); +} + + +void m68k_op_movea_16_pcix(void) +{ + AX = MAKE_INT_16(OPER_PCIX_16()); +} + + +void m68k_op_movea_16_i(void) +{ + AX = MAKE_INT_16(OPER_I_16()); +} + + +void m68k_op_movea_32_d(void) +{ + AX = DY; +} + + +void m68k_op_movea_32_a(void) +{ + AX = AY; +} + + +void m68k_op_movea_32_ai(void) +{ + AX = OPER_AY_AI_32(); +} + + +void m68k_op_movea_32_pi(void) +{ + AX = OPER_AY_PI_32(); +} + + +void m68k_op_movea_32_pd(void) +{ + AX = OPER_AY_PD_32(); +} + + +void m68k_op_movea_32_di(void) +{ + AX = OPER_AY_DI_32(); +} + + +void m68k_op_movea_32_ix(void) +{ + AX = OPER_AY_IX_32(); +} + + +void m68k_op_movea_32_aw(void) +{ + AX = OPER_AW_32(); +} + + +void m68k_op_movea_32_al(void) +{ + AX = OPER_AL_32(); +} + + +void m68k_op_movea_32_pcdi(void) +{ + AX = OPER_PCDI_32(); +} + + +void m68k_op_movea_32_pcix(void) +{ + AX = OPER_PCIX_32(); +} + + +void m68k_op_movea_32_i(void) +{ + AX = OPER_I_32(); +} + + +void m68k_op_move_16_frc_d(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_ai(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AY_AI_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_pi(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AY_PI_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_pd(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AY_PD_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_di(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AY_DI_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_ix(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AY_IX_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_aw(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AW_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_frc_al(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + m68ki_write_16(EA_AL_16(), m68ki_get_ccr()); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_move_16_toc_d(void) +{ + m68ki_set_ccr(DY); +} + + +void m68k_op_move_16_toc_ai(void) +{ + m68ki_set_ccr(OPER_AY_AI_16()); +} + + +void m68k_op_move_16_toc_pi(void) +{ + m68ki_set_ccr(OPER_AY_PI_16()); +} + + +void m68k_op_move_16_toc_pd(void) +{ + m68ki_set_ccr(OPER_AY_PD_16()); +} + + +void m68k_op_move_16_toc_di(void) +{ + m68ki_set_ccr(OPER_AY_DI_16()); +} + + +void m68k_op_move_16_toc_ix(void) +{ + m68ki_set_ccr(OPER_AY_IX_16()); +} + + +void m68k_op_move_16_toc_aw(void) +{ + m68ki_set_ccr(OPER_AW_16()); +} + + +void m68k_op_move_16_toc_al(void) +{ + m68ki_set_ccr(OPER_AL_16()); +} + + +void m68k_op_move_16_toc_pcdi(void) +{ + m68ki_set_ccr(OPER_PCDI_16()); +} + + +void m68k_op_move_16_toc_pcix(void) +{ + m68ki_set_ccr(OPER_PCIX_16()); +} + + +void m68k_op_move_16_toc_i(void) +{ + m68ki_set_ccr(OPER_I_16()); +} + + +void m68k_op_move_16_frs_d(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr(); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_ai(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AY_AI_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_pi(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AY_PI_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_pd(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AY_PD_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_di(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AY_DI_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_ix(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AY_IX_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_aw(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AW_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_frs_al(void) +{ + if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ + { + uint ea = EA_AL_16(); + m68ki_write_16(ea, m68ki_get_sr()); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_d(void) +{ + if(FLAG_S) + { + m68ki_set_sr(DY); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_ai(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_AI_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_pi(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_PI_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_pd(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_PD_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_di(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_DI_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_ix(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_IX_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_aw(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AW_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_al(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AL_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_pcdi(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_PCDI_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_pcix(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_PCIX_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_16_tos_i(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_32_fru(void) +{ + if(FLAG_S) + { + AY = REG_USP; + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_move_32_tou(void) +{ + if(FLAG_S) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_USP = AY; + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_movec_32_cr(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + switch (word2 & 0xfff) + { + case 0x000: /* SFC */ + REG_DA[(word2 >> 12) & 15] = REG_SFC; + return; + case 0x001: /* DFC */ + REG_DA[(word2 >> 12) & 15] = REG_DFC; + return; + case 0x002: /* CACR */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_DA[(word2 >> 12) & 15] = REG_CACR; + return; + } + return; + case 0x800: /* USP */ + REG_DA[(word2 >> 12) & 15] = REG_USP; + return; + case 0x801: /* VBR */ + REG_DA[(word2 >> 12) & 15] = REG_VBR; + return; + case 0x802: /* CAAR */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_DA[(word2 >> 12) & 15] = REG_CAAR; + return; + } + m68ki_exception_illegal(); + break; + case 0x803: /* MSP */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP; + return; + } + m68ki_exception_illegal(); + return; + case 0x804: /* ISP */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP; + return; + } + m68ki_exception_illegal(); + return; + default: + m68ki_exception_illegal(); + return; + } + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_movec_32_rc(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + switch (word2 & 0xfff) + { + case 0x000: /* SFC */ + REG_SFC = REG_DA[(word2 >> 12) & 15] & 7; + return; + case 0x001: /* DFC */ + REG_DFC = REG_DA[(word2 >> 12) & 15] & 7; + return; + case 0x002: /* CACR */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_CACR = REG_DA[(word2 >> 12) & 15]; + return; + } + m68ki_exception_illegal(); + return; + case 0x800: /* USP */ + REG_USP = REG_DA[(word2 >> 12) & 15]; + return; + case 0x801: /* VBR */ + REG_VBR = REG_DA[(word2 >> 12) & 15]; + return; + case 0x802: /* CAAR */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_CAAR = REG_DA[(word2 >> 12) & 15]; + return; + } + m68ki_exception_illegal(); + return; + case 0x803: /* MSP */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* we are in supervisor mode so just check for M flag */ + if(!FLAG_M) + { + REG_MSP = REG_DA[(word2 >> 12) & 15]; + return; + } + REG_SP = REG_DA[(word2 >> 12) & 15]; + return; + } + m68ki_exception_illegal(); + return; + case 0x804: /* ISP */ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(!FLAG_M) + { + REG_SP = REG_DA[(word2 >> 12) & 15]; + return; + } + REG_ISP = REG_DA[(word2 >> 12) & 15]; + return; + } + m68ki_exception_illegal(); + return; + default: + m68ki_exception_illegal(); + return; + } + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_movem_16_re_pd(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = AY; + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + ea -= 2; + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i])); + count++; + } + AY = ea; + + USE_CYCLES(count<> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); +} + + +void m68k_op_movep_32_re(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); +} + + +void m68k_op_movep_16_er(void) +{ + uint ea = EA_AY_DI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2)); +} + + +void m68k_op_movep_32_er(void) +{ + uint ea = EA_AY_DI_32(); + + DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16) + + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6); +} + + +void m68k_op_moves_8_ai(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_pi(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_pi7(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_A7_PI_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_pd(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_pd7(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_A7_PD_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_di(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_ix(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_aw(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_8_al(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_8(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_ai(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_pi(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_pd(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_di(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_ix(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_aw(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_16_al(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_16(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); + return; + } + if(BIT_F(word2)) /* Memory to address register */ + { + REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to data register */ + REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_ai(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_AI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_pi(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_pd(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_PD_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_di(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_DI_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_ix(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AY_IX_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_aw(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AW_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moves_32_al(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + if(FLAG_S) + { + uint word2 = OPER_I_16(); + uint ea = EA_AL_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(BIT_B(word2)) /* Register to memory */ + { + m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + /* Memory to register */ + REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + USE_CYCLES(2); + return; + } + m68ki_exception_privilege_violation(); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_moveq_32(void) +{ + uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR)); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_d(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_ai(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_AI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_pi(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_pd(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PD_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_di(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_DI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_ix(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_IX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_aw(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AW_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_al(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AL_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_pcdi(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCDI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_pcix(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCIX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_muls_16_i(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_I_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_d(void) +{ + uint* r_dst = &DX; + uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_ai(void) +{ + uint* r_dst = &DX; + uint res = OPER_AY_AI_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_pi(void) +{ + uint* r_dst = &DX; + uint res = OPER_AY_PI_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_pd(void) +{ + uint* r_dst = &DX; + uint res = OPER_AY_PD_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_di(void) +{ + uint* r_dst = &DX; + uint res = OPER_AY_DI_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_ix(void) +{ + uint* r_dst = &DX; + uint res = OPER_AY_IX_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_aw(void) +{ + uint* r_dst = &DX; + uint res = OPER_AW_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_al(void) +{ + uint* r_dst = &DX; + uint res = OPER_AL_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_pcdi(void) +{ + uint* r_dst = &DX; + uint res = OPER_PCDI_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_pcix(void) +{ + uint* r_dst = &DX; + uint res = OPER_PCIX_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mulu_16_i(void) +{ + uint* r_dst = &DX; + uint res = OPER_I_16() * MASK_OUT_ABOVE_16(*r_dst); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_mull_32_d(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = DY; + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = DY; + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_ai(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AY_AI_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AY_AI_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_pi(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AY_PI_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AY_PI_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_pd(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AY_PD_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AY_PD_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_di(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AY_DI_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AY_DI_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_ix(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AY_IX_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AY_IX_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_aw(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AW_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AW_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_al(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_AL_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_AL_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_pcdi(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_PCDI_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_PCDI_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_pcix(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_PCIX_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_PCIX_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +void m68k_op_mull_32_i(void) +{ +#if M68K_USE_64_BIT + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint64 src = OPER_I_32(); + uint64 dst = REG_D[(word2 >> 12) & 7]; + uint64 res; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + res = (sint64)((sint32)src) * (sint64)((sint32)dst); + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = ((sint64)res != (sint32)res)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + + res = src * dst; + if(!BIT_A(word2)) + { + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_N = NFLAG_32(res); + FLAG_V = (res > 0xffffffff)<<7; + REG_D[(word2 >> 12) & 7] = FLAG_Z; + return; + } + FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); + FLAG_N = NFLAG_64(res); + FLAG_V = VFLAG_CLEAR; + REG_D[word2 & 7] = (res >> 32); + REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + return; + } + m68ki_exception_illegal(); + +#else + + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint word2 = OPER_I_16(); + uint src = OPER_I_32(); + uint dst = REG_D[(word2 >> 12) & 7]; + uint neg = GET_MSB_32(src ^ dst); + uint src1; + uint src2; + uint dst1; + uint dst2; + uint r1; + uint r2; + uint r3; + uint r4; + uint lo; + uint hi; + + FLAG_C = CFLAG_CLEAR; + + if(BIT_B(word2)) /* signed */ + { + if(GET_MSB_32(src)) + src = (uint)MASK_OUT_ABOVE_32(-(sint)src); + if(GET_MSB_32(dst)) + dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); + } + + src1 = MASK_OUT_ABOVE_16(src); + src2 = src>>16; + dst1 = MASK_OUT_ABOVE_16(dst); + dst2 = dst>>16; + + + r1 = src1 * dst1; + r2 = src1 * dst2; + r3 = src2 * dst1; + r4 = src2 * dst2; + + lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); + hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); + + if(BIT_B(word2) && neg) + { + hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); + lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); + } + + if(BIT_A(word2)) + { + REG_D[word2 & 7] = hi; + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(hi); + FLAG_Z = hi | lo; + FLAG_V = VFLAG_CLEAR; + return; + } + + REG_D[(word2 >> 12) & 7] = lo; + FLAG_N = NFLAG_32(lo); + FLAG_Z = lo; + if(BIT_B(word2)) + FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; + else + FLAG_V = (hi != 0) << 7; + return; + } + m68ki_exception_illegal(); + +#endif +} + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + + diff --git a/AltairZ80/m68kopnz.c b/AltairZ80/m68kopnz.c new file mode 100644 index 00000000..11ba57a1 --- /dev/null +++ b/AltairZ80/m68kopnz.c @@ -0,0 +1,8710 @@ +#include "m68kcpu.h" + +/* ======================================================================== */ +/* ========================= INSTRUCTION HANDLERS ========================= */ +/* ======================================================================== */ + + +void m68k_op_nbcd_8_d(void) +{ + uint* r_dst = &DY; + uint dst = *r_dst; + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_aw(void) +{ + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_nbcd_8_al(void) +{ + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* officially undefined */ +} + + +void m68k_op_neg_8_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_8(*r_dst); + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = *r_dst & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_neg_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_8_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_neg_16_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_16(*r_dst); + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (*r_dst & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_neg_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_neg_32_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - *r_dst; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res); + FLAG_V = (*r_dst & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_neg_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_aw(void) +{ + uint ea = EA_AW_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_neg_32_al(void) +{ + uint ea = EA_AL_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_negx_8_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = *r_dst & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +void m68k_op_negx_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_8_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_negx_16_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (*r_dst & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +void m68k_op_negx_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_negx_32_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res); + FLAG_V = (*r_dst & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +void m68k_op_negx_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_aw(void) +{ + uint ea = EA_AW_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_negx_32_al(void) +{ + uint ea = EA_AL_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_nop(void) +{ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ +} + + +void m68k_op_not_8_d(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_8(~*r_dst); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_8_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_d(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(~*r_dst); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_16_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_d(void) +{ + uint* r_dst = &DY; + uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_aw(void) +{ + uint ea = EA_AW_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_not_32_al(void) +{ + uint ea = EA_AL_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_d(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY))); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_ai(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_AI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pi(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pi7(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pd(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PD_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pd7(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PD_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_di(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_DI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_ix(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_IX_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_aw(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AW_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_al(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AL_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pcdi(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCDI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_pcix(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCIX_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_er_i(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_I_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_d(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY))); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_ai(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_AI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_pi(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_pd(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PD_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_di(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_DI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_ix(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_IX_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_aw(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AW_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_al(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AL_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_pcdi(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCDI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_pcix(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCIX_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_er_i(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_I_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_d(void) +{ + uint res = DX |= DY; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_ai(void) +{ + uint res = DX |= OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_pi(void) +{ + uint res = DX |= OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_pd(void) +{ + uint res = DX |= OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_di(void) +{ + uint res = DX |= OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_ix(void) +{ + uint res = DX |= OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_aw(void) +{ + uint res = DX |= OPER_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_al(void) +{ + uint res = DX |= OPER_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_pcdi(void) +{ + uint res = DX |= OPER_PCDI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_pcix(void) +{ + uint res = DX |= OPER_PCIX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_er_i(void) +{ + uint res = DX |= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_or_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16()); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_d(void) +{ + uint res = DY |= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ori_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); +} + + +void m68k_op_ori_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() | src); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_pack_16_rr(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: DX and DY are reversed in Motorola's docs */ + uint src = DY + OPER_I_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_pack_16_mm_ax7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint ea_src = EA_AY_PD_8(); + uint src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); + + m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_pack_16_mm_ay7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint ea_src = EA_A7_PD_8(); + uint src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); + + m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_pack_16_mm_axy7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint ea_src = EA_A7_PD_8(); + uint src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); + + m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_pack_16_mm(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint ea_src = EA_AY_PD_8(); + uint src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); + + m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_pea_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_di(void) +{ + uint ea = EA_AY_DI_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_aw(void) +{ + uint ea = EA_AW_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_al(void) +{ + uint ea = EA_AL_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_pcdi(void) +{ + uint ea = EA_PCDI_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_pea_32_pcix(void) +{ + uint ea = EA_PCIX_32(); + + m68ki_push_32(ea); +} + + +void m68k_op_reset(void) +{ + if(FLAG_S) + { + m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */ + USE_CYCLES(CYC_RESET); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_ror_8_s(void) +{ + uint* r_dst = &DY; + uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_8(src, shift); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = src << (9-orig_shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_16(src, shift); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint res = ROR_32(src, shift); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_8(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift<> ((shift - 1) & 15)) << 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_32_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 31; + uint64 src = *r_dst; + uint res = ROR_32(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift<> ((shift - 1) & 31)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_ror_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_8_s(void) +{ + uint* r_dst = &DY; + uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_8(src, shift); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = src << orig_shift; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROL_16(src, shift); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> (8-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint res = ROL_32(src, shift); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = src >> (24-shift); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_8(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift<> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + FLAG_C = (src & 1)<<8; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_32_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 31; + uint64 src = *r_dst; + uint res = ROL_32(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift<> (32 - shift)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rol_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_32_s(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROR_33_64(res, shift); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift))); + uint new_x_flag = src & (1 << (shift - 1)); + + *r_dst = res; + + FLAG_C = FLAG_X = (new_x_flag != 0)<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +void m68k_op_roxr_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 9; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift); + + USE_CYCLES(orig_shift<> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_32_r(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 33; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROR_33_64(res, shift); + + USE_CYCLES(orig_shift<> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift % 33; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift))); + uint new_x_flag = src & (1 << (shift - 1)); + + if(orig_shift != 0) + USE_CYCLES(orig_shift<> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_32_s(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROL_33_64(res, shift); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1))); + uint new_x_flag = src & (1 << (32 - shift)); + + *r_dst = res; + + FLAG_C = FLAG_X = (new_x_flag != 0)<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +void m68k_op_roxl_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + + if(orig_shift != 0) + { + uint shift = orig_shift % 9; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift); + + USE_CYCLES(orig_shift<> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_32_r(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 33; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROL_33_64(res, shift); + + USE_CYCLES(orig_shift<> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift % 33; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1))); + uint new_x_flag = src & (1 << (32 - shift)); + + if(orig_shift != 0) + USE_CYCLES(orig_shift<> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_roxl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_rtd_32(void) +{ + if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) + { + uint new_pc = m68ki_pull_32(); + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); + m68ki_jump(new_pc); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_rte_32(void) +{ + if(FLAG_S) + { + uint new_sr; + uint new_pc; + uint format_word; + + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + + if(CPU_TYPE_IS_000(CPU_TYPE)) + { + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + return; + } + + if(CPU_TYPE_IS_010(CPU_TYPE)) + { + format_word = m68ki_read_16(REG_A[7]+6) >> 12; + if(format_word == 0) + { + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + return; + } + /* Not handling bus fault (9) */ + m68ki_exception_format_error(); + return; + } + + /* Otherwise it's 020 */ +rte_loop: + format_word = m68ki_read_16(REG_A[7]+6) >> 12; + switch(format_word) + { + case 0: /* Normal */ + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + return; + case 1: /* Throwaway */ + new_sr = m68ki_pull_16(); + m68ki_fake_pull_32(); /* program counter */ + m68ki_fake_pull_16(); /* format word */ + m68ki_set_sr_noint(new_sr); + goto rte_loop; + case 2: /* Trap */ + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_fake_pull_32(); /* address */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + return; + } + /* Not handling long or short bus fault */ + m68ki_exception_format_error(); + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_rtm_32(void) +{ + if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) + { + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n", + m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, + m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2)))); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_rtr_32(void) +{ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_ccr(m68ki_pull_16()); + m68ki_jump(m68ki_pull_32()); +} + + +void m68k_op_rts_32(void) +{ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_jump(m68ki_pull_32()); +} + + +void m68k_op_sbcd_8_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res += 0xa0; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_N = NFLAG_8(res); /* officially undefined */ + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +void m68k_op_sbcd_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res += 0xa0; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_N = NFLAG_8(res); /* officially undefined */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_sbcd_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res += 0xa0; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_N = NFLAG_8(res); /* officially undefined */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_sbcd_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res += 0xa0; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_N = NFLAG_8(res); /* officially undefined */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_sbcd_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res += 0xa0; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_N = NFLAG_8(res); /* officially undefined */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_st_8_d(void) +{ + DY |= 0xff; +} + + +void m68k_op_st_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0xff); +} + + +void m68k_op_st_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0xff); +} + + +void m68k_op_st_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0xff); +} + + +void m68k_op_st_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0xff); +} + + +void m68k_op_st_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0xff); +} + + +void m68k_op_st_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0xff); +} + + +void m68k_op_st_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0xff); +} + + +void m68k_op_st_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0xff); +} + + +void m68k_op_st_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0xff); +} + + +void m68k_op_sf_8_d(void) +{ + DY &= 0xffffff00; +} + + +void m68k_op_sf_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0); +} + + +void m68k_op_sf_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0); +} + + +void m68k_op_sf_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0); +} + + +void m68k_op_sf_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0); +} + + +void m68k_op_sf_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0); +} + + +void m68k_op_sf_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0); +} + + +void m68k_op_sf_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0); +} + + +void m68k_op_sf_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0); +} + + +void m68k_op_sf_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0); +} + + +void m68k_op_shi_8_d(void) +{ + if(COND_HI()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_sls_8_d(void) +{ + if(COND_LS()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_scc_8_d(void) +{ + if(COND_CC()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_scs_8_d(void) +{ + if(COND_CS()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_sne_8_d(void) +{ + if(COND_NE()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_seq_8_d(void) +{ + if(COND_EQ()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_svc_8_d(void) +{ + if(COND_VC()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_svs_8_d(void) +{ + if(COND_VS()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_spl_8_d(void) +{ + if(COND_PL()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_smi_8_d(void) +{ + if(COND_MI()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_sge_8_d(void) +{ + if(COND_GE()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_slt_8_d(void) +{ + if(COND_LT()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_sgt_8_d(void) +{ + if(COND_GT()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_sle_8_d(void) +{ + if(COND_LE()) + { + DY |= 0xff; + return; + } + DY &= 0xffffff00; +} + + +void m68k_op_shi_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_shi_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_HI() ? 0xff : 0); +} + + +void m68k_op_sls_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_sls_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LS() ? 0xff : 0); +} + + +void m68k_op_scc_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scc_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_CC() ? 0xff : 0); +} + + +void m68k_op_scs_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_scs_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_CS() ? 0xff : 0); +} + + +void m68k_op_sne_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_sne_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_NE() ? 0xff : 0); +} + + +void m68k_op_seq_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_seq_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_EQ() ? 0xff : 0); +} + + +void m68k_op_svc_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svc_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_VC() ? 0xff : 0); +} + + +void m68k_op_svs_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_svs_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_VS() ? 0xff : 0); +} + + +void m68k_op_spl_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_spl_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_PL() ? 0xff : 0); +} + + +void m68k_op_smi_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_smi_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_MI() ? 0xff : 0); +} + + +void m68k_op_sge_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_sge_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_GE() ? 0xff : 0); +} + + +void m68k_op_slt_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_slt_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sgt_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_GT() ? 0xff : 0); +} + + +void m68k_op_sle_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_sle_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LE() ? 0xff : 0); +} + + +void m68k_op_stop(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + CPU_STOPPED |= STOP_LEVEL_STOP; + m68ki_set_sr(new_sr); + m68ki_remaining_cycles = 0; + return; + } + m68ki_exception_privilege_violation(); +} + + +void m68k_op_sub_8_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pi7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pd7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_8_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_a(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_16_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_sub_32_er_d(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_a(void) +{ + uint* r_dst = &DX; + uint src = AY; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_32_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_sub_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_sub_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_suba_16_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY)); +} + + +void m68k_op_suba_16_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY)); +} + + +void m68k_op_suba_16_ai(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_AI_16())); +} + + +void m68k_op_suba_16_pi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PI_16())); +} + + +void m68k_op_suba_16_pd(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PD_16())); +} + + +void m68k_op_suba_16_di(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_DI_16())); +} + + +void m68k_op_suba_16_ix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_IX_16())); +} + + +void m68k_op_suba_16_aw(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AW_16())); +} + + +void m68k_op_suba_16_al(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AL_16())); +} + + +void m68k_op_suba_16_pcdi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCDI_16())); +} + + +void m68k_op_suba_16_pcix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCIX_16())); +} + + +void m68k_op_suba_16_i(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_I_16())); +} + + +void m68k_op_suba_32_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY); +} + + +void m68k_op_suba_32_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY); +} + + +void m68k_op_suba_32_ai(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_AI_32()); +} + + +void m68k_op_suba_32_pi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PI_32()); +} + + +void m68k_op_suba_32_pd(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PD_32()); +} + + +void m68k_op_suba_32_di(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_DI_32()); +} + + +void m68k_op_suba_32_ix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_IX_32()); +} + + +void m68k_op_suba_32_aw(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AW_32()); +} + + +void m68k_op_suba_32_al(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AL_32()); +} + + +void m68k_op_suba_32_pcdi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCDI_32()); +} + + +void m68k_op_suba_32_pcix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCIX_32()); +} + + +void m68k_op_suba_32_i(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_I_32()); +} + + +void m68k_op_subi_8_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_subi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subi_16_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_subi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subi_32_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_subi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_8_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +void m68k_op_subq_8_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_pi7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_pd7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_8_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +void m68k_op_subq_16_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +void m68k_op_subq_16_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1)); +} + + +void m68k_op_subq_16_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_16_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +void m68k_op_subq_32_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + *r_dst = FLAG_Z; +} + + +void m68k_op_subq_32_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1)); +} + + +void m68k_op_subq_32_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subq_32_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +void m68k_op_subx_8_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +void m68k_op_subx_16_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +void m68k_op_subx_32_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +void m68k_op_subx_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_subx_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_subx_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_subx_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +void m68k_op_subx_16_mm(void) +{ + uint src = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +void m68k_op_subx_32_mm(void) +{ + uint src = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +void m68k_op_swap_32(void) +{ + uint* r_dst = &DY; + + FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16); + *r_dst = (*r_dst>>16) | FLAG_Z; + + FLAG_Z = *r_dst; + FLAG_N = NFLAG_32(*r_dst); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +void m68k_op_tas_8_d(void) +{ + uint* r_dst = &DY; + + FLAG_Z = MASK_OUT_ABOVE_8(*r_dst); + FLAG_N = NFLAG_8(*r_dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst |= 0x80; +} + + +void m68k_op_tas_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_aw(void) +{ + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_tas_8_al(void) +{ + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + m68ki_write_8(ea, dst | 0x80); +} + + +void m68k_op_trap(void) +{ + /* Trap#n stacks exception frame type 0 */ + m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */ +} + + +void m68k_op_trapt(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapt_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapt_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapf(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapf_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapf_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traphi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_HI()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapls(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LS()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcc(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CC()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcs(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CS()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapne(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_NE()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapeq(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_EQ()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvc(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VC()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvs(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VS()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trappl(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_PL()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapmi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_MI()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapge(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GE()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traplt(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LT()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapgt(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GT()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traple(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LE()) + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traphi_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_HI()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapls_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcc_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CC()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcs_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapne_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_NE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapeq_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_EQ()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvc_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VC()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvs_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trappl_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_PL()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapmi_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_MI()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapge_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traplt_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LT()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapgt_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GT()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traple_16(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 2; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traphi_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_HI()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapls_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CC()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapcs_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_CS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapne_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_NE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapeq_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_EQ()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvc_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VC()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapvs_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_VS()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trappl_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_PL()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapmi_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_MI()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapge_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traplt_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LT()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapgt_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_GT()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_traple_32(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + if(COND_LE()) + { + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ + return; + } + REG_PC += 4; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_trapv(void) +{ + if(COND_VC()) + { + return; + } + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ +} + + +void m68k_op_tst_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_aw(void) +{ + uint ea = EA_AW_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_al(void) +{ + uint ea = EA_AL_8(); + uint res = m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_8_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCDI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_8_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCIX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_8_i(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_I_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_a(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = MAKE_INT_16(AY); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_16_ai(void) +{ + uint res = OPER_AY_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_pi(void) +{ + uint res = OPER_AY_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_pd(void) +{ + uint res = OPER_AY_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_di(void) +{ + uint res = OPER_AY_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_ix(void) +{ + uint res = OPER_AY_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_aw(void) +{ + uint res = OPER_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_al(void) +{ + uint res = OPER_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_16_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCDI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_16_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCIX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_16_i(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_I_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_32_d(void) +{ + uint res = DY; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_a(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = AY; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_32_ai(void) +{ + uint res = OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_pi(void) +{ + uint res = OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_pd(void) +{ + uint res = OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_di(void) +{ + uint res = OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_ix(void) +{ + uint res = OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_aw(void) +{ + uint res = OPER_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_al(void) +{ + uint res = OPER_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +void m68k_op_tst_32_pcdi(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCDI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_32_pcix(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_PCIX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_tst_32_i(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint res = OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_unlk_32_a7(void) +{ + REG_A[7] = m68ki_read_32(REG_A[7]); +} + + +void m68k_op_unlk_32(void) +{ + uint* r_dst = &AY; + + REG_A[7] = *r_dst; + *r_dst = m68ki_pull_32(); +} + + +void m68k_op_unpk_16_rr(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: DX and DY are reversed in Motorola's docs */ + uint src = DY; + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_unpk_16_mm_ax7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint src = OPER_AY_PD_8(); + uint ea_dst; + + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_unpk_16_mm_ay7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint src = OPER_A7_PD_8(); + uint ea_dst; + + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_unpk_16_mm_axy7(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + uint src = OPER_A7_PD_8(); + uint ea_dst; + + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + return; + } + m68ki_exception_illegal(); +} + + +void m68k_op_unpk_16_mm(void) +{ + if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) + { + /* Note: AX and AY are reversed in Motorola's docs */ + uint src = OPER_AY_PD_8(); + uint ea_dst; + + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + return; + } + m68ki_exception_illegal(); +} + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + + diff --git a/AltairZ80/m68kops.c b/AltairZ80/m68kops.c new file mode 100644 index 00000000..15e0e811 --- /dev/null +++ b/AltairZ80/m68kops.c @@ -0,0 +1,2093 @@ +/* ======================================================================== */ +/* ========================= OPCODE TABLE BUILDER ========================= */ +/* ======================================================================== */ + +#include "m68kops.h" + +#define NUM_CPU_TYPES 3 + +void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */ +unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ + +/* This is used to generate the opcode handler jump table */ +typedef struct +{ + void (*opcode_handler)(void); /* handler function */ + unsigned int mask; /* mask on opcode */ + unsigned int match; /* what to match after masking */ + unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ +} opcode_handler_struct; + + +/* Opcode handler table */ +static opcode_handler_struct m68k_opcode_handler_table[] = +{ +/* function mask match 000 010 020 */ + {m68k_op_1010 , 0xf000, 0xa000, { 4, 4, 4}}, + {m68k_op_1111 , 0xf000, 0xf000, { 4, 4, 4}}, + {m68k_op_moveq_32 , 0xf100, 0x7000, { 4, 4, 2}}, + {m68k_op_cpbcc_32 , 0xf180, 0xf080, { 0, 0, 4}}, + {m68k_op_cpgen_32 , 0xf1c0, 0xf000, { 0, 0, 4}}, + {m68k_op_cpscc_32 , 0xf1c0, 0xf040, { 0, 0, 4}}, + {m68k_op_bra_8 , 0xff00, 0x6000, { 10, 10, 10}}, + {m68k_op_bsr_8 , 0xff00, 0x6100, { 18, 18, 7}}, + {m68k_op_bhi_8 , 0xff00, 0x6200, { 8, 8, 6}}, + {m68k_op_bls_8 , 0xff00, 0x6300, { 8, 8, 6}}, + {m68k_op_bcc_8 , 0xff00, 0x6400, { 8, 8, 6}}, + {m68k_op_bcs_8 , 0xff00, 0x6500, { 8, 8, 6}}, + {m68k_op_bne_8 , 0xff00, 0x6600, { 8, 8, 6}}, + {m68k_op_beq_8 , 0xff00, 0x6700, { 8, 8, 6}}, + {m68k_op_bvc_8 , 0xff00, 0x6800, { 8, 8, 6}}, + {m68k_op_bvs_8 , 0xff00, 0x6900, { 8, 8, 6}}, + {m68k_op_bpl_8 , 0xff00, 0x6a00, { 8, 8, 6}}, + {m68k_op_bmi_8 , 0xff00, 0x6b00, { 8, 8, 6}}, + {m68k_op_bge_8 , 0xff00, 0x6c00, { 8, 8, 6}}, + {m68k_op_blt_8 , 0xff00, 0x6d00, { 8, 8, 6}}, + {m68k_op_bgt_8 , 0xff00, 0x6e00, { 8, 8, 6}}, + {m68k_op_ble_8 , 0xff00, 0x6f00, { 8, 8, 6}}, + {m68k_op_btst_32_r_d , 0xf1f8, 0x0100, { 6, 6, 4}}, + {m68k_op_movep_16_er , 0xf1f8, 0x0108, { 16, 16, 12}}, + {m68k_op_btst_8_r_ai , 0xf1f8, 0x0110, { 8, 8, 8}}, + {m68k_op_btst_8_r_pi , 0xf1f8, 0x0118, { 8, 8, 8}}, + {m68k_op_btst_8_r_pd , 0xf1f8, 0x0120, { 10, 10, 9}}, + {m68k_op_btst_8_r_di , 0xf1f8, 0x0128, { 12, 12, 9}}, + {m68k_op_btst_8_r_ix , 0xf1f8, 0x0130, { 14, 14, 11}}, + {m68k_op_bchg_32_r_d , 0xf1f8, 0x0140, { 8, 8, 4}}, + {m68k_op_movep_32_er , 0xf1f8, 0x0148, { 24, 24, 18}}, + {m68k_op_bchg_8_r_ai , 0xf1f8, 0x0150, { 12, 12, 8}}, + {m68k_op_bchg_8_r_pi , 0xf1f8, 0x0158, { 12, 12, 8}}, + {m68k_op_bchg_8_r_pd , 0xf1f8, 0x0160, { 14, 14, 9}}, + {m68k_op_bchg_8_r_di , 0xf1f8, 0x0168, { 16, 16, 9}}, + {m68k_op_bchg_8_r_ix , 0xf1f8, 0x0170, { 18, 18, 11}}, + {m68k_op_bclr_32_r_d , 0xf1f8, 0x0180, { 10, 10, 4}}, + {m68k_op_movep_16_re , 0xf1f8, 0x0188, { 16, 16, 11}}, + {m68k_op_bclr_8_r_ai , 0xf1f8, 0x0190, { 12, 14, 8}}, + {m68k_op_bclr_8_r_pi , 0xf1f8, 0x0198, { 12, 14, 8}}, + {m68k_op_bclr_8_r_pd , 0xf1f8, 0x01a0, { 14, 16, 9}}, + {m68k_op_bclr_8_r_di , 0xf1f8, 0x01a8, { 16, 18, 9}}, + {m68k_op_bclr_8_r_ix , 0xf1f8, 0x01b0, { 18, 20, 11}}, + {m68k_op_bset_32_r_d , 0xf1f8, 0x01c0, { 8, 8, 4}}, + {m68k_op_movep_32_re , 0xf1f8, 0x01c8, { 24, 24, 17}}, + {m68k_op_bset_8_r_ai , 0xf1f8, 0x01d0, { 12, 12, 8}}, + {m68k_op_bset_8_r_pi , 0xf1f8, 0x01d8, { 12, 12, 8}}, + {m68k_op_bset_8_r_pd , 0xf1f8, 0x01e0, { 14, 14, 9}}, + {m68k_op_bset_8_r_di , 0xf1f8, 0x01e8, { 16, 16, 9}}, + {m68k_op_bset_8_r_ix , 0xf1f8, 0x01f0, { 18, 18, 11}}, + {m68k_op_move_8_d_d , 0xf1f8, 0x1000, { 4, 4, 2}}, + {m68k_op_move_8_d_ai , 0xf1f8, 0x1010, { 8, 8, 6}}, + {m68k_op_move_8_d_pi , 0xf1f8, 0x1018, { 8, 8, 6}}, + {m68k_op_move_8_d_pd , 0xf1f8, 0x1020, { 10, 10, 7}}, + {m68k_op_move_8_d_di , 0xf1f8, 0x1028, { 12, 12, 7}}, + {m68k_op_move_8_d_ix , 0xf1f8, 0x1030, { 14, 14, 9}}, + {m68k_op_move_8_ai_d , 0xf1f8, 0x1080, { 8, 8, 4}}, + {m68k_op_move_8_ai_ai , 0xf1f8, 0x1090, { 12, 12, 8}}, + {m68k_op_move_8_ai_pi , 0xf1f8, 0x1098, { 12, 12, 8}}, + {m68k_op_move_8_ai_pd , 0xf1f8, 0x10a0, { 14, 14, 9}}, + {m68k_op_move_8_ai_di , 0xf1f8, 0x10a8, { 16, 16, 9}}, + {m68k_op_move_8_ai_ix , 0xf1f8, 0x10b0, { 18, 18, 11}}, + {m68k_op_move_8_pi_d , 0xf1f8, 0x10c0, { 8, 8, 4}}, + {m68k_op_move_8_pi_ai , 0xf1f8, 0x10d0, { 12, 12, 8}}, + {m68k_op_move_8_pi_pi , 0xf1f8, 0x10d8, { 12, 12, 8}}, + {m68k_op_move_8_pi_pd , 0xf1f8, 0x10e0, { 14, 14, 9}}, + {m68k_op_move_8_pi_di , 0xf1f8, 0x10e8, { 16, 16, 9}}, + {m68k_op_move_8_pi_ix , 0xf1f8, 0x10f0, { 18, 18, 11}}, + {m68k_op_move_8_pd_d , 0xf1f8, 0x1100, { 8, 8, 5}}, + {m68k_op_move_8_pd_ai , 0xf1f8, 0x1110, { 12, 12, 9}}, + {m68k_op_move_8_pd_pi , 0xf1f8, 0x1118, { 12, 12, 9}}, + {m68k_op_move_8_pd_pd , 0xf1f8, 0x1120, { 14, 14, 10}}, + {m68k_op_move_8_pd_di , 0xf1f8, 0x1128, { 16, 16, 10}}, + {m68k_op_move_8_pd_ix , 0xf1f8, 0x1130, { 18, 18, 12}}, + {m68k_op_move_8_di_d , 0xf1f8, 0x1140, { 12, 12, 5}}, + {m68k_op_move_8_di_ai , 0xf1f8, 0x1150, { 16, 16, 9}}, + {m68k_op_move_8_di_pi , 0xf1f8, 0x1158, { 16, 16, 9}}, + {m68k_op_move_8_di_pd , 0xf1f8, 0x1160, { 18, 18, 10}}, + {m68k_op_move_8_di_di , 0xf1f8, 0x1168, { 20, 20, 10}}, + {m68k_op_move_8_di_ix , 0xf1f8, 0x1170, { 22, 22, 12}}, + {m68k_op_move_8_ix_d , 0xf1f8, 0x1180, { 14, 14, 7}}, + {m68k_op_move_8_ix_ai , 0xf1f8, 0x1190, { 18, 18, 11}}, + {m68k_op_move_8_ix_pi , 0xf1f8, 0x1198, { 18, 18, 11}}, + {m68k_op_move_8_ix_pd , 0xf1f8, 0x11a0, { 20, 20, 12}}, + {m68k_op_move_8_ix_di , 0xf1f8, 0x11a8, { 22, 22, 12}}, + {m68k_op_move_8_ix_ix , 0xf1f8, 0x11b0, { 24, 24, 14}}, + {m68k_op_move_32_d_d , 0xf1f8, 0x2000, { 4, 4, 2}}, + {m68k_op_move_32_d_a , 0xf1f8, 0x2008, { 4, 4, 2}}, + {m68k_op_move_32_d_ai , 0xf1f8, 0x2010, { 12, 12, 6}}, + {m68k_op_move_32_d_pi , 0xf1f8, 0x2018, { 12, 12, 6}}, + {m68k_op_move_32_d_pd , 0xf1f8, 0x2020, { 14, 14, 7}}, + {m68k_op_move_32_d_di , 0xf1f8, 0x2028, { 16, 16, 7}}, + {m68k_op_move_32_d_ix , 0xf1f8, 0x2030, { 18, 18, 9}}, + {m68k_op_movea_32_d , 0xf1f8, 0x2040, { 4, 4, 2}}, + {m68k_op_movea_32_a , 0xf1f8, 0x2048, { 4, 4, 2}}, + {m68k_op_movea_32_ai , 0xf1f8, 0x2050, { 12, 12, 6}}, + {m68k_op_movea_32_pi , 0xf1f8, 0x2058, { 12, 12, 6}}, + {m68k_op_movea_32_pd , 0xf1f8, 0x2060, { 14, 14, 7}}, + {m68k_op_movea_32_di , 0xf1f8, 0x2068, { 16, 16, 7}}, + {m68k_op_movea_32_ix , 0xf1f8, 0x2070, { 18, 18, 9}}, + {m68k_op_move_32_ai_d , 0xf1f8, 0x2080, { 12, 12, 4}}, + {m68k_op_move_32_ai_a , 0xf1f8, 0x2088, { 12, 12, 4}}, + {m68k_op_move_32_ai_ai , 0xf1f8, 0x2090, { 20, 20, 8}}, + {m68k_op_move_32_ai_pi , 0xf1f8, 0x2098, { 20, 20, 8}}, + {m68k_op_move_32_ai_pd , 0xf1f8, 0x20a0, { 22, 22, 9}}, + {m68k_op_move_32_ai_di , 0xf1f8, 0x20a8, { 24, 24, 9}}, + {m68k_op_move_32_ai_ix , 0xf1f8, 0x20b0, { 26, 26, 11}}, + {m68k_op_move_32_pi_d , 0xf1f8, 0x20c0, { 12, 12, 4}}, + {m68k_op_move_32_pi_a , 0xf1f8, 0x20c8, { 12, 12, 4}}, + {m68k_op_move_32_pi_ai , 0xf1f8, 0x20d0, { 20, 20, 8}}, + {m68k_op_move_32_pi_pi , 0xf1f8, 0x20d8, { 20, 20, 8}}, + {m68k_op_move_32_pi_pd , 0xf1f8, 0x20e0, { 22, 22, 9}}, + {m68k_op_move_32_pi_di , 0xf1f8, 0x20e8, { 24, 24, 9}}, + {m68k_op_move_32_pi_ix , 0xf1f8, 0x20f0, { 26, 26, 11}}, + {m68k_op_move_32_pd_d , 0xf1f8, 0x2100, { 12, 14, 5}}, + {m68k_op_move_32_pd_a , 0xf1f8, 0x2108, { 12, 14, 5}}, + {m68k_op_move_32_pd_ai , 0xf1f8, 0x2110, { 20, 22, 9}}, + {m68k_op_move_32_pd_pi , 0xf1f8, 0x2118, { 20, 22, 9}}, + {m68k_op_move_32_pd_pd , 0xf1f8, 0x2120, { 22, 24, 10}}, + {m68k_op_move_32_pd_di , 0xf1f8, 0x2128, { 24, 26, 10}}, + {m68k_op_move_32_pd_ix , 0xf1f8, 0x2130, { 26, 28, 12}}, + {m68k_op_move_32_di_d , 0xf1f8, 0x2140, { 16, 16, 5}}, + {m68k_op_move_32_di_a , 0xf1f8, 0x2148, { 16, 16, 5}}, + {m68k_op_move_32_di_ai , 0xf1f8, 0x2150, { 24, 24, 9}}, + {m68k_op_move_32_di_pi , 0xf1f8, 0x2158, { 24, 24, 9}}, + {m68k_op_move_32_di_pd , 0xf1f8, 0x2160, { 26, 26, 10}}, + {m68k_op_move_32_di_di , 0xf1f8, 0x2168, { 28, 28, 10}}, + {m68k_op_move_32_di_ix , 0xf1f8, 0x2170, { 30, 30, 12}}, + {m68k_op_move_32_ix_d , 0xf1f8, 0x2180, { 18, 18, 7}}, + {m68k_op_move_32_ix_a , 0xf1f8, 0x2188, { 18, 18, 7}}, + {m68k_op_move_32_ix_ai , 0xf1f8, 0x2190, { 26, 26, 11}}, + {m68k_op_move_32_ix_pi , 0xf1f8, 0x2198, { 26, 26, 11}}, + {m68k_op_move_32_ix_pd , 0xf1f8, 0x21a0, { 28, 28, 12}}, + {m68k_op_move_32_ix_di , 0xf1f8, 0x21a8, { 30, 30, 12}}, + {m68k_op_move_32_ix_ix , 0xf1f8, 0x21b0, { 32, 32, 14}}, + {m68k_op_move_16_d_d , 0xf1f8, 0x3000, { 4, 4, 2}}, + {m68k_op_move_16_d_a , 0xf1f8, 0x3008, { 4, 4, 2}}, + {m68k_op_move_16_d_ai , 0xf1f8, 0x3010, { 8, 8, 6}}, + {m68k_op_move_16_d_pi , 0xf1f8, 0x3018, { 8, 8, 6}}, + {m68k_op_move_16_d_pd , 0xf1f8, 0x3020, { 10, 10, 7}}, + {m68k_op_move_16_d_di , 0xf1f8, 0x3028, { 12, 12, 7}}, + {m68k_op_move_16_d_ix , 0xf1f8, 0x3030, { 14, 14, 9}}, + {m68k_op_movea_16_d , 0xf1f8, 0x3040, { 4, 4, 2}}, + {m68k_op_movea_16_a , 0xf1f8, 0x3048, { 4, 4, 2}}, + {m68k_op_movea_16_ai , 0xf1f8, 0x3050, { 8, 8, 6}}, + {m68k_op_movea_16_pi , 0xf1f8, 0x3058, { 8, 8, 6}}, + {m68k_op_movea_16_pd , 0xf1f8, 0x3060, { 10, 10, 7}}, + {m68k_op_movea_16_di , 0xf1f8, 0x3068, { 12, 12, 7}}, + {m68k_op_movea_16_ix , 0xf1f8, 0x3070, { 14, 14, 9}}, + {m68k_op_move_16_ai_d , 0xf1f8, 0x3080, { 8, 8, 4}}, + {m68k_op_move_16_ai_a , 0xf1f8, 0x3088, { 8, 8, 4}}, + {m68k_op_move_16_ai_ai , 0xf1f8, 0x3090, { 12, 12, 8}}, + {m68k_op_move_16_ai_pi , 0xf1f8, 0x3098, { 12, 12, 8}}, + {m68k_op_move_16_ai_pd , 0xf1f8, 0x30a0, { 14, 14, 9}}, + {m68k_op_move_16_ai_di , 0xf1f8, 0x30a8, { 16, 16, 9}}, + {m68k_op_move_16_ai_ix , 0xf1f8, 0x30b0, { 18, 18, 11}}, + {m68k_op_move_16_pi_d , 0xf1f8, 0x30c0, { 8, 8, 4}}, + {m68k_op_move_16_pi_a , 0xf1f8, 0x30c8, { 8, 8, 4}}, + {m68k_op_move_16_pi_ai , 0xf1f8, 0x30d0, { 12, 12, 8}}, + {m68k_op_move_16_pi_pi , 0xf1f8, 0x30d8, { 12, 12, 8}}, + {m68k_op_move_16_pi_pd , 0xf1f8, 0x30e0, { 14, 14, 9}}, + {m68k_op_move_16_pi_di , 0xf1f8, 0x30e8, { 16, 16, 9}}, + {m68k_op_move_16_pi_ix , 0xf1f8, 0x30f0, { 18, 18, 11}}, + {m68k_op_move_16_pd_d , 0xf1f8, 0x3100, { 8, 8, 5}}, + {m68k_op_move_16_pd_a , 0xf1f8, 0x3108, { 8, 8, 5}}, + {m68k_op_move_16_pd_ai , 0xf1f8, 0x3110, { 12, 12, 9}}, + {m68k_op_move_16_pd_pi , 0xf1f8, 0x3118, { 12, 12, 9}}, + {m68k_op_move_16_pd_pd , 0xf1f8, 0x3120, { 14, 14, 10}}, + {m68k_op_move_16_pd_di , 0xf1f8, 0x3128, { 16, 16, 10}}, + {m68k_op_move_16_pd_ix , 0xf1f8, 0x3130, { 18, 18, 12}}, + {m68k_op_move_16_di_d , 0xf1f8, 0x3140, { 12, 12, 5}}, + {m68k_op_move_16_di_a , 0xf1f8, 0x3148, { 12, 12, 5}}, + {m68k_op_move_16_di_ai , 0xf1f8, 0x3150, { 16, 16, 9}}, + {m68k_op_move_16_di_pi , 0xf1f8, 0x3158, { 16, 16, 9}}, + {m68k_op_move_16_di_pd , 0xf1f8, 0x3160, { 18, 18, 10}}, + {m68k_op_move_16_di_di , 0xf1f8, 0x3168, { 20, 20, 10}}, + {m68k_op_move_16_di_ix , 0xf1f8, 0x3170, { 22, 22, 12}}, + {m68k_op_move_16_ix_d , 0xf1f8, 0x3180, { 14, 14, 7}}, + {m68k_op_move_16_ix_a , 0xf1f8, 0x3188, { 14, 14, 7}}, + {m68k_op_move_16_ix_ai , 0xf1f8, 0x3190, { 18, 18, 11}}, + {m68k_op_move_16_ix_pi , 0xf1f8, 0x3198, { 18, 18, 11}}, + {m68k_op_move_16_ix_pd , 0xf1f8, 0x31a0, { 20, 20, 12}}, + {m68k_op_move_16_ix_di , 0xf1f8, 0x31a8, { 22, 22, 12}}, + {m68k_op_move_16_ix_ix , 0xf1f8, 0x31b0, { 24, 24, 14}}, + {m68k_op_chk_32_d , 0xf1f8, 0x4100, { 0, 0, 8}}, + {m68k_op_chk_32_ai , 0xf1f8, 0x4110, { 0, 0, 12}}, + {m68k_op_chk_32_pi , 0xf1f8, 0x4118, { 0, 0, 12}}, + {m68k_op_chk_32_pd , 0xf1f8, 0x4120, { 0, 0, 13}}, + {m68k_op_chk_32_di , 0xf1f8, 0x4128, { 0, 0, 13}}, + {m68k_op_chk_32_ix , 0xf1f8, 0x4130, { 0, 0, 15}}, + {m68k_op_chk_16_d , 0xf1f8, 0x4180, { 10, 8, 8}}, + {m68k_op_chk_16_ai , 0xf1f8, 0x4190, { 14, 12, 12}}, + {m68k_op_chk_16_pi , 0xf1f8, 0x4198, { 14, 12, 12}}, + {m68k_op_chk_16_pd , 0xf1f8, 0x41a0, { 16, 14, 13}}, + {m68k_op_chk_16_di , 0xf1f8, 0x41a8, { 18, 16, 13}}, + {m68k_op_chk_16_ix , 0xf1f8, 0x41b0, { 20, 18, 15}}, + {m68k_op_lea_32_ai , 0xf1f8, 0x41d0, { 4, 4, 6}}, + {m68k_op_lea_32_di , 0xf1f8, 0x41e8, { 8, 8, 7}}, + {m68k_op_lea_32_ix , 0xf1f8, 0x41f0, { 12, 12, 9}}, + {m68k_op_addq_8_d , 0xf1f8, 0x5000, { 4, 4, 2}}, + {m68k_op_addq_8_ai , 0xf1f8, 0x5010, { 12, 12, 8}}, + {m68k_op_addq_8_pi , 0xf1f8, 0x5018, { 12, 12, 8}}, + {m68k_op_addq_8_pd , 0xf1f8, 0x5020, { 14, 14, 9}}, + {m68k_op_addq_8_di , 0xf1f8, 0x5028, { 16, 16, 9}}, + {m68k_op_addq_8_ix , 0xf1f8, 0x5030, { 18, 18, 11}}, + {m68k_op_addq_16_d , 0xf1f8, 0x5040, { 4, 4, 2}}, + {m68k_op_addq_16_a , 0xf1f8, 0x5048, { 4, 4, 2}}, + {m68k_op_addq_16_ai , 0xf1f8, 0x5050, { 12, 12, 8}}, + {m68k_op_addq_16_pi , 0xf1f8, 0x5058, { 12, 12, 8}}, + {m68k_op_addq_16_pd , 0xf1f8, 0x5060, { 14, 14, 9}}, + {m68k_op_addq_16_di , 0xf1f8, 0x5068, { 16, 16, 9}}, + {m68k_op_addq_16_ix , 0xf1f8, 0x5070, { 18, 18, 11}}, + {m68k_op_addq_32_d , 0xf1f8, 0x5080, { 8, 8, 2}}, + {m68k_op_addq_32_a , 0xf1f8, 0x5088, { 8, 8, 2}}, + {m68k_op_addq_32_ai , 0xf1f8, 0x5090, { 20, 20, 8}}, + {m68k_op_addq_32_pi , 0xf1f8, 0x5098, { 20, 20, 8}}, + {m68k_op_addq_32_pd , 0xf1f8, 0x50a0, { 22, 22, 9}}, + {m68k_op_addq_32_di , 0xf1f8, 0x50a8, { 24, 24, 9}}, + {m68k_op_addq_32_ix , 0xf1f8, 0x50b0, { 26, 26, 11}}, + {m68k_op_subq_8_d , 0xf1f8, 0x5100, { 4, 4, 2}}, + {m68k_op_subq_8_ai , 0xf1f8, 0x5110, { 12, 12, 8}}, + {m68k_op_subq_8_pi , 0xf1f8, 0x5118, { 12, 12, 8}}, + {m68k_op_subq_8_pd , 0xf1f8, 0x5120, { 14, 14, 9}}, + {m68k_op_subq_8_di , 0xf1f8, 0x5128, { 16, 16, 9}}, + {m68k_op_subq_8_ix , 0xf1f8, 0x5130, { 18, 18, 11}}, + {m68k_op_subq_16_d , 0xf1f8, 0x5140, { 4, 4, 2}}, + {m68k_op_subq_16_a , 0xf1f8, 0x5148, { 8, 4, 2}}, + {m68k_op_subq_16_ai , 0xf1f8, 0x5150, { 12, 12, 8}}, + {m68k_op_subq_16_pi , 0xf1f8, 0x5158, { 12, 12, 8}}, + {m68k_op_subq_16_pd , 0xf1f8, 0x5160, { 14, 14, 9}}, + {m68k_op_subq_16_di , 0xf1f8, 0x5168, { 16, 16, 9}}, + {m68k_op_subq_16_ix , 0xf1f8, 0x5170, { 18, 18, 11}}, + {m68k_op_subq_32_d , 0xf1f8, 0x5180, { 8, 8, 2}}, + {m68k_op_subq_32_a , 0xf1f8, 0x5188, { 8, 8, 2}}, + {m68k_op_subq_32_ai , 0xf1f8, 0x5190, { 20, 20, 8}}, + {m68k_op_subq_32_pi , 0xf1f8, 0x5198, { 20, 20, 8}}, + {m68k_op_subq_32_pd , 0xf1f8, 0x51a0, { 22, 22, 9}}, + {m68k_op_subq_32_di , 0xf1f8, 0x51a8, { 24, 24, 9}}, + {m68k_op_subq_32_ix , 0xf1f8, 0x51b0, { 26, 26, 11}}, + {m68k_op_or_8_er_d , 0xf1f8, 0x8000, { 4, 4, 2}}, + {m68k_op_or_8_er_ai , 0xf1f8, 0x8010, { 8, 8, 6}}, + {m68k_op_or_8_er_pi , 0xf1f8, 0x8018, { 8, 8, 6}}, + {m68k_op_or_8_er_pd , 0xf1f8, 0x8020, { 10, 10, 7}}, + {m68k_op_or_8_er_di , 0xf1f8, 0x8028, { 12, 12, 7}}, + {m68k_op_or_8_er_ix , 0xf1f8, 0x8030, { 14, 14, 9}}, + {m68k_op_or_16_er_d , 0xf1f8, 0x8040, { 4, 4, 2}}, + {m68k_op_or_16_er_ai , 0xf1f8, 0x8050, { 8, 8, 6}}, + {m68k_op_or_16_er_pi , 0xf1f8, 0x8058, { 8, 8, 6}}, + {m68k_op_or_16_er_pd , 0xf1f8, 0x8060, { 10, 10, 7}}, + {m68k_op_or_16_er_di , 0xf1f8, 0x8068, { 12, 12, 7}}, + {m68k_op_or_16_er_ix , 0xf1f8, 0x8070, { 14, 14, 9}}, + {m68k_op_or_32_er_d , 0xf1f8, 0x8080, { 6, 6, 2}}, + {m68k_op_or_32_er_ai , 0xf1f8, 0x8090, { 14, 14, 6}}, + {m68k_op_or_32_er_pi , 0xf1f8, 0x8098, { 14, 14, 6}}, + {m68k_op_or_32_er_pd , 0xf1f8, 0x80a0, { 16, 16, 7}}, + {m68k_op_or_32_er_di , 0xf1f8, 0x80a8, { 18, 18, 7}}, + {m68k_op_or_32_er_ix , 0xf1f8, 0x80b0, { 20, 20, 9}}, + {m68k_op_divu_16_d , 0xf1f8, 0x80c0, {140, 108, 44}}, + {m68k_op_divu_16_ai , 0xf1f8, 0x80d0, {144, 112, 48}}, + {m68k_op_divu_16_pi , 0xf1f8, 0x80d8, {144, 112, 48}}, + {m68k_op_divu_16_pd , 0xf1f8, 0x80e0, {146, 114, 49}}, + {m68k_op_divu_16_di , 0xf1f8, 0x80e8, {148, 116, 49}}, + {m68k_op_divu_16_ix , 0xf1f8, 0x80f0, {150, 118, 51}}, + {m68k_op_sbcd_8_rr , 0xf1f8, 0x8100, { 6, 6, 4}}, + {m68k_op_sbcd_8_mm , 0xf1f8, 0x8108, { 18, 18, 16}}, + {m68k_op_or_8_re_ai , 0xf1f8, 0x8110, { 12, 12, 8}}, + {m68k_op_or_8_re_pi , 0xf1f8, 0x8118, { 12, 12, 8}}, + {m68k_op_or_8_re_pd , 0xf1f8, 0x8120, { 14, 14, 9}}, + {m68k_op_or_8_re_di , 0xf1f8, 0x8128, { 16, 16, 9}}, + {m68k_op_or_8_re_ix , 0xf1f8, 0x8130, { 18, 18, 11}}, + {m68k_op_pack_16_rr , 0xf1f8, 0x8140, { 0, 0, 6}}, + {m68k_op_pack_16_mm , 0xf1f8, 0x8148, { 0, 0, 13}}, + {m68k_op_or_16_re_ai , 0xf1f8, 0x8150, { 12, 12, 8}}, + {m68k_op_or_16_re_pi , 0xf1f8, 0x8158, { 12, 12, 8}}, + {m68k_op_or_16_re_pd , 0xf1f8, 0x8160, { 14, 14, 9}}, + {m68k_op_or_16_re_di , 0xf1f8, 0x8168, { 16, 16, 9}}, + {m68k_op_or_16_re_ix , 0xf1f8, 0x8170, { 18, 18, 11}}, + {m68k_op_unpk_16_rr , 0xf1f8, 0x8180, { 0, 0, 8}}, + {m68k_op_unpk_16_mm , 0xf1f8, 0x8188, { 0, 0, 13}}, + {m68k_op_or_32_re_ai , 0xf1f8, 0x8190, { 20, 20, 8}}, + {m68k_op_or_32_re_pi , 0xf1f8, 0x8198, { 20, 20, 8}}, + {m68k_op_or_32_re_pd , 0xf1f8, 0x81a0, { 22, 22, 9}}, + {m68k_op_or_32_re_di , 0xf1f8, 0x81a8, { 24, 24, 9}}, + {m68k_op_or_32_re_ix , 0xf1f8, 0x81b0, { 26, 26, 11}}, + {m68k_op_divs_16_d , 0xf1f8, 0x81c0, {158, 122, 56}}, + {m68k_op_divs_16_ai , 0xf1f8, 0x81d0, {162, 126, 60}}, + {m68k_op_divs_16_pi , 0xf1f8, 0x81d8, {162, 126, 60}}, + {m68k_op_divs_16_pd , 0xf1f8, 0x81e0, {164, 128, 61}}, + {m68k_op_divs_16_di , 0xf1f8, 0x81e8, {166, 130, 61}}, + {m68k_op_divs_16_ix , 0xf1f8, 0x81f0, {168, 132, 63}}, + {m68k_op_sub_8_er_d , 0xf1f8, 0x9000, { 4, 4, 2}}, + {m68k_op_sub_8_er_ai , 0xf1f8, 0x9010, { 8, 8, 6}}, + {m68k_op_sub_8_er_pi , 0xf1f8, 0x9018, { 8, 8, 6}}, + {m68k_op_sub_8_er_pd , 0xf1f8, 0x9020, { 10, 10, 7}}, + {m68k_op_sub_8_er_di , 0xf1f8, 0x9028, { 12, 12, 7}}, + {m68k_op_sub_8_er_ix , 0xf1f8, 0x9030, { 14, 14, 9}}, + {m68k_op_sub_16_er_d , 0xf1f8, 0x9040, { 4, 4, 2}}, + {m68k_op_sub_16_er_a , 0xf1f8, 0x9048, { 4, 4, 2}}, + {m68k_op_sub_16_er_ai , 0xf1f8, 0x9050, { 8, 8, 6}}, + {m68k_op_sub_16_er_pi , 0xf1f8, 0x9058, { 8, 8, 6}}, + {m68k_op_sub_16_er_pd , 0xf1f8, 0x9060, { 10, 10, 7}}, + {m68k_op_sub_16_er_di , 0xf1f8, 0x9068, { 12, 12, 7}}, + {m68k_op_sub_16_er_ix , 0xf1f8, 0x9070, { 14, 14, 9}}, + {m68k_op_sub_32_er_d , 0xf1f8, 0x9080, { 6, 6, 2}}, + {m68k_op_sub_32_er_a , 0xf1f8, 0x9088, { 6, 6, 2}}, + {m68k_op_sub_32_er_ai , 0xf1f8, 0x9090, { 14, 14, 6}}, + {m68k_op_sub_32_er_pi , 0xf1f8, 0x9098, { 14, 14, 6}}, + {m68k_op_sub_32_er_pd , 0xf1f8, 0x90a0, { 16, 16, 7}}, + {m68k_op_sub_32_er_di , 0xf1f8, 0x90a8, { 18, 18, 7}}, + {m68k_op_sub_32_er_ix , 0xf1f8, 0x90b0, { 20, 20, 9}}, + {m68k_op_suba_16_d , 0xf1f8, 0x90c0, { 8, 8, 2}}, + {m68k_op_suba_16_a , 0xf1f8, 0x90c8, { 8, 8, 2}}, + {m68k_op_suba_16_ai , 0xf1f8, 0x90d0, { 12, 12, 6}}, + {m68k_op_suba_16_pi , 0xf1f8, 0x90d8, { 12, 12, 6}}, + {m68k_op_suba_16_pd , 0xf1f8, 0x90e0, { 14, 14, 7}}, + {m68k_op_suba_16_di , 0xf1f8, 0x90e8, { 16, 16, 7}}, + {m68k_op_suba_16_ix , 0xf1f8, 0x90f0, { 18, 18, 9}}, + {m68k_op_subx_8_rr , 0xf1f8, 0x9100, { 4, 4, 2}}, + {m68k_op_subx_8_mm , 0xf1f8, 0x9108, { 18, 18, 12}}, + {m68k_op_sub_8_re_ai , 0xf1f8, 0x9110, { 12, 12, 8}}, + {m68k_op_sub_8_re_pi , 0xf1f8, 0x9118, { 12, 12, 8}}, + {m68k_op_sub_8_re_pd , 0xf1f8, 0x9120, { 14, 14, 9}}, + {m68k_op_sub_8_re_di , 0xf1f8, 0x9128, { 16, 16, 9}}, + {m68k_op_sub_8_re_ix , 0xf1f8, 0x9130, { 18, 18, 11}}, + {m68k_op_subx_16_rr , 0xf1f8, 0x9140, { 4, 4, 2}}, + {m68k_op_subx_16_mm , 0xf1f8, 0x9148, { 18, 18, 12}}, + {m68k_op_sub_16_re_ai , 0xf1f8, 0x9150, { 12, 12, 8}}, + {m68k_op_sub_16_re_pi , 0xf1f8, 0x9158, { 12, 12, 8}}, + {m68k_op_sub_16_re_pd , 0xf1f8, 0x9160, { 14, 14, 9}}, + {m68k_op_sub_16_re_di , 0xf1f8, 0x9168, { 16, 16, 9}}, + {m68k_op_sub_16_re_ix , 0xf1f8, 0x9170, { 18, 18, 11}}, + {m68k_op_subx_32_rr , 0xf1f8, 0x9180, { 8, 6, 2}}, + {m68k_op_subx_32_mm , 0xf1f8, 0x9188, { 30, 30, 12}}, + {m68k_op_sub_32_re_ai , 0xf1f8, 0x9190, { 20, 20, 8}}, + {m68k_op_sub_32_re_pi , 0xf1f8, 0x9198, { 20, 20, 8}}, + {m68k_op_sub_32_re_pd , 0xf1f8, 0x91a0, { 22, 22, 9}}, + {m68k_op_sub_32_re_di , 0xf1f8, 0x91a8, { 24, 24, 9}}, + {m68k_op_sub_32_re_ix , 0xf1f8, 0x91b0, { 26, 26, 11}}, + {m68k_op_suba_32_d , 0xf1f8, 0x91c0, { 6, 6, 2}}, + {m68k_op_suba_32_a , 0xf1f8, 0x91c8, { 6, 6, 2}}, + {m68k_op_suba_32_ai , 0xf1f8, 0x91d0, { 14, 14, 6}}, + {m68k_op_suba_32_pi , 0xf1f8, 0x91d8, { 14, 14, 6}}, + {m68k_op_suba_32_pd , 0xf1f8, 0x91e0, { 16, 16, 7}}, + {m68k_op_suba_32_di , 0xf1f8, 0x91e8, { 18, 18, 7}}, + {m68k_op_suba_32_ix , 0xf1f8, 0x91f0, { 20, 20, 9}}, + {m68k_op_cmp_8_d , 0xf1f8, 0xb000, { 4, 4, 2}}, + {m68k_op_cmp_8_ai , 0xf1f8, 0xb010, { 8, 8, 6}}, + {m68k_op_cmp_8_pi , 0xf1f8, 0xb018, { 8, 8, 6}}, + {m68k_op_cmp_8_pd , 0xf1f8, 0xb020, { 10, 10, 7}}, + {m68k_op_cmp_8_di , 0xf1f8, 0xb028, { 12, 12, 7}}, + {m68k_op_cmp_8_ix , 0xf1f8, 0xb030, { 14, 14, 9}}, + {m68k_op_cmp_16_d , 0xf1f8, 0xb040, { 4, 4, 2}}, + {m68k_op_cmp_16_a , 0xf1f8, 0xb048, { 4, 4, 2}}, + {m68k_op_cmp_16_ai , 0xf1f8, 0xb050, { 8, 8, 6}}, + {m68k_op_cmp_16_pi , 0xf1f8, 0xb058, { 8, 8, 6}}, + {m68k_op_cmp_16_pd , 0xf1f8, 0xb060, { 10, 10, 7}}, + {m68k_op_cmp_16_di , 0xf1f8, 0xb068, { 12, 12, 7}}, + {m68k_op_cmp_16_ix , 0xf1f8, 0xb070, { 14, 14, 9}}, + {m68k_op_cmp_32_d , 0xf1f8, 0xb080, { 6, 6, 2}}, + {m68k_op_cmp_32_a , 0xf1f8, 0xb088, { 6, 6, 2}}, + {m68k_op_cmp_32_ai , 0xf1f8, 0xb090, { 14, 14, 6}}, + {m68k_op_cmp_32_pi , 0xf1f8, 0xb098, { 14, 14, 6}}, + {m68k_op_cmp_32_pd , 0xf1f8, 0xb0a0, { 16, 16, 7}}, + {m68k_op_cmp_32_di , 0xf1f8, 0xb0a8, { 18, 18, 7}}, + {m68k_op_cmp_32_ix , 0xf1f8, 0xb0b0, { 20, 20, 9}}, + {m68k_op_cmpa_16_d , 0xf1f8, 0xb0c0, { 6, 6, 4}}, + {m68k_op_cmpa_16_a , 0xf1f8, 0xb0c8, { 6, 6, 4}}, + {m68k_op_cmpa_16_ai , 0xf1f8, 0xb0d0, { 10, 10, 8}}, + {m68k_op_cmpa_16_pi , 0xf1f8, 0xb0d8, { 10, 10, 8}}, + {m68k_op_cmpa_16_pd , 0xf1f8, 0xb0e0, { 12, 12, 9}}, + {m68k_op_cmpa_16_di , 0xf1f8, 0xb0e8, { 14, 14, 9}}, + {m68k_op_cmpa_16_ix , 0xf1f8, 0xb0f0, { 16, 16, 11}}, + {m68k_op_eor_8_d , 0xf1f8, 0xb100, { 4, 4, 2}}, + {m68k_op_cmpm_8 , 0xf1f8, 0xb108, { 12, 12, 9}}, + {m68k_op_eor_8_ai , 0xf1f8, 0xb110, { 12, 12, 8}}, + {m68k_op_eor_8_pi , 0xf1f8, 0xb118, { 12, 12, 8}}, + {m68k_op_eor_8_pd , 0xf1f8, 0xb120, { 14, 14, 9}}, + {m68k_op_eor_8_di , 0xf1f8, 0xb128, { 16, 16, 9}}, + {m68k_op_eor_8_ix , 0xf1f8, 0xb130, { 18, 18, 11}}, + {m68k_op_eor_16_d , 0xf1f8, 0xb140, { 4, 4, 2}}, + {m68k_op_cmpm_16 , 0xf1f8, 0xb148, { 12, 12, 9}}, + {m68k_op_eor_16_ai , 0xf1f8, 0xb150, { 12, 12, 8}}, + {m68k_op_eor_16_pi , 0xf1f8, 0xb158, { 12, 12, 8}}, + {m68k_op_eor_16_pd , 0xf1f8, 0xb160, { 14, 14, 9}}, + {m68k_op_eor_16_di , 0xf1f8, 0xb168, { 16, 16, 9}}, + {m68k_op_eor_16_ix , 0xf1f8, 0xb170, { 18, 18, 11}}, + {m68k_op_eor_32_d , 0xf1f8, 0xb180, { 8, 6, 2}}, + {m68k_op_cmpm_32 , 0xf1f8, 0xb188, { 20, 20, 9}}, + {m68k_op_eor_32_ai , 0xf1f8, 0xb190, { 20, 20, 8}}, + {m68k_op_eor_32_pi , 0xf1f8, 0xb198, { 20, 20, 8}}, + {m68k_op_eor_32_pd , 0xf1f8, 0xb1a0, { 22, 22, 9}}, + {m68k_op_eor_32_di , 0xf1f8, 0xb1a8, { 24, 24, 9}}, + {m68k_op_eor_32_ix , 0xf1f8, 0xb1b0, { 26, 26, 11}}, + {m68k_op_cmpa_32_d , 0xf1f8, 0xb1c0, { 6, 6, 4}}, + {m68k_op_cmpa_32_a , 0xf1f8, 0xb1c8, { 6, 6, 4}}, + {m68k_op_cmpa_32_ai , 0xf1f8, 0xb1d0, { 14, 14, 8}}, + {m68k_op_cmpa_32_pi , 0xf1f8, 0xb1d8, { 14, 14, 8}}, + {m68k_op_cmpa_32_pd , 0xf1f8, 0xb1e0, { 16, 16, 9}}, + {m68k_op_cmpa_32_di , 0xf1f8, 0xb1e8, { 18, 18, 9}}, + {m68k_op_cmpa_32_ix , 0xf1f8, 0xb1f0, { 20, 20, 11}}, + {m68k_op_and_8_er_d , 0xf1f8, 0xc000, { 4, 4, 2}}, + {m68k_op_and_8_er_ai , 0xf1f8, 0xc010, { 8, 8, 6}}, + {m68k_op_and_8_er_pi , 0xf1f8, 0xc018, { 8, 8, 6}}, + {m68k_op_and_8_er_pd , 0xf1f8, 0xc020, { 10, 10, 7}}, + {m68k_op_and_8_er_di , 0xf1f8, 0xc028, { 12, 12, 7}}, + {m68k_op_and_8_er_ix , 0xf1f8, 0xc030, { 14, 14, 9}}, + {m68k_op_and_16_er_d , 0xf1f8, 0xc040, { 4, 4, 2}}, + {m68k_op_and_16_er_ai , 0xf1f8, 0xc050, { 8, 8, 6}}, + {m68k_op_and_16_er_pi , 0xf1f8, 0xc058, { 8, 8, 6}}, + {m68k_op_and_16_er_pd , 0xf1f8, 0xc060, { 10, 10, 7}}, + {m68k_op_and_16_er_di , 0xf1f8, 0xc068, { 12, 12, 7}}, + {m68k_op_and_16_er_ix , 0xf1f8, 0xc070, { 14, 14, 9}}, + {m68k_op_and_32_er_d , 0xf1f8, 0xc080, { 6, 6, 2}}, + {m68k_op_and_32_er_ai , 0xf1f8, 0xc090, { 14, 14, 6}}, + {m68k_op_and_32_er_pi , 0xf1f8, 0xc098, { 14, 14, 6}}, + {m68k_op_and_32_er_pd , 0xf1f8, 0xc0a0, { 16, 16, 7}}, + {m68k_op_and_32_er_di , 0xf1f8, 0xc0a8, { 18, 18, 7}}, + {m68k_op_and_32_er_ix , 0xf1f8, 0xc0b0, { 20, 20, 9}}, + {m68k_op_mulu_16_d , 0xf1f8, 0xc0c0, { 54, 30, 27}}, + {m68k_op_mulu_16_ai , 0xf1f8, 0xc0d0, { 58, 34, 31}}, + {m68k_op_mulu_16_pi , 0xf1f8, 0xc0d8, { 58, 34, 31}}, + {m68k_op_mulu_16_pd , 0xf1f8, 0xc0e0, { 60, 36, 32}}, + {m68k_op_mulu_16_di , 0xf1f8, 0xc0e8, { 62, 38, 32}}, + {m68k_op_mulu_16_ix , 0xf1f8, 0xc0f0, { 64, 40, 34}}, + {m68k_op_abcd_8_rr , 0xf1f8, 0xc100, { 6, 6, 4}}, + {m68k_op_abcd_8_mm , 0xf1f8, 0xc108, { 18, 18, 16}}, + {m68k_op_and_8_re_ai , 0xf1f8, 0xc110, { 12, 12, 8}}, + {m68k_op_and_8_re_pi , 0xf1f8, 0xc118, { 12, 12, 8}}, + {m68k_op_and_8_re_pd , 0xf1f8, 0xc120, { 14, 14, 9}}, + {m68k_op_and_8_re_di , 0xf1f8, 0xc128, { 16, 16, 9}}, + {m68k_op_and_8_re_ix , 0xf1f8, 0xc130, { 18, 18, 11}}, + {m68k_op_exg_32_dd , 0xf1f8, 0xc140, { 6, 6, 2}}, + {m68k_op_exg_32_aa , 0xf1f8, 0xc148, { 6, 6, 2}}, + {m68k_op_and_16_re_ai , 0xf1f8, 0xc150, { 12, 12, 8}}, + {m68k_op_and_16_re_pi , 0xf1f8, 0xc158, { 12, 12, 8}}, + {m68k_op_and_16_re_pd , 0xf1f8, 0xc160, { 14, 14, 9}}, + {m68k_op_and_16_re_di , 0xf1f8, 0xc168, { 16, 16, 9}}, + {m68k_op_and_16_re_ix , 0xf1f8, 0xc170, { 18, 18, 11}}, + {m68k_op_exg_32_da , 0xf1f8, 0xc188, { 6, 6, 2}}, + {m68k_op_and_32_re_ai , 0xf1f8, 0xc190, { 20, 20, 8}}, + {m68k_op_and_32_re_pi , 0xf1f8, 0xc198, { 20, 20, 8}}, + {m68k_op_and_32_re_pd , 0xf1f8, 0xc1a0, { 22, 22, 9}}, + {m68k_op_and_32_re_di , 0xf1f8, 0xc1a8, { 24, 24, 9}}, + {m68k_op_and_32_re_ix , 0xf1f8, 0xc1b0, { 26, 26, 11}}, + {m68k_op_muls_16_d , 0xf1f8, 0xc1c0, { 54, 32, 27}}, + {m68k_op_muls_16_ai , 0xf1f8, 0xc1d0, { 58, 36, 31}}, + {m68k_op_muls_16_pi , 0xf1f8, 0xc1d8, { 58, 36, 31}}, + {m68k_op_muls_16_pd , 0xf1f8, 0xc1e0, { 60, 38, 32}}, + {m68k_op_muls_16_di , 0xf1f8, 0xc1e8, { 62, 40, 32}}, + {m68k_op_muls_16_ix , 0xf1f8, 0xc1f0, { 64, 42, 34}}, + {m68k_op_add_8_er_d , 0xf1f8, 0xd000, { 4, 4, 2}}, + {m68k_op_add_8_er_ai , 0xf1f8, 0xd010, { 8, 8, 6}}, + {m68k_op_add_8_er_pi , 0xf1f8, 0xd018, { 8, 8, 6}}, + {m68k_op_add_8_er_pd , 0xf1f8, 0xd020, { 10, 10, 7}}, + {m68k_op_add_8_er_di , 0xf1f8, 0xd028, { 12, 12, 7}}, + {m68k_op_add_8_er_ix , 0xf1f8, 0xd030, { 14, 14, 9}}, + {m68k_op_add_16_er_d , 0xf1f8, 0xd040, { 4, 4, 2}}, + {m68k_op_add_16_er_a , 0xf1f8, 0xd048, { 4, 4, 2}}, + {m68k_op_add_16_er_ai , 0xf1f8, 0xd050, { 8, 8, 6}}, + {m68k_op_add_16_er_pi , 0xf1f8, 0xd058, { 8, 8, 6}}, + {m68k_op_add_16_er_pd , 0xf1f8, 0xd060, { 10, 10, 7}}, + {m68k_op_add_16_er_di , 0xf1f8, 0xd068, { 12, 12, 7}}, + {m68k_op_add_16_er_ix , 0xf1f8, 0xd070, { 14, 14, 9}}, + {m68k_op_add_32_er_d , 0xf1f8, 0xd080, { 6, 6, 2}}, + {m68k_op_add_32_er_a , 0xf1f8, 0xd088, { 6, 6, 2}}, + {m68k_op_add_32_er_ai , 0xf1f8, 0xd090, { 14, 14, 6}}, + {m68k_op_add_32_er_pi , 0xf1f8, 0xd098, { 14, 14, 6}}, + {m68k_op_add_32_er_pd , 0xf1f8, 0xd0a0, { 16, 16, 7}}, + {m68k_op_add_32_er_di , 0xf1f8, 0xd0a8, { 18, 18, 7}}, + {m68k_op_add_32_er_ix , 0xf1f8, 0xd0b0, { 20, 20, 9}}, + {m68k_op_adda_16_d , 0xf1f8, 0xd0c0, { 8, 8, 2}}, + {m68k_op_adda_16_a , 0xf1f8, 0xd0c8, { 8, 8, 2}}, + {m68k_op_adda_16_ai , 0xf1f8, 0xd0d0, { 12, 12, 6}}, + {m68k_op_adda_16_pi , 0xf1f8, 0xd0d8, { 12, 12, 6}}, + {m68k_op_adda_16_pd , 0xf1f8, 0xd0e0, { 14, 14, 7}}, + {m68k_op_adda_16_di , 0xf1f8, 0xd0e8, { 16, 16, 7}}, + {m68k_op_adda_16_ix , 0xf1f8, 0xd0f0, { 18, 18, 9}}, + {m68k_op_addx_8_rr , 0xf1f8, 0xd100, { 4, 4, 2}}, + {m68k_op_addx_8_mm , 0xf1f8, 0xd108, { 18, 18, 12}}, + {m68k_op_add_8_re_ai , 0xf1f8, 0xd110, { 12, 12, 8}}, + {m68k_op_add_8_re_pi , 0xf1f8, 0xd118, { 12, 12, 8}}, + {m68k_op_add_8_re_pd , 0xf1f8, 0xd120, { 14, 14, 9}}, + {m68k_op_add_8_re_di , 0xf1f8, 0xd128, { 16, 16, 9}}, + {m68k_op_add_8_re_ix , 0xf1f8, 0xd130, { 18, 18, 11}}, + {m68k_op_addx_16_rr , 0xf1f8, 0xd140, { 4, 4, 2}}, + {m68k_op_addx_16_mm , 0xf1f8, 0xd148, { 18, 18, 12}}, + {m68k_op_add_16_re_ai , 0xf1f8, 0xd150, { 12, 12, 8}}, + {m68k_op_add_16_re_pi , 0xf1f8, 0xd158, { 12, 12, 8}}, + {m68k_op_add_16_re_pd , 0xf1f8, 0xd160, { 14, 14, 9}}, + {m68k_op_add_16_re_di , 0xf1f8, 0xd168, { 16, 16, 9}}, + {m68k_op_add_16_re_ix , 0xf1f8, 0xd170, { 18, 18, 11}}, + {m68k_op_addx_32_rr , 0xf1f8, 0xd180, { 8, 6, 2}}, + {m68k_op_addx_32_mm , 0xf1f8, 0xd188, { 30, 30, 12}}, + {m68k_op_add_32_re_ai , 0xf1f8, 0xd190, { 20, 20, 8}}, + {m68k_op_add_32_re_pi , 0xf1f8, 0xd198, { 20, 20, 8}}, + {m68k_op_add_32_re_pd , 0xf1f8, 0xd1a0, { 22, 22, 9}}, + {m68k_op_add_32_re_di , 0xf1f8, 0xd1a8, { 24, 24, 9}}, + {m68k_op_add_32_re_ix , 0xf1f8, 0xd1b0, { 26, 26, 11}}, + {m68k_op_adda_32_d , 0xf1f8, 0xd1c0, { 6, 6, 2}}, + {m68k_op_adda_32_a , 0xf1f8, 0xd1c8, { 6, 6, 2}}, + {m68k_op_adda_32_ai , 0xf1f8, 0xd1d0, { 14, 14, 6}}, + {m68k_op_adda_32_pi , 0xf1f8, 0xd1d8, { 14, 14, 6}}, + {m68k_op_adda_32_pd , 0xf1f8, 0xd1e0, { 16, 16, 7}}, + {m68k_op_adda_32_di , 0xf1f8, 0xd1e8, { 18, 18, 7}}, + {m68k_op_adda_32_ix , 0xf1f8, 0xd1f0, { 20, 20, 9}}, + {m68k_op_asr_8_s , 0xf1f8, 0xe000, { 6, 6, 6}}, + {m68k_op_lsr_8_s , 0xf1f8, 0xe008, { 6, 6, 4}}, + {m68k_op_roxr_8_s , 0xf1f8, 0xe010, { 6, 6, 12}}, + {m68k_op_ror_8_s , 0xf1f8, 0xe018, { 6, 6, 8}}, + {m68k_op_asr_8_r , 0xf1f8, 0xe020, { 6, 6, 6}}, + {m68k_op_lsr_8_r , 0xf1f8, 0xe028, { 6, 6, 6}}, + {m68k_op_roxr_8_r , 0xf1f8, 0xe030, { 6, 6, 12}}, + {m68k_op_ror_8_r , 0xf1f8, 0xe038, { 6, 6, 8}}, + {m68k_op_asr_16_s , 0xf1f8, 0xe040, { 6, 6, 6}}, + {m68k_op_lsr_16_s , 0xf1f8, 0xe048, { 6, 6, 4}}, + {m68k_op_roxr_16_s , 0xf1f8, 0xe050, { 6, 6, 12}}, + {m68k_op_ror_16_s , 0xf1f8, 0xe058, { 6, 6, 8}}, + {m68k_op_asr_16_r , 0xf1f8, 0xe060, { 6, 6, 6}}, + {m68k_op_lsr_16_r , 0xf1f8, 0xe068, { 6, 6, 6}}, + {m68k_op_roxr_16_r , 0xf1f8, 0xe070, { 6, 6, 12}}, + {m68k_op_ror_16_r , 0xf1f8, 0xe078, { 6, 6, 8}}, + {m68k_op_asr_32_s , 0xf1f8, 0xe080, { 8, 8, 6}}, + {m68k_op_lsr_32_s , 0xf1f8, 0xe088, { 8, 8, 4}}, + {m68k_op_roxr_32_s , 0xf1f8, 0xe090, { 8, 8, 12}}, + {m68k_op_ror_32_s , 0xf1f8, 0xe098, { 8, 8, 8}}, + {m68k_op_asr_32_r , 0xf1f8, 0xe0a0, { 8, 8, 6}}, + {m68k_op_lsr_32_r , 0xf1f8, 0xe0a8, { 8, 8, 6}}, + {m68k_op_roxr_32_r , 0xf1f8, 0xe0b0, { 8, 8, 12}}, + {m68k_op_ror_32_r , 0xf1f8, 0xe0b8, { 8, 8, 8}}, + {m68k_op_asl_8_s , 0xf1f8, 0xe100, { 6, 6, 8}}, + {m68k_op_lsl_8_s , 0xf1f8, 0xe108, { 6, 6, 4}}, + {m68k_op_roxl_8_s , 0xf1f8, 0xe110, { 6, 6, 12}}, + {m68k_op_rol_8_s , 0xf1f8, 0xe118, { 6, 6, 8}}, + {m68k_op_asl_8_r , 0xf1f8, 0xe120, { 6, 6, 8}}, + {m68k_op_lsl_8_r , 0xf1f8, 0xe128, { 6, 6, 6}}, + {m68k_op_roxl_8_r , 0xf1f8, 0xe130, { 6, 6, 12}}, + {m68k_op_rol_8_r , 0xf1f8, 0xe138, { 6, 6, 8}}, + {m68k_op_asl_16_s , 0xf1f8, 0xe140, { 6, 6, 8}}, + {m68k_op_lsl_16_s , 0xf1f8, 0xe148, { 6, 6, 4}}, + {m68k_op_roxl_16_s , 0xf1f8, 0xe150, { 6, 6, 12}}, + {m68k_op_rol_16_s , 0xf1f8, 0xe158, { 6, 6, 8}}, + {m68k_op_asl_16_r , 0xf1f8, 0xe160, { 6, 6, 8}}, + {m68k_op_lsl_16_r , 0xf1f8, 0xe168, { 6, 6, 6}}, + {m68k_op_roxl_16_r , 0xf1f8, 0xe170, { 6, 6, 12}}, + {m68k_op_rol_16_r , 0xf1f8, 0xe178, { 6, 6, 8}}, + {m68k_op_asl_32_s , 0xf1f8, 0xe180, { 8, 8, 8}}, + {m68k_op_lsl_32_s , 0xf1f8, 0xe188, { 8, 8, 4}}, + {m68k_op_roxl_32_s , 0xf1f8, 0xe190, { 8, 8, 12}}, + {m68k_op_rol_32_s , 0xf1f8, 0xe198, { 8, 8, 8}}, + {m68k_op_asl_32_r , 0xf1f8, 0xe1a0, { 8, 8, 8}}, + {m68k_op_lsl_32_r , 0xf1f8, 0xe1a8, { 8, 8, 6}}, + {m68k_op_roxl_32_r , 0xf1f8, 0xe1b0, { 8, 8, 12}}, + {m68k_op_rol_32_r , 0xf1f8, 0xe1b8, { 8, 8, 8}}, + {m68k_op_cpdbcc_32 , 0xf1f8, 0xf048, { 0, 0, 4}}, + {m68k_op_cptrapcc_32 , 0xf1f8, 0xf078, { 0, 0, 4}}, + {m68k_op_rtm_32 , 0xfff0, 0x06c0, { 0, 0, 19}}, + {m68k_op_trap , 0xfff0, 0x4e40, { 4, 4, 4}}, + {m68k_op_btst_8_r_pi7 , 0xf1ff, 0x011f, { 8, 8, 8}}, + {m68k_op_btst_8_r_pd7 , 0xf1ff, 0x0127, { 10, 10, 9}}, + {m68k_op_btst_8_r_aw , 0xf1ff, 0x0138, { 12, 12, 8}}, + {m68k_op_btst_8_r_al , 0xf1ff, 0x0139, { 16, 16, 8}}, + {m68k_op_btst_8_r_pcdi , 0xf1ff, 0x013a, { 12, 12, 9}}, + {m68k_op_btst_8_r_pcix , 0xf1ff, 0x013b, { 14, 14, 11}}, + {m68k_op_btst_8_r_i , 0xf1ff, 0x013c, { 8, 8, 6}}, + {m68k_op_bchg_8_r_pi7 , 0xf1ff, 0x015f, { 12, 12, 8}}, + {m68k_op_bchg_8_r_pd7 , 0xf1ff, 0x0167, { 14, 14, 9}}, + {m68k_op_bchg_8_r_aw , 0xf1ff, 0x0178, { 16, 16, 8}}, + {m68k_op_bchg_8_r_al , 0xf1ff, 0x0179, { 20, 20, 8}}, + {m68k_op_bclr_8_r_pi7 , 0xf1ff, 0x019f, { 12, 14, 8}}, + {m68k_op_bclr_8_r_pd7 , 0xf1ff, 0x01a7, { 14, 16, 9}}, + {m68k_op_bclr_8_r_aw , 0xf1ff, 0x01b8, { 16, 18, 8}}, + {m68k_op_bclr_8_r_al , 0xf1ff, 0x01b9, { 20, 22, 8}}, + {m68k_op_bset_8_r_pi7 , 0xf1ff, 0x01df, { 12, 12, 8}}, + {m68k_op_bset_8_r_pd7 , 0xf1ff, 0x01e7, { 14, 14, 9}}, + {m68k_op_bset_8_r_aw , 0xf1ff, 0x01f8, { 16, 16, 8}}, + {m68k_op_bset_8_r_al , 0xf1ff, 0x01f9, { 20, 20, 8}}, + {m68k_op_move_8_d_pi7 , 0xf1ff, 0x101f, { 8, 8, 6}}, + {m68k_op_move_8_d_pd7 , 0xf1ff, 0x1027, { 10, 10, 7}}, + {m68k_op_move_8_d_aw , 0xf1ff, 0x1038, { 12, 12, 6}}, + {m68k_op_move_8_d_al , 0xf1ff, 0x1039, { 16, 16, 6}}, + {m68k_op_move_8_d_pcdi , 0xf1ff, 0x103a, { 12, 12, 7}}, + {m68k_op_move_8_d_pcix , 0xf1ff, 0x103b, { 14, 14, 9}}, + {m68k_op_move_8_d_i , 0xf1ff, 0x103c, { 8, 8, 4}}, + {m68k_op_move_8_ai_pi7 , 0xf1ff, 0x109f, { 12, 12, 8}}, + {m68k_op_move_8_ai_pd7 , 0xf1ff, 0x10a7, { 14, 14, 9}}, + {m68k_op_move_8_ai_aw , 0xf1ff, 0x10b8, { 16, 16, 8}}, + {m68k_op_move_8_ai_al , 0xf1ff, 0x10b9, { 20, 20, 8}}, + {m68k_op_move_8_ai_pcdi , 0xf1ff, 0x10ba, { 16, 16, 9}}, + {m68k_op_move_8_ai_pcix , 0xf1ff, 0x10bb, { 18, 18, 11}}, + {m68k_op_move_8_ai_i , 0xf1ff, 0x10bc, { 12, 12, 6}}, + {m68k_op_move_8_pi_pi7 , 0xf1ff, 0x10df, { 12, 12, 8}}, + {m68k_op_move_8_pi_pd7 , 0xf1ff, 0x10e7, { 14, 14, 9}}, + {m68k_op_move_8_pi_aw , 0xf1ff, 0x10f8, { 16, 16, 8}}, + {m68k_op_move_8_pi_al , 0xf1ff, 0x10f9, { 20, 20, 8}}, + {m68k_op_move_8_pi_pcdi , 0xf1ff, 0x10fa, { 16, 16, 9}}, + {m68k_op_move_8_pi_pcix , 0xf1ff, 0x10fb, { 18, 18, 11}}, + {m68k_op_move_8_pi_i , 0xf1ff, 0x10fc, { 12, 12, 6}}, + {m68k_op_move_8_pd_pi7 , 0xf1ff, 0x111f, { 12, 12, 9}}, + {m68k_op_move_8_pd_pd7 , 0xf1ff, 0x1127, { 14, 14, 10}}, + {m68k_op_move_8_pd_aw , 0xf1ff, 0x1138, { 16, 16, 9}}, + {m68k_op_move_8_pd_al , 0xf1ff, 0x1139, { 20, 20, 9}}, + {m68k_op_move_8_pd_pcdi , 0xf1ff, 0x113a, { 16, 16, 10}}, + {m68k_op_move_8_pd_pcix , 0xf1ff, 0x113b, { 18, 18, 12}}, + {m68k_op_move_8_pd_i , 0xf1ff, 0x113c, { 12, 12, 7}}, + {m68k_op_move_8_di_pi7 , 0xf1ff, 0x115f, { 16, 16, 9}}, + {m68k_op_move_8_di_pd7 , 0xf1ff, 0x1167, { 18, 18, 10}}, + {m68k_op_move_8_di_aw , 0xf1ff, 0x1178, { 20, 20, 9}}, + {m68k_op_move_8_di_al , 0xf1ff, 0x1179, { 24, 24, 9}}, + {m68k_op_move_8_di_pcdi , 0xf1ff, 0x117a, { 20, 20, 10}}, + {m68k_op_move_8_di_pcix , 0xf1ff, 0x117b, { 22, 22, 12}}, + {m68k_op_move_8_di_i , 0xf1ff, 0x117c, { 16, 16, 7}}, + {m68k_op_move_8_ix_pi7 , 0xf1ff, 0x119f, { 18, 18, 11}}, + {m68k_op_move_8_ix_pd7 , 0xf1ff, 0x11a7, { 20, 20, 12}}, + {m68k_op_move_8_ix_aw , 0xf1ff, 0x11b8, { 22, 22, 11}}, + {m68k_op_move_8_ix_al , 0xf1ff, 0x11b9, { 26, 26, 11}}, + {m68k_op_move_8_ix_pcdi , 0xf1ff, 0x11ba, { 22, 22, 12}}, + {m68k_op_move_8_ix_pcix , 0xf1ff, 0x11bb, { 24, 24, 14}}, + {m68k_op_move_8_ix_i , 0xf1ff, 0x11bc, { 18, 18, 9}}, + {m68k_op_move_32_d_aw , 0xf1ff, 0x2038, { 16, 16, 6}}, + {m68k_op_move_32_d_al , 0xf1ff, 0x2039, { 20, 20, 6}}, + {m68k_op_move_32_d_pcdi , 0xf1ff, 0x203a, { 16, 16, 7}}, + {m68k_op_move_32_d_pcix , 0xf1ff, 0x203b, { 18, 18, 9}}, + {m68k_op_move_32_d_i , 0xf1ff, 0x203c, { 12, 12, 6}}, + {m68k_op_movea_32_aw , 0xf1ff, 0x2078, { 16, 16, 6}}, + {m68k_op_movea_32_al , 0xf1ff, 0x2079, { 20, 20, 6}}, + {m68k_op_movea_32_pcdi , 0xf1ff, 0x207a, { 16, 16, 7}}, + {m68k_op_movea_32_pcix , 0xf1ff, 0x207b, { 18, 18, 9}}, + {m68k_op_movea_32_i , 0xf1ff, 0x207c, { 12, 12, 6}}, + {m68k_op_move_32_ai_aw , 0xf1ff, 0x20b8, { 24, 24, 8}}, + {m68k_op_move_32_ai_al , 0xf1ff, 0x20b9, { 28, 28, 8}}, + {m68k_op_move_32_ai_pcdi , 0xf1ff, 0x20ba, { 24, 24, 9}}, + {m68k_op_move_32_ai_pcix , 0xf1ff, 0x20bb, { 26, 26, 11}}, + {m68k_op_move_32_ai_i , 0xf1ff, 0x20bc, { 20, 20, 8}}, + {m68k_op_move_32_pi_aw , 0xf1ff, 0x20f8, { 24, 24, 8}}, + {m68k_op_move_32_pi_al , 0xf1ff, 0x20f9, { 28, 28, 8}}, + {m68k_op_move_32_pi_pcdi , 0xf1ff, 0x20fa, { 24, 24, 9}}, + {m68k_op_move_32_pi_pcix , 0xf1ff, 0x20fb, { 26, 26, 11}}, + {m68k_op_move_32_pi_i , 0xf1ff, 0x20fc, { 20, 20, 8}}, + {m68k_op_move_32_pd_aw , 0xf1ff, 0x2138, { 24, 26, 9}}, + {m68k_op_move_32_pd_al , 0xf1ff, 0x2139, { 28, 30, 9}}, + {m68k_op_move_32_pd_pcdi , 0xf1ff, 0x213a, { 24, 26, 10}}, + {m68k_op_move_32_pd_pcix , 0xf1ff, 0x213b, { 26, 28, 12}}, + {m68k_op_move_32_pd_i , 0xf1ff, 0x213c, { 20, 22, 9}}, + {m68k_op_move_32_di_aw , 0xf1ff, 0x2178, { 28, 28, 9}}, + {m68k_op_move_32_di_al , 0xf1ff, 0x2179, { 32, 32, 9}}, + {m68k_op_move_32_di_pcdi , 0xf1ff, 0x217a, { 28, 28, 10}}, + {m68k_op_move_32_di_pcix , 0xf1ff, 0x217b, { 30, 30, 12}}, + {m68k_op_move_32_di_i , 0xf1ff, 0x217c, { 24, 24, 9}}, + {m68k_op_move_32_ix_aw , 0xf1ff, 0x21b8, { 30, 30, 11}}, + {m68k_op_move_32_ix_al , 0xf1ff, 0x21b9, { 34, 34, 11}}, + {m68k_op_move_32_ix_pcdi , 0xf1ff, 0x21ba, { 30, 30, 12}}, + {m68k_op_move_32_ix_pcix , 0xf1ff, 0x21bb, { 32, 32, 14}}, + {m68k_op_move_32_ix_i , 0xf1ff, 0x21bc, { 26, 26, 11}}, + {m68k_op_move_16_d_aw , 0xf1ff, 0x3038, { 12, 12, 6}}, + {m68k_op_move_16_d_al , 0xf1ff, 0x3039, { 16, 16, 6}}, + {m68k_op_move_16_d_pcdi , 0xf1ff, 0x303a, { 12, 12, 7}}, + {m68k_op_move_16_d_pcix , 0xf1ff, 0x303b, { 14, 14, 9}}, + {m68k_op_move_16_d_i , 0xf1ff, 0x303c, { 8, 8, 4}}, + {m68k_op_movea_16_aw , 0xf1ff, 0x3078, { 12, 12, 6}}, + {m68k_op_movea_16_al , 0xf1ff, 0x3079, { 16, 16, 6}}, + {m68k_op_movea_16_pcdi , 0xf1ff, 0x307a, { 12, 12, 7}}, + {m68k_op_movea_16_pcix , 0xf1ff, 0x307b, { 14, 14, 9}}, + {m68k_op_movea_16_i , 0xf1ff, 0x307c, { 8, 8, 4}}, + {m68k_op_move_16_ai_aw , 0xf1ff, 0x30b8, { 16, 16, 8}}, + {m68k_op_move_16_ai_al , 0xf1ff, 0x30b9, { 20, 20, 8}}, + {m68k_op_move_16_ai_pcdi , 0xf1ff, 0x30ba, { 16, 16, 9}}, + {m68k_op_move_16_ai_pcix , 0xf1ff, 0x30bb, { 18, 18, 11}}, + {m68k_op_move_16_ai_i , 0xf1ff, 0x30bc, { 12, 12, 6}}, + {m68k_op_move_16_pi_aw , 0xf1ff, 0x30f8, { 16, 16, 8}}, + {m68k_op_move_16_pi_al , 0xf1ff, 0x30f9, { 20, 20, 8}}, + {m68k_op_move_16_pi_pcdi , 0xf1ff, 0x30fa, { 16, 16, 9}}, + {m68k_op_move_16_pi_pcix , 0xf1ff, 0x30fb, { 18, 18, 11}}, + {m68k_op_move_16_pi_i , 0xf1ff, 0x30fc, { 12, 12, 6}}, + {m68k_op_move_16_pd_aw , 0xf1ff, 0x3138, { 16, 16, 9}}, + {m68k_op_move_16_pd_al , 0xf1ff, 0x3139, { 20, 20, 9}}, + {m68k_op_move_16_pd_pcdi , 0xf1ff, 0x313a, { 16, 16, 10}}, + {m68k_op_move_16_pd_pcix , 0xf1ff, 0x313b, { 18, 18, 12}}, + {m68k_op_move_16_pd_i , 0xf1ff, 0x313c, { 12, 12, 7}}, + {m68k_op_move_16_di_aw , 0xf1ff, 0x3178, { 20, 20, 9}}, + {m68k_op_move_16_di_al , 0xf1ff, 0x3179, { 24, 24, 9}}, + {m68k_op_move_16_di_pcdi , 0xf1ff, 0x317a, { 20, 20, 10}}, + {m68k_op_move_16_di_pcix , 0xf1ff, 0x317b, { 22, 22, 12}}, + {m68k_op_move_16_di_i , 0xf1ff, 0x317c, { 16, 16, 7}}, + {m68k_op_move_16_ix_aw , 0xf1ff, 0x31b8, { 22, 22, 11}}, + {m68k_op_move_16_ix_al , 0xf1ff, 0x31b9, { 26, 26, 11}}, + {m68k_op_move_16_ix_pcdi , 0xf1ff, 0x31ba, { 22, 22, 12}}, + {m68k_op_move_16_ix_pcix , 0xf1ff, 0x31bb, { 24, 24, 14}}, + {m68k_op_move_16_ix_i , 0xf1ff, 0x31bc, { 18, 18, 9}}, + {m68k_op_chk_32_aw , 0xf1ff, 0x4138, { 0, 0, 12}}, + {m68k_op_chk_32_al , 0xf1ff, 0x4139, { 0, 0, 12}}, + {m68k_op_chk_32_pcdi , 0xf1ff, 0x413a, { 0, 0, 13}}, + {m68k_op_chk_32_pcix , 0xf1ff, 0x413b, { 0, 0, 15}}, + {m68k_op_chk_32_i , 0xf1ff, 0x413c, { 0, 0, 12}}, + {m68k_op_chk_16_aw , 0xf1ff, 0x41b8, { 18, 16, 12}}, + {m68k_op_chk_16_al , 0xf1ff, 0x41b9, { 22, 20, 12}}, + {m68k_op_chk_16_pcdi , 0xf1ff, 0x41ba, { 18, 16, 13}}, + {m68k_op_chk_16_pcix , 0xf1ff, 0x41bb, { 20, 18, 15}}, + {m68k_op_chk_16_i , 0xf1ff, 0x41bc, { 14, 12, 10}}, + {m68k_op_lea_32_aw , 0xf1ff, 0x41f8, { 8, 8, 6}}, + {m68k_op_lea_32_al , 0xf1ff, 0x41f9, { 12, 12, 6}}, + {m68k_op_lea_32_pcdi , 0xf1ff, 0x41fa, { 8, 8, 7}}, + {m68k_op_lea_32_pcix , 0xf1ff, 0x41fb, { 12, 12, 9}}, + {m68k_op_addq_8_pi7 , 0xf1ff, 0x501f, { 12, 12, 8}}, + {m68k_op_addq_8_pd7 , 0xf1ff, 0x5027, { 14, 14, 9}}, + {m68k_op_addq_8_aw , 0xf1ff, 0x5038, { 16, 16, 8}}, + {m68k_op_addq_8_al , 0xf1ff, 0x5039, { 20, 20, 8}}, + {m68k_op_addq_16_aw , 0xf1ff, 0x5078, { 16, 16, 8}}, + {m68k_op_addq_16_al , 0xf1ff, 0x5079, { 20, 20, 8}}, + {m68k_op_addq_32_aw , 0xf1ff, 0x50b8, { 24, 24, 8}}, + {m68k_op_addq_32_al , 0xf1ff, 0x50b9, { 28, 28, 8}}, + {m68k_op_subq_8_pi7 , 0xf1ff, 0x511f, { 12, 12, 8}}, + {m68k_op_subq_8_pd7 , 0xf1ff, 0x5127, { 14, 14, 9}}, + {m68k_op_subq_8_aw , 0xf1ff, 0x5138, { 16, 16, 8}}, + {m68k_op_subq_8_al , 0xf1ff, 0x5139, { 20, 20, 8}}, + {m68k_op_subq_16_aw , 0xf1ff, 0x5178, { 16, 16, 8}}, + {m68k_op_subq_16_al , 0xf1ff, 0x5179, { 20, 20, 8}}, + {m68k_op_subq_32_aw , 0xf1ff, 0x51b8, { 24, 24, 8}}, + {m68k_op_subq_32_al , 0xf1ff, 0x51b9, { 28, 28, 8}}, + {m68k_op_or_8_er_pi7 , 0xf1ff, 0x801f, { 8, 8, 6}}, + {m68k_op_or_8_er_pd7 , 0xf1ff, 0x8027, { 10, 10, 7}}, + {m68k_op_or_8_er_aw , 0xf1ff, 0x8038, { 12, 12, 6}}, + {m68k_op_or_8_er_al , 0xf1ff, 0x8039, { 16, 16, 6}}, + {m68k_op_or_8_er_pcdi , 0xf1ff, 0x803a, { 12, 12, 7}}, + {m68k_op_or_8_er_pcix , 0xf1ff, 0x803b, { 14, 14, 9}}, + {m68k_op_or_8_er_i , 0xf1ff, 0x803c, { 10, 8, 4}}, + {m68k_op_or_16_er_aw , 0xf1ff, 0x8078, { 12, 12, 6}}, + {m68k_op_or_16_er_al , 0xf1ff, 0x8079, { 16, 16, 6}}, + {m68k_op_or_16_er_pcdi , 0xf1ff, 0x807a, { 12, 12, 7}}, + {m68k_op_or_16_er_pcix , 0xf1ff, 0x807b, { 14, 14, 9}}, + {m68k_op_or_16_er_i , 0xf1ff, 0x807c, { 10, 8, 4}}, + {m68k_op_or_32_er_aw , 0xf1ff, 0x80b8, { 18, 18, 6}}, + {m68k_op_or_32_er_al , 0xf1ff, 0x80b9, { 22, 22, 6}}, + {m68k_op_or_32_er_pcdi , 0xf1ff, 0x80ba, { 18, 18, 7}}, + {m68k_op_or_32_er_pcix , 0xf1ff, 0x80bb, { 20, 20, 9}}, + {m68k_op_or_32_er_i , 0xf1ff, 0x80bc, { 16, 14, 6}}, + {m68k_op_divu_16_aw , 0xf1ff, 0x80f8, {148, 116, 48}}, + {m68k_op_divu_16_al , 0xf1ff, 0x80f9, {152, 120, 48}}, + {m68k_op_divu_16_pcdi , 0xf1ff, 0x80fa, {148, 116, 49}}, + {m68k_op_divu_16_pcix , 0xf1ff, 0x80fb, {150, 118, 51}}, + {m68k_op_divu_16_i , 0xf1ff, 0x80fc, {144, 112, 46}}, + {m68k_op_sbcd_8_mm_ay7 , 0xf1ff, 0x810f, { 18, 18, 16}}, + {m68k_op_or_8_re_pi7 , 0xf1ff, 0x811f, { 12, 12, 8}}, + {m68k_op_or_8_re_pd7 , 0xf1ff, 0x8127, { 14, 14, 9}}, + {m68k_op_or_8_re_aw , 0xf1ff, 0x8138, { 16, 16, 8}}, + {m68k_op_or_8_re_al , 0xf1ff, 0x8139, { 20, 20, 8}}, + {m68k_op_pack_16_mm_ay7 , 0xf1ff, 0x814f, { 0, 0, 13}}, + {m68k_op_or_16_re_aw , 0xf1ff, 0x8178, { 16, 16, 8}}, + {m68k_op_or_16_re_al , 0xf1ff, 0x8179, { 20, 20, 8}}, + {m68k_op_unpk_16_mm_ay7 , 0xf1ff, 0x818f, { 0, 0, 13}}, + {m68k_op_or_32_re_aw , 0xf1ff, 0x81b8, { 24, 24, 8}}, + {m68k_op_or_32_re_al , 0xf1ff, 0x81b9, { 28, 28, 8}}, + {m68k_op_divs_16_aw , 0xf1ff, 0x81f8, {166, 130, 60}}, + {m68k_op_divs_16_al , 0xf1ff, 0x81f9, {170, 134, 60}}, + {m68k_op_divs_16_pcdi , 0xf1ff, 0x81fa, {166, 130, 61}}, + {m68k_op_divs_16_pcix , 0xf1ff, 0x81fb, {168, 132, 63}}, + {m68k_op_divs_16_i , 0xf1ff, 0x81fc, {162, 126, 58}}, + {m68k_op_sub_8_er_pi7 , 0xf1ff, 0x901f, { 8, 8, 6}}, + {m68k_op_sub_8_er_pd7 , 0xf1ff, 0x9027, { 10, 10, 7}}, + {m68k_op_sub_8_er_aw , 0xf1ff, 0x9038, { 12, 12, 6}}, + {m68k_op_sub_8_er_al , 0xf1ff, 0x9039, { 16, 16, 6}}, + {m68k_op_sub_8_er_pcdi , 0xf1ff, 0x903a, { 12, 12, 7}}, + {m68k_op_sub_8_er_pcix , 0xf1ff, 0x903b, { 14, 14, 9}}, + {m68k_op_sub_8_er_i , 0xf1ff, 0x903c, { 10, 8, 4}}, + {m68k_op_sub_16_er_aw , 0xf1ff, 0x9078, { 12, 12, 6}}, + {m68k_op_sub_16_er_al , 0xf1ff, 0x9079, { 16, 16, 6}}, + {m68k_op_sub_16_er_pcdi , 0xf1ff, 0x907a, { 12, 12, 7}}, + {m68k_op_sub_16_er_pcix , 0xf1ff, 0x907b, { 14, 14, 9}}, + {m68k_op_sub_16_er_i , 0xf1ff, 0x907c, { 10, 8, 4}}, + {m68k_op_sub_32_er_aw , 0xf1ff, 0x90b8, { 18, 18, 6}}, + {m68k_op_sub_32_er_al , 0xf1ff, 0x90b9, { 22, 22, 6}}, + {m68k_op_sub_32_er_pcdi , 0xf1ff, 0x90ba, { 18, 18, 7}}, + {m68k_op_sub_32_er_pcix , 0xf1ff, 0x90bb, { 20, 20, 9}}, + {m68k_op_sub_32_er_i , 0xf1ff, 0x90bc, { 16, 14, 6}}, + {m68k_op_suba_16_aw , 0xf1ff, 0x90f8, { 16, 16, 6}}, + {m68k_op_suba_16_al , 0xf1ff, 0x90f9, { 20, 20, 6}}, + {m68k_op_suba_16_pcdi , 0xf1ff, 0x90fa, { 16, 16, 7}}, + {m68k_op_suba_16_pcix , 0xf1ff, 0x90fb, { 18, 18, 9}}, + {m68k_op_suba_16_i , 0xf1ff, 0x90fc, { 14, 12, 4}}, + {m68k_op_subx_8_mm_ay7 , 0xf1ff, 0x910f, { 18, 18, 12}}, + {m68k_op_sub_8_re_pi7 , 0xf1ff, 0x911f, { 12, 12, 8}}, + {m68k_op_sub_8_re_pd7 , 0xf1ff, 0x9127, { 14, 14, 9}}, + {m68k_op_sub_8_re_aw , 0xf1ff, 0x9138, { 16, 16, 8}}, + {m68k_op_sub_8_re_al , 0xf1ff, 0x9139, { 20, 20, 8}}, + {m68k_op_sub_16_re_aw , 0xf1ff, 0x9178, { 16, 16, 8}}, + {m68k_op_sub_16_re_al , 0xf1ff, 0x9179, { 20, 20, 8}}, + {m68k_op_sub_32_re_aw , 0xf1ff, 0x91b8, { 24, 24, 8}}, + {m68k_op_sub_32_re_al , 0xf1ff, 0x91b9, { 28, 28, 8}}, + {m68k_op_suba_32_aw , 0xf1ff, 0x91f8, { 18, 18, 6}}, + {m68k_op_suba_32_al , 0xf1ff, 0x91f9, { 22, 22, 6}}, + {m68k_op_suba_32_pcdi , 0xf1ff, 0x91fa, { 18, 18, 7}}, + {m68k_op_suba_32_pcix , 0xf1ff, 0x91fb, { 20, 20, 9}}, + {m68k_op_suba_32_i , 0xf1ff, 0x91fc, { 16, 14, 6}}, + {m68k_op_cmp_8_pi7 , 0xf1ff, 0xb01f, { 8, 8, 6}}, + {m68k_op_cmp_8_pd7 , 0xf1ff, 0xb027, { 10, 10, 7}}, + {m68k_op_cmp_8_aw , 0xf1ff, 0xb038, { 12, 12, 6}}, + {m68k_op_cmp_8_al , 0xf1ff, 0xb039, { 16, 16, 6}}, + {m68k_op_cmp_8_pcdi , 0xf1ff, 0xb03a, { 12, 12, 7}}, + {m68k_op_cmp_8_pcix , 0xf1ff, 0xb03b, { 14, 14, 9}}, + {m68k_op_cmp_8_i , 0xf1ff, 0xb03c, { 8, 8, 4}}, + {m68k_op_cmp_16_aw , 0xf1ff, 0xb078, { 12, 12, 6}}, + {m68k_op_cmp_16_al , 0xf1ff, 0xb079, { 16, 16, 6}}, + {m68k_op_cmp_16_pcdi , 0xf1ff, 0xb07a, { 12, 12, 7}}, + {m68k_op_cmp_16_pcix , 0xf1ff, 0xb07b, { 14, 14, 9}}, + {m68k_op_cmp_16_i , 0xf1ff, 0xb07c, { 8, 8, 4}}, + {m68k_op_cmp_32_aw , 0xf1ff, 0xb0b8, { 18, 18, 6}}, + {m68k_op_cmp_32_al , 0xf1ff, 0xb0b9, { 22, 22, 6}}, + {m68k_op_cmp_32_pcdi , 0xf1ff, 0xb0ba, { 18, 18, 7}}, + {m68k_op_cmp_32_pcix , 0xf1ff, 0xb0bb, { 20, 20, 9}}, + {m68k_op_cmp_32_i , 0xf1ff, 0xb0bc, { 14, 14, 6}}, + {m68k_op_cmpa_16_aw , 0xf1ff, 0xb0f8, { 14, 14, 8}}, + {m68k_op_cmpa_16_al , 0xf1ff, 0xb0f9, { 18, 18, 8}}, + {m68k_op_cmpa_16_pcdi , 0xf1ff, 0xb0fa, { 14, 14, 9}}, + {m68k_op_cmpa_16_pcix , 0xf1ff, 0xb0fb, { 16, 16, 11}}, + {m68k_op_cmpa_16_i , 0xf1ff, 0xb0fc, { 10, 10, 6}}, + {m68k_op_cmpm_8_ay7 , 0xf1ff, 0xb10f, { 12, 12, 9}}, + {m68k_op_eor_8_pi7 , 0xf1ff, 0xb11f, { 12, 12, 8}}, + {m68k_op_eor_8_pd7 , 0xf1ff, 0xb127, { 14, 14, 9}}, + {m68k_op_eor_8_aw , 0xf1ff, 0xb138, { 16, 16, 8}}, + {m68k_op_eor_8_al , 0xf1ff, 0xb139, { 20, 20, 8}}, + {m68k_op_eor_16_aw , 0xf1ff, 0xb178, { 16, 16, 8}}, + {m68k_op_eor_16_al , 0xf1ff, 0xb179, { 20, 20, 8}}, + {m68k_op_eor_32_aw , 0xf1ff, 0xb1b8, { 24, 24, 8}}, + {m68k_op_eor_32_al , 0xf1ff, 0xb1b9, { 28, 28, 8}}, + {m68k_op_cmpa_32_aw , 0xf1ff, 0xb1f8, { 18, 18, 8}}, + {m68k_op_cmpa_32_al , 0xf1ff, 0xb1f9, { 22, 22, 8}}, + {m68k_op_cmpa_32_pcdi , 0xf1ff, 0xb1fa, { 18, 18, 9}}, + {m68k_op_cmpa_32_pcix , 0xf1ff, 0xb1fb, { 20, 20, 11}}, + {m68k_op_cmpa_32_i , 0xf1ff, 0xb1fc, { 14, 14, 8}}, + {m68k_op_and_8_er_pi7 , 0xf1ff, 0xc01f, { 8, 8, 6}}, + {m68k_op_and_8_er_pd7 , 0xf1ff, 0xc027, { 10, 10, 7}}, + {m68k_op_and_8_er_aw , 0xf1ff, 0xc038, { 12, 12, 6}}, + {m68k_op_and_8_er_al , 0xf1ff, 0xc039, { 16, 16, 6}}, + {m68k_op_and_8_er_pcdi , 0xf1ff, 0xc03a, { 12, 12, 7}}, + {m68k_op_and_8_er_pcix , 0xf1ff, 0xc03b, { 14, 14, 9}}, + {m68k_op_and_8_er_i , 0xf1ff, 0xc03c, { 10, 8, 4}}, + {m68k_op_and_16_er_aw , 0xf1ff, 0xc078, { 12, 12, 6}}, + {m68k_op_and_16_er_al , 0xf1ff, 0xc079, { 16, 16, 6}}, + {m68k_op_and_16_er_pcdi , 0xf1ff, 0xc07a, { 12, 12, 7}}, + {m68k_op_and_16_er_pcix , 0xf1ff, 0xc07b, { 14, 14, 9}}, + {m68k_op_and_16_er_i , 0xf1ff, 0xc07c, { 10, 8, 4}}, + {m68k_op_and_32_er_aw , 0xf1ff, 0xc0b8, { 18, 18, 6}}, + {m68k_op_and_32_er_al , 0xf1ff, 0xc0b9, { 22, 22, 6}}, + {m68k_op_and_32_er_pcdi , 0xf1ff, 0xc0ba, { 18, 18, 7}}, + {m68k_op_and_32_er_pcix , 0xf1ff, 0xc0bb, { 20, 20, 9}}, + {m68k_op_and_32_er_i , 0xf1ff, 0xc0bc, { 16, 14, 6}}, + {m68k_op_mulu_16_aw , 0xf1ff, 0xc0f8, { 62, 38, 31}}, + {m68k_op_mulu_16_al , 0xf1ff, 0xc0f9, { 66, 42, 31}}, + {m68k_op_mulu_16_pcdi , 0xf1ff, 0xc0fa, { 62, 38, 32}}, + {m68k_op_mulu_16_pcix , 0xf1ff, 0xc0fb, { 64, 40, 34}}, + {m68k_op_mulu_16_i , 0xf1ff, 0xc0fc, { 58, 34, 29}}, + {m68k_op_abcd_8_mm_ay7 , 0xf1ff, 0xc10f, { 18, 18, 16}}, + {m68k_op_and_8_re_pi7 , 0xf1ff, 0xc11f, { 12, 12, 8}}, + {m68k_op_and_8_re_pd7 , 0xf1ff, 0xc127, { 14, 14, 9}}, + {m68k_op_and_8_re_aw , 0xf1ff, 0xc138, { 16, 16, 8}}, + {m68k_op_and_8_re_al , 0xf1ff, 0xc139, { 20, 20, 8}}, + {m68k_op_and_16_re_aw , 0xf1ff, 0xc178, { 16, 16, 8}}, + {m68k_op_and_16_re_al , 0xf1ff, 0xc179, { 20, 20, 8}}, + {m68k_op_and_32_re_aw , 0xf1ff, 0xc1b8, { 24, 24, 8}}, + {m68k_op_and_32_re_al , 0xf1ff, 0xc1b9, { 28, 28, 8}}, + {m68k_op_muls_16_aw , 0xf1ff, 0xc1f8, { 62, 40, 31}}, + {m68k_op_muls_16_al , 0xf1ff, 0xc1f9, { 66, 44, 31}}, + {m68k_op_muls_16_pcdi , 0xf1ff, 0xc1fa, { 62, 40, 32}}, + {m68k_op_muls_16_pcix , 0xf1ff, 0xc1fb, { 64, 42, 34}}, + {m68k_op_muls_16_i , 0xf1ff, 0xc1fc, { 58, 36, 29}}, + {m68k_op_add_8_er_pi7 , 0xf1ff, 0xd01f, { 8, 8, 6}}, + {m68k_op_add_8_er_pd7 , 0xf1ff, 0xd027, { 10, 10, 7}}, + {m68k_op_add_8_er_aw , 0xf1ff, 0xd038, { 12, 12, 6}}, + {m68k_op_add_8_er_al , 0xf1ff, 0xd039, { 16, 16, 6}}, + {m68k_op_add_8_er_pcdi , 0xf1ff, 0xd03a, { 12, 12, 7}}, + {m68k_op_add_8_er_pcix , 0xf1ff, 0xd03b, { 14, 14, 9}}, + {m68k_op_add_8_er_i , 0xf1ff, 0xd03c, { 10, 8, 4}}, + {m68k_op_add_16_er_aw , 0xf1ff, 0xd078, { 12, 12, 6}}, + {m68k_op_add_16_er_al , 0xf1ff, 0xd079, { 16, 16, 6}}, + {m68k_op_add_16_er_pcdi , 0xf1ff, 0xd07a, { 12, 12, 7}}, + {m68k_op_add_16_er_pcix , 0xf1ff, 0xd07b, { 14, 14, 9}}, + {m68k_op_add_16_er_i , 0xf1ff, 0xd07c, { 10, 8, 4}}, + {m68k_op_add_32_er_aw , 0xf1ff, 0xd0b8, { 18, 18, 6}}, + {m68k_op_add_32_er_al , 0xf1ff, 0xd0b9, { 22, 22, 6}}, + {m68k_op_add_32_er_pcdi , 0xf1ff, 0xd0ba, { 18, 18, 7}}, + {m68k_op_add_32_er_pcix , 0xf1ff, 0xd0bb, { 20, 20, 9}}, + {m68k_op_add_32_er_i , 0xf1ff, 0xd0bc, { 16, 14, 6}}, + {m68k_op_adda_16_aw , 0xf1ff, 0xd0f8, { 16, 16, 6}}, + {m68k_op_adda_16_al , 0xf1ff, 0xd0f9, { 20, 20, 6}}, + {m68k_op_adda_16_pcdi , 0xf1ff, 0xd0fa, { 16, 16, 7}}, + {m68k_op_adda_16_pcix , 0xf1ff, 0xd0fb, { 18, 18, 9}}, + {m68k_op_adda_16_i , 0xf1ff, 0xd0fc, { 14, 12, 4}}, + {m68k_op_addx_8_mm_ay7 , 0xf1ff, 0xd10f, { 18, 18, 12}}, + {m68k_op_add_8_re_pi7 , 0xf1ff, 0xd11f, { 12, 12, 8}}, + {m68k_op_add_8_re_pd7 , 0xf1ff, 0xd127, { 14, 14, 9}}, + {m68k_op_add_8_re_aw , 0xf1ff, 0xd138, { 16, 16, 8}}, + {m68k_op_add_8_re_al , 0xf1ff, 0xd139, { 20, 20, 8}}, + {m68k_op_add_16_re_aw , 0xf1ff, 0xd178, { 16, 16, 8}}, + {m68k_op_add_16_re_al , 0xf1ff, 0xd179, { 20, 20, 8}}, + {m68k_op_add_32_re_aw , 0xf1ff, 0xd1b8, { 24, 24, 8}}, + {m68k_op_add_32_re_al , 0xf1ff, 0xd1b9, { 28, 28, 8}}, + {m68k_op_adda_32_aw , 0xf1ff, 0xd1f8, { 18, 18, 6}}, + {m68k_op_adda_32_al , 0xf1ff, 0xd1f9, { 22, 22, 6}}, + {m68k_op_adda_32_pcdi , 0xf1ff, 0xd1fa, { 18, 18, 7}}, + {m68k_op_adda_32_pcix , 0xf1ff, 0xd1fb, { 20, 20, 9}}, + {m68k_op_adda_32_i , 0xf1ff, 0xd1fc, { 16, 14, 6}}, + {m68k_op_ori_8_d , 0xfff8, 0x0000, { 8, 8, 2}}, + {m68k_op_ori_8_ai , 0xfff8, 0x0010, { 16, 16, 8}}, + {m68k_op_ori_8_pi , 0xfff8, 0x0018, { 16, 16, 8}}, + {m68k_op_ori_8_pd , 0xfff8, 0x0020, { 18, 18, 9}}, + {m68k_op_ori_8_di , 0xfff8, 0x0028, { 20, 20, 9}}, + {m68k_op_ori_8_ix , 0xfff8, 0x0030, { 22, 22, 11}}, + {m68k_op_ori_16_d , 0xfff8, 0x0040, { 8, 8, 2}}, + {m68k_op_ori_16_ai , 0xfff8, 0x0050, { 16, 16, 8}}, + {m68k_op_ori_16_pi , 0xfff8, 0x0058, { 16, 16, 8}}, + {m68k_op_ori_16_pd , 0xfff8, 0x0060, { 18, 18, 9}}, + {m68k_op_ori_16_di , 0xfff8, 0x0068, { 20, 20, 9}}, + {m68k_op_ori_16_ix , 0xfff8, 0x0070, { 22, 22, 11}}, + {m68k_op_ori_32_d , 0xfff8, 0x0080, { 16, 14, 2}}, + {m68k_op_ori_32_ai , 0xfff8, 0x0090, { 28, 28, 8}}, + {m68k_op_ori_32_pi , 0xfff8, 0x0098, { 28, 28, 8}}, + {m68k_op_ori_32_pd , 0xfff8, 0x00a0, { 30, 30, 9}}, + {m68k_op_ori_32_di , 0xfff8, 0x00a8, { 32, 32, 9}}, + {m68k_op_ori_32_ix , 0xfff8, 0x00b0, { 34, 34, 11}}, + {m68k_op_chk2cmp2_8_ai , 0xfff8, 0x00d0, { 0, 0, 22}}, + {m68k_op_chk2cmp2_8_di , 0xfff8, 0x00e8, { 0, 0, 23}}, + {m68k_op_chk2cmp2_8_ix , 0xfff8, 0x00f0, { 0, 0, 25}}, + {m68k_op_andi_8_d , 0xfff8, 0x0200, { 8, 8, 2}}, + {m68k_op_andi_8_ai , 0xfff8, 0x0210, { 16, 16, 8}}, + {m68k_op_andi_8_pi , 0xfff8, 0x0218, { 16, 16, 8}}, + {m68k_op_andi_8_pd , 0xfff8, 0x0220, { 18, 18, 9}}, + {m68k_op_andi_8_di , 0xfff8, 0x0228, { 20, 20, 9}}, + {m68k_op_andi_8_ix , 0xfff8, 0x0230, { 22, 22, 11}}, + {m68k_op_andi_16_d , 0xfff8, 0x0240, { 8, 8, 2}}, + {m68k_op_andi_16_ai , 0xfff8, 0x0250, { 16, 16, 8}}, + {m68k_op_andi_16_pi , 0xfff8, 0x0258, { 16, 16, 8}}, + {m68k_op_andi_16_pd , 0xfff8, 0x0260, { 18, 18, 9}}, + {m68k_op_andi_16_di , 0xfff8, 0x0268, { 20, 20, 9}}, + {m68k_op_andi_16_ix , 0xfff8, 0x0270, { 22, 22, 11}}, + {m68k_op_andi_32_d , 0xfff8, 0x0280, { 14, 14, 2}}, + {m68k_op_andi_32_ai , 0xfff8, 0x0290, { 28, 28, 8}}, + {m68k_op_andi_32_pi , 0xfff8, 0x0298, { 28, 28, 8}}, + {m68k_op_andi_32_pd , 0xfff8, 0x02a0, { 30, 30, 9}}, + {m68k_op_andi_32_di , 0xfff8, 0x02a8, { 32, 32, 9}}, + {m68k_op_andi_32_ix , 0xfff8, 0x02b0, { 34, 34, 11}}, + {m68k_op_chk2cmp2_16_ai , 0xfff8, 0x02d0, { 0, 0, 22}}, + {m68k_op_chk2cmp2_16_di , 0xfff8, 0x02e8, { 0, 0, 23}}, + {m68k_op_chk2cmp2_16_ix , 0xfff8, 0x02f0, { 0, 0, 25}}, + {m68k_op_subi_8_d , 0xfff8, 0x0400, { 8, 8, 2}}, + {m68k_op_subi_8_ai , 0xfff8, 0x0410, { 16, 16, 8}}, + {m68k_op_subi_8_pi , 0xfff8, 0x0418, { 16, 16, 8}}, + {m68k_op_subi_8_pd , 0xfff8, 0x0420, { 18, 18, 9}}, + {m68k_op_subi_8_di , 0xfff8, 0x0428, { 20, 20, 9}}, + {m68k_op_subi_8_ix , 0xfff8, 0x0430, { 22, 22, 11}}, + {m68k_op_subi_16_d , 0xfff8, 0x0440, { 8, 8, 2}}, + {m68k_op_subi_16_ai , 0xfff8, 0x0450, { 16, 16, 8}}, + {m68k_op_subi_16_pi , 0xfff8, 0x0458, { 16, 16, 8}}, + {m68k_op_subi_16_pd , 0xfff8, 0x0460, { 18, 18, 9}}, + {m68k_op_subi_16_di , 0xfff8, 0x0468, { 20, 20, 9}}, + {m68k_op_subi_16_ix , 0xfff8, 0x0470, { 22, 22, 11}}, + {m68k_op_subi_32_d , 0xfff8, 0x0480, { 16, 14, 2}}, + {m68k_op_subi_32_ai , 0xfff8, 0x0490, { 28, 28, 8}}, + {m68k_op_subi_32_pi , 0xfff8, 0x0498, { 28, 28, 8}}, + {m68k_op_subi_32_pd , 0xfff8, 0x04a0, { 30, 30, 9}}, + {m68k_op_subi_32_di , 0xfff8, 0x04a8, { 32, 32, 9}}, + {m68k_op_subi_32_ix , 0xfff8, 0x04b0, { 34, 34, 11}}, + {m68k_op_chk2cmp2_32_ai , 0xfff8, 0x04d0, { 0, 0, 22}}, + {m68k_op_chk2cmp2_32_di , 0xfff8, 0x04e8, { 0, 0, 23}}, + {m68k_op_chk2cmp2_32_ix , 0xfff8, 0x04f0, { 0, 0, 25}}, + {m68k_op_addi_8_d , 0xfff8, 0x0600, { 8, 8, 2}}, + {m68k_op_addi_8_ai , 0xfff8, 0x0610, { 16, 16, 8}}, + {m68k_op_addi_8_pi , 0xfff8, 0x0618, { 16, 16, 8}}, + {m68k_op_addi_8_pd , 0xfff8, 0x0620, { 18, 18, 9}}, + {m68k_op_addi_8_di , 0xfff8, 0x0628, { 20, 20, 9}}, + {m68k_op_addi_8_ix , 0xfff8, 0x0630, { 22, 22, 11}}, + {m68k_op_addi_16_d , 0xfff8, 0x0640, { 8, 8, 2}}, + {m68k_op_addi_16_ai , 0xfff8, 0x0650, { 16, 16, 8}}, + {m68k_op_addi_16_pi , 0xfff8, 0x0658, { 16, 16, 8}}, + {m68k_op_addi_16_pd , 0xfff8, 0x0660, { 18, 18, 9}}, + {m68k_op_addi_16_di , 0xfff8, 0x0668, { 20, 20, 9}}, + {m68k_op_addi_16_ix , 0xfff8, 0x0670, { 22, 22, 11}}, + {m68k_op_addi_32_d , 0xfff8, 0x0680, { 16, 14, 2}}, + {m68k_op_addi_32_ai , 0xfff8, 0x0690, { 28, 28, 8}}, + {m68k_op_addi_32_pi , 0xfff8, 0x0698, { 28, 28, 8}}, + {m68k_op_addi_32_pd , 0xfff8, 0x06a0, { 30, 30, 9}}, + {m68k_op_addi_32_di , 0xfff8, 0x06a8, { 32, 32, 9}}, + {m68k_op_addi_32_ix , 0xfff8, 0x06b0, { 34, 34, 11}}, + {m68k_op_callm_32_ai , 0xfff8, 0x06d0, { 0, 0, 64}}, + {m68k_op_callm_32_di , 0xfff8, 0x06e8, { 0, 0, 65}}, + {m68k_op_callm_32_ix , 0xfff8, 0x06f0, { 0, 0, 67}}, + {m68k_op_btst_32_s_d , 0xfff8, 0x0800, { 10, 10, 4}}, + {m68k_op_btst_8_s_ai , 0xfff8, 0x0810, { 12, 12, 8}}, + {m68k_op_btst_8_s_pi , 0xfff8, 0x0818, { 12, 12, 8}}, + {m68k_op_btst_8_s_pd , 0xfff8, 0x0820, { 14, 14, 9}}, + {m68k_op_btst_8_s_di , 0xfff8, 0x0828, { 16, 16, 9}}, + {m68k_op_btst_8_s_ix , 0xfff8, 0x0830, { 18, 18, 11}}, + {m68k_op_bchg_32_s_d , 0xfff8, 0x0840, { 12, 12, 4}}, + {m68k_op_bchg_8_s_ai , 0xfff8, 0x0850, { 16, 16, 8}}, + {m68k_op_bchg_8_s_pi , 0xfff8, 0x0858, { 16, 16, 8}}, + {m68k_op_bchg_8_s_pd , 0xfff8, 0x0860, { 18, 18, 9}}, + {m68k_op_bchg_8_s_di , 0xfff8, 0x0868, { 20, 20, 9}}, + {m68k_op_bchg_8_s_ix , 0xfff8, 0x0870, { 22, 22, 11}}, + {m68k_op_bclr_32_s_d , 0xfff8, 0x0880, { 14, 14, 4}}, + {m68k_op_bclr_8_s_ai , 0xfff8, 0x0890, { 16, 16, 8}}, + {m68k_op_bclr_8_s_pi , 0xfff8, 0x0898, { 16, 16, 8}}, + {m68k_op_bclr_8_s_pd , 0xfff8, 0x08a0, { 18, 18, 9}}, + {m68k_op_bclr_8_s_di , 0xfff8, 0x08a8, { 20, 20, 9}}, + {m68k_op_bclr_8_s_ix , 0xfff8, 0x08b0, { 22, 22, 11}}, + {m68k_op_bset_32_s_d , 0xfff8, 0x08c0, { 12, 12, 4}}, + {m68k_op_bset_8_s_ai , 0xfff8, 0x08d0, { 16, 16, 8}}, + {m68k_op_bset_8_s_pi , 0xfff8, 0x08d8, { 16, 16, 8}}, + {m68k_op_bset_8_s_pd , 0xfff8, 0x08e0, { 18, 18, 9}}, + {m68k_op_bset_8_s_di , 0xfff8, 0x08e8, { 20, 20, 9}}, + {m68k_op_bset_8_s_ix , 0xfff8, 0x08f0, { 22, 22, 11}}, + {m68k_op_eori_8_d , 0xfff8, 0x0a00, { 8, 8, 2}}, + {m68k_op_eori_8_ai , 0xfff8, 0x0a10, { 16, 16, 8}}, + {m68k_op_eori_8_pi , 0xfff8, 0x0a18, { 16, 16, 8}}, + {m68k_op_eori_8_pd , 0xfff8, 0x0a20, { 18, 18, 9}}, + {m68k_op_eori_8_di , 0xfff8, 0x0a28, { 20, 20, 9}}, + {m68k_op_eori_8_ix , 0xfff8, 0x0a30, { 22, 22, 11}}, + {m68k_op_eori_16_d , 0xfff8, 0x0a40, { 8, 8, 2}}, + {m68k_op_eori_16_ai , 0xfff8, 0x0a50, { 16, 16, 8}}, + {m68k_op_eori_16_pi , 0xfff8, 0x0a58, { 16, 16, 8}}, + {m68k_op_eori_16_pd , 0xfff8, 0x0a60, { 18, 18, 9}}, + {m68k_op_eori_16_di , 0xfff8, 0x0a68, { 20, 20, 9}}, + {m68k_op_eori_16_ix , 0xfff8, 0x0a70, { 22, 22, 11}}, + {m68k_op_eori_32_d , 0xfff8, 0x0a80, { 16, 14, 2}}, + {m68k_op_eori_32_ai , 0xfff8, 0x0a90, { 28, 28, 8}}, + {m68k_op_eori_32_pi , 0xfff8, 0x0a98, { 28, 28, 8}}, + {m68k_op_eori_32_pd , 0xfff8, 0x0aa0, { 30, 30, 9}}, + {m68k_op_eori_32_di , 0xfff8, 0x0aa8, { 32, 32, 9}}, + {m68k_op_eori_32_ix , 0xfff8, 0x0ab0, { 34, 34, 11}}, + {m68k_op_cas_8_ai , 0xfff8, 0x0ad0, { 0, 0, 16}}, + {m68k_op_cas_8_pi , 0xfff8, 0x0ad8, { 0, 0, 16}}, + {m68k_op_cas_8_pd , 0xfff8, 0x0ae0, { 0, 0, 17}}, + {m68k_op_cas_8_di , 0xfff8, 0x0ae8, { 0, 0, 17}}, + {m68k_op_cas_8_ix , 0xfff8, 0x0af0, { 0, 0, 19}}, + {m68k_op_cmpi_8_d , 0xfff8, 0x0c00, { 8, 8, 2}}, + {m68k_op_cmpi_8_ai , 0xfff8, 0x0c10, { 12, 12, 6}}, + {m68k_op_cmpi_8_pi , 0xfff8, 0x0c18, { 12, 12, 6}}, + {m68k_op_cmpi_8_pd , 0xfff8, 0x0c20, { 14, 14, 7}}, + {m68k_op_cmpi_8_di , 0xfff8, 0x0c28, { 16, 16, 7}}, + {m68k_op_cmpi_8_ix , 0xfff8, 0x0c30, { 18, 18, 9}}, + {m68k_op_cmpi_16_d , 0xfff8, 0x0c40, { 8, 8, 2}}, + {m68k_op_cmpi_16_ai , 0xfff8, 0x0c50, { 12, 12, 6}}, + {m68k_op_cmpi_16_pi , 0xfff8, 0x0c58, { 12, 12, 6}}, + {m68k_op_cmpi_16_pd , 0xfff8, 0x0c60, { 14, 14, 7}}, + {m68k_op_cmpi_16_di , 0xfff8, 0x0c68, { 16, 16, 7}}, + {m68k_op_cmpi_16_ix , 0xfff8, 0x0c70, { 18, 18, 9}}, + {m68k_op_cmpi_32_d , 0xfff8, 0x0c80, { 14, 12, 2}}, + {m68k_op_cmpi_32_ai , 0xfff8, 0x0c90, { 20, 20, 6}}, + {m68k_op_cmpi_32_pi , 0xfff8, 0x0c98, { 20, 20, 6}}, + {m68k_op_cmpi_32_pd , 0xfff8, 0x0ca0, { 22, 22, 7}}, + {m68k_op_cmpi_32_di , 0xfff8, 0x0ca8, { 24, 24, 7}}, + {m68k_op_cmpi_32_ix , 0xfff8, 0x0cb0, { 26, 26, 9}}, + {m68k_op_cas_16_ai , 0xfff8, 0x0cd0, { 0, 0, 16}}, + {m68k_op_cas_16_pi , 0xfff8, 0x0cd8, { 0, 0, 16}}, + {m68k_op_cas_16_pd , 0xfff8, 0x0ce0, { 0, 0, 17}}, + {m68k_op_cas_16_di , 0xfff8, 0x0ce8, { 0, 0, 17}}, + {m68k_op_cas_16_ix , 0xfff8, 0x0cf0, { 0, 0, 19}}, + {m68k_op_moves_8_ai , 0xfff8, 0x0e10, { 0, 18, 9}}, + {m68k_op_moves_8_pi , 0xfff8, 0x0e18, { 0, 18, 9}}, + {m68k_op_moves_8_pd , 0xfff8, 0x0e20, { 0, 20, 10}}, + {m68k_op_moves_8_di , 0xfff8, 0x0e28, { 0, 26, 10}}, + {m68k_op_moves_8_ix , 0xfff8, 0x0e30, { 0, 30, 12}}, + {m68k_op_moves_16_ai , 0xfff8, 0x0e50, { 0, 18, 9}}, + {m68k_op_moves_16_pi , 0xfff8, 0x0e58, { 0, 18, 9}}, + {m68k_op_moves_16_pd , 0xfff8, 0x0e60, { 0, 20, 10}}, + {m68k_op_moves_16_di , 0xfff8, 0x0e68, { 0, 26, 10}}, + {m68k_op_moves_16_ix , 0xfff8, 0x0e70, { 0, 30, 12}}, + {m68k_op_moves_32_ai , 0xfff8, 0x0e90, { 0, 22, 9}}, + {m68k_op_moves_32_pi , 0xfff8, 0x0e98, { 0, 22, 9}}, + {m68k_op_moves_32_pd , 0xfff8, 0x0ea0, { 0, 28, 10}}, + {m68k_op_moves_32_di , 0xfff8, 0x0ea8, { 0, 32, 10}}, + {m68k_op_moves_32_ix , 0xfff8, 0x0eb0, { 0, 36, 12}}, + {m68k_op_cas_32_ai , 0xfff8, 0x0ed0, { 0, 0, 16}}, + {m68k_op_cas_32_pi , 0xfff8, 0x0ed8, { 0, 0, 16}}, + {m68k_op_cas_32_pd , 0xfff8, 0x0ee0, { 0, 0, 17}}, + {m68k_op_cas_32_di , 0xfff8, 0x0ee8, { 0, 0, 17}}, + {m68k_op_cas_32_ix , 0xfff8, 0x0ef0, { 0, 0, 19}}, + {m68k_op_move_8_aw_d , 0xfff8, 0x11c0, { 12, 12, 4}}, + {m68k_op_move_8_aw_ai , 0xfff8, 0x11d0, { 16, 16, 8}}, + {m68k_op_move_8_aw_pi , 0xfff8, 0x11d8, { 16, 16, 8}}, + {m68k_op_move_8_aw_pd , 0xfff8, 0x11e0, { 18, 18, 9}}, + {m68k_op_move_8_aw_di , 0xfff8, 0x11e8, { 20, 20, 9}}, + {m68k_op_move_8_aw_ix , 0xfff8, 0x11f0, { 22, 22, 11}}, + {m68k_op_move_8_al_d , 0xfff8, 0x13c0, { 16, 16, 6}}, + {m68k_op_move_8_al_ai , 0xfff8, 0x13d0, { 20, 20, 10}}, + {m68k_op_move_8_al_pi , 0xfff8, 0x13d8, { 20, 20, 10}}, + {m68k_op_move_8_al_pd , 0xfff8, 0x13e0, { 22, 22, 11}}, + {m68k_op_move_8_al_di , 0xfff8, 0x13e8, { 24, 24, 11}}, + {m68k_op_move_8_al_ix , 0xfff8, 0x13f0, { 26, 26, 13}}, + {m68k_op_move_8_pi7_d , 0xfff8, 0x1ec0, { 8, 8, 4}}, + {m68k_op_move_8_pi7_ai , 0xfff8, 0x1ed0, { 12, 12, 8}}, + {m68k_op_move_8_pi7_pi , 0xfff8, 0x1ed8, { 12, 12, 8}}, + {m68k_op_move_8_pi7_pd , 0xfff8, 0x1ee0, { 14, 14, 9}}, + {m68k_op_move_8_pi7_di , 0xfff8, 0x1ee8, { 16, 16, 9}}, + {m68k_op_move_8_pi7_ix , 0xfff8, 0x1ef0, { 18, 18, 11}}, + {m68k_op_move_8_pd7_d , 0xfff8, 0x1f00, { 8, 8, 5}}, + {m68k_op_move_8_pd7_ai , 0xfff8, 0x1f10, { 12, 12, 9}}, + {m68k_op_move_8_pd7_pi , 0xfff8, 0x1f18, { 12, 12, 9}}, + {m68k_op_move_8_pd7_pd , 0xfff8, 0x1f20, { 14, 14, 10}}, + {m68k_op_move_8_pd7_di , 0xfff8, 0x1f28, { 16, 16, 10}}, + {m68k_op_move_8_pd7_ix , 0xfff8, 0x1f30, { 18, 18, 12}}, + {m68k_op_move_32_aw_d , 0xfff8, 0x21c0, { 16, 16, 4}}, + {m68k_op_move_32_aw_a , 0xfff8, 0x21c8, { 16, 16, 4}}, + {m68k_op_move_32_aw_ai , 0xfff8, 0x21d0, { 24, 24, 8}}, + {m68k_op_move_32_aw_pi , 0xfff8, 0x21d8, { 24, 24, 8}}, + {m68k_op_move_32_aw_pd , 0xfff8, 0x21e0, { 26, 26, 9}}, + {m68k_op_move_32_aw_di , 0xfff8, 0x21e8, { 28, 28, 9}}, + {m68k_op_move_32_aw_ix , 0xfff8, 0x21f0, { 30, 30, 11}}, + {m68k_op_move_32_al_d , 0xfff8, 0x23c0, { 20, 20, 6}}, + {m68k_op_move_32_al_a , 0xfff8, 0x23c8, { 20, 20, 6}}, + {m68k_op_move_32_al_ai , 0xfff8, 0x23d0, { 28, 28, 10}}, + {m68k_op_move_32_al_pi , 0xfff8, 0x23d8, { 28, 28, 10}}, + {m68k_op_move_32_al_pd , 0xfff8, 0x23e0, { 30, 30, 11}}, + {m68k_op_move_32_al_di , 0xfff8, 0x23e8, { 32, 32, 11}}, + {m68k_op_move_32_al_ix , 0xfff8, 0x23f0, { 34, 34, 13}}, + {m68k_op_move_16_aw_d , 0xfff8, 0x31c0, { 12, 12, 4}}, + {m68k_op_move_16_aw_a , 0xfff8, 0x31c8, { 12, 12, 4}}, + {m68k_op_move_16_aw_ai , 0xfff8, 0x31d0, { 16, 16, 8}}, + {m68k_op_move_16_aw_pi , 0xfff8, 0x31d8, { 16, 16, 8}}, + {m68k_op_move_16_aw_pd , 0xfff8, 0x31e0, { 18, 18, 9}}, + {m68k_op_move_16_aw_di , 0xfff8, 0x31e8, { 20, 20, 9}}, + {m68k_op_move_16_aw_ix , 0xfff8, 0x31f0, { 22, 22, 11}}, + {m68k_op_move_16_al_d , 0xfff8, 0x33c0, { 16, 16, 6}}, + {m68k_op_move_16_al_a , 0xfff8, 0x33c8, { 16, 16, 6}}, + {m68k_op_move_16_al_ai , 0xfff8, 0x33d0, { 20, 20, 10}}, + {m68k_op_move_16_al_pi , 0xfff8, 0x33d8, { 20, 20, 10}}, + {m68k_op_move_16_al_pd , 0xfff8, 0x33e0, { 22, 22, 11}}, + {m68k_op_move_16_al_di , 0xfff8, 0x33e8, { 24, 24, 11}}, + {m68k_op_move_16_al_ix , 0xfff8, 0x33f0, { 26, 26, 13}}, + {m68k_op_negx_8_d , 0xfff8, 0x4000, { 4, 4, 2}}, + {m68k_op_negx_8_ai , 0xfff8, 0x4010, { 12, 12, 8}}, + {m68k_op_negx_8_pi , 0xfff8, 0x4018, { 12, 12, 8}}, + {m68k_op_negx_8_pd , 0xfff8, 0x4020, { 14, 14, 9}}, + {m68k_op_negx_8_di , 0xfff8, 0x4028, { 16, 16, 9}}, + {m68k_op_negx_8_ix , 0xfff8, 0x4030, { 18, 18, 11}}, + {m68k_op_negx_16_d , 0xfff8, 0x4040, { 4, 4, 2}}, + {m68k_op_negx_16_ai , 0xfff8, 0x4050, { 12, 12, 8}}, + {m68k_op_negx_16_pi , 0xfff8, 0x4058, { 12, 12, 8}}, + {m68k_op_negx_16_pd , 0xfff8, 0x4060, { 14, 14, 9}}, + {m68k_op_negx_16_di , 0xfff8, 0x4068, { 16, 16, 9}}, + {m68k_op_negx_16_ix , 0xfff8, 0x4070, { 18, 18, 11}}, + {m68k_op_negx_32_d , 0xfff8, 0x4080, { 6, 6, 2}}, + {m68k_op_negx_32_ai , 0xfff8, 0x4090, { 20, 20, 8}}, + {m68k_op_negx_32_pi , 0xfff8, 0x4098, { 20, 20, 8}}, + {m68k_op_negx_32_pd , 0xfff8, 0x40a0, { 22, 22, 9}}, + {m68k_op_negx_32_di , 0xfff8, 0x40a8, { 24, 24, 9}}, + {m68k_op_negx_32_ix , 0xfff8, 0x40b0, { 26, 26, 11}}, + {m68k_op_move_16_frs_d , 0xfff8, 0x40c0, { 6, 4, 8}}, + {m68k_op_move_16_frs_ai , 0xfff8, 0x40d0, { 12, 12, 12}}, + {m68k_op_move_16_frs_pi , 0xfff8, 0x40d8, { 12, 12, 12}}, + {m68k_op_move_16_frs_pd , 0xfff8, 0x40e0, { 14, 14, 13}}, + {m68k_op_move_16_frs_di , 0xfff8, 0x40e8, { 16, 16, 13}}, + {m68k_op_move_16_frs_ix , 0xfff8, 0x40f0, { 18, 18, 15}}, + {m68k_op_clr_8_d , 0xfff8, 0x4200, { 4, 4, 2}}, + {m68k_op_clr_8_ai , 0xfff8, 0x4210, { 12, 8, 8}}, + {m68k_op_clr_8_pi , 0xfff8, 0x4218, { 12, 8, 8}}, + {m68k_op_clr_8_pd , 0xfff8, 0x4220, { 14, 10, 9}}, + {m68k_op_clr_8_di , 0xfff8, 0x4228, { 16, 12, 9}}, + {m68k_op_clr_8_ix , 0xfff8, 0x4230, { 18, 14, 11}}, + {m68k_op_clr_16_d , 0xfff8, 0x4240, { 4, 4, 2}}, + {m68k_op_clr_16_ai , 0xfff8, 0x4250, { 12, 8, 8}}, + {m68k_op_clr_16_pi , 0xfff8, 0x4258, { 12, 8, 8}}, + {m68k_op_clr_16_pd , 0xfff8, 0x4260, { 14, 10, 9}}, + {m68k_op_clr_16_di , 0xfff8, 0x4268, { 16, 12, 9}}, + {m68k_op_clr_16_ix , 0xfff8, 0x4270, { 18, 14, 11}}, + {m68k_op_clr_32_d , 0xfff8, 0x4280, { 6, 6, 2}}, + {m68k_op_clr_32_ai , 0xfff8, 0x4290, { 20, 12, 8}}, + {m68k_op_clr_32_pi , 0xfff8, 0x4298, { 20, 12, 8}}, + {m68k_op_clr_32_pd , 0xfff8, 0x42a0, { 22, 14, 9}}, + {m68k_op_clr_32_di , 0xfff8, 0x42a8, { 24, 16, 9}}, + {m68k_op_clr_32_ix , 0xfff8, 0x42b0, { 26, 20, 11}}, + {m68k_op_move_16_frc_d , 0xfff8, 0x42c0, { 0, 4, 4}}, + {m68k_op_move_16_frc_ai , 0xfff8, 0x42d0, { 0, 12, 8}}, + {m68k_op_move_16_frc_pi , 0xfff8, 0x42d8, { 0, 12, 8}}, + {m68k_op_move_16_frc_pd , 0xfff8, 0x42e0, { 0, 14, 9}}, + {m68k_op_move_16_frc_di , 0xfff8, 0x42e8, { 0, 16, 9}}, + {m68k_op_move_16_frc_ix , 0xfff8, 0x42f0, { 0, 18, 11}}, + {m68k_op_neg_8_d , 0xfff8, 0x4400, { 4, 4, 2}}, + {m68k_op_neg_8_ai , 0xfff8, 0x4410, { 12, 12, 8}}, + {m68k_op_neg_8_pi , 0xfff8, 0x4418, { 12, 12, 8}}, + {m68k_op_neg_8_pd , 0xfff8, 0x4420, { 14, 14, 9}}, + {m68k_op_neg_8_di , 0xfff8, 0x4428, { 16, 16, 9}}, + {m68k_op_neg_8_ix , 0xfff8, 0x4430, { 18, 18, 11}}, + {m68k_op_neg_16_d , 0xfff8, 0x4440, { 4, 4, 2}}, + {m68k_op_neg_16_ai , 0xfff8, 0x4450, { 12, 12, 8}}, + {m68k_op_neg_16_pi , 0xfff8, 0x4458, { 12, 12, 8}}, + {m68k_op_neg_16_pd , 0xfff8, 0x4460, { 14, 14, 9}}, + {m68k_op_neg_16_di , 0xfff8, 0x4468, { 16, 16, 9}}, + {m68k_op_neg_16_ix , 0xfff8, 0x4470, { 18, 18, 11}}, + {m68k_op_neg_32_d , 0xfff8, 0x4480, { 6, 6, 2}}, + {m68k_op_neg_32_ai , 0xfff8, 0x4490, { 20, 20, 8}}, + {m68k_op_neg_32_pi , 0xfff8, 0x4498, { 20, 20, 8}}, + {m68k_op_neg_32_pd , 0xfff8, 0x44a0, { 22, 22, 9}}, + {m68k_op_neg_32_di , 0xfff8, 0x44a8, { 24, 24, 9}}, + {m68k_op_neg_32_ix , 0xfff8, 0x44b0, { 26, 26, 11}}, + {m68k_op_move_16_toc_d , 0xfff8, 0x44c0, { 12, 12, 4}}, + {m68k_op_move_16_toc_ai , 0xfff8, 0x44d0, { 16, 16, 8}}, + {m68k_op_move_16_toc_pi , 0xfff8, 0x44d8, { 16, 16, 8}}, + {m68k_op_move_16_toc_pd , 0xfff8, 0x44e0, { 18, 18, 9}}, + {m68k_op_move_16_toc_di , 0xfff8, 0x44e8, { 20, 20, 9}}, + {m68k_op_move_16_toc_ix , 0xfff8, 0x44f0, { 22, 22, 11}}, + {m68k_op_not_8_d , 0xfff8, 0x4600, { 4, 4, 2}}, + {m68k_op_not_8_ai , 0xfff8, 0x4610, { 12, 12, 8}}, + {m68k_op_not_8_pi , 0xfff8, 0x4618, { 12, 12, 8}}, + {m68k_op_not_8_pd , 0xfff8, 0x4620, { 14, 14, 9}}, + {m68k_op_not_8_di , 0xfff8, 0x4628, { 16, 16, 9}}, + {m68k_op_not_8_ix , 0xfff8, 0x4630, { 18, 18, 11}}, + {m68k_op_not_16_d , 0xfff8, 0x4640, { 4, 4, 2}}, + {m68k_op_not_16_ai , 0xfff8, 0x4650, { 12, 12, 8}}, + {m68k_op_not_16_pi , 0xfff8, 0x4658, { 12, 12, 8}}, + {m68k_op_not_16_pd , 0xfff8, 0x4660, { 14, 14, 9}}, + {m68k_op_not_16_di , 0xfff8, 0x4668, { 16, 16, 9}}, + {m68k_op_not_16_ix , 0xfff8, 0x4670, { 18, 18, 11}}, + {m68k_op_not_32_d , 0xfff8, 0x4680, { 6, 6, 2}}, + {m68k_op_not_32_ai , 0xfff8, 0x4690, { 20, 20, 8}}, + {m68k_op_not_32_pi , 0xfff8, 0x4698, { 20, 20, 8}}, + {m68k_op_not_32_pd , 0xfff8, 0x46a0, { 22, 22, 9}}, + {m68k_op_not_32_di , 0xfff8, 0x46a8, { 24, 24, 9}}, + {m68k_op_not_32_ix , 0xfff8, 0x46b0, { 26, 26, 11}}, + {m68k_op_move_16_tos_d , 0xfff8, 0x46c0, { 12, 12, 8}}, + {m68k_op_move_16_tos_ai , 0xfff8, 0x46d0, { 16, 16, 12}}, + {m68k_op_move_16_tos_pi , 0xfff8, 0x46d8, { 16, 16, 12}}, + {m68k_op_move_16_tos_pd , 0xfff8, 0x46e0, { 18, 18, 13}}, + {m68k_op_move_16_tos_di , 0xfff8, 0x46e8, { 20, 20, 13}}, + {m68k_op_move_16_tos_ix , 0xfff8, 0x46f0, { 22, 22, 15}}, + {m68k_op_nbcd_8_d , 0xfff8, 0x4800, { 6, 6, 6}}, + {m68k_op_link_32 , 0xfff8, 0x4808, { 0, 0, 6}}, + {m68k_op_nbcd_8_ai , 0xfff8, 0x4810, { 12, 12, 10}}, + {m68k_op_nbcd_8_pi , 0xfff8, 0x4818, { 12, 12, 10}}, + {m68k_op_nbcd_8_pd , 0xfff8, 0x4820, { 14, 14, 11}}, + {m68k_op_nbcd_8_di , 0xfff8, 0x4828, { 16, 16, 11}}, + {m68k_op_nbcd_8_ix , 0xfff8, 0x4830, { 18, 18, 13}}, + {m68k_op_swap_32 , 0xfff8, 0x4840, { 4, 4, 4}}, + {m68k_op_bkpt , 0xfff8, 0x4848, { 0, 10, 10}}, + {m68k_op_pea_32_ai , 0xfff8, 0x4850, { 10, 10, 9}}, + {m68k_op_pea_32_di , 0xfff8, 0x4868, { 16, 16, 10}}, + {m68k_op_pea_32_ix , 0xfff8, 0x4870, { 20, 20, 12}}, + {m68k_op_ext_16 , 0xfff8, 0x4880, { 4, 4, 4}}, + {m68k_op_movem_16_re_ai , 0xfff8, 0x4890, { 12, 12, 8}}, + {m68k_op_movem_16_re_pd , 0xfff8, 0x48a0, { 8, 8, 4}}, + {m68k_op_movem_16_re_di , 0xfff8, 0x48a8, { 16, 16, 9}}, + {m68k_op_movem_16_re_ix , 0xfff8, 0x48b0, { 18, 18, 11}}, + {m68k_op_ext_32 , 0xfff8, 0x48c0, { 4, 4, 4}}, + {m68k_op_movem_32_re_ai , 0xfff8, 0x48d0, { 16, 16, 8}}, + {m68k_op_movem_32_re_pd , 0xfff8, 0x48e0, { 8, 8, 4}}, + {m68k_op_movem_32_re_di , 0xfff8, 0x48e8, { 20, 20, 9}}, + {m68k_op_movem_32_re_ix , 0xfff8, 0x48f0, { 22, 22, 11}}, + {m68k_op_extb_32 , 0xfff8, 0x49c0, { 0, 0, 4}}, + {m68k_op_tst_8_d , 0xfff8, 0x4a00, { 4, 4, 2}}, + {m68k_op_tst_8_ai , 0xfff8, 0x4a10, { 8, 8, 6}}, + {m68k_op_tst_8_pi , 0xfff8, 0x4a18, { 8, 8, 6}}, + {m68k_op_tst_8_pd , 0xfff8, 0x4a20, { 10, 10, 7}}, + {m68k_op_tst_8_di , 0xfff8, 0x4a28, { 12, 12, 7}}, + {m68k_op_tst_8_ix , 0xfff8, 0x4a30, { 14, 14, 9}}, + {m68k_op_tst_16_d , 0xfff8, 0x4a40, { 4, 4, 2}}, + {m68k_op_tst_16_a , 0xfff8, 0x4a48, { 0, 0, 2}}, + {m68k_op_tst_16_ai , 0xfff8, 0x4a50, { 8, 8, 6}}, + {m68k_op_tst_16_pi , 0xfff8, 0x4a58, { 8, 8, 6}}, + {m68k_op_tst_16_pd , 0xfff8, 0x4a60, { 10, 10, 7}}, + {m68k_op_tst_16_di , 0xfff8, 0x4a68, { 12, 12, 7}}, + {m68k_op_tst_16_ix , 0xfff8, 0x4a70, { 14, 14, 9}}, + {m68k_op_tst_32_d , 0xfff8, 0x4a80, { 4, 4, 2}}, + {m68k_op_tst_32_a , 0xfff8, 0x4a88, { 0, 0, 2}}, + {m68k_op_tst_32_ai , 0xfff8, 0x4a90, { 12, 12, 6}}, + {m68k_op_tst_32_pi , 0xfff8, 0x4a98, { 12, 12, 6}}, + {m68k_op_tst_32_pd , 0xfff8, 0x4aa0, { 14, 14, 7}}, + {m68k_op_tst_32_di , 0xfff8, 0x4aa8, { 16, 16, 7}}, + {m68k_op_tst_32_ix , 0xfff8, 0x4ab0, { 18, 18, 9}}, + {m68k_op_tas_8_d , 0xfff8, 0x4ac0, { 4, 4, 4}}, + {m68k_op_tas_8_ai , 0xfff8, 0x4ad0, { 18, 18, 16}}, + {m68k_op_tas_8_pi , 0xfff8, 0x4ad8, { 18, 18, 16}}, + {m68k_op_tas_8_pd , 0xfff8, 0x4ae0, { 20, 20, 17}}, + {m68k_op_tas_8_di , 0xfff8, 0x4ae8, { 22, 22, 17}}, + {m68k_op_tas_8_ix , 0xfff8, 0x4af0, { 24, 24, 19}}, + {m68k_op_mull_32_d , 0xfff8, 0x4c00, { 0, 0, 43}}, + {m68k_op_mull_32_ai , 0xfff8, 0x4c10, { 0, 0, 47}}, + {m68k_op_mull_32_pi , 0xfff8, 0x4c18, { 0, 0, 47}}, + {m68k_op_mull_32_pd , 0xfff8, 0x4c20, { 0, 0, 48}}, + {m68k_op_mull_32_di , 0xfff8, 0x4c28, { 0, 0, 48}}, + {m68k_op_mull_32_ix , 0xfff8, 0x4c30, { 0, 0, 50}}, + {m68k_op_divl_32_d , 0xfff8, 0x4c40, { 0, 0, 84}}, + {m68k_op_divl_32_ai , 0xfff8, 0x4c50, { 0, 0, 88}}, + {m68k_op_divl_32_pi , 0xfff8, 0x4c58, { 0, 0, 88}}, + {m68k_op_divl_32_pd , 0xfff8, 0x4c60, { 0, 0, 89}}, + {m68k_op_divl_32_di , 0xfff8, 0x4c68, { 0, 0, 89}}, + {m68k_op_divl_32_ix , 0xfff8, 0x4c70, { 0, 0, 91}}, + {m68k_op_movem_16_er_ai , 0xfff8, 0x4c90, { 16, 16, 12}}, + {m68k_op_movem_16_er_pi , 0xfff8, 0x4c98, { 12, 12, 8}}, + {m68k_op_movem_16_er_di , 0xfff8, 0x4ca8, { 20, 20, 13}}, + {m68k_op_movem_16_er_ix , 0xfff8, 0x4cb0, { 22, 22, 15}}, + {m68k_op_movem_32_er_ai , 0xfff8, 0x4cd0, { 20, 20, 12}}, + {m68k_op_movem_32_er_pi , 0xfff8, 0x4cd8, { 12, 12, 8}}, + {m68k_op_movem_32_er_di , 0xfff8, 0x4ce8, { 24, 24, 13}}, + {m68k_op_movem_32_er_ix , 0xfff8, 0x4cf0, { 26, 26, 15}}, + {m68k_op_link_16 , 0xfff8, 0x4e50, { 16, 16, 5}}, + {m68k_op_unlk_32 , 0xfff8, 0x4e58, { 12, 12, 6}}, + {m68k_op_move_32_tou , 0xfff8, 0x4e60, { 4, 6, 2}}, + {m68k_op_move_32_fru , 0xfff8, 0x4e68, { 4, 6, 2}}, + {m68k_op_jsr_32_ai , 0xfff8, 0x4e90, { 16, 16, 4}}, + {m68k_op_jsr_32_di , 0xfff8, 0x4ea8, { 18, 18, 5}}, + {m68k_op_jsr_32_ix , 0xfff8, 0x4eb0, { 22, 22, 7}}, + {m68k_op_jmp_32_ai , 0xfff8, 0x4ed0, { 8, 8, 4}}, + {m68k_op_jmp_32_di , 0xfff8, 0x4ee8, { 10, 10, 5}}, + {m68k_op_jmp_32_ix , 0xfff8, 0x4ef0, { 12, 12, 7}}, + {m68k_op_st_8_d , 0xfff8, 0x50c0, { 6, 4, 4}}, + {m68k_op_dbt_16 , 0xfff8, 0x50c8, { 12, 12, 6}}, + {m68k_op_st_8_ai , 0xfff8, 0x50d0, { 12, 12, 10}}, + {m68k_op_st_8_pi , 0xfff8, 0x50d8, { 12, 12, 10}}, + {m68k_op_st_8_pd , 0xfff8, 0x50e0, { 14, 14, 11}}, + {m68k_op_st_8_di , 0xfff8, 0x50e8, { 16, 16, 11}}, + {m68k_op_st_8_ix , 0xfff8, 0x50f0, { 18, 18, 13}}, + {m68k_op_sf_8_d , 0xfff8, 0x51c0, { 4, 4, 4}}, + {m68k_op_dbf_16 , 0xfff8, 0x51c8, { 14, 14, 6}}, + {m68k_op_sf_8_ai , 0xfff8, 0x51d0, { 12, 12, 10}}, + {m68k_op_sf_8_pi , 0xfff8, 0x51d8, { 12, 12, 10}}, + {m68k_op_sf_8_pd , 0xfff8, 0x51e0, { 14, 14, 11}}, + {m68k_op_sf_8_di , 0xfff8, 0x51e8, { 16, 16, 11}}, + {m68k_op_sf_8_ix , 0xfff8, 0x51f0, { 18, 18, 13}}, + {m68k_op_shi_8_d , 0xfff8, 0x52c0, { 4, 4, 4}}, + {m68k_op_dbhi_16 , 0xfff8, 0x52c8, { 12, 12, 6}}, + {m68k_op_shi_8_ai , 0xfff8, 0x52d0, { 12, 12, 10}}, + {m68k_op_shi_8_pi , 0xfff8, 0x52d8, { 12, 12, 10}}, + {m68k_op_shi_8_pd , 0xfff8, 0x52e0, { 14, 14, 11}}, + {m68k_op_shi_8_di , 0xfff8, 0x52e8, { 16, 16, 11}}, + {m68k_op_shi_8_ix , 0xfff8, 0x52f0, { 18, 18, 13}}, + {m68k_op_sls_8_d , 0xfff8, 0x53c0, { 4, 4, 4}}, + {m68k_op_dbls_16 , 0xfff8, 0x53c8, { 12, 12, 6}}, + {m68k_op_sls_8_ai , 0xfff8, 0x53d0, { 12, 12, 10}}, + {m68k_op_sls_8_pi , 0xfff8, 0x53d8, { 12, 12, 10}}, + {m68k_op_sls_8_pd , 0xfff8, 0x53e0, { 14, 14, 11}}, + {m68k_op_sls_8_di , 0xfff8, 0x53e8, { 16, 16, 11}}, + {m68k_op_sls_8_ix , 0xfff8, 0x53f0, { 18, 18, 13}}, + {m68k_op_scc_8_d , 0xfff8, 0x54c0, { 4, 4, 4}}, + {m68k_op_dbcc_16 , 0xfff8, 0x54c8, { 12, 12, 6}}, + {m68k_op_scc_8_ai , 0xfff8, 0x54d0, { 12, 12, 10}}, + {m68k_op_scc_8_pi , 0xfff8, 0x54d8, { 12, 12, 10}}, + {m68k_op_scc_8_pd , 0xfff8, 0x54e0, { 14, 14, 11}}, + {m68k_op_scc_8_di , 0xfff8, 0x54e8, { 16, 16, 11}}, + {m68k_op_scc_8_ix , 0xfff8, 0x54f0, { 18, 18, 13}}, + {m68k_op_scs_8_d , 0xfff8, 0x55c0, { 4, 4, 4}}, + {m68k_op_dbcs_16 , 0xfff8, 0x55c8, { 12, 12, 6}}, + {m68k_op_scs_8_ai , 0xfff8, 0x55d0, { 12, 12, 10}}, + {m68k_op_scs_8_pi , 0xfff8, 0x55d8, { 12, 12, 10}}, + {m68k_op_scs_8_pd , 0xfff8, 0x55e0, { 14, 14, 11}}, + {m68k_op_scs_8_di , 0xfff8, 0x55e8, { 16, 16, 11}}, + {m68k_op_scs_8_ix , 0xfff8, 0x55f0, { 18, 18, 13}}, + {m68k_op_sne_8_d , 0xfff8, 0x56c0, { 4, 4, 4}}, + {m68k_op_dbne_16 , 0xfff8, 0x56c8, { 12, 12, 6}}, + {m68k_op_sne_8_ai , 0xfff8, 0x56d0, { 12, 12, 10}}, + {m68k_op_sne_8_pi , 0xfff8, 0x56d8, { 12, 12, 10}}, + {m68k_op_sne_8_pd , 0xfff8, 0x56e0, { 14, 14, 11}}, + {m68k_op_sne_8_di , 0xfff8, 0x56e8, { 16, 16, 11}}, + {m68k_op_sne_8_ix , 0xfff8, 0x56f0, { 18, 18, 13}}, + {m68k_op_seq_8_d , 0xfff8, 0x57c0, { 4, 4, 4}}, + {m68k_op_dbeq_16 , 0xfff8, 0x57c8, { 12, 12, 6}}, + {m68k_op_seq_8_ai , 0xfff8, 0x57d0, { 12, 12, 10}}, + {m68k_op_seq_8_pi , 0xfff8, 0x57d8, { 12, 12, 10}}, + {m68k_op_seq_8_pd , 0xfff8, 0x57e0, { 14, 14, 11}}, + {m68k_op_seq_8_di , 0xfff8, 0x57e8, { 16, 16, 11}}, + {m68k_op_seq_8_ix , 0xfff8, 0x57f0, { 18, 18, 13}}, + {m68k_op_svc_8_d , 0xfff8, 0x58c0, { 4, 4, 4}}, + {m68k_op_dbvc_16 , 0xfff8, 0x58c8, { 12, 12, 6}}, + {m68k_op_svc_8_ai , 0xfff8, 0x58d0, { 12, 12, 10}}, + {m68k_op_svc_8_pi , 0xfff8, 0x58d8, { 12, 12, 10}}, + {m68k_op_svc_8_pd , 0xfff8, 0x58e0, { 14, 14, 11}}, + {m68k_op_svc_8_di , 0xfff8, 0x58e8, { 16, 16, 11}}, + {m68k_op_svc_8_ix , 0xfff8, 0x58f0, { 18, 18, 13}}, + {m68k_op_svs_8_d , 0xfff8, 0x59c0, { 4, 4, 4}}, + {m68k_op_dbvs_16 , 0xfff8, 0x59c8, { 12, 12, 6}}, + {m68k_op_svs_8_ai , 0xfff8, 0x59d0, { 12, 12, 10}}, + {m68k_op_svs_8_pi , 0xfff8, 0x59d8, { 12, 12, 10}}, + {m68k_op_svs_8_pd , 0xfff8, 0x59e0, { 14, 14, 11}}, + {m68k_op_svs_8_di , 0xfff8, 0x59e8, { 16, 16, 11}}, + {m68k_op_svs_8_ix , 0xfff8, 0x59f0, { 18, 18, 13}}, + {m68k_op_spl_8_d , 0xfff8, 0x5ac0, { 4, 4, 4}}, + {m68k_op_dbpl_16 , 0xfff8, 0x5ac8, { 12, 12, 6}}, + {m68k_op_spl_8_ai , 0xfff8, 0x5ad0, { 12, 12, 10}}, + {m68k_op_spl_8_pi , 0xfff8, 0x5ad8, { 12, 12, 10}}, + {m68k_op_spl_8_pd , 0xfff8, 0x5ae0, { 14, 14, 11}}, + {m68k_op_spl_8_di , 0xfff8, 0x5ae8, { 16, 16, 11}}, + {m68k_op_spl_8_ix , 0xfff8, 0x5af0, { 18, 18, 13}}, + {m68k_op_smi_8_d , 0xfff8, 0x5bc0, { 4, 4, 4}}, + {m68k_op_dbmi_16 , 0xfff8, 0x5bc8, { 12, 12, 6}}, + {m68k_op_smi_8_ai , 0xfff8, 0x5bd0, { 12, 12, 10}}, + {m68k_op_smi_8_pi , 0xfff8, 0x5bd8, { 12, 12, 10}}, + {m68k_op_smi_8_pd , 0xfff8, 0x5be0, { 14, 14, 11}}, + {m68k_op_smi_8_di , 0xfff8, 0x5be8, { 16, 16, 11}}, + {m68k_op_smi_8_ix , 0xfff8, 0x5bf0, { 18, 18, 13}}, + {m68k_op_sge_8_d , 0xfff8, 0x5cc0, { 4, 4, 4}}, + {m68k_op_dbge_16 , 0xfff8, 0x5cc8, { 12, 12, 6}}, + {m68k_op_sge_8_ai , 0xfff8, 0x5cd0, { 12, 12, 10}}, + {m68k_op_sge_8_pi , 0xfff8, 0x5cd8, { 12, 12, 10}}, + {m68k_op_sge_8_pd , 0xfff8, 0x5ce0, { 14, 14, 11}}, + {m68k_op_sge_8_di , 0xfff8, 0x5ce8, { 16, 16, 11}}, + {m68k_op_sge_8_ix , 0xfff8, 0x5cf0, { 18, 18, 13}}, + {m68k_op_slt_8_d , 0xfff8, 0x5dc0, { 4, 4, 4}}, + {m68k_op_dblt_16 , 0xfff8, 0x5dc8, { 12, 12, 6}}, + {m68k_op_slt_8_ai , 0xfff8, 0x5dd0, { 12, 12, 10}}, + {m68k_op_slt_8_pi , 0xfff8, 0x5dd8, { 12, 12, 10}}, + {m68k_op_slt_8_pd , 0xfff8, 0x5de0, { 14, 14, 11}}, + {m68k_op_slt_8_di , 0xfff8, 0x5de8, { 16, 16, 11}}, + {m68k_op_slt_8_ix , 0xfff8, 0x5df0, { 18, 18, 13}}, + {m68k_op_sgt_8_d , 0xfff8, 0x5ec0, { 4, 4, 4}}, + {m68k_op_dbgt_16 , 0xfff8, 0x5ec8, { 12, 12, 6}}, + {m68k_op_sgt_8_ai , 0xfff8, 0x5ed0, { 12, 12, 10}}, + {m68k_op_sgt_8_pi , 0xfff8, 0x5ed8, { 12, 12, 10}}, + {m68k_op_sgt_8_pd , 0xfff8, 0x5ee0, { 14, 14, 11}}, + {m68k_op_sgt_8_di , 0xfff8, 0x5ee8, { 16, 16, 11}}, + {m68k_op_sgt_8_ix , 0xfff8, 0x5ef0, { 18, 18, 13}}, + {m68k_op_sle_8_d , 0xfff8, 0x5fc0, { 4, 4, 4}}, + {m68k_op_dble_16 , 0xfff8, 0x5fc8, { 12, 12, 6}}, + {m68k_op_sle_8_ai , 0xfff8, 0x5fd0, { 12, 12, 10}}, + {m68k_op_sle_8_pi , 0xfff8, 0x5fd8, { 12, 12, 10}}, + {m68k_op_sle_8_pd , 0xfff8, 0x5fe0, { 14, 14, 11}}, + {m68k_op_sle_8_di , 0xfff8, 0x5fe8, { 16, 16, 11}}, + {m68k_op_sle_8_ix , 0xfff8, 0x5ff0, { 18, 18, 13}}, + {m68k_op_sbcd_8_mm_ax7 , 0xfff8, 0x8f08, { 18, 18, 16}}, + {m68k_op_pack_16_mm_ax7 , 0xfff8, 0x8f48, { 0, 0, 13}}, + {m68k_op_unpk_16_mm_ax7 , 0xfff8, 0x8f88, { 0, 0, 13}}, + {m68k_op_subx_8_mm_ax7 , 0xfff8, 0x9f08, { 18, 18, 12}}, + {m68k_op_cmpm_8_ax7 , 0xfff8, 0xbf08, { 12, 12, 9}}, + {m68k_op_abcd_8_mm_ax7 , 0xfff8, 0xcf08, { 18, 18, 16}}, + {m68k_op_addx_8_mm_ax7 , 0xfff8, 0xdf08, { 18, 18, 12}}, + {m68k_op_asr_16_ai , 0xfff8, 0xe0d0, { 12, 12, 9}}, + {m68k_op_asr_16_pi , 0xfff8, 0xe0d8, { 12, 12, 9}}, + {m68k_op_asr_16_pd , 0xfff8, 0xe0e0, { 14, 14, 10}}, + {m68k_op_asr_16_di , 0xfff8, 0xe0e8, { 16, 16, 10}}, + {m68k_op_asr_16_ix , 0xfff8, 0xe0f0, { 18, 18, 12}}, + {m68k_op_asl_16_ai , 0xfff8, 0xe1d0, { 12, 12, 10}}, + {m68k_op_asl_16_pi , 0xfff8, 0xe1d8, { 12, 12, 10}}, + {m68k_op_asl_16_pd , 0xfff8, 0xe1e0, { 14, 14, 11}}, + {m68k_op_asl_16_di , 0xfff8, 0xe1e8, { 16, 16, 11}}, + {m68k_op_asl_16_ix , 0xfff8, 0xe1f0, { 18, 18, 13}}, + {m68k_op_lsr_16_ai , 0xfff8, 0xe2d0, { 12, 12, 9}}, + {m68k_op_lsr_16_pi , 0xfff8, 0xe2d8, { 12, 12, 9}}, + {m68k_op_lsr_16_pd , 0xfff8, 0xe2e0, { 14, 14, 10}}, + {m68k_op_lsr_16_di , 0xfff8, 0xe2e8, { 16, 16, 10}}, + {m68k_op_lsr_16_ix , 0xfff8, 0xe2f0, { 18, 18, 12}}, + {m68k_op_lsl_16_ai , 0xfff8, 0xe3d0, { 12, 12, 9}}, + {m68k_op_lsl_16_pi , 0xfff8, 0xe3d8, { 12, 12, 9}}, + {m68k_op_lsl_16_pd , 0xfff8, 0xe3e0, { 14, 14, 10}}, + {m68k_op_lsl_16_di , 0xfff8, 0xe3e8, { 16, 16, 10}}, + {m68k_op_lsl_16_ix , 0xfff8, 0xe3f0, { 18, 18, 12}}, + {m68k_op_roxr_16_ai , 0xfff8, 0xe4d0, { 12, 12, 9}}, + {m68k_op_roxr_16_pi , 0xfff8, 0xe4d8, { 12, 12, 9}}, + {m68k_op_roxr_16_pd , 0xfff8, 0xe4e0, { 14, 14, 10}}, + {m68k_op_roxr_16_di , 0xfff8, 0xe4e8, { 16, 16, 10}}, + {m68k_op_roxr_16_ix , 0xfff8, 0xe4f0, { 18, 18, 12}}, + {m68k_op_roxl_16_ai , 0xfff8, 0xe5d0, { 12, 12, 9}}, + {m68k_op_roxl_16_pi , 0xfff8, 0xe5d8, { 12, 12, 9}}, + {m68k_op_roxl_16_pd , 0xfff8, 0xe5e0, { 14, 14, 10}}, + {m68k_op_roxl_16_di , 0xfff8, 0xe5e8, { 16, 16, 10}}, + {m68k_op_roxl_16_ix , 0xfff8, 0xe5f0, { 18, 18, 12}}, + {m68k_op_ror_16_ai , 0xfff8, 0xe6d0, { 12, 12, 11}}, + {m68k_op_ror_16_pi , 0xfff8, 0xe6d8, { 12, 12, 11}}, + {m68k_op_ror_16_pd , 0xfff8, 0xe6e0, { 14, 14, 12}}, + {m68k_op_ror_16_di , 0xfff8, 0xe6e8, { 16, 16, 12}}, + {m68k_op_ror_16_ix , 0xfff8, 0xe6f0, { 18, 18, 14}}, + {m68k_op_rol_16_ai , 0xfff8, 0xe7d0, { 12, 12, 11}}, + {m68k_op_rol_16_pi , 0xfff8, 0xe7d8, { 12, 12, 11}}, + {m68k_op_rol_16_pd , 0xfff8, 0xe7e0, { 14, 14, 12}}, + {m68k_op_rol_16_di , 0xfff8, 0xe7e8, { 16, 16, 12}}, + {m68k_op_rol_16_ix , 0xfff8, 0xe7f0, { 18, 18, 14}}, + {m68k_op_bftst_32_d , 0xfff8, 0xe8c0, { 0, 0, 6}}, + {m68k_op_bftst_32_ai , 0xfff8, 0xe8d0, { 0, 0, 17}}, + {m68k_op_bftst_32_di , 0xfff8, 0xe8e8, { 0, 0, 18}}, + {m68k_op_bftst_32_ix , 0xfff8, 0xe8f0, { 0, 0, 20}}, + {m68k_op_bfextu_32_d , 0xfff8, 0xe9c0, { 0, 0, 8}}, + {m68k_op_bfextu_32_ai , 0xfff8, 0xe9d0, { 0, 0, 19}}, + {m68k_op_bfextu_32_di , 0xfff8, 0xe9e8, { 0, 0, 20}}, + {m68k_op_bfextu_32_ix , 0xfff8, 0xe9f0, { 0, 0, 22}}, + {m68k_op_bfchg_32_d , 0xfff8, 0xeac0, { 0, 0, 12}}, + {m68k_op_bfchg_32_ai , 0xfff8, 0xead0, { 0, 0, 24}}, + {m68k_op_bfchg_32_di , 0xfff8, 0xeae8, { 0, 0, 25}}, + {m68k_op_bfchg_32_ix , 0xfff8, 0xeaf0, { 0, 0, 27}}, + {m68k_op_bfexts_32_d , 0xfff8, 0xebc0, { 0, 0, 8}}, + {m68k_op_bfexts_32_ai , 0xfff8, 0xebd0, { 0, 0, 19}}, + {m68k_op_bfexts_32_di , 0xfff8, 0xebe8, { 0, 0, 20}}, + {m68k_op_bfexts_32_ix , 0xfff8, 0xebf0, { 0, 0, 22}}, + {m68k_op_bfclr_32_d , 0xfff8, 0xecc0, { 0, 0, 12}}, + {m68k_op_bfclr_32_ai , 0xfff8, 0xecd0, { 0, 0, 24}}, + {m68k_op_bfclr_32_di , 0xfff8, 0xece8, { 0, 0, 25}}, + {m68k_op_bfclr_32_ix , 0xfff8, 0xecf0, { 0, 0, 27}}, + {m68k_op_bfffo_32_d , 0xfff8, 0xedc0, { 0, 0, 18}}, + {m68k_op_bfffo_32_ai , 0xfff8, 0xedd0, { 0, 0, 32}}, + {m68k_op_bfffo_32_di , 0xfff8, 0xede8, { 0, 0, 33}}, + {m68k_op_bfffo_32_ix , 0xfff8, 0xedf0, { 0, 0, 35}}, + {m68k_op_bfset_32_d , 0xfff8, 0xeec0, { 0, 0, 12}}, + {m68k_op_bfset_32_ai , 0xfff8, 0xeed0, { 0, 0, 24}}, + {m68k_op_bfset_32_di , 0xfff8, 0xeee8, { 0, 0, 25}}, + {m68k_op_bfset_32_ix , 0xfff8, 0xeef0, { 0, 0, 27}}, + {m68k_op_bfins_32_d , 0xfff8, 0xefc0, { 0, 0, 10}}, + {m68k_op_bfins_32_ai , 0xfff8, 0xefd0, { 0, 0, 21}}, + {m68k_op_bfins_32_di , 0xfff8, 0xefe8, { 0, 0, 22}}, + {m68k_op_bfins_32_ix , 0xfff8, 0xeff0, { 0, 0, 24}}, + {m68k_op_ori_8_pi7 , 0xffff, 0x001f, { 16, 16, 8}}, + {m68k_op_ori_8_pd7 , 0xffff, 0x0027, { 18, 18, 9}}, + {m68k_op_ori_8_aw , 0xffff, 0x0038, { 20, 20, 8}}, + {m68k_op_ori_8_al , 0xffff, 0x0039, { 24, 24, 8}}, + {m68k_op_ori_16_toc , 0xffff, 0x003c, { 20, 16, 12}}, + {m68k_op_ori_16_aw , 0xffff, 0x0078, { 20, 20, 8}}, + {m68k_op_ori_16_al , 0xffff, 0x0079, { 24, 24, 8}}, + {m68k_op_ori_16_tos , 0xffff, 0x007c, { 20, 16, 12}}, + {m68k_op_ori_32_aw , 0xffff, 0x00b8, { 32, 32, 8}}, + {m68k_op_ori_32_al , 0xffff, 0x00b9, { 36, 36, 8}}, + {m68k_op_chk2cmp2_8_aw , 0xffff, 0x00f8, { 0, 0, 22}}, + {m68k_op_chk2cmp2_8_al , 0xffff, 0x00f9, { 0, 0, 22}}, + {m68k_op_chk2cmp2_8_pcdi , 0xffff, 0x00fa, { 0, 0, 23}}, + {m68k_op_chk2cmp2_8_pcix , 0xffff, 0x00fb, { 0, 0, 25}}, + {m68k_op_andi_8_pi7 , 0xffff, 0x021f, { 16, 16, 8}}, + {m68k_op_andi_8_pd7 , 0xffff, 0x0227, { 18, 18, 9}}, + {m68k_op_andi_8_aw , 0xffff, 0x0238, { 20, 20, 8}}, + {m68k_op_andi_8_al , 0xffff, 0x0239, { 24, 24, 8}}, + {m68k_op_andi_16_toc , 0xffff, 0x023c, { 20, 16, 12}}, + {m68k_op_andi_16_aw , 0xffff, 0x0278, { 20, 20, 8}}, + {m68k_op_andi_16_al , 0xffff, 0x0279, { 24, 24, 8}}, + {m68k_op_andi_16_tos , 0xffff, 0x027c, { 20, 16, 12}}, + {m68k_op_andi_32_aw , 0xffff, 0x02b8, { 32, 32, 8}}, + {m68k_op_andi_32_al , 0xffff, 0x02b9, { 36, 36, 8}}, + {m68k_op_chk2cmp2_16_aw , 0xffff, 0x02f8, { 0, 0, 22}}, + {m68k_op_chk2cmp2_16_al , 0xffff, 0x02f9, { 0, 0, 22}}, + {m68k_op_chk2cmp2_16_pcdi , 0xffff, 0x02fa, { 0, 0, 23}}, + {m68k_op_chk2cmp2_16_pcix , 0xffff, 0x02fb, { 0, 0, 25}}, + {m68k_op_subi_8_pi7 , 0xffff, 0x041f, { 16, 16, 8}}, + {m68k_op_subi_8_pd7 , 0xffff, 0x0427, { 18, 18, 9}}, + {m68k_op_subi_8_aw , 0xffff, 0x0438, { 20, 20, 8}}, + {m68k_op_subi_8_al , 0xffff, 0x0439, { 24, 24, 8}}, + {m68k_op_subi_16_aw , 0xffff, 0x0478, { 20, 20, 8}}, + {m68k_op_subi_16_al , 0xffff, 0x0479, { 24, 24, 8}}, + {m68k_op_subi_32_aw , 0xffff, 0x04b8, { 32, 32, 8}}, + {m68k_op_subi_32_al , 0xffff, 0x04b9, { 36, 36, 8}}, + {m68k_op_chk2cmp2_32_aw , 0xffff, 0x04f8, { 0, 0, 22}}, + {m68k_op_chk2cmp2_32_al , 0xffff, 0x04f9, { 0, 0, 22}}, + {m68k_op_chk2cmp2_32_pcdi , 0xffff, 0x04fa, { 0, 0, 23}}, + {m68k_op_chk2cmp2_32_pcix , 0xffff, 0x04fb, { 0, 0, 25}}, + {m68k_op_addi_8_pi7 , 0xffff, 0x061f, { 16, 16, 8}}, + {m68k_op_addi_8_pd7 , 0xffff, 0x0627, { 18, 18, 9}}, + {m68k_op_addi_8_aw , 0xffff, 0x0638, { 20, 20, 8}}, + {m68k_op_addi_8_al , 0xffff, 0x0639, { 24, 24, 8}}, + {m68k_op_addi_16_aw , 0xffff, 0x0678, { 20, 20, 8}}, + {m68k_op_addi_16_al , 0xffff, 0x0679, { 24, 24, 8}}, + {m68k_op_addi_32_aw , 0xffff, 0x06b8, { 32, 32, 8}}, + {m68k_op_addi_32_al , 0xffff, 0x06b9, { 36, 36, 8}}, + {m68k_op_callm_32_aw , 0xffff, 0x06f8, { 0, 0, 64}}, + {m68k_op_callm_32_al , 0xffff, 0x06f9, { 0, 0, 64}}, + {m68k_op_callm_32_pcdi , 0xffff, 0x06fa, { 0, 0, 65}}, + {m68k_op_callm_32_pcix , 0xffff, 0x06fb, { 0, 0, 67}}, + {m68k_op_btst_8_s_pi7 , 0xffff, 0x081f, { 12, 12, 8}}, + {m68k_op_btst_8_s_pd7 , 0xffff, 0x0827, { 14, 14, 9}}, + {m68k_op_btst_8_s_aw , 0xffff, 0x0838, { 16, 16, 8}}, + {m68k_op_btst_8_s_al , 0xffff, 0x0839, { 20, 20, 8}}, + {m68k_op_btst_8_s_pcdi , 0xffff, 0x083a, { 16, 16, 9}}, + {m68k_op_btst_8_s_pcix , 0xffff, 0x083b, { 18, 18, 11}}, + {m68k_op_bchg_8_s_pi7 , 0xffff, 0x085f, { 16, 16, 8}}, + {m68k_op_bchg_8_s_pd7 , 0xffff, 0x0867, { 18, 18, 9}}, + {m68k_op_bchg_8_s_aw , 0xffff, 0x0878, { 20, 20, 8}}, + {m68k_op_bchg_8_s_al , 0xffff, 0x0879, { 24, 24, 8}}, + {m68k_op_bclr_8_s_pi7 , 0xffff, 0x089f, { 16, 16, 8}}, + {m68k_op_bclr_8_s_pd7 , 0xffff, 0x08a7, { 18, 18, 9}}, + {m68k_op_bclr_8_s_aw , 0xffff, 0x08b8, { 20, 20, 8}}, + {m68k_op_bclr_8_s_al , 0xffff, 0x08b9, { 24, 24, 8}}, + {m68k_op_bset_8_s_pi7 , 0xffff, 0x08df, { 16, 16, 8}}, + {m68k_op_bset_8_s_pd7 , 0xffff, 0x08e7, { 18, 18, 9}}, + {m68k_op_bset_8_s_aw , 0xffff, 0x08f8, { 20, 20, 8}}, + {m68k_op_bset_8_s_al , 0xffff, 0x08f9, { 24, 24, 8}}, + {m68k_op_eori_8_pi7 , 0xffff, 0x0a1f, { 16, 16, 8}}, + {m68k_op_eori_8_pd7 , 0xffff, 0x0a27, { 18, 18, 9}}, + {m68k_op_eori_8_aw , 0xffff, 0x0a38, { 20, 20, 8}}, + {m68k_op_eori_8_al , 0xffff, 0x0a39, { 24, 24, 8}}, + {m68k_op_eori_16_toc , 0xffff, 0x0a3c, { 20, 16, 12}}, + {m68k_op_eori_16_aw , 0xffff, 0x0a78, { 20, 20, 8}}, + {m68k_op_eori_16_al , 0xffff, 0x0a79, { 24, 24, 8}}, + {m68k_op_eori_16_tos , 0xffff, 0x0a7c, { 20, 16, 12}}, + {m68k_op_eori_32_aw , 0xffff, 0x0ab8, { 32, 32, 8}}, + {m68k_op_eori_32_al , 0xffff, 0x0ab9, { 36, 36, 8}}, + {m68k_op_cas_8_pi7 , 0xffff, 0x0adf, { 0, 0, 16}}, + {m68k_op_cas_8_pd7 , 0xffff, 0x0ae7, { 0, 0, 17}}, + {m68k_op_cas_8_aw , 0xffff, 0x0af8, { 0, 0, 16}}, + {m68k_op_cas_8_al , 0xffff, 0x0af9, { 0, 0, 16}}, + {m68k_op_cmpi_8_pi7 , 0xffff, 0x0c1f, { 12, 12, 6}}, + {m68k_op_cmpi_8_pd7 , 0xffff, 0x0c27, { 14, 14, 7}}, + {m68k_op_cmpi_8_aw , 0xffff, 0x0c38, { 16, 16, 6}}, + {m68k_op_cmpi_8_al , 0xffff, 0x0c39, { 20, 20, 6}}, + {m68k_op_cmpi_8_pcdi , 0xffff, 0x0c3a, { 0, 0, 7}}, + {m68k_op_cmpi_8_pcix , 0xffff, 0x0c3b, { 0, 0, 9}}, + {m68k_op_cmpi_16_aw , 0xffff, 0x0c78, { 16, 16, 6}}, + {m68k_op_cmpi_16_al , 0xffff, 0x0c79, { 20, 20, 6}}, + {m68k_op_cmpi_16_pcdi , 0xffff, 0x0c7a, { 0, 0, 7}}, + {m68k_op_cmpi_16_pcix , 0xffff, 0x0c7b, { 0, 0, 9}}, + {m68k_op_cmpi_32_aw , 0xffff, 0x0cb8, { 24, 24, 6}}, + {m68k_op_cmpi_32_al , 0xffff, 0x0cb9, { 28, 28, 6}}, + {m68k_op_cmpi_32_pcdi , 0xffff, 0x0cba, { 0, 0, 7}}, + {m68k_op_cmpi_32_pcix , 0xffff, 0x0cbb, { 0, 0, 9}}, + {m68k_op_cas_16_aw , 0xffff, 0x0cf8, { 0, 0, 16}}, + {m68k_op_cas_16_al , 0xffff, 0x0cf9, { 0, 0, 16}}, + {m68k_op_cas2_16 , 0xffff, 0x0cfc, { 0, 0, 12}}, + {m68k_op_moves_8_pi7 , 0xffff, 0x0e1f, { 0, 18, 9}}, + {m68k_op_moves_8_pd7 , 0xffff, 0x0e27, { 0, 20, 10}}, + {m68k_op_moves_8_aw , 0xffff, 0x0e38, { 0, 26, 9}}, + {m68k_op_moves_8_al , 0xffff, 0x0e39, { 0, 30, 9}}, + {m68k_op_moves_16_aw , 0xffff, 0x0e78, { 0, 26, 9}}, + {m68k_op_moves_16_al , 0xffff, 0x0e79, { 0, 30, 9}}, + {m68k_op_moves_32_aw , 0xffff, 0x0eb8, { 0, 32, 9}}, + {m68k_op_moves_32_al , 0xffff, 0x0eb9, { 0, 36, 9}}, + {m68k_op_cas_32_aw , 0xffff, 0x0ef8, { 0, 0, 16}}, + {m68k_op_cas_32_al , 0xffff, 0x0ef9, { 0, 0, 16}}, + {m68k_op_cas2_32 , 0xffff, 0x0efc, { 0, 0, 12}}, + {m68k_op_move_8_aw_pi7 , 0xffff, 0x11df, { 16, 16, 8}}, + {m68k_op_move_8_aw_pd7 , 0xffff, 0x11e7, { 18, 18, 9}}, + {m68k_op_move_8_aw_aw , 0xffff, 0x11f8, { 20, 20, 8}}, + {m68k_op_move_8_aw_al , 0xffff, 0x11f9, { 24, 24, 8}}, + {m68k_op_move_8_aw_pcdi , 0xffff, 0x11fa, { 20, 20, 9}}, + {m68k_op_move_8_aw_pcix , 0xffff, 0x11fb, { 22, 22, 11}}, + {m68k_op_move_8_aw_i , 0xffff, 0x11fc, { 16, 16, 6}}, + {m68k_op_move_8_al_pi7 , 0xffff, 0x13df, { 20, 20, 10}}, + {m68k_op_move_8_al_pd7 , 0xffff, 0x13e7, { 22, 22, 11}}, + {m68k_op_move_8_al_aw , 0xffff, 0x13f8, { 24, 24, 10}}, + {m68k_op_move_8_al_al , 0xffff, 0x13f9, { 28, 28, 10}}, + {m68k_op_move_8_al_pcdi , 0xffff, 0x13fa, { 24, 24, 11}}, + {m68k_op_move_8_al_pcix , 0xffff, 0x13fb, { 26, 26, 13}}, + {m68k_op_move_8_al_i , 0xffff, 0x13fc, { 20, 20, 8}}, + {m68k_op_move_8_pi7_pi7 , 0xffff, 0x1edf, { 12, 12, 8}}, + {m68k_op_move_8_pi7_pd7 , 0xffff, 0x1ee7, { 14, 14, 9}}, + {m68k_op_move_8_pi7_aw , 0xffff, 0x1ef8, { 16, 16, 8}}, + {m68k_op_move_8_pi7_al , 0xffff, 0x1ef9, { 20, 20, 8}}, + {m68k_op_move_8_pi7_pcdi , 0xffff, 0x1efa, { 16, 16, 9}}, + {m68k_op_move_8_pi7_pcix , 0xffff, 0x1efb, { 18, 18, 11}}, + {m68k_op_move_8_pi7_i , 0xffff, 0x1efc, { 12, 12, 6}}, + {m68k_op_move_8_pd7_pi7 , 0xffff, 0x1f1f, { 12, 12, 9}}, + {m68k_op_move_8_pd7_pd7 , 0xffff, 0x1f27, { 14, 14, 10}}, + {m68k_op_move_8_pd7_aw , 0xffff, 0x1f38, { 16, 16, 9}}, + {m68k_op_move_8_pd7_al , 0xffff, 0x1f39, { 20, 20, 9}}, + {m68k_op_move_8_pd7_pcdi , 0xffff, 0x1f3a, { 16, 16, 10}}, + {m68k_op_move_8_pd7_pcix , 0xffff, 0x1f3b, { 18, 18, 12}}, + {m68k_op_move_8_pd7_i , 0xffff, 0x1f3c, { 12, 12, 7}}, + {m68k_op_move_32_aw_aw , 0xffff, 0x21f8, { 28, 28, 8}}, + {m68k_op_move_32_aw_al , 0xffff, 0x21f9, { 32, 32, 8}}, + {m68k_op_move_32_aw_pcdi , 0xffff, 0x21fa, { 28, 28, 9}}, + {m68k_op_move_32_aw_pcix , 0xffff, 0x21fb, { 30, 30, 11}}, + {m68k_op_move_32_aw_i , 0xffff, 0x21fc, { 24, 24, 8}}, + {m68k_op_move_32_al_aw , 0xffff, 0x23f8, { 32, 32, 10}}, + {m68k_op_move_32_al_al , 0xffff, 0x23f9, { 36, 36, 10}}, + {m68k_op_move_32_al_pcdi , 0xffff, 0x23fa, { 32, 32, 11}}, + {m68k_op_move_32_al_pcix , 0xffff, 0x23fb, { 34, 34, 13}}, + {m68k_op_move_32_al_i , 0xffff, 0x23fc, { 28, 28, 10}}, + {m68k_op_move_16_aw_aw , 0xffff, 0x31f8, { 20, 20, 8}}, + {m68k_op_move_16_aw_al , 0xffff, 0x31f9, { 24, 24, 8}}, + {m68k_op_move_16_aw_pcdi , 0xffff, 0x31fa, { 20, 20, 9}}, + {m68k_op_move_16_aw_pcix , 0xffff, 0x31fb, { 22, 22, 11}}, + {m68k_op_move_16_aw_i , 0xffff, 0x31fc, { 16, 16, 6}}, + {m68k_op_move_16_al_aw , 0xffff, 0x33f8, { 24, 24, 10}}, + {m68k_op_move_16_al_al , 0xffff, 0x33f9, { 28, 28, 10}}, + {m68k_op_move_16_al_pcdi , 0xffff, 0x33fa, { 24, 24, 11}}, + {m68k_op_move_16_al_pcix , 0xffff, 0x33fb, { 26, 26, 13}}, + {m68k_op_move_16_al_i , 0xffff, 0x33fc, { 20, 20, 8}}, + {m68k_op_negx_8_pi7 , 0xffff, 0x401f, { 12, 12, 8}}, + {m68k_op_negx_8_pd7 , 0xffff, 0x4027, { 14, 14, 9}}, + {m68k_op_negx_8_aw , 0xffff, 0x4038, { 16, 16, 8}}, + {m68k_op_negx_8_al , 0xffff, 0x4039, { 20, 20, 8}}, + {m68k_op_negx_16_aw , 0xffff, 0x4078, { 16, 16, 8}}, + {m68k_op_negx_16_al , 0xffff, 0x4079, { 20, 20, 8}}, + {m68k_op_negx_32_aw , 0xffff, 0x40b8, { 24, 24, 8}}, + {m68k_op_negx_32_al , 0xffff, 0x40b9, { 28, 28, 8}}, + {m68k_op_move_16_frs_aw , 0xffff, 0x40f8, { 16, 16, 12}}, + {m68k_op_move_16_frs_al , 0xffff, 0x40f9, { 20, 20, 12}}, + {m68k_op_clr_8_pi7 , 0xffff, 0x421f, { 12, 8, 8}}, + {m68k_op_clr_8_pd7 , 0xffff, 0x4227, { 14, 10, 9}}, + {m68k_op_clr_8_aw , 0xffff, 0x4238, { 16, 12, 8}}, + {m68k_op_clr_8_al , 0xffff, 0x4239, { 20, 14, 8}}, + {m68k_op_clr_16_aw , 0xffff, 0x4278, { 16, 12, 8}}, + {m68k_op_clr_16_al , 0xffff, 0x4279, { 20, 14, 8}}, + {m68k_op_clr_32_aw , 0xffff, 0x42b8, { 24, 16, 8}}, + {m68k_op_clr_32_al , 0xffff, 0x42b9, { 28, 20, 8}}, + {m68k_op_move_16_frc_aw , 0xffff, 0x42f8, { 0, 16, 8}}, + {m68k_op_move_16_frc_al , 0xffff, 0x42f9, { 0, 20, 8}}, + {m68k_op_neg_8_pi7 , 0xffff, 0x441f, { 12, 12, 8}}, + {m68k_op_neg_8_pd7 , 0xffff, 0x4427, { 14, 14, 9}}, + {m68k_op_neg_8_aw , 0xffff, 0x4438, { 16, 16, 8}}, + {m68k_op_neg_8_al , 0xffff, 0x4439, { 20, 20, 8}}, + {m68k_op_neg_16_aw , 0xffff, 0x4478, { 16, 16, 8}}, + {m68k_op_neg_16_al , 0xffff, 0x4479, { 20, 20, 8}}, + {m68k_op_neg_32_aw , 0xffff, 0x44b8, { 24, 24, 8}}, + {m68k_op_neg_32_al , 0xffff, 0x44b9, { 28, 28, 8}}, + {m68k_op_move_16_toc_aw , 0xffff, 0x44f8, { 20, 20, 8}}, + {m68k_op_move_16_toc_al , 0xffff, 0x44f9, { 24, 24, 8}}, + {m68k_op_move_16_toc_pcdi , 0xffff, 0x44fa, { 20, 20, 9}}, + {m68k_op_move_16_toc_pcix , 0xffff, 0x44fb, { 22, 22, 11}}, + {m68k_op_move_16_toc_i , 0xffff, 0x44fc, { 16, 16, 6}}, + {m68k_op_not_8_pi7 , 0xffff, 0x461f, { 12, 12, 8}}, + {m68k_op_not_8_pd7 , 0xffff, 0x4627, { 14, 14, 9}}, + {m68k_op_not_8_aw , 0xffff, 0x4638, { 16, 16, 8}}, + {m68k_op_not_8_al , 0xffff, 0x4639, { 20, 20, 8}}, + {m68k_op_not_16_aw , 0xffff, 0x4678, { 16, 16, 8}}, + {m68k_op_not_16_al , 0xffff, 0x4679, { 20, 20, 8}}, + {m68k_op_not_32_aw , 0xffff, 0x46b8, { 24, 24, 8}}, + {m68k_op_not_32_al , 0xffff, 0x46b9, { 28, 28, 8}}, + {m68k_op_move_16_tos_aw , 0xffff, 0x46f8, { 20, 20, 12}}, + {m68k_op_move_16_tos_al , 0xffff, 0x46f9, { 24, 24, 12}}, + {m68k_op_move_16_tos_pcdi , 0xffff, 0x46fa, { 20, 20, 13}}, + {m68k_op_move_16_tos_pcix , 0xffff, 0x46fb, { 22, 22, 15}}, + {m68k_op_move_16_tos_i , 0xffff, 0x46fc, { 16, 16, 10}}, + {m68k_op_link_32_a7 , 0xffff, 0x480f, { 0, 0, 6}}, + {m68k_op_nbcd_8_pi7 , 0xffff, 0x481f, { 12, 12, 10}}, + {m68k_op_nbcd_8_pd7 , 0xffff, 0x4827, { 14, 14, 11}}, + {m68k_op_nbcd_8_aw , 0xffff, 0x4838, { 16, 16, 10}}, + {m68k_op_nbcd_8_al , 0xffff, 0x4839, { 20, 20, 10}}, + {m68k_op_pea_32_aw , 0xffff, 0x4878, { 16, 16, 9}}, + {m68k_op_pea_32_al , 0xffff, 0x4879, { 20, 20, 9}}, + {m68k_op_pea_32_pcdi , 0xffff, 0x487a, { 16, 16, 10}}, + {m68k_op_pea_32_pcix , 0xffff, 0x487b, { 20, 20, 12}}, + {m68k_op_movem_16_re_aw , 0xffff, 0x48b8, { 16, 16, 8}}, + {m68k_op_movem_16_re_al , 0xffff, 0x48b9, { 20, 20, 8}}, + {m68k_op_movem_32_re_aw , 0xffff, 0x48f8, { 20, 20, 8}}, + {m68k_op_movem_32_re_al , 0xffff, 0x48f9, { 24, 24, 8}}, + {m68k_op_tst_8_pi7 , 0xffff, 0x4a1f, { 8, 8, 6}}, + {m68k_op_tst_8_pd7 , 0xffff, 0x4a27, { 10, 10, 7}}, + {m68k_op_tst_8_aw , 0xffff, 0x4a38, { 12, 12, 6}}, + {m68k_op_tst_8_al , 0xffff, 0x4a39, { 16, 16, 6}}, + {m68k_op_tst_8_pcdi , 0xffff, 0x4a3a, { 0, 0, 7}}, + {m68k_op_tst_8_pcix , 0xffff, 0x4a3b, { 0, 0, 9}}, + {m68k_op_tst_8_i , 0xffff, 0x4a3c, { 0, 0, 6}}, + {m68k_op_tst_16_aw , 0xffff, 0x4a78, { 12, 12, 6}}, + {m68k_op_tst_16_al , 0xffff, 0x4a79, { 16, 16, 6}}, + {m68k_op_tst_16_pcdi , 0xffff, 0x4a7a, { 0, 0, 7}}, + {m68k_op_tst_16_pcix , 0xffff, 0x4a7b, { 0, 0, 9}}, + {m68k_op_tst_16_i , 0xffff, 0x4a7c, { 0, 0, 6}}, + {m68k_op_tst_32_aw , 0xffff, 0x4ab8, { 16, 16, 6}}, + {m68k_op_tst_32_al , 0xffff, 0x4ab9, { 20, 20, 6}}, + {m68k_op_tst_32_pcdi , 0xffff, 0x4aba, { 0, 0, 7}}, + {m68k_op_tst_32_pcix , 0xffff, 0x4abb, { 0, 0, 9}}, + {m68k_op_tst_32_i , 0xffff, 0x4abc, { 0, 0, 6}}, + {m68k_op_tas_8_pi7 , 0xffff, 0x4adf, { 18, 18, 16}}, + {m68k_op_tas_8_pd7 , 0xffff, 0x4ae7, { 20, 20, 17}}, + {m68k_op_tas_8_aw , 0xffff, 0x4af8, { 22, 22, 16}}, + {m68k_op_tas_8_al , 0xffff, 0x4af9, { 26, 26, 16}}, + {m68k_op_illegal , 0xffff, 0x4afc, { 4, 4, 4}}, + {m68k_op_mull_32_aw , 0xffff, 0x4c38, { 0, 0, 47}}, + {m68k_op_mull_32_al , 0xffff, 0x4c39, { 0, 0, 47}}, + {m68k_op_mull_32_pcdi , 0xffff, 0x4c3a, { 0, 0, 48}}, + {m68k_op_mull_32_pcix , 0xffff, 0x4c3b, { 0, 0, 50}}, + {m68k_op_mull_32_i , 0xffff, 0x4c3c, { 0, 0, 47}}, + {m68k_op_divl_32_aw , 0xffff, 0x4c78, { 0, 0, 88}}, + {m68k_op_divl_32_al , 0xffff, 0x4c79, { 0, 0, 88}}, + {m68k_op_divl_32_pcdi , 0xffff, 0x4c7a, { 0, 0, 89}}, + {m68k_op_divl_32_pcix , 0xffff, 0x4c7b, { 0, 0, 91}}, + {m68k_op_divl_32_i , 0xffff, 0x4c7c, { 0, 0, 88}}, + {m68k_op_movem_16_er_aw , 0xffff, 0x4cb8, { 20, 20, 12}}, + {m68k_op_movem_16_er_al , 0xffff, 0x4cb9, { 24, 24, 12}}, + {m68k_op_movem_16_er_pcdi , 0xffff, 0x4cba, { 20, 20, 13}}, + {m68k_op_movem_16_er_pcix , 0xffff, 0x4cbb, { 22, 22, 15}}, + {m68k_op_movem_32_er_aw , 0xffff, 0x4cf8, { 24, 24, 12}}, + {m68k_op_movem_32_er_al , 0xffff, 0x4cf9, { 28, 28, 12}}, + {m68k_op_movem_32_er_pcdi , 0xffff, 0x4cfa, { 24, 24, 13}}, + {m68k_op_movem_32_er_pcix , 0xffff, 0x4cfb, { 26, 26, 15}}, + {m68k_op_link_16_a7 , 0xffff, 0x4e57, { 16, 16, 5}}, + {m68k_op_unlk_32_a7 , 0xffff, 0x4e5f, { 12, 12, 6}}, + {m68k_op_reset , 0xffff, 0x4e70, { 0, 0, 0}}, + {m68k_op_nop , 0xffff, 0x4e71, { 4, 4, 2}}, + {m68k_op_stop , 0xffff, 0x4e72, { 4, 4, 8}}, + {m68k_op_rte_32 , 0xffff, 0x4e73, { 20, 24, 20}}, + {m68k_op_rtd_32 , 0xffff, 0x4e74, { 0, 16, 10}}, + {m68k_op_rts_32 , 0xffff, 0x4e75, { 16, 16, 10}}, + {m68k_op_trapv , 0xffff, 0x4e76, { 4, 4, 4}}, + {m68k_op_rtr_32 , 0xffff, 0x4e77, { 20, 20, 14}}, + {m68k_op_movec_32_cr , 0xffff, 0x4e7a, { 0, 12, 6}}, + {m68k_op_movec_32_rc , 0xffff, 0x4e7b, { 0, 10, 12}}, + {m68k_op_jsr_32_aw , 0xffff, 0x4eb8, { 18, 18, 4}}, + {m68k_op_jsr_32_al , 0xffff, 0x4eb9, { 20, 20, 4}}, + {m68k_op_jsr_32_pcdi , 0xffff, 0x4eba, { 18, 18, 5}}, + {m68k_op_jsr_32_pcix , 0xffff, 0x4ebb, { 22, 22, 7}}, + {m68k_op_jmp_32_aw , 0xffff, 0x4ef8, { 10, 10, 4}}, + {m68k_op_jmp_32_al , 0xffff, 0x4ef9, { 12, 12, 4}}, + {m68k_op_jmp_32_pcdi , 0xffff, 0x4efa, { 10, 10, 5}}, + {m68k_op_jmp_32_pcix , 0xffff, 0x4efb, { 14, 14, 7}}, + {m68k_op_st_8_pi7 , 0xffff, 0x50df, { 12, 12, 10}}, + {m68k_op_st_8_pd7 , 0xffff, 0x50e7, { 14, 14, 11}}, + {m68k_op_st_8_aw , 0xffff, 0x50f8, { 16, 16, 10}}, + {m68k_op_st_8_al , 0xffff, 0x50f9, { 20, 20, 10}}, + {m68k_op_trapt_16 , 0xffff, 0x50fa, { 0, 0, 6}}, + {m68k_op_trapt_32 , 0xffff, 0x50fb, { 0, 0, 8}}, + {m68k_op_trapt , 0xffff, 0x50fc, { 0, 0, 4}}, + {m68k_op_sf_8_pi7 , 0xffff, 0x51df, { 12, 12, 10}}, + {m68k_op_sf_8_pd7 , 0xffff, 0x51e7, { 14, 14, 11}}, + {m68k_op_sf_8_aw , 0xffff, 0x51f8, { 16, 16, 10}}, + {m68k_op_sf_8_al , 0xffff, 0x51f9, { 20, 20, 10}}, + {m68k_op_trapf_16 , 0xffff, 0x51fa, { 0, 0, 6}}, + {m68k_op_trapf_32 , 0xffff, 0x51fb, { 0, 0, 8}}, + {m68k_op_trapf , 0xffff, 0x51fc, { 0, 0, 4}}, + {m68k_op_shi_8_pi7 , 0xffff, 0x52df, { 12, 12, 10}}, + {m68k_op_shi_8_pd7 , 0xffff, 0x52e7, { 14, 14, 11}}, + {m68k_op_shi_8_aw , 0xffff, 0x52f8, { 16, 16, 10}}, + {m68k_op_shi_8_al , 0xffff, 0x52f9, { 20, 20, 10}}, + {m68k_op_traphi_16 , 0xffff, 0x52fa, { 0, 0, 6}}, + {m68k_op_traphi_32 , 0xffff, 0x52fb, { 0, 0, 8}}, + {m68k_op_traphi , 0xffff, 0x52fc, { 0, 0, 4}}, + {m68k_op_sls_8_pi7 , 0xffff, 0x53df, { 12, 12, 10}}, + {m68k_op_sls_8_pd7 , 0xffff, 0x53e7, { 14, 14, 11}}, + {m68k_op_sls_8_aw , 0xffff, 0x53f8, { 16, 16, 10}}, + {m68k_op_sls_8_al , 0xffff, 0x53f9, { 20, 20, 10}}, + {m68k_op_trapls_16 , 0xffff, 0x53fa, { 0, 0, 6}}, + {m68k_op_trapls_32 , 0xffff, 0x53fb, { 0, 0, 8}}, + {m68k_op_trapls , 0xffff, 0x53fc, { 0, 0, 4}}, + {m68k_op_scc_8_pi7 , 0xffff, 0x54df, { 12, 12, 10}}, + {m68k_op_scc_8_pd7 , 0xffff, 0x54e7, { 14, 14, 11}}, + {m68k_op_scc_8_aw , 0xffff, 0x54f8, { 16, 16, 10}}, + {m68k_op_scc_8_al , 0xffff, 0x54f9, { 20, 20, 10}}, + {m68k_op_trapcc_16 , 0xffff, 0x54fa, { 0, 0, 6}}, + {m68k_op_trapcc_32 , 0xffff, 0x54fb, { 0, 0, 8}}, + {m68k_op_trapcc , 0xffff, 0x54fc, { 0, 0, 4}}, + {m68k_op_scs_8_pi7 , 0xffff, 0x55df, { 12, 12, 10}}, + {m68k_op_scs_8_pd7 , 0xffff, 0x55e7, { 14, 14, 11}}, + {m68k_op_scs_8_aw , 0xffff, 0x55f8, { 16, 16, 10}}, + {m68k_op_scs_8_al , 0xffff, 0x55f9, { 20, 20, 10}}, + {m68k_op_trapcs_16 , 0xffff, 0x55fa, { 0, 0, 6}}, + {m68k_op_trapcs_32 , 0xffff, 0x55fb, { 0, 0, 8}}, + {m68k_op_trapcs , 0xffff, 0x55fc, { 0, 0, 4}}, + {m68k_op_sne_8_pi7 , 0xffff, 0x56df, { 12, 12, 10}}, + {m68k_op_sne_8_pd7 , 0xffff, 0x56e7, { 14, 14, 11}}, + {m68k_op_sne_8_aw , 0xffff, 0x56f8, { 16, 16, 10}}, + {m68k_op_sne_8_al , 0xffff, 0x56f9, { 20, 20, 10}}, + {m68k_op_trapne_16 , 0xffff, 0x56fa, { 0, 0, 6}}, + {m68k_op_trapne_32 , 0xffff, 0x56fb, { 0, 0, 8}}, + {m68k_op_trapne , 0xffff, 0x56fc, { 0, 0, 4}}, + {m68k_op_seq_8_pi7 , 0xffff, 0x57df, { 12, 12, 10}}, + {m68k_op_seq_8_pd7 , 0xffff, 0x57e7, { 14, 14, 11}}, + {m68k_op_seq_8_aw , 0xffff, 0x57f8, { 16, 16, 10}}, + {m68k_op_seq_8_al , 0xffff, 0x57f9, { 20, 20, 10}}, + {m68k_op_trapeq_16 , 0xffff, 0x57fa, { 0, 0, 6}}, + {m68k_op_trapeq_32 , 0xffff, 0x57fb, { 0, 0, 8}}, + {m68k_op_trapeq , 0xffff, 0x57fc, { 0, 0, 4}}, + {m68k_op_svc_8_pi7 , 0xffff, 0x58df, { 12, 12, 10}}, + {m68k_op_svc_8_pd7 , 0xffff, 0x58e7, { 14, 14, 11}}, + {m68k_op_svc_8_aw , 0xffff, 0x58f8, { 16, 16, 10}}, + {m68k_op_svc_8_al , 0xffff, 0x58f9, { 20, 20, 10}}, + {m68k_op_trapvc_16 , 0xffff, 0x58fa, { 0, 0, 6}}, + {m68k_op_trapvc_32 , 0xffff, 0x58fb, { 0, 0, 8}}, + {m68k_op_trapvc , 0xffff, 0x58fc, { 0, 0, 4}}, + {m68k_op_svs_8_pi7 , 0xffff, 0x59df, { 12, 12, 10}}, + {m68k_op_svs_8_pd7 , 0xffff, 0x59e7, { 14, 14, 11}}, + {m68k_op_svs_8_aw , 0xffff, 0x59f8, { 16, 16, 10}}, + {m68k_op_svs_8_al , 0xffff, 0x59f9, { 20, 20, 10}}, + {m68k_op_trapvs_16 , 0xffff, 0x59fa, { 0, 0, 6}}, + {m68k_op_trapvs_32 , 0xffff, 0x59fb, { 0, 0, 8}}, + {m68k_op_trapvs , 0xffff, 0x59fc, { 0, 0, 4}}, + {m68k_op_spl_8_pi7 , 0xffff, 0x5adf, { 12, 12, 10}}, + {m68k_op_spl_8_pd7 , 0xffff, 0x5ae7, { 14, 14, 11}}, + {m68k_op_spl_8_aw , 0xffff, 0x5af8, { 16, 16, 10}}, + {m68k_op_spl_8_al , 0xffff, 0x5af9, { 20, 20, 10}}, + {m68k_op_trappl_16 , 0xffff, 0x5afa, { 0, 0, 6}}, + {m68k_op_trappl_32 , 0xffff, 0x5afb, { 0, 0, 8}}, + {m68k_op_trappl , 0xffff, 0x5afc, { 0, 0, 4}}, + {m68k_op_smi_8_pi7 , 0xffff, 0x5bdf, { 12, 12, 10}}, + {m68k_op_smi_8_pd7 , 0xffff, 0x5be7, { 14, 14, 11}}, + {m68k_op_smi_8_aw , 0xffff, 0x5bf8, { 16, 16, 10}}, + {m68k_op_smi_8_al , 0xffff, 0x5bf9, { 20, 20, 10}}, + {m68k_op_trapmi_16 , 0xffff, 0x5bfa, { 0, 0, 6}}, + {m68k_op_trapmi_32 , 0xffff, 0x5bfb, { 0, 0, 8}}, + {m68k_op_trapmi , 0xffff, 0x5bfc, { 0, 0, 4}}, + {m68k_op_sge_8_pi7 , 0xffff, 0x5cdf, { 12, 12, 10}}, + {m68k_op_sge_8_pd7 , 0xffff, 0x5ce7, { 14, 14, 11}}, + {m68k_op_sge_8_aw , 0xffff, 0x5cf8, { 16, 16, 10}}, + {m68k_op_sge_8_al , 0xffff, 0x5cf9, { 20, 20, 10}}, + {m68k_op_trapge_16 , 0xffff, 0x5cfa, { 0, 0, 6}}, + {m68k_op_trapge_32 , 0xffff, 0x5cfb, { 0, 0, 8}}, + {m68k_op_trapge , 0xffff, 0x5cfc, { 0, 0, 4}}, + {m68k_op_slt_8_pi7 , 0xffff, 0x5ddf, { 12, 12, 10}}, + {m68k_op_slt_8_pd7 , 0xffff, 0x5de7, { 14, 14, 11}}, + {m68k_op_slt_8_aw , 0xffff, 0x5df8, { 16, 16, 10}}, + {m68k_op_slt_8_al , 0xffff, 0x5df9, { 20, 20, 10}}, + {m68k_op_traplt_16 , 0xffff, 0x5dfa, { 0, 0, 6}}, + {m68k_op_traplt_32 , 0xffff, 0x5dfb, { 0, 0, 8}}, + {m68k_op_traplt , 0xffff, 0x5dfc, { 0, 0, 4}}, + {m68k_op_sgt_8_pi7 , 0xffff, 0x5edf, { 12, 12, 10}}, + {m68k_op_sgt_8_pd7 , 0xffff, 0x5ee7, { 14, 14, 11}}, + {m68k_op_sgt_8_aw , 0xffff, 0x5ef8, { 16, 16, 10}}, + {m68k_op_sgt_8_al , 0xffff, 0x5ef9, { 20, 20, 10}}, + {m68k_op_trapgt_16 , 0xffff, 0x5efa, { 0, 0, 6}}, + {m68k_op_trapgt_32 , 0xffff, 0x5efb, { 0, 0, 8}}, + {m68k_op_trapgt , 0xffff, 0x5efc, { 0, 0, 4}}, + {m68k_op_sle_8_pi7 , 0xffff, 0x5fdf, { 12, 12, 10}}, + {m68k_op_sle_8_pd7 , 0xffff, 0x5fe7, { 14, 14, 11}}, + {m68k_op_sle_8_aw , 0xffff, 0x5ff8, { 16, 16, 10}}, + {m68k_op_sle_8_al , 0xffff, 0x5ff9, { 20, 20, 10}}, + {m68k_op_traple_16 , 0xffff, 0x5ffa, { 0, 0, 6}}, + {m68k_op_traple_32 , 0xffff, 0x5ffb, { 0, 0, 8}}, + {m68k_op_traple , 0xffff, 0x5ffc, { 0, 0, 4}}, + {m68k_op_bra_16 , 0xffff, 0x6000, { 10, 10, 10}}, + {m68k_op_bra_32 , 0xffff, 0x60ff, { 0, 0, 10}}, + {m68k_op_bsr_16 , 0xffff, 0x6100, { 18, 18, 7}}, + {m68k_op_bsr_32 , 0xffff, 0x61ff, { 0, 0, 7}}, + {m68k_op_bhi_16 , 0xffff, 0x6200, { 10, 10, 6}}, + {m68k_op_bhi_32 , 0xffff, 0x62ff, { 0, 0, 6}}, + {m68k_op_bls_16 , 0xffff, 0x6300, { 10, 10, 6}}, + {m68k_op_bls_32 , 0xffff, 0x63ff, { 0, 0, 6}}, + {m68k_op_bcc_16 , 0xffff, 0x6400, { 10, 10, 6}}, + {m68k_op_bcc_32 , 0xffff, 0x64ff, { 0, 0, 6}}, + {m68k_op_bcs_16 , 0xffff, 0x6500, { 10, 10, 6}}, + {m68k_op_bcs_32 , 0xffff, 0x65ff, { 0, 0, 6}}, + {m68k_op_bne_16 , 0xffff, 0x6600, { 10, 10, 6}}, + {m68k_op_bne_32 , 0xffff, 0x66ff, { 0, 0, 6}}, + {m68k_op_beq_16 , 0xffff, 0x6700, { 10, 10, 6}}, + {m68k_op_beq_32 , 0xffff, 0x67ff, { 0, 0, 6}}, + {m68k_op_bvc_16 , 0xffff, 0x6800, { 10, 10, 6}}, + {m68k_op_bvc_32 , 0xffff, 0x68ff, { 0, 0, 6}}, + {m68k_op_bvs_16 , 0xffff, 0x6900, { 10, 10, 6}}, + {m68k_op_bvs_32 , 0xffff, 0x69ff, { 0, 0, 6}}, + {m68k_op_bpl_16 , 0xffff, 0x6a00, { 10, 10, 6}}, + {m68k_op_bpl_32 , 0xffff, 0x6aff, { 0, 0, 6}}, + {m68k_op_bmi_16 , 0xffff, 0x6b00, { 10, 10, 6}}, + {m68k_op_bmi_32 , 0xffff, 0x6bff, { 0, 0, 6}}, + {m68k_op_bge_16 , 0xffff, 0x6c00, { 10, 10, 6}}, + {m68k_op_bge_32 , 0xffff, 0x6cff, { 0, 0, 6}}, + {m68k_op_blt_16 , 0xffff, 0x6d00, { 10, 10, 6}}, + {m68k_op_blt_32 , 0xffff, 0x6dff, { 0, 0, 6}}, + {m68k_op_bgt_16 , 0xffff, 0x6e00, { 10, 10, 6}}, + {m68k_op_bgt_32 , 0xffff, 0x6eff, { 0, 0, 6}}, + {m68k_op_ble_16 , 0xffff, 0x6f00, { 10, 10, 6}}, + {m68k_op_ble_32 , 0xffff, 0x6fff, { 0, 0, 6}}, + {m68k_op_sbcd_8_mm_axy7 , 0xffff, 0x8f0f, { 18, 18, 16}}, + {m68k_op_pack_16_mm_axy7 , 0xffff, 0x8f4f, { 0, 0, 13}}, + {m68k_op_unpk_16_mm_axy7 , 0xffff, 0x8f8f, { 0, 0, 13}}, + {m68k_op_subx_8_mm_axy7 , 0xffff, 0x9f0f, { 18, 18, 12}}, + {m68k_op_cmpm_8_axy7 , 0xffff, 0xbf0f, { 12, 12, 9}}, + {m68k_op_abcd_8_mm_axy7 , 0xffff, 0xcf0f, { 18, 18, 16}}, + {m68k_op_addx_8_mm_axy7 , 0xffff, 0xdf0f, { 18, 18, 12}}, + {m68k_op_asr_16_aw , 0xffff, 0xe0f8, { 16, 16, 9}}, + {m68k_op_asr_16_al , 0xffff, 0xe0f9, { 20, 20, 9}}, + {m68k_op_asl_16_aw , 0xffff, 0xe1f8, { 16, 16, 10}}, + {m68k_op_asl_16_al , 0xffff, 0xe1f9, { 20, 20, 10}}, + {m68k_op_lsr_16_aw , 0xffff, 0xe2f8, { 16, 16, 9}}, + {m68k_op_lsr_16_al , 0xffff, 0xe2f9, { 20, 20, 9}}, + {m68k_op_lsl_16_aw , 0xffff, 0xe3f8, { 16, 16, 9}}, + {m68k_op_lsl_16_al , 0xffff, 0xe3f9, { 20, 20, 9}}, + {m68k_op_roxr_16_aw , 0xffff, 0xe4f8, { 16, 16, 9}}, + {m68k_op_roxr_16_al , 0xffff, 0xe4f9, { 20, 20, 9}}, + {m68k_op_roxl_16_aw , 0xffff, 0xe5f8, { 16, 16, 9}}, + {m68k_op_roxl_16_al , 0xffff, 0xe5f9, { 20, 20, 9}}, + {m68k_op_ror_16_aw , 0xffff, 0xe6f8, { 16, 16, 11}}, + {m68k_op_ror_16_al , 0xffff, 0xe6f9, { 20, 20, 11}}, + {m68k_op_rol_16_aw , 0xffff, 0xe7f8, { 16, 16, 11}}, + {m68k_op_rol_16_al , 0xffff, 0xe7f9, { 20, 20, 11}}, + {m68k_op_bftst_32_aw , 0xffff, 0xe8f8, { 0, 0, 17}}, + {m68k_op_bftst_32_al , 0xffff, 0xe8f9, { 0, 0, 17}}, + {m68k_op_bftst_32_pcdi , 0xffff, 0xe8fa, { 0, 0, 18}}, + {m68k_op_bftst_32_pcix , 0xffff, 0xe8fb, { 0, 0, 20}}, + {m68k_op_bfextu_32_aw , 0xffff, 0xe9f8, { 0, 0, 19}}, + {m68k_op_bfextu_32_al , 0xffff, 0xe9f9, { 0, 0, 19}}, + {m68k_op_bfextu_32_pcdi , 0xffff, 0xe9fa, { 0, 0, 20}}, + {m68k_op_bfextu_32_pcix , 0xffff, 0xe9fb, { 0, 0, 22}}, + {m68k_op_bfchg_32_aw , 0xffff, 0xeaf8, { 0, 0, 24}}, + {m68k_op_bfchg_32_al , 0xffff, 0xeaf9, { 0, 0, 24}}, + {m68k_op_bfexts_32_aw , 0xffff, 0xebf8, { 0, 0, 19}}, + {m68k_op_bfexts_32_al , 0xffff, 0xebf9, { 0, 0, 19}}, + {m68k_op_bfexts_32_pcdi , 0xffff, 0xebfa, { 0, 0, 20}}, + {m68k_op_bfexts_32_pcix , 0xffff, 0xebfb, { 0, 0, 22}}, + {m68k_op_bfclr_32_aw , 0xffff, 0xecf8, { 0, 0, 24}}, + {m68k_op_bfclr_32_al , 0xffff, 0xecf9, { 0, 0, 24}}, + {m68k_op_bfffo_32_aw , 0xffff, 0xedf8, { 0, 0, 32}}, + {m68k_op_bfffo_32_al , 0xffff, 0xedf9, { 0, 0, 32}}, + {m68k_op_bfffo_32_pcdi , 0xffff, 0xedfa, { 0, 0, 33}}, + {m68k_op_bfffo_32_pcix , 0xffff, 0xedfb, { 0, 0, 35}}, + {m68k_op_bfset_32_aw , 0xffff, 0xeef8, { 0, 0, 24}}, + {m68k_op_bfset_32_al , 0xffff, 0xeef9, { 0, 0, 24}}, + {m68k_op_bfins_32_aw , 0xffff, 0xeff8, { 0, 0, 21}}, + {m68k_op_bfins_32_al , 0xffff, 0xeff9, { 0, 0, 21}}, + {0, 0, 0, {0, 0, 0}} +}; + + +/* Build the opcode handler jump table */ +void m68ki_build_opcode_table(void) +{ + opcode_handler_struct *ostruct; + int instr; + int i; + int j; + int k; + + for(i = 0; i < 0x10000; i++) + { + /* default to illegal */ + m68ki_instruction_jump_table[i] = m68k_op_illegal; + for(k=0;kmask != 0xff00) + { + for(i = 0;i < 0x10000;i++) + { + if((i & ostruct->mask) == ostruct->match) + { + m68ki_instruction_jump_table[i] = ostruct->opcode_handler; + for(k=0;kcycles[k]; + } + } + ostruct++; + } + while(ostruct->mask == 0xff00) + { + for(i = 0;i <= 0xff;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + for(k=0;kmatch | i] = ostruct->cycles[k]; + } + ostruct++; + } + while(ostruct->mask == 0xf1f8) + { + for(i = 0;i < 8;i++) + { + for(j = 0;j < 8;j++) + { + instr = ostruct->match | (i << 9) | j; + m68ki_instruction_jump_table[instr] = ostruct->opcode_handler; + for(k=0;kcycles[k]; + if((instr & 0xf000) == 0xe000 && (!(instr & 0x20))) + m68ki_cycles[0][instr] = m68ki_cycles[1][instr] = ostruct->cycles[k] + ((((j-1)&7)+1)<<1); + } + } + ostruct++; + } + while(ostruct->mask == 0xfff0) + { + for(i = 0;i <= 0x0f;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + for(k=0;kmatch | i] = ostruct->cycles[k]; + } + ostruct++; + } + while(ostruct->mask == 0xf1ff) + { + for(i = 0;i <= 0x07;i++) + { + m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler; + for(k=0;kmatch | (i << 9)] = ostruct->cycles[k]; + } + ostruct++; + } + while(ostruct->mask == 0xfff8) + { + for(i = 0;i <= 0x07;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + for(k=0;kmatch | i] = ostruct->cycles[k]; + } + ostruct++; + } + while(ostruct->mask == 0xffff) + { + m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler; + for(k=0;kmatch] = ostruct->cycles[k]; + ostruct++; + } +} + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + + diff --git a/AltairZ80/m68kops.h b/AltairZ80/m68kops.h new file mode 100644 index 00000000..1f7b3abf --- /dev/null +++ b/AltairZ80/m68kops.h @@ -0,0 +1,1984 @@ +#ifndef M68KOPS__HEADER +#define M68KOPS__HEADER + +/* ======================================================================== */ +/* ============================ OPCODE HANDLERS =========================== */ +/* ======================================================================== */ + + +void m68k_op_1010(void); +void m68k_op_1111(void); +void m68k_op_abcd_8_rr(void); +void m68k_op_abcd_8_mm_ax7(void); +void m68k_op_abcd_8_mm_ay7(void); +void m68k_op_abcd_8_mm_axy7(void); +void m68k_op_abcd_8_mm(void); +void m68k_op_add_8_er_d(void); +void m68k_op_add_8_er_ai(void); +void m68k_op_add_8_er_pi(void); +void m68k_op_add_8_er_pi7(void); +void m68k_op_add_8_er_pd(void); +void m68k_op_add_8_er_pd7(void); +void m68k_op_add_8_er_di(void); +void m68k_op_add_8_er_ix(void); +void m68k_op_add_8_er_aw(void); +void m68k_op_add_8_er_al(void); +void m68k_op_add_8_er_pcdi(void); +void m68k_op_add_8_er_pcix(void); +void m68k_op_add_8_er_i(void); +void m68k_op_add_16_er_d(void); +void m68k_op_add_16_er_a(void); +void m68k_op_add_16_er_ai(void); +void m68k_op_add_16_er_pi(void); +void m68k_op_add_16_er_pd(void); +void m68k_op_add_16_er_di(void); +void m68k_op_add_16_er_ix(void); +void m68k_op_add_16_er_aw(void); +void m68k_op_add_16_er_al(void); +void m68k_op_add_16_er_pcdi(void); +void m68k_op_add_16_er_pcix(void); +void m68k_op_add_16_er_i(void); +void m68k_op_add_32_er_d(void); +void m68k_op_add_32_er_a(void); +void m68k_op_add_32_er_ai(void); +void m68k_op_add_32_er_pi(void); +void m68k_op_add_32_er_pd(void); +void m68k_op_add_32_er_di(void); +void m68k_op_add_32_er_ix(void); +void m68k_op_add_32_er_aw(void); +void m68k_op_add_32_er_al(void); +void m68k_op_add_32_er_pcdi(void); +void m68k_op_add_32_er_pcix(void); +void m68k_op_add_32_er_i(void); +void m68k_op_add_8_re_ai(void); +void m68k_op_add_8_re_pi(void); +void m68k_op_add_8_re_pi7(void); +void m68k_op_add_8_re_pd(void); +void m68k_op_add_8_re_pd7(void); +void m68k_op_add_8_re_di(void); +void m68k_op_add_8_re_ix(void); +void m68k_op_add_8_re_aw(void); +void m68k_op_add_8_re_al(void); +void m68k_op_add_16_re_ai(void); +void m68k_op_add_16_re_pi(void); +void m68k_op_add_16_re_pd(void); +void m68k_op_add_16_re_di(void); +void m68k_op_add_16_re_ix(void); +void m68k_op_add_16_re_aw(void); +void m68k_op_add_16_re_al(void); +void m68k_op_add_32_re_ai(void); +void m68k_op_add_32_re_pi(void); +void m68k_op_add_32_re_pd(void); +void m68k_op_add_32_re_di(void); +void m68k_op_add_32_re_ix(void); +void m68k_op_add_32_re_aw(void); +void m68k_op_add_32_re_al(void); +void m68k_op_adda_16_d(void); +void m68k_op_adda_16_a(void); +void m68k_op_adda_16_ai(void); +void m68k_op_adda_16_pi(void); +void m68k_op_adda_16_pd(void); +void m68k_op_adda_16_di(void); +void m68k_op_adda_16_ix(void); +void m68k_op_adda_16_aw(void); +void m68k_op_adda_16_al(void); +void m68k_op_adda_16_pcdi(void); +void m68k_op_adda_16_pcix(void); +void m68k_op_adda_16_i(void); +void m68k_op_adda_32_d(void); +void m68k_op_adda_32_a(void); +void m68k_op_adda_32_ai(void); +void m68k_op_adda_32_pi(void); +void m68k_op_adda_32_pd(void); +void m68k_op_adda_32_di(void); +void m68k_op_adda_32_ix(void); +void m68k_op_adda_32_aw(void); +void m68k_op_adda_32_al(void); +void m68k_op_adda_32_pcdi(void); +void m68k_op_adda_32_pcix(void); +void m68k_op_adda_32_i(void); +void m68k_op_addi_8_d(void); +void m68k_op_addi_8_ai(void); +void m68k_op_addi_8_pi(void); +void m68k_op_addi_8_pi7(void); +void m68k_op_addi_8_pd(void); +void m68k_op_addi_8_pd7(void); +void m68k_op_addi_8_di(void); +void m68k_op_addi_8_ix(void); +void m68k_op_addi_8_aw(void); +void m68k_op_addi_8_al(void); +void m68k_op_addi_16_d(void); +void m68k_op_addi_16_ai(void); +void m68k_op_addi_16_pi(void); +void m68k_op_addi_16_pd(void); +void m68k_op_addi_16_di(void); +void m68k_op_addi_16_ix(void); +void m68k_op_addi_16_aw(void); +void m68k_op_addi_16_al(void); +void m68k_op_addi_32_d(void); +void m68k_op_addi_32_ai(void); +void m68k_op_addi_32_pi(void); +void m68k_op_addi_32_pd(void); +void m68k_op_addi_32_di(void); +void m68k_op_addi_32_ix(void); +void m68k_op_addi_32_aw(void); +void m68k_op_addi_32_al(void); +void m68k_op_addq_8_d(void); +void m68k_op_addq_8_ai(void); +void m68k_op_addq_8_pi(void); +void m68k_op_addq_8_pi7(void); +void m68k_op_addq_8_pd(void); +void m68k_op_addq_8_pd7(void); +void m68k_op_addq_8_di(void); +void m68k_op_addq_8_ix(void); +void m68k_op_addq_8_aw(void); +void m68k_op_addq_8_al(void); +void m68k_op_addq_16_d(void); +void m68k_op_addq_16_a(void); +void m68k_op_addq_16_ai(void); +void m68k_op_addq_16_pi(void); +void m68k_op_addq_16_pd(void); +void m68k_op_addq_16_di(void); +void m68k_op_addq_16_ix(void); +void m68k_op_addq_16_aw(void); +void m68k_op_addq_16_al(void); +void m68k_op_addq_32_d(void); +void m68k_op_addq_32_a(void); +void m68k_op_addq_32_ai(void); +void m68k_op_addq_32_pi(void); +void m68k_op_addq_32_pd(void); +void m68k_op_addq_32_di(void); +void m68k_op_addq_32_ix(void); +void m68k_op_addq_32_aw(void); +void m68k_op_addq_32_al(void); +void m68k_op_addx_8_rr(void); +void m68k_op_addx_16_rr(void); +void m68k_op_addx_32_rr(void); +void m68k_op_addx_8_mm_ax7(void); +void m68k_op_addx_8_mm_ay7(void); +void m68k_op_addx_8_mm_axy7(void); +void m68k_op_addx_8_mm(void); +void m68k_op_addx_16_mm(void); +void m68k_op_addx_32_mm(void); +void m68k_op_and_8_er_d(void); +void m68k_op_and_8_er_ai(void); +void m68k_op_and_8_er_pi(void); +void m68k_op_and_8_er_pi7(void); +void m68k_op_and_8_er_pd(void); +void m68k_op_and_8_er_pd7(void); +void m68k_op_and_8_er_di(void); +void m68k_op_and_8_er_ix(void); +void m68k_op_and_8_er_aw(void); +void m68k_op_and_8_er_al(void); +void m68k_op_and_8_er_pcdi(void); +void m68k_op_and_8_er_pcix(void); +void m68k_op_and_8_er_i(void); +void m68k_op_and_16_er_d(void); +void m68k_op_and_16_er_ai(void); +void m68k_op_and_16_er_pi(void); +void m68k_op_and_16_er_pd(void); +void m68k_op_and_16_er_di(void); +void m68k_op_and_16_er_ix(void); +void m68k_op_and_16_er_aw(void); +void m68k_op_and_16_er_al(void); +void m68k_op_and_16_er_pcdi(void); +void m68k_op_and_16_er_pcix(void); +void m68k_op_and_16_er_i(void); +void m68k_op_and_32_er_d(void); +void m68k_op_and_32_er_ai(void); +void m68k_op_and_32_er_pi(void); +void m68k_op_and_32_er_pd(void); +void m68k_op_and_32_er_di(void); +void m68k_op_and_32_er_ix(void); +void m68k_op_and_32_er_aw(void); +void m68k_op_and_32_er_al(void); +void m68k_op_and_32_er_pcdi(void); +void m68k_op_and_32_er_pcix(void); +void m68k_op_and_32_er_i(void); +void m68k_op_and_8_re_ai(void); +void m68k_op_and_8_re_pi(void); +void m68k_op_and_8_re_pi7(void); +void m68k_op_and_8_re_pd(void); +void m68k_op_and_8_re_pd7(void); +void m68k_op_and_8_re_di(void); +void m68k_op_and_8_re_ix(void); +void m68k_op_and_8_re_aw(void); +void m68k_op_and_8_re_al(void); +void m68k_op_and_16_re_ai(void); +void m68k_op_and_16_re_pi(void); +void m68k_op_and_16_re_pd(void); +void m68k_op_and_16_re_di(void); +void m68k_op_and_16_re_ix(void); +void m68k_op_and_16_re_aw(void); +void m68k_op_and_16_re_al(void); +void m68k_op_and_32_re_ai(void); +void m68k_op_and_32_re_pi(void); +void m68k_op_and_32_re_pd(void); +void m68k_op_and_32_re_di(void); +void m68k_op_and_32_re_ix(void); +void m68k_op_and_32_re_aw(void); +void m68k_op_and_32_re_al(void); +void m68k_op_andi_8_d(void); +void m68k_op_andi_8_ai(void); +void m68k_op_andi_8_pi(void); +void m68k_op_andi_8_pi7(void); +void m68k_op_andi_8_pd(void); +void m68k_op_andi_8_pd7(void); +void m68k_op_andi_8_di(void); +void m68k_op_andi_8_ix(void); +void m68k_op_andi_8_aw(void); +void m68k_op_andi_8_al(void); +void m68k_op_andi_16_d(void); +void m68k_op_andi_16_ai(void); +void m68k_op_andi_16_pi(void); +void m68k_op_andi_16_pd(void); +void m68k_op_andi_16_di(void); +void m68k_op_andi_16_ix(void); +void m68k_op_andi_16_aw(void); +void m68k_op_andi_16_al(void); +void m68k_op_andi_32_d(void); +void m68k_op_andi_32_ai(void); +void m68k_op_andi_32_pi(void); +void m68k_op_andi_32_pd(void); +void m68k_op_andi_32_di(void); +void m68k_op_andi_32_ix(void); +void m68k_op_andi_32_aw(void); +void m68k_op_andi_32_al(void); +void m68k_op_andi_16_toc(void); +void m68k_op_andi_16_tos(void); +void m68k_op_asr_8_s(void); +void m68k_op_asr_16_s(void); +void m68k_op_asr_32_s(void); +void m68k_op_asr_8_r(void); +void m68k_op_asr_16_r(void); +void m68k_op_asr_32_r(void); +void m68k_op_asr_16_ai(void); +void m68k_op_asr_16_pi(void); +void m68k_op_asr_16_pd(void); +void m68k_op_asr_16_di(void); +void m68k_op_asr_16_ix(void); +void m68k_op_asr_16_aw(void); +void m68k_op_asr_16_al(void); +void m68k_op_asl_8_s(void); +void m68k_op_asl_16_s(void); +void m68k_op_asl_32_s(void); +void m68k_op_asl_8_r(void); +void m68k_op_asl_16_r(void); +void m68k_op_asl_32_r(void); +void m68k_op_asl_16_ai(void); +void m68k_op_asl_16_pi(void); +void m68k_op_asl_16_pd(void); +void m68k_op_asl_16_di(void); +void m68k_op_asl_16_ix(void); +void m68k_op_asl_16_aw(void); +void m68k_op_asl_16_al(void); +void m68k_op_bhi_8(void); +void m68k_op_bls_8(void); +void m68k_op_bcc_8(void); +void m68k_op_bcs_8(void); +void m68k_op_bne_8(void); +void m68k_op_beq_8(void); +void m68k_op_bvc_8(void); +void m68k_op_bvs_8(void); +void m68k_op_bpl_8(void); +void m68k_op_bmi_8(void); +void m68k_op_bge_8(void); +void m68k_op_blt_8(void); +void m68k_op_bgt_8(void); +void m68k_op_ble_8(void); +void m68k_op_bhi_16(void); +void m68k_op_bls_16(void); +void m68k_op_bcc_16(void); +void m68k_op_bcs_16(void); +void m68k_op_bne_16(void); +void m68k_op_beq_16(void); +void m68k_op_bvc_16(void); +void m68k_op_bvs_16(void); +void m68k_op_bpl_16(void); +void m68k_op_bmi_16(void); +void m68k_op_bge_16(void); +void m68k_op_blt_16(void); +void m68k_op_bgt_16(void); +void m68k_op_ble_16(void); +void m68k_op_bhi_32(void); +void m68k_op_bls_32(void); +void m68k_op_bcc_32(void); +void m68k_op_bcs_32(void); +void m68k_op_bne_32(void); +void m68k_op_beq_32(void); +void m68k_op_bvc_32(void); +void m68k_op_bvs_32(void); +void m68k_op_bpl_32(void); +void m68k_op_bmi_32(void); +void m68k_op_bge_32(void); +void m68k_op_blt_32(void); +void m68k_op_bgt_32(void); +void m68k_op_ble_32(void); +void m68k_op_bchg_32_r_d(void); +void m68k_op_bchg_8_r_ai(void); +void m68k_op_bchg_8_r_pi(void); +void m68k_op_bchg_8_r_pi7(void); +void m68k_op_bchg_8_r_pd(void); +void m68k_op_bchg_8_r_pd7(void); +void m68k_op_bchg_8_r_di(void); +void m68k_op_bchg_8_r_ix(void); +void m68k_op_bchg_8_r_aw(void); +void m68k_op_bchg_8_r_al(void); +void m68k_op_bchg_32_s_d(void); +void m68k_op_bchg_8_s_ai(void); +void m68k_op_bchg_8_s_pi(void); +void m68k_op_bchg_8_s_pi7(void); +void m68k_op_bchg_8_s_pd(void); +void m68k_op_bchg_8_s_pd7(void); +void m68k_op_bchg_8_s_di(void); +void m68k_op_bchg_8_s_ix(void); +void m68k_op_bchg_8_s_aw(void); +void m68k_op_bchg_8_s_al(void); +void m68k_op_bclr_32_r_d(void); +void m68k_op_bclr_8_r_ai(void); +void m68k_op_bclr_8_r_pi(void); +void m68k_op_bclr_8_r_pi7(void); +void m68k_op_bclr_8_r_pd(void); +void m68k_op_bclr_8_r_pd7(void); +void m68k_op_bclr_8_r_di(void); +void m68k_op_bclr_8_r_ix(void); +void m68k_op_bclr_8_r_aw(void); +void m68k_op_bclr_8_r_al(void); +void m68k_op_bclr_32_s_d(void); +void m68k_op_bclr_8_s_ai(void); +void m68k_op_bclr_8_s_pi(void); +void m68k_op_bclr_8_s_pi7(void); +void m68k_op_bclr_8_s_pd(void); +void m68k_op_bclr_8_s_pd7(void); +void m68k_op_bclr_8_s_di(void); +void m68k_op_bclr_8_s_ix(void); +void m68k_op_bclr_8_s_aw(void); +void m68k_op_bclr_8_s_al(void); +void m68k_op_bfchg_32_d(void); +void m68k_op_bfchg_32_ai(void); +void m68k_op_bfchg_32_di(void); +void m68k_op_bfchg_32_ix(void); +void m68k_op_bfchg_32_aw(void); +void m68k_op_bfchg_32_al(void); +void m68k_op_bfclr_32_d(void); +void m68k_op_bfclr_32_ai(void); +void m68k_op_bfclr_32_di(void); +void m68k_op_bfclr_32_ix(void); +void m68k_op_bfclr_32_aw(void); +void m68k_op_bfclr_32_al(void); +void m68k_op_bfexts_32_d(void); +void m68k_op_bfexts_32_ai(void); +void m68k_op_bfexts_32_di(void); +void m68k_op_bfexts_32_ix(void); +void m68k_op_bfexts_32_aw(void); +void m68k_op_bfexts_32_al(void); +void m68k_op_bfexts_32_pcdi(void); +void m68k_op_bfexts_32_pcix(void); +void m68k_op_bfextu_32_d(void); +void m68k_op_bfextu_32_ai(void); +void m68k_op_bfextu_32_di(void); +void m68k_op_bfextu_32_ix(void); +void m68k_op_bfextu_32_aw(void); +void m68k_op_bfextu_32_al(void); +void m68k_op_bfextu_32_pcdi(void); +void m68k_op_bfextu_32_pcix(void); +void m68k_op_bfffo_32_d(void); +void m68k_op_bfffo_32_ai(void); +void m68k_op_bfffo_32_di(void); +void m68k_op_bfffo_32_ix(void); +void m68k_op_bfffo_32_aw(void); +void m68k_op_bfffo_32_al(void); +void m68k_op_bfffo_32_pcdi(void); +void m68k_op_bfffo_32_pcix(void); +void m68k_op_bfins_32_d(void); +void m68k_op_bfins_32_ai(void); +void m68k_op_bfins_32_di(void); +void m68k_op_bfins_32_ix(void); +void m68k_op_bfins_32_aw(void); +void m68k_op_bfins_32_al(void); +void m68k_op_bfset_32_d(void); +void m68k_op_bfset_32_ai(void); +void m68k_op_bfset_32_di(void); +void m68k_op_bfset_32_ix(void); +void m68k_op_bfset_32_aw(void); +void m68k_op_bfset_32_al(void); +void m68k_op_bftst_32_d(void); +void m68k_op_bftst_32_ai(void); +void m68k_op_bftst_32_di(void); +void m68k_op_bftst_32_ix(void); +void m68k_op_bftst_32_aw(void); +void m68k_op_bftst_32_al(void); +void m68k_op_bftst_32_pcdi(void); +void m68k_op_bftst_32_pcix(void); +void m68k_op_bkpt(void); +void m68k_op_bra_8(void); +void m68k_op_bra_16(void); +void m68k_op_bra_32(void); +void m68k_op_bset_32_r_d(void); +void m68k_op_bset_8_r_ai(void); +void m68k_op_bset_8_r_pi(void); +void m68k_op_bset_8_r_pi7(void); +void m68k_op_bset_8_r_pd(void); +void m68k_op_bset_8_r_pd7(void); +void m68k_op_bset_8_r_di(void); +void m68k_op_bset_8_r_ix(void); +void m68k_op_bset_8_r_aw(void); +void m68k_op_bset_8_r_al(void); +void m68k_op_bset_32_s_d(void); +void m68k_op_bset_8_s_ai(void); +void m68k_op_bset_8_s_pi(void); +void m68k_op_bset_8_s_pi7(void); +void m68k_op_bset_8_s_pd(void); +void m68k_op_bset_8_s_pd7(void); +void m68k_op_bset_8_s_di(void); +void m68k_op_bset_8_s_ix(void); +void m68k_op_bset_8_s_aw(void); +void m68k_op_bset_8_s_al(void); +void m68k_op_bsr_8(void); +void m68k_op_bsr_16(void); +void m68k_op_bsr_32(void); +void m68k_op_btst_32_r_d(void); +void m68k_op_btst_8_r_ai(void); +void m68k_op_btst_8_r_pi(void); +void m68k_op_btst_8_r_pi7(void); +void m68k_op_btst_8_r_pd(void); +void m68k_op_btst_8_r_pd7(void); +void m68k_op_btst_8_r_di(void); +void m68k_op_btst_8_r_ix(void); +void m68k_op_btst_8_r_aw(void); +void m68k_op_btst_8_r_al(void); +void m68k_op_btst_8_r_pcdi(void); +void m68k_op_btst_8_r_pcix(void); +void m68k_op_btst_8_r_i(void); +void m68k_op_btst_32_s_d(void); +void m68k_op_btst_8_s_ai(void); +void m68k_op_btst_8_s_pi(void); +void m68k_op_btst_8_s_pi7(void); +void m68k_op_btst_8_s_pd(void); +void m68k_op_btst_8_s_pd7(void); +void m68k_op_btst_8_s_di(void); +void m68k_op_btst_8_s_ix(void); +void m68k_op_btst_8_s_aw(void); +void m68k_op_btst_8_s_al(void); +void m68k_op_btst_8_s_pcdi(void); +void m68k_op_btst_8_s_pcix(void); +void m68k_op_callm_32_ai(void); +void m68k_op_callm_32_di(void); +void m68k_op_callm_32_ix(void); +void m68k_op_callm_32_aw(void); +void m68k_op_callm_32_al(void); +void m68k_op_callm_32_pcdi(void); +void m68k_op_callm_32_pcix(void); +void m68k_op_cas_8_ai(void); +void m68k_op_cas_8_pi(void); +void m68k_op_cas_8_pi7(void); +void m68k_op_cas_8_pd(void); +void m68k_op_cas_8_pd7(void); +void m68k_op_cas_8_di(void); +void m68k_op_cas_8_ix(void); +void m68k_op_cas_8_aw(void); +void m68k_op_cas_8_al(void); +void m68k_op_cas_16_ai(void); +void m68k_op_cas_16_pi(void); +void m68k_op_cas_16_pd(void); +void m68k_op_cas_16_di(void); +void m68k_op_cas_16_ix(void); +void m68k_op_cas_16_aw(void); +void m68k_op_cas_16_al(void); +void m68k_op_cas_32_ai(void); +void m68k_op_cas_32_pi(void); +void m68k_op_cas_32_pd(void); +void m68k_op_cas_32_di(void); +void m68k_op_cas_32_ix(void); +void m68k_op_cas_32_aw(void); +void m68k_op_cas_32_al(void); +void m68k_op_cas2_16(void); +void m68k_op_cas2_32(void); +void m68k_op_chk_16_d(void); +void m68k_op_chk_16_ai(void); +void m68k_op_chk_16_pi(void); +void m68k_op_chk_16_pd(void); +void m68k_op_chk_16_di(void); +void m68k_op_chk_16_ix(void); +void m68k_op_chk_16_aw(void); +void m68k_op_chk_16_al(void); +void m68k_op_chk_16_pcdi(void); +void m68k_op_chk_16_pcix(void); +void m68k_op_chk_16_i(void); +void m68k_op_chk_32_d(void); +void m68k_op_chk_32_ai(void); +void m68k_op_chk_32_pi(void); +void m68k_op_chk_32_pd(void); +void m68k_op_chk_32_di(void); +void m68k_op_chk_32_ix(void); +void m68k_op_chk_32_aw(void); +void m68k_op_chk_32_al(void); +void m68k_op_chk_32_pcdi(void); +void m68k_op_chk_32_pcix(void); +void m68k_op_chk_32_i(void); +void m68k_op_chk2cmp2_8_ai(void); +void m68k_op_chk2cmp2_8_di(void); +void m68k_op_chk2cmp2_8_ix(void); +void m68k_op_chk2cmp2_8_aw(void); +void m68k_op_chk2cmp2_8_al(void); +void m68k_op_chk2cmp2_8_pcdi(void); +void m68k_op_chk2cmp2_8_pcix(void); +void m68k_op_chk2cmp2_16_ai(void); +void m68k_op_chk2cmp2_16_di(void); +void m68k_op_chk2cmp2_16_ix(void); +void m68k_op_chk2cmp2_16_aw(void); +void m68k_op_chk2cmp2_16_al(void); +void m68k_op_chk2cmp2_16_pcdi(void); +void m68k_op_chk2cmp2_16_pcix(void); +void m68k_op_chk2cmp2_32_ai(void); +void m68k_op_chk2cmp2_32_di(void); +void m68k_op_chk2cmp2_32_ix(void); +void m68k_op_chk2cmp2_32_aw(void); +void m68k_op_chk2cmp2_32_al(void); +void m68k_op_chk2cmp2_32_pcdi(void); +void m68k_op_chk2cmp2_32_pcix(void); +void m68k_op_clr_8_d(void); +void m68k_op_clr_8_ai(void); +void m68k_op_clr_8_pi(void); +void m68k_op_clr_8_pi7(void); +void m68k_op_clr_8_pd(void); +void m68k_op_clr_8_pd7(void); +void m68k_op_clr_8_di(void); +void m68k_op_clr_8_ix(void); +void m68k_op_clr_8_aw(void); +void m68k_op_clr_8_al(void); +void m68k_op_clr_16_d(void); +void m68k_op_clr_16_ai(void); +void m68k_op_clr_16_pi(void); +void m68k_op_clr_16_pd(void); +void m68k_op_clr_16_di(void); +void m68k_op_clr_16_ix(void); +void m68k_op_clr_16_aw(void); +void m68k_op_clr_16_al(void); +void m68k_op_clr_32_d(void); +void m68k_op_clr_32_ai(void); +void m68k_op_clr_32_pi(void); +void m68k_op_clr_32_pd(void); +void m68k_op_clr_32_di(void); +void m68k_op_clr_32_ix(void); +void m68k_op_clr_32_aw(void); +void m68k_op_clr_32_al(void); +void m68k_op_cmp_8_d(void); +void m68k_op_cmp_8_ai(void); +void m68k_op_cmp_8_pi(void); +void m68k_op_cmp_8_pi7(void); +void m68k_op_cmp_8_pd(void); +void m68k_op_cmp_8_pd7(void); +void m68k_op_cmp_8_di(void); +void m68k_op_cmp_8_ix(void); +void m68k_op_cmp_8_aw(void); +void m68k_op_cmp_8_al(void); +void m68k_op_cmp_8_pcdi(void); +void m68k_op_cmp_8_pcix(void); +void m68k_op_cmp_8_i(void); +void m68k_op_cmp_16_d(void); +void m68k_op_cmp_16_a(void); +void m68k_op_cmp_16_ai(void); +void m68k_op_cmp_16_pi(void); +void m68k_op_cmp_16_pd(void); +void m68k_op_cmp_16_di(void); +void m68k_op_cmp_16_ix(void); +void m68k_op_cmp_16_aw(void); +void m68k_op_cmp_16_al(void); +void m68k_op_cmp_16_pcdi(void); +void m68k_op_cmp_16_pcix(void); +void m68k_op_cmp_16_i(void); +void m68k_op_cmp_32_d(void); +void m68k_op_cmp_32_a(void); +void m68k_op_cmp_32_ai(void); +void m68k_op_cmp_32_pi(void); +void m68k_op_cmp_32_pd(void); +void m68k_op_cmp_32_di(void); +void m68k_op_cmp_32_ix(void); +void m68k_op_cmp_32_aw(void); +void m68k_op_cmp_32_al(void); +void m68k_op_cmp_32_pcdi(void); +void m68k_op_cmp_32_pcix(void); +void m68k_op_cmp_32_i(void); +void m68k_op_cmpa_16_d(void); +void m68k_op_cmpa_16_a(void); +void m68k_op_cmpa_16_ai(void); +void m68k_op_cmpa_16_pi(void); +void m68k_op_cmpa_16_pd(void); +void m68k_op_cmpa_16_di(void); +void m68k_op_cmpa_16_ix(void); +void m68k_op_cmpa_16_aw(void); +void m68k_op_cmpa_16_al(void); +void m68k_op_cmpa_16_pcdi(void); +void m68k_op_cmpa_16_pcix(void); +void m68k_op_cmpa_16_i(void); +void m68k_op_cmpa_32_d(void); +void m68k_op_cmpa_32_a(void); +void m68k_op_cmpa_32_ai(void); +void m68k_op_cmpa_32_pi(void); +void m68k_op_cmpa_32_pd(void); +void m68k_op_cmpa_32_di(void); +void m68k_op_cmpa_32_ix(void); +void m68k_op_cmpa_32_aw(void); +void m68k_op_cmpa_32_al(void); +void m68k_op_cmpa_32_pcdi(void); +void m68k_op_cmpa_32_pcix(void); +void m68k_op_cmpa_32_i(void); +void m68k_op_cmpi_8_d(void); +void m68k_op_cmpi_8_ai(void); +void m68k_op_cmpi_8_pi(void); +void m68k_op_cmpi_8_pi7(void); +void m68k_op_cmpi_8_pd(void); +void m68k_op_cmpi_8_pd7(void); +void m68k_op_cmpi_8_di(void); +void m68k_op_cmpi_8_ix(void); +void m68k_op_cmpi_8_aw(void); +void m68k_op_cmpi_8_al(void); +void m68k_op_cmpi_8_pcdi(void); +void m68k_op_cmpi_8_pcix(void); +void m68k_op_cmpi_16_d(void); +void m68k_op_cmpi_16_ai(void); +void m68k_op_cmpi_16_pi(void); +void m68k_op_cmpi_16_pd(void); +void m68k_op_cmpi_16_di(void); +void m68k_op_cmpi_16_ix(void); +void m68k_op_cmpi_16_aw(void); +void m68k_op_cmpi_16_al(void); +void m68k_op_cmpi_16_pcdi(void); +void m68k_op_cmpi_16_pcix(void); +void m68k_op_cmpi_32_d(void); +void m68k_op_cmpi_32_ai(void); +void m68k_op_cmpi_32_pi(void); +void m68k_op_cmpi_32_pd(void); +void m68k_op_cmpi_32_di(void); +void m68k_op_cmpi_32_ix(void); +void m68k_op_cmpi_32_aw(void); +void m68k_op_cmpi_32_al(void); +void m68k_op_cmpi_32_pcdi(void); +void m68k_op_cmpi_32_pcix(void); +void m68k_op_cmpm_8_ax7(void); +void m68k_op_cmpm_8_ay7(void); +void m68k_op_cmpm_8_axy7(void); +void m68k_op_cmpm_8(void); +void m68k_op_cmpm_16(void); +void m68k_op_cmpm_32(void); +void m68k_op_cpbcc_32(void); +void m68k_op_cpdbcc_32(void); +void m68k_op_cpgen_32(void); +void m68k_op_cpscc_32(void); +void m68k_op_cptrapcc_32(void); +void m68k_op_dbt_16(void); +void m68k_op_dbf_16(void); +void m68k_op_dbhi_16(void); +void m68k_op_dbls_16(void); +void m68k_op_dbcc_16(void); +void m68k_op_dbcs_16(void); +void m68k_op_dbne_16(void); +void m68k_op_dbeq_16(void); +void m68k_op_dbvc_16(void); +void m68k_op_dbvs_16(void); +void m68k_op_dbpl_16(void); +void m68k_op_dbmi_16(void); +void m68k_op_dbge_16(void); +void m68k_op_dblt_16(void); +void m68k_op_dbgt_16(void); +void m68k_op_dble_16(void); +void m68k_op_divs_16_d(void); +void m68k_op_divs_16_ai(void); +void m68k_op_divs_16_pi(void); +void m68k_op_divs_16_pd(void); +void m68k_op_divs_16_di(void); +void m68k_op_divs_16_ix(void); +void m68k_op_divs_16_aw(void); +void m68k_op_divs_16_al(void); +void m68k_op_divs_16_pcdi(void); +void m68k_op_divs_16_pcix(void); +void m68k_op_divs_16_i(void); +void m68k_op_divu_16_d(void); +void m68k_op_divu_16_ai(void); +void m68k_op_divu_16_pi(void); +void m68k_op_divu_16_pd(void); +void m68k_op_divu_16_di(void); +void m68k_op_divu_16_ix(void); +void m68k_op_divu_16_aw(void); +void m68k_op_divu_16_al(void); +void m68k_op_divu_16_pcdi(void); +void m68k_op_divu_16_pcix(void); +void m68k_op_divu_16_i(void); +void m68k_op_divl_32_d(void); +void m68k_op_divl_32_ai(void); +void m68k_op_divl_32_pi(void); +void m68k_op_divl_32_pd(void); +void m68k_op_divl_32_di(void); +void m68k_op_divl_32_ix(void); +void m68k_op_divl_32_aw(void); +void m68k_op_divl_32_al(void); +void m68k_op_divl_32_pcdi(void); +void m68k_op_divl_32_pcix(void); +void m68k_op_divl_32_i(void); +void m68k_op_eor_8_d(void); +void m68k_op_eor_8_ai(void); +void m68k_op_eor_8_pi(void); +void m68k_op_eor_8_pi7(void); +void m68k_op_eor_8_pd(void); +void m68k_op_eor_8_pd7(void); +void m68k_op_eor_8_di(void); +void m68k_op_eor_8_ix(void); +void m68k_op_eor_8_aw(void); +void m68k_op_eor_8_al(void); +void m68k_op_eor_16_d(void); +void m68k_op_eor_16_ai(void); +void m68k_op_eor_16_pi(void); +void m68k_op_eor_16_pd(void); +void m68k_op_eor_16_di(void); +void m68k_op_eor_16_ix(void); +void m68k_op_eor_16_aw(void); +void m68k_op_eor_16_al(void); +void m68k_op_eor_32_d(void); +void m68k_op_eor_32_ai(void); +void m68k_op_eor_32_pi(void); +void m68k_op_eor_32_pd(void); +void m68k_op_eor_32_di(void); +void m68k_op_eor_32_ix(void); +void m68k_op_eor_32_aw(void); +void m68k_op_eor_32_al(void); +void m68k_op_eori_8_d(void); +void m68k_op_eori_8_ai(void); +void m68k_op_eori_8_pi(void); +void m68k_op_eori_8_pi7(void); +void m68k_op_eori_8_pd(void); +void m68k_op_eori_8_pd7(void); +void m68k_op_eori_8_di(void); +void m68k_op_eori_8_ix(void); +void m68k_op_eori_8_aw(void); +void m68k_op_eori_8_al(void); +void m68k_op_eori_16_d(void); +void m68k_op_eori_16_ai(void); +void m68k_op_eori_16_pi(void); +void m68k_op_eori_16_pd(void); +void m68k_op_eori_16_di(void); +void m68k_op_eori_16_ix(void); +void m68k_op_eori_16_aw(void); +void m68k_op_eori_16_al(void); +void m68k_op_eori_32_d(void); +void m68k_op_eori_32_ai(void); +void m68k_op_eori_32_pi(void); +void m68k_op_eori_32_pd(void); +void m68k_op_eori_32_di(void); +void m68k_op_eori_32_ix(void); +void m68k_op_eori_32_aw(void); +void m68k_op_eori_32_al(void); +void m68k_op_eori_16_toc(void); +void m68k_op_eori_16_tos(void); +void m68k_op_exg_32_dd(void); +void m68k_op_exg_32_aa(void); +void m68k_op_exg_32_da(void); +void m68k_op_ext_16(void); +void m68k_op_ext_32(void); +void m68k_op_extb_32(void); +void m68k_op_illegal(void); +void m68k_op_jmp_32_ai(void); +void m68k_op_jmp_32_di(void); +void m68k_op_jmp_32_ix(void); +void m68k_op_jmp_32_aw(void); +void m68k_op_jmp_32_al(void); +void m68k_op_jmp_32_pcdi(void); +void m68k_op_jmp_32_pcix(void); +void m68k_op_jsr_32_ai(void); +void m68k_op_jsr_32_di(void); +void m68k_op_jsr_32_ix(void); +void m68k_op_jsr_32_aw(void); +void m68k_op_jsr_32_al(void); +void m68k_op_jsr_32_pcdi(void); +void m68k_op_jsr_32_pcix(void); +void m68k_op_lea_32_ai(void); +void m68k_op_lea_32_di(void); +void m68k_op_lea_32_ix(void); +void m68k_op_lea_32_aw(void); +void m68k_op_lea_32_al(void); +void m68k_op_lea_32_pcdi(void); +void m68k_op_lea_32_pcix(void); +void m68k_op_link_16_a7(void); +void m68k_op_link_16(void); +void m68k_op_link_32_a7(void); +void m68k_op_link_32(void); +void m68k_op_lsr_8_s(void); +void m68k_op_lsr_16_s(void); +void m68k_op_lsr_32_s(void); +void m68k_op_lsr_8_r(void); +void m68k_op_lsr_16_r(void); +void m68k_op_lsr_32_r(void); +void m68k_op_lsr_16_ai(void); +void m68k_op_lsr_16_pi(void); +void m68k_op_lsr_16_pd(void); +void m68k_op_lsr_16_di(void); +void m68k_op_lsr_16_ix(void); +void m68k_op_lsr_16_aw(void); +void m68k_op_lsr_16_al(void); +void m68k_op_lsl_8_s(void); +void m68k_op_lsl_16_s(void); +void m68k_op_lsl_32_s(void); +void m68k_op_lsl_8_r(void); +void m68k_op_lsl_16_r(void); +void m68k_op_lsl_32_r(void); +void m68k_op_lsl_16_ai(void); +void m68k_op_lsl_16_pi(void); +void m68k_op_lsl_16_pd(void); +void m68k_op_lsl_16_di(void); +void m68k_op_lsl_16_ix(void); +void m68k_op_lsl_16_aw(void); +void m68k_op_lsl_16_al(void); +void m68k_op_move_8_d_d(void); +void m68k_op_move_8_d_ai(void); +void m68k_op_move_8_d_pi(void); +void m68k_op_move_8_d_pi7(void); +void m68k_op_move_8_d_pd(void); +void m68k_op_move_8_d_pd7(void); +void m68k_op_move_8_d_di(void); +void m68k_op_move_8_d_ix(void); +void m68k_op_move_8_d_aw(void); +void m68k_op_move_8_d_al(void); +void m68k_op_move_8_d_pcdi(void); +void m68k_op_move_8_d_pcix(void); +void m68k_op_move_8_d_i(void); +void m68k_op_move_8_ai_d(void); +void m68k_op_move_8_ai_ai(void); +void m68k_op_move_8_ai_pi(void); +void m68k_op_move_8_ai_pi7(void); +void m68k_op_move_8_ai_pd(void); +void m68k_op_move_8_ai_pd7(void); +void m68k_op_move_8_ai_di(void); +void m68k_op_move_8_ai_ix(void); +void m68k_op_move_8_ai_aw(void); +void m68k_op_move_8_ai_al(void); +void m68k_op_move_8_ai_pcdi(void); +void m68k_op_move_8_ai_pcix(void); +void m68k_op_move_8_ai_i(void); +void m68k_op_move_8_pi7_d(void); +void m68k_op_move_8_pi_d(void); +void m68k_op_move_8_pi7_ai(void); +void m68k_op_move_8_pi7_pi(void); +void m68k_op_move_8_pi7_pi7(void); +void m68k_op_move_8_pi7_pd(void); +void m68k_op_move_8_pi7_pd7(void); +void m68k_op_move_8_pi7_di(void); +void m68k_op_move_8_pi7_ix(void); +void m68k_op_move_8_pi7_aw(void); +void m68k_op_move_8_pi7_al(void); +void m68k_op_move_8_pi7_pcdi(void); +void m68k_op_move_8_pi7_pcix(void); +void m68k_op_move_8_pi7_i(void); +void m68k_op_move_8_pi_ai(void); +void m68k_op_move_8_pi_pi(void); +void m68k_op_move_8_pi_pi7(void); +void m68k_op_move_8_pi_pd(void); +void m68k_op_move_8_pi_pd7(void); +void m68k_op_move_8_pi_di(void); +void m68k_op_move_8_pi_ix(void); +void m68k_op_move_8_pi_aw(void); +void m68k_op_move_8_pi_al(void); +void m68k_op_move_8_pi_pcdi(void); +void m68k_op_move_8_pi_pcix(void); +void m68k_op_move_8_pi_i(void); +void m68k_op_move_8_pd7_d(void); +void m68k_op_move_8_pd_d(void); +void m68k_op_move_8_pd7_ai(void); +void m68k_op_move_8_pd7_pi(void); +void m68k_op_move_8_pd7_pi7(void); +void m68k_op_move_8_pd7_pd(void); +void m68k_op_move_8_pd7_pd7(void); +void m68k_op_move_8_pd7_di(void); +void m68k_op_move_8_pd7_ix(void); +void m68k_op_move_8_pd7_aw(void); +void m68k_op_move_8_pd7_al(void); +void m68k_op_move_8_pd7_pcdi(void); +void m68k_op_move_8_pd7_pcix(void); +void m68k_op_move_8_pd7_i(void); +void m68k_op_move_8_pd_ai(void); +void m68k_op_move_8_pd_pi(void); +void m68k_op_move_8_pd_pi7(void); +void m68k_op_move_8_pd_pd(void); +void m68k_op_move_8_pd_pd7(void); +void m68k_op_move_8_pd_di(void); +void m68k_op_move_8_pd_ix(void); +void m68k_op_move_8_pd_aw(void); +void m68k_op_move_8_pd_al(void); +void m68k_op_move_8_pd_pcdi(void); +void m68k_op_move_8_pd_pcix(void); +void m68k_op_move_8_pd_i(void); +void m68k_op_move_8_di_d(void); +void m68k_op_move_8_di_ai(void); +void m68k_op_move_8_di_pi(void); +void m68k_op_move_8_di_pi7(void); +void m68k_op_move_8_di_pd(void); +void m68k_op_move_8_di_pd7(void); +void m68k_op_move_8_di_di(void); +void m68k_op_move_8_di_ix(void); +void m68k_op_move_8_di_aw(void); +void m68k_op_move_8_di_al(void); +void m68k_op_move_8_di_pcdi(void); +void m68k_op_move_8_di_pcix(void); +void m68k_op_move_8_di_i(void); +void m68k_op_move_8_ix_d(void); +void m68k_op_move_8_ix_ai(void); +void m68k_op_move_8_ix_pi(void); +void m68k_op_move_8_ix_pi7(void); +void m68k_op_move_8_ix_pd(void); +void m68k_op_move_8_ix_pd7(void); +void m68k_op_move_8_ix_di(void); +void m68k_op_move_8_ix_ix(void); +void m68k_op_move_8_ix_aw(void); +void m68k_op_move_8_ix_al(void); +void m68k_op_move_8_ix_pcdi(void); +void m68k_op_move_8_ix_pcix(void); +void m68k_op_move_8_ix_i(void); +void m68k_op_move_8_aw_d(void); +void m68k_op_move_8_aw_ai(void); +void m68k_op_move_8_aw_pi(void); +void m68k_op_move_8_aw_pi7(void); +void m68k_op_move_8_aw_pd(void); +void m68k_op_move_8_aw_pd7(void); +void m68k_op_move_8_aw_di(void); +void m68k_op_move_8_aw_ix(void); +void m68k_op_move_8_aw_aw(void); +void m68k_op_move_8_aw_al(void); +void m68k_op_move_8_aw_pcdi(void); +void m68k_op_move_8_aw_pcix(void); +void m68k_op_move_8_aw_i(void); +void m68k_op_move_8_al_d(void); +void m68k_op_move_8_al_ai(void); +void m68k_op_move_8_al_pi(void); +void m68k_op_move_8_al_pi7(void); +void m68k_op_move_8_al_pd(void); +void m68k_op_move_8_al_pd7(void); +void m68k_op_move_8_al_di(void); +void m68k_op_move_8_al_ix(void); +void m68k_op_move_8_al_aw(void); +void m68k_op_move_8_al_al(void); +void m68k_op_move_8_al_pcdi(void); +void m68k_op_move_8_al_pcix(void); +void m68k_op_move_8_al_i(void); +void m68k_op_move_16_d_d(void); +void m68k_op_move_16_d_a(void); +void m68k_op_move_16_d_ai(void); +void m68k_op_move_16_d_pi(void); +void m68k_op_move_16_d_pd(void); +void m68k_op_move_16_d_di(void); +void m68k_op_move_16_d_ix(void); +void m68k_op_move_16_d_aw(void); +void m68k_op_move_16_d_al(void); +void m68k_op_move_16_d_pcdi(void); +void m68k_op_move_16_d_pcix(void); +void m68k_op_move_16_d_i(void); +void m68k_op_move_16_ai_d(void); +void m68k_op_move_16_ai_a(void); +void m68k_op_move_16_ai_ai(void); +void m68k_op_move_16_ai_pi(void); +void m68k_op_move_16_ai_pd(void); +void m68k_op_move_16_ai_di(void); +void m68k_op_move_16_ai_ix(void); +void m68k_op_move_16_ai_aw(void); +void m68k_op_move_16_ai_al(void); +void m68k_op_move_16_ai_pcdi(void); +void m68k_op_move_16_ai_pcix(void); +void m68k_op_move_16_ai_i(void); +void m68k_op_move_16_pi_d(void); +void m68k_op_move_16_pi_a(void); +void m68k_op_move_16_pi_ai(void); +void m68k_op_move_16_pi_pi(void); +void m68k_op_move_16_pi_pd(void); +void m68k_op_move_16_pi_di(void); +void m68k_op_move_16_pi_ix(void); +void m68k_op_move_16_pi_aw(void); +void m68k_op_move_16_pi_al(void); +void m68k_op_move_16_pi_pcdi(void); +void m68k_op_move_16_pi_pcix(void); +void m68k_op_move_16_pi_i(void); +void m68k_op_move_16_pd_d(void); +void m68k_op_move_16_pd_a(void); +void m68k_op_move_16_pd_ai(void); +void m68k_op_move_16_pd_pi(void); +void m68k_op_move_16_pd_pd(void); +void m68k_op_move_16_pd_di(void); +void m68k_op_move_16_pd_ix(void); +void m68k_op_move_16_pd_aw(void); +void m68k_op_move_16_pd_al(void); +void m68k_op_move_16_pd_pcdi(void); +void m68k_op_move_16_pd_pcix(void); +void m68k_op_move_16_pd_i(void); +void m68k_op_move_16_di_d(void); +void m68k_op_move_16_di_a(void); +void m68k_op_move_16_di_ai(void); +void m68k_op_move_16_di_pi(void); +void m68k_op_move_16_di_pd(void); +void m68k_op_move_16_di_di(void); +void m68k_op_move_16_di_ix(void); +void m68k_op_move_16_di_aw(void); +void m68k_op_move_16_di_al(void); +void m68k_op_move_16_di_pcdi(void); +void m68k_op_move_16_di_pcix(void); +void m68k_op_move_16_di_i(void); +void m68k_op_move_16_ix_d(void); +void m68k_op_move_16_ix_a(void); +void m68k_op_move_16_ix_ai(void); +void m68k_op_move_16_ix_pi(void); +void m68k_op_move_16_ix_pd(void); +void m68k_op_move_16_ix_di(void); +void m68k_op_move_16_ix_ix(void); +void m68k_op_move_16_ix_aw(void); +void m68k_op_move_16_ix_al(void); +void m68k_op_move_16_ix_pcdi(void); +void m68k_op_move_16_ix_pcix(void); +void m68k_op_move_16_ix_i(void); +void m68k_op_move_16_aw_d(void); +void m68k_op_move_16_aw_a(void); +void m68k_op_move_16_aw_ai(void); +void m68k_op_move_16_aw_pi(void); +void m68k_op_move_16_aw_pd(void); +void m68k_op_move_16_aw_di(void); +void m68k_op_move_16_aw_ix(void); +void m68k_op_move_16_aw_aw(void); +void m68k_op_move_16_aw_al(void); +void m68k_op_move_16_aw_pcdi(void); +void m68k_op_move_16_aw_pcix(void); +void m68k_op_move_16_aw_i(void); +void m68k_op_move_16_al_d(void); +void m68k_op_move_16_al_a(void); +void m68k_op_move_16_al_ai(void); +void m68k_op_move_16_al_pi(void); +void m68k_op_move_16_al_pd(void); +void m68k_op_move_16_al_di(void); +void m68k_op_move_16_al_ix(void); +void m68k_op_move_16_al_aw(void); +void m68k_op_move_16_al_al(void); +void m68k_op_move_16_al_pcdi(void); +void m68k_op_move_16_al_pcix(void); +void m68k_op_move_16_al_i(void); +void m68k_op_move_32_d_d(void); +void m68k_op_move_32_d_a(void); +void m68k_op_move_32_d_ai(void); +void m68k_op_move_32_d_pi(void); +void m68k_op_move_32_d_pd(void); +void m68k_op_move_32_d_di(void); +void m68k_op_move_32_d_ix(void); +void m68k_op_move_32_d_aw(void); +void m68k_op_move_32_d_al(void); +void m68k_op_move_32_d_pcdi(void); +void m68k_op_move_32_d_pcix(void); +void m68k_op_move_32_d_i(void); +void m68k_op_move_32_ai_d(void); +void m68k_op_move_32_ai_a(void); +void m68k_op_move_32_ai_ai(void); +void m68k_op_move_32_ai_pi(void); +void m68k_op_move_32_ai_pd(void); +void m68k_op_move_32_ai_di(void); +void m68k_op_move_32_ai_ix(void); +void m68k_op_move_32_ai_aw(void); +void m68k_op_move_32_ai_al(void); +void m68k_op_move_32_ai_pcdi(void); +void m68k_op_move_32_ai_pcix(void); +void m68k_op_move_32_ai_i(void); +void m68k_op_move_32_pi_d(void); +void m68k_op_move_32_pi_a(void); +void m68k_op_move_32_pi_ai(void); +void m68k_op_move_32_pi_pi(void); +void m68k_op_move_32_pi_pd(void); +void m68k_op_move_32_pi_di(void); +void m68k_op_move_32_pi_ix(void); +void m68k_op_move_32_pi_aw(void); +void m68k_op_move_32_pi_al(void); +void m68k_op_move_32_pi_pcdi(void); +void m68k_op_move_32_pi_pcix(void); +void m68k_op_move_32_pi_i(void); +void m68k_op_move_32_pd_d(void); +void m68k_op_move_32_pd_a(void); +void m68k_op_move_32_pd_ai(void); +void m68k_op_move_32_pd_pi(void); +void m68k_op_move_32_pd_pd(void); +void m68k_op_move_32_pd_di(void); +void m68k_op_move_32_pd_ix(void); +void m68k_op_move_32_pd_aw(void); +void m68k_op_move_32_pd_al(void); +void m68k_op_move_32_pd_pcdi(void); +void m68k_op_move_32_pd_pcix(void); +void m68k_op_move_32_pd_i(void); +void m68k_op_move_32_di_d(void); +void m68k_op_move_32_di_a(void); +void m68k_op_move_32_di_ai(void); +void m68k_op_move_32_di_pi(void); +void m68k_op_move_32_di_pd(void); +void m68k_op_move_32_di_di(void); +void m68k_op_move_32_di_ix(void); +void m68k_op_move_32_di_aw(void); +void m68k_op_move_32_di_al(void); +void m68k_op_move_32_di_pcdi(void); +void m68k_op_move_32_di_pcix(void); +void m68k_op_move_32_di_i(void); +void m68k_op_move_32_ix_d(void); +void m68k_op_move_32_ix_a(void); +void m68k_op_move_32_ix_ai(void); +void m68k_op_move_32_ix_pi(void); +void m68k_op_move_32_ix_pd(void); +void m68k_op_move_32_ix_di(void); +void m68k_op_move_32_ix_ix(void); +void m68k_op_move_32_ix_aw(void); +void m68k_op_move_32_ix_al(void); +void m68k_op_move_32_ix_pcdi(void); +void m68k_op_move_32_ix_pcix(void); +void m68k_op_move_32_ix_i(void); +void m68k_op_move_32_aw_d(void); +void m68k_op_move_32_aw_a(void); +void m68k_op_move_32_aw_ai(void); +void m68k_op_move_32_aw_pi(void); +void m68k_op_move_32_aw_pd(void); +void m68k_op_move_32_aw_di(void); +void m68k_op_move_32_aw_ix(void); +void m68k_op_move_32_aw_aw(void); +void m68k_op_move_32_aw_al(void); +void m68k_op_move_32_aw_pcdi(void); +void m68k_op_move_32_aw_pcix(void); +void m68k_op_move_32_aw_i(void); +void m68k_op_move_32_al_d(void); +void m68k_op_move_32_al_a(void); +void m68k_op_move_32_al_ai(void); +void m68k_op_move_32_al_pi(void); +void m68k_op_move_32_al_pd(void); +void m68k_op_move_32_al_di(void); +void m68k_op_move_32_al_ix(void); +void m68k_op_move_32_al_aw(void); +void m68k_op_move_32_al_al(void); +void m68k_op_move_32_al_pcdi(void); +void m68k_op_move_32_al_pcix(void); +void m68k_op_move_32_al_i(void); +void m68k_op_movea_16_d(void); +void m68k_op_movea_16_a(void); +void m68k_op_movea_16_ai(void); +void m68k_op_movea_16_pi(void); +void m68k_op_movea_16_pd(void); +void m68k_op_movea_16_di(void); +void m68k_op_movea_16_ix(void); +void m68k_op_movea_16_aw(void); +void m68k_op_movea_16_al(void); +void m68k_op_movea_16_pcdi(void); +void m68k_op_movea_16_pcix(void); +void m68k_op_movea_16_i(void); +void m68k_op_movea_32_d(void); +void m68k_op_movea_32_a(void); +void m68k_op_movea_32_ai(void); +void m68k_op_movea_32_pi(void); +void m68k_op_movea_32_pd(void); +void m68k_op_movea_32_di(void); +void m68k_op_movea_32_ix(void); +void m68k_op_movea_32_aw(void); +void m68k_op_movea_32_al(void); +void m68k_op_movea_32_pcdi(void); +void m68k_op_movea_32_pcix(void); +void m68k_op_movea_32_i(void); +void m68k_op_move_16_frc_d(void); +void m68k_op_move_16_frc_ai(void); +void m68k_op_move_16_frc_pi(void); +void m68k_op_move_16_frc_pd(void); +void m68k_op_move_16_frc_di(void); +void m68k_op_move_16_frc_ix(void); +void m68k_op_move_16_frc_aw(void); +void m68k_op_move_16_frc_al(void); +void m68k_op_move_16_toc_d(void); +void m68k_op_move_16_toc_ai(void); +void m68k_op_move_16_toc_pi(void); +void m68k_op_move_16_toc_pd(void); +void m68k_op_move_16_toc_di(void); +void m68k_op_move_16_toc_ix(void); +void m68k_op_move_16_toc_aw(void); +void m68k_op_move_16_toc_al(void); +void m68k_op_move_16_toc_pcdi(void); +void m68k_op_move_16_toc_pcix(void); +void m68k_op_move_16_toc_i(void); +void m68k_op_move_16_frs_d(void); +void m68k_op_move_16_frs_ai(void); +void m68k_op_move_16_frs_pi(void); +void m68k_op_move_16_frs_pd(void); +void m68k_op_move_16_frs_di(void); +void m68k_op_move_16_frs_ix(void); +void m68k_op_move_16_frs_aw(void); +void m68k_op_move_16_frs_al(void); +void m68k_op_move_16_tos_d(void); +void m68k_op_move_16_tos_ai(void); +void m68k_op_move_16_tos_pi(void); +void m68k_op_move_16_tos_pd(void); +void m68k_op_move_16_tos_di(void); +void m68k_op_move_16_tos_ix(void); +void m68k_op_move_16_tos_aw(void); +void m68k_op_move_16_tos_al(void); +void m68k_op_move_16_tos_pcdi(void); +void m68k_op_move_16_tos_pcix(void); +void m68k_op_move_16_tos_i(void); +void m68k_op_move_32_fru(void); +void m68k_op_move_32_tou(void); +void m68k_op_movec_32_cr(void); +void m68k_op_movec_32_rc(void); +void m68k_op_movem_16_re_pd(void); +void m68k_op_movem_16_re_ai(void); +void m68k_op_movem_16_re_di(void); +void m68k_op_movem_16_re_ix(void); +void m68k_op_movem_16_re_aw(void); +void m68k_op_movem_16_re_al(void); +void m68k_op_movem_32_re_pd(void); +void m68k_op_movem_32_re_ai(void); +void m68k_op_movem_32_re_di(void); +void m68k_op_movem_32_re_ix(void); +void m68k_op_movem_32_re_aw(void); +void m68k_op_movem_32_re_al(void); +void m68k_op_movem_16_er_pi(void); +void m68k_op_movem_16_er_ai(void); +void m68k_op_movem_16_er_di(void); +void m68k_op_movem_16_er_ix(void); +void m68k_op_movem_16_er_aw(void); +void m68k_op_movem_16_er_al(void); +void m68k_op_movem_16_er_pcdi(void); +void m68k_op_movem_16_er_pcix(void); +void m68k_op_movem_32_er_pi(void); +void m68k_op_movem_32_er_ai(void); +void m68k_op_movem_32_er_di(void); +void m68k_op_movem_32_er_ix(void); +void m68k_op_movem_32_er_aw(void); +void m68k_op_movem_32_er_al(void); +void m68k_op_movem_32_er_pcdi(void); +void m68k_op_movem_32_er_pcix(void); +void m68k_op_movep_16_re(void); +void m68k_op_movep_32_re(void); +void m68k_op_movep_16_er(void); +void m68k_op_movep_32_er(void); +void m68k_op_moves_8_ai(void); +void m68k_op_moves_8_pi(void); +void m68k_op_moves_8_pi7(void); +void m68k_op_moves_8_pd(void); +void m68k_op_moves_8_pd7(void); +void m68k_op_moves_8_di(void); +void m68k_op_moves_8_ix(void); +void m68k_op_moves_8_aw(void); +void m68k_op_moves_8_al(void); +void m68k_op_moves_16_ai(void); +void m68k_op_moves_16_pi(void); +void m68k_op_moves_16_pd(void); +void m68k_op_moves_16_di(void); +void m68k_op_moves_16_ix(void); +void m68k_op_moves_16_aw(void); +void m68k_op_moves_16_al(void); +void m68k_op_moves_32_ai(void); +void m68k_op_moves_32_pi(void); +void m68k_op_moves_32_pd(void); +void m68k_op_moves_32_di(void); +void m68k_op_moves_32_ix(void); +void m68k_op_moves_32_aw(void); +void m68k_op_moves_32_al(void); +void m68k_op_moveq_32(void); +void m68k_op_muls_16_d(void); +void m68k_op_muls_16_ai(void); +void m68k_op_muls_16_pi(void); +void m68k_op_muls_16_pd(void); +void m68k_op_muls_16_di(void); +void m68k_op_muls_16_ix(void); +void m68k_op_muls_16_aw(void); +void m68k_op_muls_16_al(void); +void m68k_op_muls_16_pcdi(void); +void m68k_op_muls_16_pcix(void); +void m68k_op_muls_16_i(void); +void m68k_op_mulu_16_d(void); +void m68k_op_mulu_16_ai(void); +void m68k_op_mulu_16_pi(void); +void m68k_op_mulu_16_pd(void); +void m68k_op_mulu_16_di(void); +void m68k_op_mulu_16_ix(void); +void m68k_op_mulu_16_aw(void); +void m68k_op_mulu_16_al(void); +void m68k_op_mulu_16_pcdi(void); +void m68k_op_mulu_16_pcix(void); +void m68k_op_mulu_16_i(void); +void m68k_op_mull_32_d(void); +void m68k_op_mull_32_ai(void); +void m68k_op_mull_32_pi(void); +void m68k_op_mull_32_pd(void); +void m68k_op_mull_32_di(void); +void m68k_op_mull_32_ix(void); +void m68k_op_mull_32_aw(void); +void m68k_op_mull_32_al(void); +void m68k_op_mull_32_pcdi(void); +void m68k_op_mull_32_pcix(void); +void m68k_op_mull_32_i(void); +void m68k_op_nbcd_8_d(void); +void m68k_op_nbcd_8_ai(void); +void m68k_op_nbcd_8_pi(void); +void m68k_op_nbcd_8_pi7(void); +void m68k_op_nbcd_8_pd(void); +void m68k_op_nbcd_8_pd7(void); +void m68k_op_nbcd_8_di(void); +void m68k_op_nbcd_8_ix(void); +void m68k_op_nbcd_8_aw(void); +void m68k_op_nbcd_8_al(void); +void m68k_op_neg_8_d(void); +void m68k_op_neg_8_ai(void); +void m68k_op_neg_8_pi(void); +void m68k_op_neg_8_pi7(void); +void m68k_op_neg_8_pd(void); +void m68k_op_neg_8_pd7(void); +void m68k_op_neg_8_di(void); +void m68k_op_neg_8_ix(void); +void m68k_op_neg_8_aw(void); +void m68k_op_neg_8_al(void); +void m68k_op_neg_16_d(void); +void m68k_op_neg_16_ai(void); +void m68k_op_neg_16_pi(void); +void m68k_op_neg_16_pd(void); +void m68k_op_neg_16_di(void); +void m68k_op_neg_16_ix(void); +void m68k_op_neg_16_aw(void); +void m68k_op_neg_16_al(void); +void m68k_op_neg_32_d(void); +void m68k_op_neg_32_ai(void); +void m68k_op_neg_32_pi(void); +void m68k_op_neg_32_pd(void); +void m68k_op_neg_32_di(void); +void m68k_op_neg_32_ix(void); +void m68k_op_neg_32_aw(void); +void m68k_op_neg_32_al(void); +void m68k_op_negx_8_d(void); +void m68k_op_negx_8_ai(void); +void m68k_op_negx_8_pi(void); +void m68k_op_negx_8_pi7(void); +void m68k_op_negx_8_pd(void); +void m68k_op_negx_8_pd7(void); +void m68k_op_negx_8_di(void); +void m68k_op_negx_8_ix(void); +void m68k_op_negx_8_aw(void); +void m68k_op_negx_8_al(void); +void m68k_op_negx_16_d(void); +void m68k_op_negx_16_ai(void); +void m68k_op_negx_16_pi(void); +void m68k_op_negx_16_pd(void); +void m68k_op_negx_16_di(void); +void m68k_op_negx_16_ix(void); +void m68k_op_negx_16_aw(void); +void m68k_op_negx_16_al(void); +void m68k_op_negx_32_d(void); +void m68k_op_negx_32_ai(void); +void m68k_op_negx_32_pi(void); +void m68k_op_negx_32_pd(void); +void m68k_op_negx_32_di(void); +void m68k_op_negx_32_ix(void); +void m68k_op_negx_32_aw(void); +void m68k_op_negx_32_al(void); +void m68k_op_nop(void); +void m68k_op_not_8_d(void); +void m68k_op_not_8_ai(void); +void m68k_op_not_8_pi(void); +void m68k_op_not_8_pi7(void); +void m68k_op_not_8_pd(void); +void m68k_op_not_8_pd7(void); +void m68k_op_not_8_di(void); +void m68k_op_not_8_ix(void); +void m68k_op_not_8_aw(void); +void m68k_op_not_8_al(void); +void m68k_op_not_16_d(void); +void m68k_op_not_16_ai(void); +void m68k_op_not_16_pi(void); +void m68k_op_not_16_pd(void); +void m68k_op_not_16_di(void); +void m68k_op_not_16_ix(void); +void m68k_op_not_16_aw(void); +void m68k_op_not_16_al(void); +void m68k_op_not_32_d(void); +void m68k_op_not_32_ai(void); +void m68k_op_not_32_pi(void); +void m68k_op_not_32_pd(void); +void m68k_op_not_32_di(void); +void m68k_op_not_32_ix(void); +void m68k_op_not_32_aw(void); +void m68k_op_not_32_al(void); +void m68k_op_or_8_er_d(void); +void m68k_op_or_8_er_ai(void); +void m68k_op_or_8_er_pi(void); +void m68k_op_or_8_er_pi7(void); +void m68k_op_or_8_er_pd(void); +void m68k_op_or_8_er_pd7(void); +void m68k_op_or_8_er_di(void); +void m68k_op_or_8_er_ix(void); +void m68k_op_or_8_er_aw(void); +void m68k_op_or_8_er_al(void); +void m68k_op_or_8_er_pcdi(void); +void m68k_op_or_8_er_pcix(void); +void m68k_op_or_8_er_i(void); +void m68k_op_or_16_er_d(void); +void m68k_op_or_16_er_ai(void); +void m68k_op_or_16_er_pi(void); +void m68k_op_or_16_er_pd(void); +void m68k_op_or_16_er_di(void); +void m68k_op_or_16_er_ix(void); +void m68k_op_or_16_er_aw(void); +void m68k_op_or_16_er_al(void); +void m68k_op_or_16_er_pcdi(void); +void m68k_op_or_16_er_pcix(void); +void m68k_op_or_16_er_i(void); +void m68k_op_or_32_er_d(void); +void m68k_op_or_32_er_ai(void); +void m68k_op_or_32_er_pi(void); +void m68k_op_or_32_er_pd(void); +void m68k_op_or_32_er_di(void); +void m68k_op_or_32_er_ix(void); +void m68k_op_or_32_er_aw(void); +void m68k_op_or_32_er_al(void); +void m68k_op_or_32_er_pcdi(void); +void m68k_op_or_32_er_pcix(void); +void m68k_op_or_32_er_i(void); +void m68k_op_or_8_re_ai(void); +void m68k_op_or_8_re_pi(void); +void m68k_op_or_8_re_pi7(void); +void m68k_op_or_8_re_pd(void); +void m68k_op_or_8_re_pd7(void); +void m68k_op_or_8_re_di(void); +void m68k_op_or_8_re_ix(void); +void m68k_op_or_8_re_aw(void); +void m68k_op_or_8_re_al(void); +void m68k_op_or_16_re_ai(void); +void m68k_op_or_16_re_pi(void); +void m68k_op_or_16_re_pd(void); +void m68k_op_or_16_re_di(void); +void m68k_op_or_16_re_ix(void); +void m68k_op_or_16_re_aw(void); +void m68k_op_or_16_re_al(void); +void m68k_op_or_32_re_ai(void); +void m68k_op_or_32_re_pi(void); +void m68k_op_or_32_re_pd(void); +void m68k_op_or_32_re_di(void); +void m68k_op_or_32_re_ix(void); +void m68k_op_or_32_re_aw(void); +void m68k_op_or_32_re_al(void); +void m68k_op_ori_8_d(void); +void m68k_op_ori_8_ai(void); +void m68k_op_ori_8_pi(void); +void m68k_op_ori_8_pi7(void); +void m68k_op_ori_8_pd(void); +void m68k_op_ori_8_pd7(void); +void m68k_op_ori_8_di(void); +void m68k_op_ori_8_ix(void); +void m68k_op_ori_8_aw(void); +void m68k_op_ori_8_al(void); +void m68k_op_ori_16_d(void); +void m68k_op_ori_16_ai(void); +void m68k_op_ori_16_pi(void); +void m68k_op_ori_16_pd(void); +void m68k_op_ori_16_di(void); +void m68k_op_ori_16_ix(void); +void m68k_op_ori_16_aw(void); +void m68k_op_ori_16_al(void); +void m68k_op_ori_32_d(void); +void m68k_op_ori_32_ai(void); +void m68k_op_ori_32_pi(void); +void m68k_op_ori_32_pd(void); +void m68k_op_ori_32_di(void); +void m68k_op_ori_32_ix(void); +void m68k_op_ori_32_aw(void); +void m68k_op_ori_32_al(void); +void m68k_op_ori_16_toc(void); +void m68k_op_ori_16_tos(void); +void m68k_op_pack_16_rr(void); +void m68k_op_pack_16_mm_ax7(void); +void m68k_op_pack_16_mm_ay7(void); +void m68k_op_pack_16_mm_axy7(void); +void m68k_op_pack_16_mm(void); +void m68k_op_pea_32_ai(void); +void m68k_op_pea_32_di(void); +void m68k_op_pea_32_ix(void); +void m68k_op_pea_32_aw(void); +void m68k_op_pea_32_al(void); +void m68k_op_pea_32_pcdi(void); +void m68k_op_pea_32_pcix(void); +void m68k_op_reset(void); +void m68k_op_ror_8_s(void); +void m68k_op_ror_16_s(void); +void m68k_op_ror_32_s(void); +void m68k_op_ror_8_r(void); +void m68k_op_ror_16_r(void); +void m68k_op_ror_32_r(void); +void m68k_op_ror_16_ai(void); +void m68k_op_ror_16_pi(void); +void m68k_op_ror_16_pd(void); +void m68k_op_ror_16_di(void); +void m68k_op_ror_16_ix(void); +void m68k_op_ror_16_aw(void); +void m68k_op_ror_16_al(void); +void m68k_op_rol_8_s(void); +void m68k_op_rol_16_s(void); +void m68k_op_rol_32_s(void); +void m68k_op_rol_8_r(void); +void m68k_op_rol_16_r(void); +void m68k_op_rol_32_r(void); +void m68k_op_rol_16_ai(void); +void m68k_op_rol_16_pi(void); +void m68k_op_rol_16_pd(void); +void m68k_op_rol_16_di(void); +void m68k_op_rol_16_ix(void); +void m68k_op_rol_16_aw(void); +void m68k_op_rol_16_al(void); +void m68k_op_roxr_8_s(void); +void m68k_op_roxr_16_s(void); +void m68k_op_roxr_32_s(void); +void m68k_op_roxr_8_r(void); +void m68k_op_roxr_16_r(void); +void m68k_op_roxr_32_r(void); +void m68k_op_roxr_16_ai(void); +void m68k_op_roxr_16_pi(void); +void m68k_op_roxr_16_pd(void); +void m68k_op_roxr_16_di(void); +void m68k_op_roxr_16_ix(void); +void m68k_op_roxr_16_aw(void); +void m68k_op_roxr_16_al(void); +void m68k_op_roxl_8_s(void); +void m68k_op_roxl_16_s(void); +void m68k_op_roxl_32_s(void); +void m68k_op_roxl_8_r(void); +void m68k_op_roxl_16_r(void); +void m68k_op_roxl_32_r(void); +void m68k_op_roxl_16_ai(void); +void m68k_op_roxl_16_pi(void); +void m68k_op_roxl_16_pd(void); +void m68k_op_roxl_16_di(void); +void m68k_op_roxl_16_ix(void); +void m68k_op_roxl_16_aw(void); +void m68k_op_roxl_16_al(void); +void m68k_op_rtd_32(void); +void m68k_op_rte_32(void); +void m68k_op_rtm_32(void); +void m68k_op_rtr_32(void); +void m68k_op_rts_32(void); +void m68k_op_sbcd_8_rr(void); +void m68k_op_sbcd_8_mm_ax7(void); +void m68k_op_sbcd_8_mm_ay7(void); +void m68k_op_sbcd_8_mm_axy7(void); +void m68k_op_sbcd_8_mm(void); +void m68k_op_st_8_d(void); +void m68k_op_st_8_ai(void); +void m68k_op_st_8_pi(void); +void m68k_op_st_8_pi7(void); +void m68k_op_st_8_pd(void); +void m68k_op_st_8_pd7(void); +void m68k_op_st_8_di(void); +void m68k_op_st_8_ix(void); +void m68k_op_st_8_aw(void); +void m68k_op_st_8_al(void); +void m68k_op_sf_8_d(void); +void m68k_op_sf_8_ai(void); +void m68k_op_sf_8_pi(void); +void m68k_op_sf_8_pi7(void); +void m68k_op_sf_8_pd(void); +void m68k_op_sf_8_pd7(void); +void m68k_op_sf_8_di(void); +void m68k_op_sf_8_ix(void); +void m68k_op_sf_8_aw(void); +void m68k_op_sf_8_al(void); +void m68k_op_shi_8_d(void); +void m68k_op_sls_8_d(void); +void m68k_op_scc_8_d(void); +void m68k_op_scs_8_d(void); +void m68k_op_sne_8_d(void); +void m68k_op_seq_8_d(void); +void m68k_op_svc_8_d(void); +void m68k_op_svs_8_d(void); +void m68k_op_spl_8_d(void); +void m68k_op_smi_8_d(void); +void m68k_op_sge_8_d(void); +void m68k_op_slt_8_d(void); +void m68k_op_sgt_8_d(void); +void m68k_op_sle_8_d(void); +void m68k_op_shi_8_ai(void); +void m68k_op_shi_8_pi(void); +void m68k_op_shi_8_pi7(void); +void m68k_op_shi_8_pd(void); +void m68k_op_shi_8_pd7(void); +void m68k_op_shi_8_di(void); +void m68k_op_shi_8_ix(void); +void m68k_op_shi_8_aw(void); +void m68k_op_shi_8_al(void); +void m68k_op_sls_8_ai(void); +void m68k_op_sls_8_pi(void); +void m68k_op_sls_8_pi7(void); +void m68k_op_sls_8_pd(void); +void m68k_op_sls_8_pd7(void); +void m68k_op_sls_8_di(void); +void m68k_op_sls_8_ix(void); +void m68k_op_sls_8_aw(void); +void m68k_op_sls_8_al(void); +void m68k_op_scc_8_ai(void); +void m68k_op_scc_8_pi(void); +void m68k_op_scc_8_pi7(void); +void m68k_op_scc_8_pd(void); +void m68k_op_scc_8_pd7(void); +void m68k_op_scc_8_di(void); +void m68k_op_scc_8_ix(void); +void m68k_op_scc_8_aw(void); +void m68k_op_scc_8_al(void); +void m68k_op_scs_8_ai(void); +void m68k_op_scs_8_pi(void); +void m68k_op_scs_8_pi7(void); +void m68k_op_scs_8_pd(void); +void m68k_op_scs_8_pd7(void); +void m68k_op_scs_8_di(void); +void m68k_op_scs_8_ix(void); +void m68k_op_scs_8_aw(void); +void m68k_op_scs_8_al(void); +void m68k_op_sne_8_ai(void); +void m68k_op_sne_8_pi(void); +void m68k_op_sne_8_pi7(void); +void m68k_op_sne_8_pd(void); +void m68k_op_sne_8_pd7(void); +void m68k_op_sne_8_di(void); +void m68k_op_sne_8_ix(void); +void m68k_op_sne_8_aw(void); +void m68k_op_sne_8_al(void); +void m68k_op_seq_8_ai(void); +void m68k_op_seq_8_pi(void); +void m68k_op_seq_8_pi7(void); +void m68k_op_seq_8_pd(void); +void m68k_op_seq_8_pd7(void); +void m68k_op_seq_8_di(void); +void m68k_op_seq_8_ix(void); +void m68k_op_seq_8_aw(void); +void m68k_op_seq_8_al(void); +void m68k_op_svc_8_ai(void); +void m68k_op_svc_8_pi(void); +void m68k_op_svc_8_pi7(void); +void m68k_op_svc_8_pd(void); +void m68k_op_svc_8_pd7(void); +void m68k_op_svc_8_di(void); +void m68k_op_svc_8_ix(void); +void m68k_op_svc_8_aw(void); +void m68k_op_svc_8_al(void); +void m68k_op_svs_8_ai(void); +void m68k_op_svs_8_pi(void); +void m68k_op_svs_8_pi7(void); +void m68k_op_svs_8_pd(void); +void m68k_op_svs_8_pd7(void); +void m68k_op_svs_8_di(void); +void m68k_op_svs_8_ix(void); +void m68k_op_svs_8_aw(void); +void m68k_op_svs_8_al(void); +void m68k_op_spl_8_ai(void); +void m68k_op_spl_8_pi(void); +void m68k_op_spl_8_pi7(void); +void m68k_op_spl_8_pd(void); +void m68k_op_spl_8_pd7(void); +void m68k_op_spl_8_di(void); +void m68k_op_spl_8_ix(void); +void m68k_op_spl_8_aw(void); +void m68k_op_spl_8_al(void); +void m68k_op_smi_8_ai(void); +void m68k_op_smi_8_pi(void); +void m68k_op_smi_8_pi7(void); +void m68k_op_smi_8_pd(void); +void m68k_op_smi_8_pd7(void); +void m68k_op_smi_8_di(void); +void m68k_op_smi_8_ix(void); +void m68k_op_smi_8_aw(void); +void m68k_op_smi_8_al(void); +void m68k_op_sge_8_ai(void); +void m68k_op_sge_8_pi(void); +void m68k_op_sge_8_pi7(void); +void m68k_op_sge_8_pd(void); +void m68k_op_sge_8_pd7(void); +void m68k_op_sge_8_di(void); +void m68k_op_sge_8_ix(void); +void m68k_op_sge_8_aw(void); +void m68k_op_sge_8_al(void); +void m68k_op_slt_8_ai(void); +void m68k_op_slt_8_pi(void); +void m68k_op_slt_8_pi7(void); +void m68k_op_slt_8_pd(void); +void m68k_op_slt_8_pd7(void); +void m68k_op_slt_8_di(void); +void m68k_op_slt_8_ix(void); +void m68k_op_slt_8_aw(void); +void m68k_op_slt_8_al(void); +void m68k_op_sgt_8_ai(void); +void m68k_op_sgt_8_pi(void); +void m68k_op_sgt_8_pi7(void); +void m68k_op_sgt_8_pd(void); +void m68k_op_sgt_8_pd7(void); +void m68k_op_sgt_8_di(void); +void m68k_op_sgt_8_ix(void); +void m68k_op_sgt_8_aw(void); +void m68k_op_sgt_8_al(void); +void m68k_op_sle_8_ai(void); +void m68k_op_sle_8_pi(void); +void m68k_op_sle_8_pi7(void); +void m68k_op_sle_8_pd(void); +void m68k_op_sle_8_pd7(void); +void m68k_op_sle_8_di(void); +void m68k_op_sle_8_ix(void); +void m68k_op_sle_8_aw(void); +void m68k_op_sle_8_al(void); +void m68k_op_stop(void); +void m68k_op_sub_8_er_d(void); +void m68k_op_sub_8_er_ai(void); +void m68k_op_sub_8_er_pi(void); +void m68k_op_sub_8_er_pi7(void); +void m68k_op_sub_8_er_pd(void); +void m68k_op_sub_8_er_pd7(void); +void m68k_op_sub_8_er_di(void); +void m68k_op_sub_8_er_ix(void); +void m68k_op_sub_8_er_aw(void); +void m68k_op_sub_8_er_al(void); +void m68k_op_sub_8_er_pcdi(void); +void m68k_op_sub_8_er_pcix(void); +void m68k_op_sub_8_er_i(void); +void m68k_op_sub_16_er_d(void); +void m68k_op_sub_16_er_a(void); +void m68k_op_sub_16_er_ai(void); +void m68k_op_sub_16_er_pi(void); +void m68k_op_sub_16_er_pd(void); +void m68k_op_sub_16_er_di(void); +void m68k_op_sub_16_er_ix(void); +void m68k_op_sub_16_er_aw(void); +void m68k_op_sub_16_er_al(void); +void m68k_op_sub_16_er_pcdi(void); +void m68k_op_sub_16_er_pcix(void); +void m68k_op_sub_16_er_i(void); +void m68k_op_sub_32_er_d(void); +void m68k_op_sub_32_er_a(void); +void m68k_op_sub_32_er_ai(void); +void m68k_op_sub_32_er_pi(void); +void m68k_op_sub_32_er_pd(void); +void m68k_op_sub_32_er_di(void); +void m68k_op_sub_32_er_ix(void); +void m68k_op_sub_32_er_aw(void); +void m68k_op_sub_32_er_al(void); +void m68k_op_sub_32_er_pcdi(void); +void m68k_op_sub_32_er_pcix(void); +void m68k_op_sub_32_er_i(void); +void m68k_op_sub_8_re_ai(void); +void m68k_op_sub_8_re_pi(void); +void m68k_op_sub_8_re_pi7(void); +void m68k_op_sub_8_re_pd(void); +void m68k_op_sub_8_re_pd7(void); +void m68k_op_sub_8_re_di(void); +void m68k_op_sub_8_re_ix(void); +void m68k_op_sub_8_re_aw(void); +void m68k_op_sub_8_re_al(void); +void m68k_op_sub_16_re_ai(void); +void m68k_op_sub_16_re_pi(void); +void m68k_op_sub_16_re_pd(void); +void m68k_op_sub_16_re_di(void); +void m68k_op_sub_16_re_ix(void); +void m68k_op_sub_16_re_aw(void); +void m68k_op_sub_16_re_al(void); +void m68k_op_sub_32_re_ai(void); +void m68k_op_sub_32_re_pi(void); +void m68k_op_sub_32_re_pd(void); +void m68k_op_sub_32_re_di(void); +void m68k_op_sub_32_re_ix(void); +void m68k_op_sub_32_re_aw(void); +void m68k_op_sub_32_re_al(void); +void m68k_op_suba_16_d(void); +void m68k_op_suba_16_a(void); +void m68k_op_suba_16_ai(void); +void m68k_op_suba_16_pi(void); +void m68k_op_suba_16_pd(void); +void m68k_op_suba_16_di(void); +void m68k_op_suba_16_ix(void); +void m68k_op_suba_16_aw(void); +void m68k_op_suba_16_al(void); +void m68k_op_suba_16_pcdi(void); +void m68k_op_suba_16_pcix(void); +void m68k_op_suba_16_i(void); +void m68k_op_suba_32_d(void); +void m68k_op_suba_32_a(void); +void m68k_op_suba_32_ai(void); +void m68k_op_suba_32_pi(void); +void m68k_op_suba_32_pd(void); +void m68k_op_suba_32_di(void); +void m68k_op_suba_32_ix(void); +void m68k_op_suba_32_aw(void); +void m68k_op_suba_32_al(void); +void m68k_op_suba_32_pcdi(void); +void m68k_op_suba_32_pcix(void); +void m68k_op_suba_32_i(void); +void m68k_op_subi_8_d(void); +void m68k_op_subi_8_ai(void); +void m68k_op_subi_8_pi(void); +void m68k_op_subi_8_pi7(void); +void m68k_op_subi_8_pd(void); +void m68k_op_subi_8_pd7(void); +void m68k_op_subi_8_di(void); +void m68k_op_subi_8_ix(void); +void m68k_op_subi_8_aw(void); +void m68k_op_subi_8_al(void); +void m68k_op_subi_16_d(void); +void m68k_op_subi_16_ai(void); +void m68k_op_subi_16_pi(void); +void m68k_op_subi_16_pd(void); +void m68k_op_subi_16_di(void); +void m68k_op_subi_16_ix(void); +void m68k_op_subi_16_aw(void); +void m68k_op_subi_16_al(void); +void m68k_op_subi_32_d(void); +void m68k_op_subi_32_ai(void); +void m68k_op_subi_32_pi(void); +void m68k_op_subi_32_pd(void); +void m68k_op_subi_32_di(void); +void m68k_op_subi_32_ix(void); +void m68k_op_subi_32_aw(void); +void m68k_op_subi_32_al(void); +void m68k_op_subq_8_d(void); +void m68k_op_subq_8_ai(void); +void m68k_op_subq_8_pi(void); +void m68k_op_subq_8_pi7(void); +void m68k_op_subq_8_pd(void); +void m68k_op_subq_8_pd7(void); +void m68k_op_subq_8_di(void); +void m68k_op_subq_8_ix(void); +void m68k_op_subq_8_aw(void); +void m68k_op_subq_8_al(void); +void m68k_op_subq_16_d(void); +void m68k_op_subq_16_a(void); +void m68k_op_subq_16_ai(void); +void m68k_op_subq_16_pi(void); +void m68k_op_subq_16_pd(void); +void m68k_op_subq_16_di(void); +void m68k_op_subq_16_ix(void); +void m68k_op_subq_16_aw(void); +void m68k_op_subq_16_al(void); +void m68k_op_subq_32_d(void); +void m68k_op_subq_32_a(void); +void m68k_op_subq_32_ai(void); +void m68k_op_subq_32_pi(void); +void m68k_op_subq_32_pd(void); +void m68k_op_subq_32_di(void); +void m68k_op_subq_32_ix(void); +void m68k_op_subq_32_aw(void); +void m68k_op_subq_32_al(void); +void m68k_op_subx_8_rr(void); +void m68k_op_subx_16_rr(void); +void m68k_op_subx_32_rr(void); +void m68k_op_subx_8_mm_ax7(void); +void m68k_op_subx_8_mm_ay7(void); +void m68k_op_subx_8_mm_axy7(void); +void m68k_op_subx_8_mm(void); +void m68k_op_subx_16_mm(void); +void m68k_op_subx_32_mm(void); +void m68k_op_swap_32(void); +void m68k_op_tas_8_d(void); +void m68k_op_tas_8_ai(void); +void m68k_op_tas_8_pi(void); +void m68k_op_tas_8_pi7(void); +void m68k_op_tas_8_pd(void); +void m68k_op_tas_8_pd7(void); +void m68k_op_tas_8_di(void); +void m68k_op_tas_8_ix(void); +void m68k_op_tas_8_aw(void); +void m68k_op_tas_8_al(void); +void m68k_op_trap(void); +void m68k_op_trapt(void); +void m68k_op_trapt_16(void); +void m68k_op_trapt_32(void); +void m68k_op_trapf(void); +void m68k_op_trapf_16(void); +void m68k_op_trapf_32(void); +void m68k_op_traphi(void); +void m68k_op_trapls(void); +void m68k_op_trapcc(void); +void m68k_op_trapcs(void); +void m68k_op_trapne(void); +void m68k_op_trapeq(void); +void m68k_op_trapvc(void); +void m68k_op_trapvs(void); +void m68k_op_trappl(void); +void m68k_op_trapmi(void); +void m68k_op_trapge(void); +void m68k_op_traplt(void); +void m68k_op_trapgt(void); +void m68k_op_traple(void); +void m68k_op_traphi_16(void); +void m68k_op_trapls_16(void); +void m68k_op_trapcc_16(void); +void m68k_op_trapcs_16(void); +void m68k_op_trapne_16(void); +void m68k_op_trapeq_16(void); +void m68k_op_trapvc_16(void); +void m68k_op_trapvs_16(void); +void m68k_op_trappl_16(void); +void m68k_op_trapmi_16(void); +void m68k_op_trapge_16(void); +void m68k_op_traplt_16(void); +void m68k_op_trapgt_16(void); +void m68k_op_traple_16(void); +void m68k_op_traphi_32(void); +void m68k_op_trapls_32(void); +void m68k_op_trapcc_32(void); +void m68k_op_trapcs_32(void); +void m68k_op_trapne_32(void); +void m68k_op_trapeq_32(void); +void m68k_op_trapvc_32(void); +void m68k_op_trapvs_32(void); +void m68k_op_trappl_32(void); +void m68k_op_trapmi_32(void); +void m68k_op_trapge_32(void); +void m68k_op_traplt_32(void); +void m68k_op_trapgt_32(void); +void m68k_op_traple_32(void); +void m68k_op_trapv(void); +void m68k_op_tst_8_d(void); +void m68k_op_tst_8_ai(void); +void m68k_op_tst_8_pi(void); +void m68k_op_tst_8_pi7(void); +void m68k_op_tst_8_pd(void); +void m68k_op_tst_8_pd7(void); +void m68k_op_tst_8_di(void); +void m68k_op_tst_8_ix(void); +void m68k_op_tst_8_aw(void); +void m68k_op_tst_8_al(void); +void m68k_op_tst_8_pcdi(void); +void m68k_op_tst_8_pcix(void); +void m68k_op_tst_8_i(void); +void m68k_op_tst_16_d(void); +void m68k_op_tst_16_a(void); +void m68k_op_tst_16_ai(void); +void m68k_op_tst_16_pi(void); +void m68k_op_tst_16_pd(void); +void m68k_op_tst_16_di(void); +void m68k_op_tst_16_ix(void); +void m68k_op_tst_16_aw(void); +void m68k_op_tst_16_al(void); +void m68k_op_tst_16_pcdi(void); +void m68k_op_tst_16_pcix(void); +void m68k_op_tst_16_i(void); +void m68k_op_tst_32_d(void); +void m68k_op_tst_32_a(void); +void m68k_op_tst_32_ai(void); +void m68k_op_tst_32_pi(void); +void m68k_op_tst_32_pd(void); +void m68k_op_tst_32_di(void); +void m68k_op_tst_32_ix(void); +void m68k_op_tst_32_aw(void); +void m68k_op_tst_32_al(void); +void m68k_op_tst_32_pcdi(void); +void m68k_op_tst_32_pcix(void); +void m68k_op_tst_32_i(void); +void m68k_op_unlk_32_a7(void); +void m68k_op_unlk_32(void); +void m68k_op_unpk_16_rr(void); +void m68k_op_unpk_16_mm_ax7(void); +void m68k_op_unpk_16_mm_ay7(void); +void m68k_op_unpk_16_mm_axy7(void); +void m68k_op_unpk_16_mm(void); +/* Build the opcode handler table */ +void m68ki_build_opcode_table(void); + +extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */ +extern unsigned char m68ki_cycles[][0x10000]; + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KOPS__HEADER */ + + diff --git a/AltairZ80/m68ksim.c b/AltairZ80/m68ksim.c new file mode 100644 index 00000000..f0686233 --- /dev/null +++ b/AltairZ80/m68ksim.c @@ -0,0 +1,543 @@ +/* m68kcpmsim.c: CP/M for Motorola 68000 definitions + + Copyright (c) 2014, Peter Schorn + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + PETER SCHORN BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of Peter Schorn shall not + be used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from Peter Schorn. + + Based on work by David W. Schultz http://home.earthlink.net/~david.schultz (c) 2014 + + + MC68000 simulation tailored to support CP/M-68K. It includes: + + 16MB of memory. (Flat, function codes and address space types ignored.) + + Console I/O using a MC6850 like serial port with interrupts. + + Simulated disk system: + + Since the intent is to support CP/M-68K and it does disk I/O in 128 byte + chunks, so will this. Control is via several registers mapped into memory: + + Offset Function Description + 0 DMA address to read/write data to + 4 drive select disk drive + 8 read sector sector (128 byte) offset on disk + 12 write sector sector (128 byte) offset on disk + 16 status read status of operation + + Operation is simple: Set the drive and DMA address and then write the + sector number to the sector register. This write triggers the requested + operation. The status of the operation can be determined by reading the + status register. + A zero indicates that no error occured. + + Note that these operations invoke read() and write() system calls directly + so that they will alter the image on the hard disk. KEEP BACKUPS! + + In addition Linux will buffer the writes so they may note be really complete + for a while. The BIOS flush function invokes a fsync on all open files. + + There are two options for booting CPM: + + S-records: This loads CPM in two parts. The first is in cpm400.bin which + is created from the srecords in cpm400.sr. The second is in simbios.bin + which contains the BIOS. Both of these files must be binaries and not + srecords. + + If you want to alter the bios, rebuild simbios.bin using: + + asl simbios.s + p2bin simbios.p + + Use altairz80 cpm68k_s to boot. + + Boot track: A CPM loader is in the boot track of simulated drive C. 32K of + data is loaded from that file to memory starting at $400. + + Use altairz80 cpm68k to boot. + + */ + +#include "m68k.h" + +/* Read/write macros */ +#define READ_BYTE(BASE, ADDR) (BASE)[ADDR] +#define READ_WORD(BASE, ADDR) (((BASE)[ADDR] << 8) | \ + (BASE)[(ADDR) + 1]) +#define READ_LONG(BASE, ADDR) (((BASE)[ADDR] << 24) | \ + ((BASE)[(ADDR) + 1] << 16) | \ + ((BASE)[(ADDR) + 2] << 8) | \ + (BASE)[(ADDR) + 3]) + +#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[ADDR] = (VAL) & 0xff +#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL) >> 8) & 0xff; \ + (BASE)[(ADDR)+1] = (VAL)&0xff +#define WRITE_LONG(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL) >> 24) & 0xff; \ + (BASE)[(ADDR) + 1] = ((VAL) >> 16) & 0xff; \ + (BASE)[(ADDR) + 2] = ((VAL) >> 8) & 0xff; \ + (BASE)[(ADDR) + 3] = (VAL) & 0xff + +/* Memory-mapped IO ports */ + +/* 6850 serial port like thing. Implements a reduced set of functionallity. */ +#define MC6850_STAT 0xff1000L // command/status register +#define MC6850_DATA 0xff1002L // receive/transmit data register + +/* Memory mapped disk system */ +#define DISK_BASE 0xff0000L +#define DISK_SET_DMA (DISK_BASE) +#define DISK_SET_DRIVE (DISK_BASE + 4) +#define DISK_SET_SECTOR (DISK_BASE + 8) +#define DISK_READ (DISK_BASE + 12) +#define DISK_WRITE (DISK_BASE + 16) +#define DISK_STATUS (DISK_BASE + 20) +#define DISK_FLUSH (DISK_BASE + 24) + +/* Miscellaneous */ +#define M68K_GET_TIME (0xff7ff8) // read long to get time in seconds +#define M68K_STOP_CPU (0xff7ffc) // write long to stop CPU and return to SIMH prompt + +/* IRQ connections */ +#define IRQ_NMI_DEVICE 7 +#define IRQ_MC6850 5 + +extern uint32 PCX; + +/* Prototypes */ +static void MC6850_reset(void); +static void m68k_input_device_update(void); +static int nmi_device_ack(void); +static void int_controller_set(uint32 value); +static void int_controller_clear(uint32 value); + +/* Data */ +static int m68k_MC6850_control = 0; /* MC6850 control register */ +static int m68k_MC6850_status = 2; /* MC6850 status register */ +static t_stat keyboardCharacter; /* one character buffer */ +static t_bool characterAvailable = FALSE; /* buffer initially empty */ + +static uint32 m68k_int_controller_pending = 0; /* list of pending interrupts */ +static uint32 m68k_int_controller_highest_int = 0; /* Highest pending interrupt */ + +static uint8 m68k_ram[M68K_MAX_RAM + 1]; /* RAM */ + +/* Interface to HDSK device */ +extern void hdsk_prepareRead(void); +extern void hdsk_prepareWrite(void); +extern void hdsk_setSelectedDisk(const int32 disk); +extern void hdsk_setSelectedSector(const int32 sector); +extern void hdsk_setSelectedTrack(const int32 track); +extern void hdsk_setSelectedDMA(const int32 dma); +extern int32 hdsk_getStatus(void); +extern t_bool hdsk_checkParameters(void); +extern int32 hdsk_read(void); +extern int32 hdsk_write(void); +extern int32 hdsk_flush(void); + +static uint32 m68k_fc; /* Current function code from CPU */ + +extern uint32 m68k_registers[M68K_REG_CPU_TYPE + 1]; +extern UNIT cpu_unit; + +#define M68K_BOOT_LENGTH (32 * 1024) /* size of bootstrap */ +#define M68K_BOOT_PC 0x000400 /* initial PC for boot */ +#define M68K_BOOT_SP 0xfe0000 /* initial SP for boot */ + +t_stat m68k_hdsk_boot(const int32 unitno, DEVICE *dptr, + const uint32 verboseMessage, const uint32 hdskNumber) { + UNIT *uptr; + size_t i; + + if ((unitno < 0) || (unitno >= hdskNumber)) + return SCPE_ARG; + + uptr = (dptr -> units) + unitno; + if (((uptr -> flags) & UNIT_ATT) == 0) { + sim_debug(verboseMessage, dptr, "HDSK%d: Boot drive is not attached.\n", unitno); + return SCPE_ARG; + } + + if (sim_fseek(uptr -> fileref, 0, SEEK_SET) != 0) { + sim_debug(verboseMessage, dptr, "HDSK%d: Boot error seeking start.\n", unitno); + return SCPE_ARG; + } + + i = sim_fread(&m68k_ram[M68K_BOOT_PC], 1, M68K_BOOT_LENGTH, uptr -> fileref); + if (i != M68K_BOOT_LENGTH) { + sim_debug(verboseMessage, dptr, + "HDSK%d: Error: Failed to read %i bytes from boot drive.\n", + unitno, M68K_BOOT_LENGTH); + return SCPE_ARG; + } + + // Now put in values for the stack and PC vectors + WRITE_LONG(m68k_ram, 0, M68K_BOOT_SP); // SP + WRITE_LONG(m68k_ram, 4, M68K_BOOT_PC); // PC + m68k_pulse_reset(); // also calls MC6850_reset() + m68k_CPUToView(); + return SCPE_OK; +} + +void m68k_CPUToView(void) { + uint32 reg; + for (reg = M68K_REG_D0; reg <= M68K_REG_CPU_TYPE; reg++) + m68k_registers[reg] = m68k_get_reg(NULL, reg); +} + +void m68k_viewToCPU(void) { + uint32 reg; + for (reg = M68K_REG_D0; reg <= M68K_REG_CPU_TYPE; reg++) + m68k_set_reg(reg, m68k_registers[reg]); +} + +t_stat sim_instr_m68k(void) { + t_stat reason = SCPE_OK; + m68k_viewToCPU(); + while (TRUE) { + if (sim_interval <= 0) { /* check clock queue */ +#if !UNIX_PLATFORM + if ((reason = sim_poll_kbd()) == SCPE_STOP) /* poll on platforms without reliable + signalling */ + break; +#endif + if ((reason = sim_process_event())) + break; + m68k_input_device_update(); + } + if (sim_brk_summ && sim_brk_test(m68k_get_reg(NULL, M68K_REG_PC), SWMASK('E'))) { + /* breakpoint? */ + reason = STOP_IBKPT; /* stop simulation */ + break; + } + PCX = m68k_get_reg(NULL, M68K_REG_PC); + sim_interval--; + m68k_execute(1); + if (stop_cpu) { + reason = SCPE_STOP; + break; + } + } + m68k_CPUToView(); + return reason; +} + +void m68k_clear_memory(void ) { + uint32 i; + for (i = 0; i <= M68K_MAX_RAM; i++) + m68k_ram[i] = 0; +} + +void m68k_cpu_reset(void) { + WRITE_LONG(m68k_ram, 0, 0x00006000); // SP + WRITE_LONG(m68k_ram, 4, 0x00000200); // PC + m68k_pulse_reset(); // also calls MC6850_reset() + m68k_CPUToView(); +} + +/* Implementation for the MC6850 like device + + Only those bits of the control register that enable/disable receive and + transmit interrupts are implemented. + + In the status register, the Receive Data Register Full, Transmit Data + Register Empty, and IRQ flags are implemented. Although the transmit + data register is always empty. + */ + +static void MC6850_reset(void) { + m68k_MC6850_control = 0; + m68k_MC6850_status = 2; + characterAvailable = FALSE; + int_controller_clear(IRQ_MC6850); +} + +#define INITIAL_IDLE 100 +#define IDLE_SLEEP 20 +static uint32 idleCount = INITIAL_IDLE; + +static void m68k_input_device_update(void) { + if (characterAvailable) { + m68k_MC6850_status |= 1; + if ((m68k_MC6850_control & 0x80) && !(m68k_MC6850_status & 0x80)) { + int_controller_set(IRQ_MC6850); + m68k_MC6850_status |= 0x80; + } + } else if (--idleCount == 0) { + const t_stat ch = sim_poll_kbd(); + idleCount = INITIAL_IDLE; + if (IDLE_SLEEP) + sim_os_ms_sleep(IDLE_SLEEP); + if (ch) { + characterAvailable = TRUE; + keyboardCharacter = ch; + } + } +} + +/* wait until character becomes available */ +static uint32 MC6850_data_read(void) { + t_stat ch; + int_controller_clear(IRQ_MC6850); + m68k_MC6850_status &= ~0x81; // clear data ready and interrupt flag + if (characterAvailable) { + ch = keyboardCharacter; + characterAvailable = FALSE; + } else + ch = sim_poll_kbd(); + while ((ch <= 0) && (!stop_cpu)) { + if (IDLE_SLEEP) + sim_os_ms_sleep(IDLE_SLEEP); + ch = sim_poll_kbd(); + } + if (ch == SCPE_STOP) + stop_cpu = TRUE; + return (((ch > 0) && (!stop_cpu)) ? ch & 0xff : 0xff); +} + +static int MC6850_status_read() { + return m68k_MC6850_status; +} + +/* Implementation for the output device */ +static int MC6850_device_ack(void) { + return M68K_INT_ACK_AUTOVECTOR; +} + +static void MC6850_data_write(uint32 value) { + sim_putchar(value); + if ((m68k_MC6850_control & 0x60) == 0x20) { // transmit interupt enabled? + int_controller_clear(IRQ_MC6850); + int_controller_set(IRQ_MC6850); + } +} + +static void MC6850_control_write(uint32 val) { + m68k_MC6850_control = val; +} + +/* Read data from RAM */ +unsigned int m68k_cpu_read_byte_raw(unsigned int address) { + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, + PCX, address); + return 0xff; + } + return READ_BYTE(m68k_ram, address); +} + +unsigned int m68k_cpu_read_byte(unsigned int address) { + switch(address) { + case MC6850_DATA: + return MC6850_data_read(); + case MC6850_STAT: + return MC6850_status_read(); + default: + break; + } + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, + PCX, address); + return 0xff; + } + return READ_BYTE(m68k_ram, address); +} + +unsigned int m68k_cpu_read_word(unsigned int address) { + switch(address) { + case DISK_STATUS: + return hdsk_getStatus(); + default: + break; + } + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to read word from non existing memory 0x%08x." NLP, + PCX, address); + return 0xffff; + } + return READ_WORD(m68k_ram, address); +} + +unsigned int m68k_cpu_read_long(unsigned int address) { + switch(address) { + case DISK_STATUS: + return hdsk_getStatus(); + case M68K_GET_TIME: + return time(NULL); + default: + break; + } + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to read long from non existing memory 0x%08x." NLP, + PCX, address); + return 0xffffffff; + } + return READ_LONG(m68k_ram, address); +} + + +/* Write data to RAM or a device */ +void m68k_cpu_write_byte_raw(unsigned int address, unsigned int value) { + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, + PCX, value & 0xff, address); + return; + } + WRITE_BYTE(m68k_ram, address, value); +} + +void m68k_cpu_write_byte(unsigned int address, unsigned int value) { + switch(address) { + case MC6850_DATA: + MC6850_data_write(value & 0xff); + return; + case MC6850_STAT: + MC6850_control_write(value & 0xff); + return; + default: + break; + } + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, + PCX, value & 0xff, address); + return; + } + WRITE_BYTE(m68k_ram, address, value); +} + +void m68k_cpu_write_word(unsigned int address, unsigned int value) { + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to write word 0x%04x to non existing memory 0x%08x." NLP, + PCX, value & 0xffff, address); + return; + } + WRITE_WORD(m68k_ram, address, value); +} + +void m68k_cpu_write_long(unsigned int address, unsigned int value) { + switch(address) { + case DISK_SET_DRIVE: + hdsk_setSelectedDisk(value); + return; + + case DISK_SET_DMA: + hdsk_setSelectedDMA(value); + return; + + case DISK_SET_SECTOR: + hdsk_setSelectedSector(value); + return; + + case DISK_READ: + hdsk_setSelectedSector(value); + hdsk_setSelectedTrack(0); + hdsk_prepareRead(); + if (hdsk_checkParameters()) + hdsk_read(); + return; + + case DISK_WRITE: + hdsk_setSelectedSector(value); + hdsk_setSelectedTrack(0); + hdsk_prepareWrite(); + if (hdsk_checkParameters()) + hdsk_write(); + return; + + case DISK_FLUSH: + hdsk_flush(); + return; + + case M68K_STOP_CPU: + stop_cpu = TRUE; + return; + + default: + break; + } + if (address > M68K_MAX_RAM) { + if (cpu_unit.flags & UNIT_CPU_VERBOSE) + printf("M68K: 0x%08x Attempt to write long 0x%08x to non existing memory 0x%08x." NLP, + PCX, value, address); + return; + } + WRITE_LONG(m68k_ram, address, value); +} + +/* Called when the CPU pulses the RESET line */ +void m68k_cpu_pulse_reset(void) { + MC6850_reset(); +} + +/* Called when the CPU changes the function code pins */ +void m68k_cpu_set_fc(unsigned int fc) { + m68k_fc = fc; +} + +/* Called when the CPU acknowledges an interrupt */ +int m68k_cpu_irq_ack(int level) { + switch(level) { + case IRQ_NMI_DEVICE: + return nmi_device_ack(); + case IRQ_MC6850: + return MC6850_device_ack(); + } + return M68K_INT_ACK_SPURIOUS; +} + +/* Implementation for the NMI device */ +static int nmi_device_ack(void) { + int_controller_clear(IRQ_NMI_DEVICE); + return M68K_INT_ACK_AUTOVECTOR; +} + +/* Implementation for the interrupt controller */ +static void int_controller_set(uint32 value) { + const uint32 old_pending = m68k_int_controller_pending; + m68k_int_controller_pending |= (1< m68k_int_controller_highest_int) { + m68k_int_controller_highest_int = value; + m68k_set_irq(m68k_int_controller_highest_int); + } +} + +static void int_controller_clear(uint32 value) { + m68k_int_controller_pending &= ~(1< 0;m68k_int_controller_highest_int--) + if (m68k_int_controller_pending & (1< + + + + + + + + + + + + + + + + + + + + + diff --git a/descrip.mms b/descrip.mms index 6abd1298..06f2669f 100644 --- a/descrip.mms +++ b/descrip.mms @@ -330,7 +330,10 @@ ALTAIRZ80_SOURCE2 = $(ALTAIRZ80_DIR)S100_DISK1A.C,$(ALTAIRZ80_DIR)S100_DISK2.C,\ $(ALTAIRZ80_DIR)S100_SCP300F.C,$(ALTAIRZ80_DIR)SIM_IMD.C,\ $(ALTAIRZ80_DIR)WD179X.C,$(ALTAIRZ80_DIR)S100_DISK3.C,\ $(ALTAIRZ80_DIR)S100_ADCS6.C,$(ALTAIRZ80_DIR)S100_HDC1001.C,\ - $(ALTAIRZ80_DIR)S100_IF3.C,$(ALTAIRZ80_DIR)ALTAIRZ80_MHDSK.C + $(ALTAIRZ80_DIR)S100_IF3.C,$(ALTAIRZ80_DIR)ALTAIRZ80_MHDSK.C,\ + $(ALTAIRZ80_DIR)M68KCPU.C,$(ALTAIRZ80_DIR)M68KDASM.C,\ + $(ALTAIRZ80_DIR)M68KOPAC.C,$(ALTAIRZ80_DIR)M68KOPDM.C,\ + $(ALTAIRZ80_DIR)M68KOPNZ.C,$(ALTAIRZ80_DIR)M68KOPS.C,$(ALTAIRZ80_DIR)M68KSIM.C ALTAIRZ80_OPTIONS = /INCL=($(SIMH_DIR),$(ALTAIRZ80_DIR))/DEF=($(CC_DEFS)) # diff --git a/makefile b/makefile index d04097e1..db28ea01 100644 --- a/makefile +++ b/makefile @@ -1021,7 +1021,10 @@ ALTAIRZ80 = ${ALTAIRZ80D}/altairz80_cpu.c ${ALTAIRZ80D}/altairz80_cpu_nommu.c \ ${ALTAIRZ80D}/s100_ss1.c ${ALTAIRZ80D}/s100_64fdc.c \ ${ALTAIRZ80D}/s100_scp300f.c ${ALTAIRZ80D}/sim_imd.c \ ${ALTAIRZ80D}/wd179x.c ${ALTAIRZ80D}/s100_hdc1001.c \ - ${ALTAIRZ80D}/s100_if3.c ${ALTAIRZ80D}/s100_adcs6.c + ${ALTAIRZ80D}/s100_if3.c ${ALTAIRZ80D}/s100_adcs6.c \ + ${ALTAIRZ80D}/m68kcpu.c ${ALTAIRZ80D}/m68kdasm.c \ + ${ALTAIRZ80D}/m68kopac.c ${ALTAIRZ80D}/m68kopdm.c \ + ${ALTAIRZ80D}/m68kopnz.c ${ALTAIRZ80D}/m68kops.c ${ALTAIRZ80D}/m68ksim.c ALTAIRZ80_OPT = -I ${ALTAIRZ80D}