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Intel-Systems: Cleanup Coverity identified issues and address range issues
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@@ -475,12 +475,14 @@ int32 sim_instr(void)
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IR = OP = fetch_byte(0); /* instruction fetch */
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/*
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if (GET_XACK(1) == 0) { // no XACK for instruction fetch
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// reason = STOP_XACK;
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if (uptr->flags & UNIT_XACK)
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reason = STOP_XACK;
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// if (uptr->flags & UNIT_XACK)
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sim_printf("Failed XACK for Instruction Fetch from %04X\n", PCX);
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// continue;
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continue;
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}
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*/
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// first instruction decode
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if (OP == 0x76) { /* HLT Instruction*/
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@@ -886,11 +888,13 @@ int32 sim_instr(void)
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case 0xDB: /* IN */
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port = fetch_byte(1);
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A = dev_table[port].routine(0, 0, dev_table[port].devnum);
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SET_XACK(1); /* good I/O address */
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break;
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case 0xD3: /* OUT */
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port = fetch_byte(1);
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dev_table[port].routine(1, A, dev_table[port].devnum);
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SET_XACK(1); /* good I/O address */
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break;
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default: /* undefined opcode */
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@@ -902,17 +906,19 @@ int32 sim_instr(void)
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}
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loop_end:
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/*
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if (GET_XACK(1) == 0) { // no XACK for operand fetch
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// reason = STOP_XACK;
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reason = STOP_XACK;
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if (OP == 0xD3 || OP == 0xDB) {
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if (uptr->flags & UNIT_XACK)
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// if (uptr->flags & UNIT_XACK)
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sim_printf("Failed XACK for Port %02X Fetch from %04X\n", port, PCX);
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} else {
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if (uptr->flags & UNIT_XACK)
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// if (uptr->flags & UNIT_XACK)
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sim_printf("Failed XACK for Operand %04X Fetch from %04X\n", addr, PCX);
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// continue;
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continue;
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}
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}
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*/;
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}
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/* Simulation halted */
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