mirror of
https://github.com/simh/simh.git
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Notes For V3.8
The makefile now works for Linux and most Unix's. Howevr, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.2 GRI - Added support for the GRI-99 processor. 1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
3cb7c60d5d
commit
59aa4a73b1
509
VAX/ka655_patch.com
Normal file
509
VAX/ka655_patch.com
Normal file
@@ -0,0 +1,509 @@
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$!
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$! This procedure patches the base KA655.BIN Boot ROM image to work under
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$! the SIMH simulator
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$
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$! The second part of the patch adds support for Extended Memory in the
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$! simulator. A simulated system can have up to 512MB of RAM.
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$!
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$ PATCH /ABSOLUTE /NEW_VERSION /OUTPUT=cp$exe:KA655.BIN cp$src:ka655_orig.BIN
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! CVAX Bootstrap Notes
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!
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! [2004c87e] - de$read_script
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! [2004c916] - launch next test, r2 = test #, r4 = header, r5 = offset to main routine
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!
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! Script BA
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! ---------
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!
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! Test 9D - Utility - ok
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! Test 42 - Wait for interrupt - ok
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! Test C6 - SSC register check - ok
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! Test 60 [2004de37] - Serial line - requires diagnostic loopback mode and
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! break detection - bypass
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! 2004de99/ brw 2004e0a7
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Replace/Instruction 0DE99 = 'MOVB #03,B^76(R9)'
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'BRW 0000E0A7'
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Exit
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! Test 62 - QDSS disable - ok
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!
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! Script BC
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! ---------
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!
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! 40. Test 91 - CQBIC init check - ok
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! 39. Test 90 [2004d748] - CQBIC registers - ok
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! 38. Test 33 [2004d54e] - CMCTL init check - ok
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! 37. Test 32 [2004d5b0] - CMCTL registers - ok
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! 36. Test 31 [200512d0] - CMCTL CSR setup to map memory - ok
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! 35. Test 49 [20052a4b] - CMCTL FDM test - requires fast diagnostic mode
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! and XMX counters - bypass
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! 20052a55:20052a58/ nop
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Delete/Instruction 12A55 = 'BBC #26,(R9),00012A5C'
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! 34. Test 30 [20051909] - init map - ok
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!
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! Script BD
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! ---------
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!
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! 33. Test 52 [2004e656] - prog timer 0 - ok
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! 32. Test 52 [2004e656] - prog timer 1 - ok
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! 31. Test 53 [2004e918] - toy clock - ok
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! 30. Test C1 [2004f8f1] - SSC RAM - ok
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! 29. Test 34 [2004d4a0] - ROM - checksum off due to other patches - patch
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! 2004d52c:2004d52d/ nop
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Delete/Instruction 0D52C = 'BNEQ 0000D531' ! 2004D52C
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! 28. Test C5 [2004fc0e] - SSC registers - ok
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! 27. Test 55 [2004ea8c] - interval timer - ok
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! 26. Test 51 [2004e42d] - CFPA - ok
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! 25. Test C7 [2004D3D3] - CBTCR<31:30> - ok
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! 24. Test 46 [2004ef1a] - L1 cache diagnostic mode - bypass
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! 2004ef80/ brw 2004f47a
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Replace/Instruction 0EF80 = 'MOVB #06,B^76(R9)'
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'BRW 0000F47A' ! 2004FE80
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Exit
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! 23. Test 35 [20050554] - L2 cache integrity test - bypass
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! 20050554/ brw 20050a48
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Replace/Instruction 10554 = 'INSV #00,#10,#02,(R9)'
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'BRW 00010A48' ! 20050554
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Exit
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! 22. Test 43 [20050d65] - L1 with L2 test - bypass
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! 20050d65/ brw 20050fca
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Replace/Instruction 10D65 = 'MOVAL B^00010D65,W^0080(R9)'
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'BRW 00010FCA' ! 20050D65
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Exit
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! 21. (Rerun of C2)
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! 20. Test 4F [20051d4f] - memory data - bypass, run from ROM
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! 20055205/ 0
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Replace/Byte 15205 = 3
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0 ! 20055205
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Exit
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! 20051d4f/ brw 2005163a
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Replace/Instruction 11D4F = 'MOVAL B^00011D4F,W^0080(R9)'
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'BRW 0001163A' ! 20051D4F
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Exit
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! 19. Test 4E [20051edb] - memory byte write - ok, run from ROM
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! 2005521c/ 0
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Replace/Byte 1521C = 3
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0 ! 2005521C
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Exit
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! 18. Test 4D [20051ff3] - memory addressing - ok, run from ROM
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! 20055233/ 0
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Replace/Byte 15233 = 3
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0 ! 20055233
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Exit
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! 17. Test 4C [20052190] - ECC test - bypass, run from ROM
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! 2005524a/ 0
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Replace/Byte 1524A = 3
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0 ! 2005524A
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Exit
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! 20052190/ brw 2005163a
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Replace/Instruction 12190 = 'MOVAL B^00012190,W^0080(R9)'
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'BRW 0001163A' ! 20052190
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Exit
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! 16. Test 4B [2005264e] - masked writes with errors - bypass, run from ROM
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! 20055261/ 0
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Replace/Byte 15261 = 3
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0 ! 20055261
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Exit
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! 2005264e/ brw 2005163a
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Replace/Instruction 1264E = 'MOVAL B^0001264E,W^0080(R9)'
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'BRW 0001163A' ! 2005264E
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Exit
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! 15. Test 4A [20052823] - single bit correction - bypass, run from ROM
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! 20055278/ 0
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Replace/Byte 15278 = 3
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0 ! 20055278
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Exit
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! 20052823/ brw 2005163a
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Replace/Instruction 12823 = 'MOVAL B^00012823,W^0080(R9)'
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'BRW 0001163A' ! 20052823
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Exit
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! 14. Test 48 [20053062] - memory address shorts - bypass, run from ROM
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! 2005528f/ 0
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Replace/Byte 1528F = 3
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0 ! 2005528F
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Exit
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! 20053062/ brw 2005163a
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Replace/Instruction 13062 = 'MOVAL B^00013062,W^0080(R9)'
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'BRW 0001163A' ! 20053062
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Exit
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! 13. Test 47 [200536c3] - verify refresh - run from ROM
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! 200552aa/ 0
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Replace/Byte 152AA = 3
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0 ! 200552AA
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Exit
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! 12. Test 41 [] - count bad pages, relocate bit map
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! 11. Test 44 [20050d34] - L1 with memory - bypass
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! 20050d34/ brw 20050fca
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Replace/Instruction 10D34 = 'MOVAL B^00010D34,W^0080(R9)'
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'BRW 00010FCA' ! 20050D34
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Exit
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! 10. Test 36 [2004ffdf] - L2 with memory - bypass
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! 2004ffdf/ brw 20050428
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Replace/Instruction 0FFDF = 'JSB L^0000CEFD'
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'BRW 00010428' ! 2004FFDF
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Exit
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! 9. Test 80 [2004d7de] - CQBIC memory - bypass last 2 subtests, run from ROM
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! 2004dbc0/ brw 2004dd8a
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Replace/Instruction 0DBC0 = 'MOVB #1B,B^76(R9)'
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'BRW 0000DD8A' ! 2004DBC0
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Exit
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! 200552f6/ 0
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Replace/Byte 152F6 = 3
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0 ! 200552F6
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Exit
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! 8. Test 54 [] - virtual mode - ok
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! 7. Test 34 [] - ROM in virtual mode - see previous notes
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! 6. Test C5 [] - SSC registers in virtual mode - ok
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! 5. Test 45 [2004ec5d] - cache, memory, CQBIC - bypass
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! 2004ec5d/ brw 2004ee90
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Replace/Instruction 0EC5D = 'BICL2 #03,B^28(R9)'
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'BRW 0000EE90' ! 2004EC5D
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Exit
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! 4. Test 5A [2004eb5f] - CVAX CMCTL DAL drivers - ok
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! 3. Test 41 [20051096] - reset board
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!
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! ===========================================================================
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!
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!
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! All of the above patches were done against the base ROM image extracted
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! from a genuine MicroVAX 3900. These were all part of SIMH prior to
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! extended memory support.
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!
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! The Diagnostic State Variable DST$W_BITMAP_LENGTH, being 16 bits, can only
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! describe a PFN Bitmap describing up to, but NOT including 256MB of RAM. To
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! get to 256MB and beyond, we must correctly determine a correct bitmap size.
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! all of the Diagnostic state space is in use, either since it is already
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! defined, and the space beyond that is used for stack. So, we change the
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! references to DST$W_BITMAP_LENGTH to call a subroutine to properly determine
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! the PFN BITMAP size.
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!
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! Most of the code which references DST$W_BITMAP_LENGTH are done from a
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! diagnostic test routine which may be relocated to RAM before execution.
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! The assumption of such relocating activity is that none of the relocated code
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! references any other instructions or data in the ROM image via any PC
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! relative addressing modes. Given this requirement, each of the above
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! patches must be done with a JSB to an explicit ROM address. As a
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! consequence, the patched instruction will generally be longer than the
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! instruction which is being replaced. To cleanly affect this
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! we must overwrite multiple instructions and incorporate the activities of
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! each of the overwritten instructions into the target subroutine.
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! Additionally, even without the relocation concerns, numerous places which
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! reference these extra routines may be beyond a PC relative displacement
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! due to the size of the ROM.
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!
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! The KA655 ROM size is 128KB. As it turns out, the ROM image is only using
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! approximately 105,136 bytes of the total 131072 bytes. We use this unused
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! ROM space to store code which implements the required extra functionality
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!
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Define PATCH_BASE = 00019C00
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Define P$END = PATCH_BASE
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Define CP$K_MEMSIZE = 20080148
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Define CP$K_QBMBR = 20080010
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Define DST_BASE = 20140758
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Define CTX_BASE = 201404B2
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Define CTX$L_R2 = 8
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Define CTX$A_GPTR = 66
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Define CTX$L_ERROR_COUNT = 54
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Define CTX$L_ERROR_STATUS = 58
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Define DST$W_BITMAP_LENGTH = 20
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Define DST$A_BITMAP = 1C
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Define DST$A_BUSMAP = 24
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Define DST$W_BITMAP_CHECKSUM = 22
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Define CP$CHECKSUM_RTN = 20041C6A
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Define GUARD$S_GUARD_BLOCK = 12
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Define GUARD$l_pc = 0
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Define GUARD$a_gptr = 4
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Define GUARD$w_rmask = 8
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Define GUARD$l_save_error_count = 0A
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Define GUARD$l_save_error_status = 0E
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!
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! This routine determines the memory size of the current system. This is
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! done by referencing the CMCTL18 memory size register. On an older simulator
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! or one with less than 64MB of RAM configured, this register may not exist.
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! If it doesn't exist the machine check generated by the reference to the
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! non-existant register is caught, and the appropriate memory size is
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! determined from the existing PFN Bitmap size.
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!
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DEFINE GETMEMSIZE_R0 = P$End+1
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Deposit/Instruction GETMEMSIZE_R0
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' pushr #0 '
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' subl2 #guard$s_guard_block, sp'
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' movw #0, B^guard$w_rmask (sp)'
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' movab B^G$ERR, B^guard$l_pc (sp)'
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' movl @#<ctx_base + ctx$a_gptr>, B^guard$a_gptr (sp)'
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' movl @#<ctx_base + ctx$l_error_count>, B^guard$l_save_error_count (sp)'
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' movl @#<ctx_base + ctx$l_error_status>, B^guard$l_save_error_status (sp)'
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' movl sp, @#<ctx_base + ctx$a_gptr>'
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' brb G$RD '
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'G$ERR: movzwl @#<DST_BASE+DST$W_BITMAP_LENGTH>,R0'
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' clrl @#<ctx_base + ctx$l_error_count>'
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' clrl @#<ctx_base + ctx$l_error_status>'
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' ashl #^d12,r0,r0 '
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' brb G$DON '
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'G$RD: movl @#CP$K_MEMSIZE,R0 '
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'G$DON: movl @#<ctx_base + ctx$a_gptr>, sp'
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' movl B^guard$a_gptr (sp), @#<ctx_base + ctx$a_gptr>'
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' movl B^guard$l_save_error_count (sp), @#<ctx_base + ctx$l_error_count>'
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' movl B^guard$l_save_error_status (sp), @#<ctx_base + ctx$l_error_status>'
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' addl2 #guard$s_guard_block - 2, sp'
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' popr (sp)+ '
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'P$End: rsb '
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Exit
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!
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Define GETMAPENDADDR_R6 = P$End+1
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Deposit/Instruction GETMAPENDADDR_R6
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' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R6'
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' BNEQ X$1 '
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' MOVL R0, -(SP) '
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' JSB GETMEMSIZE_R0 '
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' ashl #-^D12,R0,R6 '
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' MOVL (SP)+, R0 '
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'X$1: addl @#<DST_BASE+DST$A_BITMAP>,R6'
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'P$End: rsb '
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Exit
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! DE_QDSS_ANY [2004E2A8] Uses R6 for BitMap Size
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! 2004E390/ BSBW GETMAPSIZE_R6
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Replace/Instruction 0E390
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' MOVZWL B^20(R9),R6 '
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' ADDL3 R6,B^1C(R9),R6 '
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Exit
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' JSB GETMAPENDADDR_R6 '
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Exit
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!
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!
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DEFINE GETMAPSIZEMAPADDR_STACK = P$End+1
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Deposit/Instruction GETMAPSIZEMAPADDR_STACK
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' PUSHL @#<DST_BASE+DST$A_BITMAP>,'
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' MOVL B^4(SP),-(SP) '
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' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,B^8(SP)'
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' BNEQ X$2'
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' MOVL R0, -(SP) '
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' JSB GETMEMSIZE_R0 '
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' ASHL #-^D12,R0,B^0C(SP) '
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' MOVL (SP)+, R0 '
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'X$2: NOP '
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'P$END: RSB'
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Exit
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! CP_FIND [200419E8] Uses (SP) for BitMap Size R1 Scratch
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! 20041A16/ BSBW GETMAPSIZE_STACK
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Replace/Instruction 01A16
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' MOVZWL B^20(R0),-(SP) '
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' PUSHL B^1C(R0) '
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Exit
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' JSB GETMAPSIZEMAPADDR_STACK '
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Exit
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!
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! CP_SCAN [200459D0] Uses R3 for BitMap Size
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DEFINE GETMBMEMSIZE_STACK = P$End+1
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Deposit/Instruction GETMBMEMSIZE_STACK
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' MOVAB L^0000AACF,-(SP) '
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' MOVL B^4(SP),-(SP) '
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' MOVL R0, -(SP) '
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' JSB GETMEMSIZE_R0 '
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' ASHL #-^D20,R0,B^0C(SP) '
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' MOVL (SP)+, R0 '
|
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' RSB '
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'GETMAPSIZE_R3: MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R3'
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' BNEQ X$3'
|
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' MOVL R0, -(SP) '
|
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' JSB GETMEMSIZE_R0 '
|
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' ASHL #-^D12,R0,R3 '
|
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' MOVL (SP)+, R0 '
|
||||
'X$3: RSB'
|
||||
'P$END: NOP'
|
||||
Exit
|
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! 20045B05/ BSBW GETMBMEMSIZE_STACK
|
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Replace/Instruction 05B05
|
||||
' MOVL R8,-(SP) '
|
||||
' MOVAB L^0000AACF,-(SP) '
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Exit
|
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' JSB GETMBMEMSIZE_STACK '
|
||||
Exit
|
||||
! 20045B80/ BSBW GETMAPSIZE_R3
|
||||
Replace/Instruction 05B80
|
||||
' MOVZWL @#20140778,R3 '
|
||||
Exit
|
||||
' JSB GETMAPSIZE_R3 '
|
||||
Exit
|
||||
! DE_CQBIC_MEMORY [2004D7B2]
|
||||
DEFINE GETBITMAPPAGES_R5 = P$End+1
|
||||
Deposit/Instruction GETBITMAPPAGES_R5
|
||||
' MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R5'
|
||||
' BNEQ X$4 '
|
||||
' MOVL R0,-(SP) '
|
||||
' JSB GETMEMSIZE_R0 '
|
||||
' ASHL #-^D12,R0,R5 '
|
||||
' MOVL (SP)+,R0 '
|
||||
'X$4: ASHL #3,R5,R5 '
|
||||
' RSB '
|
||||
'GETBITMAPMEMSIZE_R3: MOVZWL @#<DST_BASE+DST$W_BITMAP_LENGTH>,R3'
|
||||
' BNEQ X$5 '
|
||||
' MOVL R0,-(SP) '
|
||||
' JSB GETMEMSIZE_R0 '
|
||||
' ASHL #-^D12,R0,R3 '
|
||||
' MOVL (SP)+,R0 '
|
||||
'X$5: ASHL #^D12,R3,R3 '
|
||||
'P$END: RSB'
|
||||
Exit
|
||||
! 2004D8A5/ BSBW GETMAPSIZE_R5
|
||||
Replace/Instruction 0D8A5
|
||||
' MOVZWL B^20(R9),R5 '
|
||||
' ASHL #03,R5,R5 '
|
||||
Exit
|
||||
' JSB GETBITMAPPAGES_R5 '
|
||||
Exit
|
||||
! 2004DA41/ BSBW GETMAPSIZE_R5
|
||||
Replace/Instruction 0DA41
|
||||
' MOVZWL B^20(R9),R5 '
|
||||
' ASHL #03,R5,R5 '
|
||||
Exit
|
||||
' JSB GETBITMAPPAGES_R5 '
|
||||
Exit
|
||||
! 2004DA8C/ BSBW GETMAPSIZE_R5
|
||||
Replace/Instruction 0DA8C
|
||||
' MOVZWL B^20(R9),R5 '
|
||||
' ASHL #03,R5,R5 '
|
||||
Exit
|
||||
' JSB GETBITMAPPAGES_R5 '
|
||||
Exit
|
||||
! DE_CACHE_MEM_CQBIC [2004EBF0]
|
||||
! 2004ECD0/ BSBW GETMAPSIZE_R3
|
||||
Replace/Instruction 0ECD0
|
||||
' MOVZWL B^20(R9),R3 '
|
||||
' ASHL #0C,R3,R3 '
|
||||
Exit
|
||||
' JSB GETBITMAPMEMSIZE_R3 '
|
||||
Exit
|
||||
! CP_BOOTSTRAP
|
||||
DEFINE GET_X_PFNMAP_SIZEADDR_STACK = P$End+1
|
||||
Deposit/Instruction GET_X_PFNMAP_SIZEADDR_STACK
|
||||
' movl B^dst$a_bitmap (r11), r2'
|
||||
' movzwl B^dst$w_bitmap_length (r11), r1'
|
||||
' bneq X$20 ' ! Zero Bitmap size means extended mem
|
||||
' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8
|
||||
'X$10: brw X$70 ' ! already fixed
|
||||
'X$20: cmpl r1, #^D16384 ' ! Original Map of 64MB?
|
||||
' blss X$10 ' ! Too Small For Extended
|
||||
' JSB GETMEMSIZE_R0 '
|
||||
' ashl #-^D12, R0, r1 ' ! Map Size = MEMSIZE/512/8
|
||||
' cmpl r1, #^D16384 '
|
||||
' beql X$10 ' ! Normal 64MB map
|
||||
!;
|
||||
!; First move the Console Scratch Area (16KB), and the Qbus Map (32KB)
|
||||
!; to the end of physical memory.
|
||||
!;
|
||||
' movl @#CP$K_MEMSIZE, r1 ' ! MEMSIZE
|
||||
' subl3 #^D48*^D1024, r1, r3 ' ! New Destination Address
|
||||
' addl #^D16384, r2 ' ! Point at end of prior Map
|
||||
' clrl r0 ' ! Index
|
||||
'X$63: movb (r2)[r0], (r3)[r0] ' ! Move the Console Scratch Pad and QBMRs
|
||||
' aoblss #^D48*^D1024, r0, X$63 '
|
||||
' movab W^4000(r3), B^DST$A_BUSMAP(r11)' ! Save Qbus Map Register Space
|
||||
' movab W^4000(r3), @#CP$K_QBMBR' ! Save Qbus Map Register Space
|
||||
!;
|
||||
!; Fixup the boot device descriptor previously saved in the scratchpad RAM
|
||||
!;
|
||||
' subl3 #^D512, B^DST$A_BUSMAP (r11), r1'
|
||||
' movab B^8(r1), B^4(r1)'
|
||||
!;
|
||||
!; Now we build a new bitmap, with all bits set except for the reserved
|
||||
!; area containing the bitmap itself, and the console scratch area and
|
||||
!; the Qbus Map.
|
||||
!;
|
||||
' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8
|
||||
' subl3 r1, r3, r2 ' ! Point at new Destination Address
|
||||
' movl r2, B^dst$a_bitmap (r11)' ! Save Bitmap address
|
||||
' ashl #-9, @#CP$K_MEMSIZE, r1 ' ! PFN count = MEMSIZE/512
|
||||
' ashl #-^D12, @#CP$K_MEMSIZE, r0' ! Map Size = MEMSIZE/512/8
|
||||
' addl #^D48*^D1024+^D511, r0 ' ! Plus other reserved page size
|
||||
' ashl #-9, r0, r0 '
|
||||
' subl r0, r1 ' ! Adjust for bitmap of reserved pages
|
||||
' clrl r0 '
|
||||
' pushl r1 ' ! Save total Bit Count
|
||||
' ashl #-5, r1, r1 ' ! Convert limit to Longword Count
|
||||
'X$632: movl #-1,(r2)[r0] ' ! Set bitmap entry for 32 pages
|
||||
' aoblss r1, r0, X$632 '
|
||||
' ashl #5, r0, r0 ' ! Convert back to Bit Count
|
||||
' movl (SP)+, r1 ' ! Restore total Bit Count
|
||||
' cmpl r0, r1'
|
||||
' bgeq X$651'
|
||||
'X$64: bbss r0, (r2), X$65 ' ! Set page bitmap entry
|
||||
'X$65: aoblss r1, r0, X$64 ' ! Done ?
|
||||
'X$651: ashl #-9, @#CP$K_MEMSIZE, r1 ' ! PFN count = MEMSIZE/512
|
||||
'X$66: bbcc r0, (r2), X$67 ' ! Clear reserved page bitmap entry
|
||||
'X$67: aoblss r1, r0, X$66 ' ! Done?
|
||||
' clrl r0 ' ! Zero Initial checksum value
|
||||
' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8
|
||||
' jsb @#cp$checksum_rtn ' ! Compute checksum for revised bitmap
|
||||
' movw r0, B^dst$w_bitmap_checksum (r11)' ! save it
|
||||
' clrw B^dst$w_bitmap_length (r11)' ! Mark as extended bitmap
|
||||
' ashl #-^D12, @#CP$K_MEMSIZE, r1' ! Map Size = MEMSIZE/512/8
|
||||
' movl B^dst$a_bitmap (r11), r2'
|
||||
'X$70: jmp GETMAPSIZEMAPADDR_STACK'
|
||||
!
|
||||
'GETMAPSIZE_CTX_R2: movzwl @#<dst_base+dst$w_bitmap_length>,@#<ctx_base+ctx$l_r2>'
|
||||
' bneq X$71'
|
||||
' MOVL R0, -(SP) '
|
||||
' JSB GETMEMSIZE_R0 '
|
||||
' ASHL #-^D12,R0,@#<ctx_base+ctx$l_r2>'
|
||||
' MOVL (SP)+, R0 '
|
||||
'X$71: rsb'
|
||||
Exit
|
||||
Replace/Instruction 517F = 'movzwl B^20(r11), @#201404BA'
|
||||
' jsb GETMAPSIZE_CTX_R2 '
|
||||
Exit
|
||||
Replace/Instruction 514B
|
||||
' MOVZWL B^20(R11),-(SP) '
|
||||
' PUSHL B^1C(R11) '
|
||||
Exit
|
||||
' JSB GET_X_PFNMAP_SIZEADDR_STACK'
|
||||
Exit
|
||||
!
|
||||
! DE_MEMORY [200512AC]
|
||||
! CP_UTIL []
|
||||
!
|
||||
! Identify the Extended Memory Mode in the Console Banner
|
||||
! (i.e. KA655X-B vs KA655-B)
|
||||
!
|
||||
Replace 83D8 = 00303436
|
||||
58353536
|
||||
Exit
|
||||
Replace/Byte 83DC = 4B
|
||||
0
|
||||
Exit
|
||||
Deposit/Instruction 1C04
|
||||
' PUSHAB L^000083E2 '
|
||||
' JSB GETMEMSIZE_R0 '
|
||||
' CMPL R0, #<^D64*^D1024*^D1024>'
|
||||
' BLEQ B$1 '
|
||||
' MOVAB L^000083D6,(SP) '
|
||||
'B$1: NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
' NOP '
|
||||
Exit
|
||||
!
|
||||
! Extended Memory Patches:
|
||||
! 9. Test 80 [2004d7de] - CQBIC memory - bypass last 2 subtests, run from ROM
|
||||
! MP Revised to bypass tests starting at test of NXM reference through MAP
|
||||
! 2004db2e/ brw 2004dd8a
|
||||
Replace/Instruction 0db2e = 'MOVB #17,B^76(R9)'
|
||||
'BRW 0DD8A'
|
||||
EXIT
|
||||
!
|
||||
! Interval Timer Patch
|
||||
! In operational environments, Test 82 subtests 17 and 20 have been observed
|
||||
! to ocaisionally fail. Disable the timer portion of the interval timer tests.
|
||||
! 2004e7c1/ brw 2004e870
|
||||
Replace/Instruction 0e7c1 = 'MOVB #10,B^76(R9)'
|
||||
'BRW 0e870'
|
||||
EXIT
|
||||
!
|
||||
UPDATE
|
||||
EXIT
|
||||
$
|
||||
BIN
VAX/ka655x.bin
BIN
VAX/ka655x.bin
Binary file not shown.
BIN
VAX/ka655x.bin_old
Normal file
BIN
VAX/ka655x.bin_old
Normal file
Binary file not shown.
@@ -1,3 +1,5 @@
|
||||
Bugs Found And Fixed During Simulator Debug
|
||||
|
||||
1. RP: drive clear does not clear RPDA.
|
||||
2. TU: default formatter must be TM03.
|
||||
3. SBI: drive 'letter' is actually a 1-based number.
|
||||
@@ -404,6 +404,22 @@ typedef struct {
|
||||
#define BOOT_UDA 17
|
||||
#define BOOT_TK 18
|
||||
|
||||
/* Function prototypes for virtual memory interface */
|
||||
|
||||
int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
|
||||
/* Function prototypes for physical memory interface (inlined) */
|
||||
|
||||
SIM_INLINE int32 ReadB (uint32 pa);
|
||||
SIM_INLINE int32 ReadW (uint32 pa);
|
||||
SIM_INLINE int32 ReadL (uint32 pa);
|
||||
SIM_INLINE int32 ReadLP (uint32 pa);
|
||||
SIM_INLINE void WriteB (uint32 pa, int32 val);
|
||||
SIM_INLINE void WriteW (uint32 pa, int32 val);
|
||||
SIM_INLINE void WriteL (uint32 pa, int32 val);
|
||||
void WriteLP (uint32 pa, int32 val);
|
||||
|
||||
/* Function prototypes for I/O */
|
||||
|
||||
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax780_fload.c: VAX780 FLOAD command
|
||||
|
||||
Copyright (c) 2006, Robert M Supnik
|
||||
Copyright (c) 2006-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -37,6 +37,8 @@
|
||||
-- Assebmbly language routines added for BIOS calls etc.
|
||||
|
||||
Thanks to Phil Budne for the original adaptation of RT11 to SimH.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
*/
|
||||
|
||||
#include "vax_defs.h"
|
||||
@@ -84,8 +86,6 @@ uint32 rtfile_ator50 (uint32 ascii);
|
||||
t_bool rtfile_read (uint32 block, uint32 count, uint16 *buffer);
|
||||
uint32 rtfile_find (uint32 block, uint32 sector);
|
||||
|
||||
extern void WriteW (uint32 pa, int32 val);
|
||||
|
||||
/* FLOAD file_name {file_origin} */
|
||||
|
||||
t_stat vax780_fload (int flag, char *cptr)
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax780_mba.c: VAX 11/780 Massbus adapter
|
||||
|
||||
Copyright (c) 2004-2005, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -24,6 +24,8 @@
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
mba0, mba1 RH780 Massbus adapter
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
*/
|
||||
|
||||
#include "vax_defs.h"
|
||||
@@ -171,13 +173,6 @@ void mba_clr_int (uint32 mb);
|
||||
void mba_upd_sr (uint32 set, uint32 clr, uint32 mb);
|
||||
DIB mba0_dib, mba1_dib;
|
||||
|
||||
extern int32 ReadB (uint32 pa);
|
||||
extern int32 ReadW (uint32 pa);
|
||||
extern int32 ReadL (uint32 pa);
|
||||
extern void WriteB (uint32 pa, int32 val);
|
||||
extern void WriteW (uint32 pa, int32 val);
|
||||
extern void WriteL (uint32 pa, int32 val);
|
||||
|
||||
/* Massbus register dispatches */
|
||||
|
||||
static t_stat (*mbregR[MBA_NUM])(int32 *dat, int32 ad, int32 md);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax780_sbi.c: VAX 11/780 SBI
|
||||
|
||||
Copyright (c) 2004-2006, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -27,7 +27,9 @@
|
||||
|
||||
sbi bus controller
|
||||
|
||||
31-May-2008 RMS Fixed machine_check calling sequence (found by Peter Schorn)
|
||||
03-May-2006 RMS Fixed writes to ACCS
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
*/
|
||||
|
||||
#include "vax_defs.h"
|
||||
@@ -132,7 +134,6 @@ void uba_eval_int (void);
|
||||
t_stat vax780_boot (int32 flag, char *ptr);
|
||||
|
||||
extern t_stat vax780_fload (int flag, char *cptr);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
|
||||
extern int32 iccs_rd (void);
|
||||
extern int32 nicr_rd (void);
|
||||
@@ -151,7 +152,6 @@ extern void init_mbus_tab (void);
|
||||
extern void init_ubus_tab (void);
|
||||
extern t_stat build_mbus_tab (DEVICE *dptr, DIB *dibp);
|
||||
extern t_stat build_ubus_tab (DEVICE *dptr, DIB *dibp);
|
||||
extern void WriteLP (uint32 pa, int32 val);
|
||||
|
||||
/* SBI data structures
|
||||
|
||||
@@ -548,7 +548,7 @@ return;
|
||||
Rest will be zero
|
||||
*/
|
||||
|
||||
int32 machine_check (int32 p1, int32 opc, int32 cc)
|
||||
int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta)
|
||||
{
|
||||
int32 acc, err;
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax780_uba.c: VAX 11/780 Unibus adapter
|
||||
|
||||
Copyright (c) 2004-2005, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -24,6 +24,9 @@
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
uba DW780 Unibus adapter
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
25-Jan-08 RMS Fixed declarations (from Mark Pizzolato)
|
||||
*/
|
||||
|
||||
#include "vax_defs.h"
|
||||
@@ -200,12 +203,6 @@ t_stat show_autocon (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||
t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||
t_stat uba_show_virt (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||
|
||||
extern int32 ReadB (uint32 pa);
|
||||
extern int32 ReadW (uint32 pa);
|
||||
extern int32 ReadL (uint32 pa);
|
||||
extern void WriteB (uint32 pa, int32 val);
|
||||
extern void WriteW (uint32 pa, int32 val);
|
||||
extern void WriteL (uint32 pa, int32 val);
|
||||
extern int32 eval_int (void);
|
||||
extern t_stat build_dib_tab (void);
|
||||
|
||||
@@ -513,7 +510,7 @@ return;
|
||||
longword of data
|
||||
*/
|
||||
|
||||
int32 ReadIO (int32 pa, int32 lnt)
|
||||
int32 ReadIO (uint32 pa, int32 lnt)
|
||||
{
|
||||
uint32 iod;
|
||||
|
||||
@@ -541,7 +538,7 @@ return iod;
|
||||
none
|
||||
*/
|
||||
|
||||
void WriteIO (int32 pa, int32 val, int32 lnt)
|
||||
void WriteIO (uint32 pa, int32 val, int32 lnt)
|
||||
{
|
||||
if (lnt == L_BYTE) WriteUb (pa, val, WRITEB); /* byte? DATOB */
|
||||
else if ((lnt == L_WORD) && ((pa & 1) == 0)) /* aligned word? */
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_cis.c: VAX CIS instructions
|
||||
|
||||
Copyright (c) 2004-2005, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -26,6 +26,7 @@
|
||||
On a full VAX, this module simulates the VAX commercial instruction set (CIS).
|
||||
On a subset VAX, this module implements the emulated instruction fault.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
16-May-06 RMS Fixed bug in length calculation (found by Tim Stark)
|
||||
03-May-06 RMS Fixed MOVTC, MOVTUC to preserve cc's through page faults
|
||||
Fixed MOVTUC to stop on translated == escape
|
||||
@@ -99,8 +100,6 @@ int32 edit_read_src (int32 inc, int32 acc);
|
||||
void edit_adv_src (int32 inc);
|
||||
int32 edit_read_sign (int32 acc);
|
||||
|
||||
extern int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 eval_int (void);
|
||||
|
||||
/* CIS emulator */
|
||||
@@ -1614,10 +1613,6 @@ extern int32 pcq[PCQ_SIZE];
|
||||
extern int32 pcq_p;
|
||||
extern jmp_buf save_env;
|
||||
|
||||
extern int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 ReadLP (uint32 pa);
|
||||
|
||||
/* CIS instructions - invoke emulator interface
|
||||
|
||||
opnd[0:5] = six operands to be pushed (if PSL<fpd> = 0)
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_cmode.c: VAX compatibility mode
|
||||
|
||||
Copyright (c) 2004-2006, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -26,6 +26,8 @@
|
||||
On a full VAX, this module implements PDP-11 compatibility mode.
|
||||
On a subset VAX, this module forces a fault if REI attempts to set PSL<cm>.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
25-Jan-08 RMS Fixed declaration (from Mark Pizzolato)
|
||||
03-May-06 RMS Fixed omission of SXT
|
||||
Fixed order of operand fetching in XOR
|
||||
24-Aug-04 RMS Cloned from PDP-11 CPU
|
||||
@@ -58,10 +60,7 @@ extern int32 pcq[];
|
||||
extern int32 pcq_p;
|
||||
extern int32 ibcnt, ppc;
|
||||
extern int32 sim_interval;
|
||||
extern int32 sim_brk_summ;
|
||||
|
||||
extern int32 Read (uint32 va, int32 lnt, int32 access);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 access);
|
||||
extern uint32 sim_brk_summ;
|
||||
extern jmp_buf save_env;
|
||||
|
||||
int32 GeteaB (int32 spec);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_cpu.c: VAX CPU
|
||||
|
||||
Copyright (c) 1998-2007, Robert M Supnik
|
||||
Copyright (c) 1998-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -25,6 +25,7 @@
|
||||
|
||||
cpu VAX central processor
|
||||
|
||||
28-May-08 RMS Inlined instruction prefetch, physical memory routines
|
||||
13-Aug-07 RMS Fixed bug in read access g-format indexed specifiers
|
||||
28-Apr-07 RMS Removed clock initialization
|
||||
29-Oct-06 RMS Added idle support
|
||||
@@ -350,11 +351,6 @@ extern int32 op_cmode (int32 cc);
|
||||
extern int32 op_cis (int32 *opnd, int32 cc, int32 opc, int32 acc);
|
||||
extern int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va);
|
||||
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
|
||||
extern int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 ReadB (uint32 pa);
|
||||
extern void WriteB (uint32 pa, int32 val);
|
||||
extern int32 ReadLP (uint32 pa);
|
||||
extern int32 Test (uint32 va, int32 acc, int32 *status);
|
||||
extern int32 BadCmPSL (int32 newpsl);
|
||||
extern int32 eval_int (void);
|
||||
@@ -376,7 +372,7 @@ t_stat cpu_show_virt (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||
t_stat cpu_set_idle (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||
t_stat cpu_show_idle (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||
int32 cpu_get_vsw (int32 sw);
|
||||
int32 get_istr (int32 lnt, int32 acc);
|
||||
SIM_INLINE int32 get_istr (int32 lnt, int32 acc);
|
||||
int32 ReadOcta (int32 va, int32 *opnd, int32 j, int32 acc);
|
||||
t_bool cpu_show_opnd (FILE *st, InstHistory *h, int32 line);
|
||||
int32 cpu_psl_ipl_idle (int32 newpsl);
|
||||
@@ -2919,7 +2915,7 @@ ABORT (STOP_UNKNOWN);
|
||||
so any translation errors are real.
|
||||
*/
|
||||
|
||||
int32 get_istr (int32 lnt, int32 acc)
|
||||
SIM_INLINE int32 get_istr (int32 lnt, int32 acc)
|
||||
{
|
||||
int32 bo = PC & 3;
|
||||
int32 sc, val, t;
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_cpu1.c: VAX complex instructions
|
||||
|
||||
Copyright (c) 1998-2007, Robert M Supnik
|
||||
Copyright (c) 1998-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -23,6 +23,7 @@
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
29-Apr-07 RMS Separated base register access checks for 11/780
|
||||
10-May-06 RMS Added access check on system PTE for 11/780
|
||||
Added mbz check in LDPCTX for 11/780
|
||||
@@ -100,11 +101,7 @@ extern int32 ibcnt, ppc;
|
||||
extern FILE *sim_deb;
|
||||
extern DEVICE cpu_dev;
|
||||
|
||||
extern int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 Test (uint32 va, int32 acc, int32 *status);
|
||||
extern int32 ReadLP (uint32 pa);
|
||||
extern void WriteLP (uint32 pa, int32 val);
|
||||
extern void set_map_reg (void);
|
||||
extern void zap_tb (int stb);
|
||||
extern void zap_tb_ent (uint32 va);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_fpa.c - VAX f_, d_, g_floating instructions
|
||||
|
||||
Copyright (c) 1998-2006, Robert M Supnik
|
||||
Copyright (c) 1998-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -23,6 +23,7 @@
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
16-May-06 RMS Fixed bug in 32b floating multiply routine
|
||||
Fixed bug in 64b extended modulus routine
|
||||
03-May-06 RMS Fixed POLYD, POLYG to clear R4, R5
|
||||
@@ -59,8 +60,6 @@ extern int32 PSL;
|
||||
extern int32 p1;
|
||||
extern jmp_buf save_env;
|
||||
|
||||
extern int32 Read (uint32 va, int32 size, int32 acc);
|
||||
|
||||
#if defined (USE_INT64)
|
||||
|
||||
#define M64 0xFFFFFFFFFFFFFFFF /* 64b */
|
||||
|
||||
15
VAX/vax_io.c
15
VAX/vax_io.c
@@ -1,6 +1,6 @@
|
||||
/* vax_io.c: VAX 3900 Qbus IO simulator
|
||||
|
||||
Copyright (c) 1998-2005, Robert M Supnik
|
||||
Copyright (c) 1998-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -25,6 +25,8 @@
|
||||
|
||||
qba Qbus adapter
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
25-Jan-08 RMS Fixed declarations (from Mark Pizzolato)
|
||||
03-Dec-05 RMS Added SHOW QBA VIRT and ex/dep via map
|
||||
05-Oct-05 RMS Fixed bug in autoconfiguration (missing XU)
|
||||
25-Jul-05 RMS Revised autoconfiguration algorithm and interface
|
||||
@@ -116,13 +118,6 @@ extern int32 ssc_bto;
|
||||
extern jmp_buf save_env;
|
||||
extern int32 sim_switches;
|
||||
extern DEVICE *sim_devices[];
|
||||
|
||||
extern int32 ReadB (uint32 pa);
|
||||
extern int32 ReadW (uint32 pa);
|
||||
extern int32 ReadL (uint32 pa);
|
||||
extern void WriteB (uint32 pa, int32 val);
|
||||
extern void WriteW (uint32 pa, int32 val);
|
||||
extern void WriteL (uint32 pa, int32 val);
|
||||
extern FILE *sim_log;
|
||||
|
||||
t_stat dbl_rd (int32 *data, int32 addr, int32 access);
|
||||
@@ -243,7 +238,7 @@ return;
|
||||
longword of data
|
||||
*/
|
||||
|
||||
int32 ReadIO (int32 pa, int32 lnt)
|
||||
int32 ReadIO (uint32 pa, int32 lnt)
|
||||
{
|
||||
int32 iod;
|
||||
|
||||
@@ -264,7 +259,7 @@ return iod;
|
||||
none
|
||||
*/
|
||||
|
||||
void WriteIO (int32 pa, int32 val, int32 lnt)
|
||||
void WriteIO (uint32 pa, int32 val, int32 lnt)
|
||||
{
|
||||
if (lnt == L_BYTE) WriteQb (pa, val, WRITEB);
|
||||
else if (lnt == L_WORD) WriteQb (pa, val, WRITE);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_mmu.c - VAX memory management
|
||||
|
||||
Copyright (c) 1998-2007, Robert M Supnik
|
||||
Copyright (c) 1998-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -23,6 +23,7 @@
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
29-Apr-07 RMS Added address masking for system page table reads
|
||||
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
|
||||
30-Sep-04 RMS Comment and formating changes
|
||||
@@ -101,14 +102,6 @@ t_stat tlb_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
|
||||
t_stat tlb_reset (DEVICE *dptr);
|
||||
|
||||
TLBENT fill (uint32 va, int32 lnt, int32 acc, int32 *stat);
|
||||
int32 ReadB (uint32 pa);
|
||||
void WriteB (uint32 pa, int32 val);
|
||||
int32 ReadW (uint32 pa);
|
||||
void WriteW (uint32 pa, int32 val);
|
||||
int32 ReadL (uint32 pa);
|
||||
void WriteL (uint32 pa, int32 val);
|
||||
int32 ReadLP (uint32 pa);
|
||||
void WriteLP (uint32 pa, int32 val);
|
||||
extern int32 ReadIO (uint32 pa, int32 lnt);
|
||||
extern void WriteIO (uint32 pa, int32 val, int32 lnt);
|
||||
extern int32 ReadReg (uint32 pa, int32 lnt);
|
||||
@@ -313,7 +306,7 @@ return va & PAMASK; /* ret phys addr */
|
||||
returned data, right justified in 32b longword
|
||||
*/
|
||||
|
||||
int32 ReadB (uint32 pa)
|
||||
SIM_INLINE int32 ReadB (uint32 pa)
|
||||
{
|
||||
int32 dat;
|
||||
|
||||
@@ -326,7 +319,7 @@ else {
|
||||
return ((dat >> ((pa & 3) << 3)) & BMASK);
|
||||
}
|
||||
|
||||
int32 ReadW (uint32 pa)
|
||||
SIM_INLINE int32 ReadW (uint32 pa)
|
||||
{
|
||||
int32 dat;
|
||||
|
||||
@@ -339,7 +332,7 @@ else {
|
||||
return ((dat >> ((pa & 2)? 16: 0)) & WMASK);
|
||||
}
|
||||
|
||||
int32 ReadL (uint32 pa)
|
||||
SIM_INLINE int32 ReadL (uint32 pa)
|
||||
{
|
||||
if (ADDR_IS_MEM (pa)) return M[pa >> 2];
|
||||
mchk_ref = REF_V;
|
||||
@@ -347,7 +340,7 @@ if (ADDR_IS_IO (pa)) return ReadIO (pa, L_LONG);
|
||||
return ReadReg (pa, L_LONG);
|
||||
}
|
||||
|
||||
int32 ReadLP (uint32 pa)
|
||||
SIM_INLINE int32 ReadLP (uint32 pa)
|
||||
{
|
||||
if (ADDR_IS_MEM (pa)) return M[pa >> 2];
|
||||
mchk_va = pa;
|
||||
@@ -365,7 +358,7 @@ return ReadReg (pa, L_LONG);
|
||||
none
|
||||
*/
|
||||
|
||||
void WriteB (uint32 pa, int32 val)
|
||||
SIM_INLINE void WriteB (uint32 pa, int32 val)
|
||||
{
|
||||
if (ADDR_IS_MEM (pa)) {
|
||||
int32 id = pa >> 2;
|
||||
@@ -381,7 +374,7 @@ else {
|
||||
return;
|
||||
}
|
||||
|
||||
void WriteW (uint32 pa, int32 val)
|
||||
SIM_INLINE void WriteW (uint32 pa, int32 val)
|
||||
{
|
||||
if (ADDR_IS_MEM (pa)) {
|
||||
int32 id = pa >> 2;
|
||||
@@ -396,7 +389,7 @@ else {
|
||||
return;
|
||||
}
|
||||
|
||||
void WriteL (uint32 pa, int32 val)
|
||||
SIM_INLINE void WriteL (uint32 pa, int32 val)
|
||||
{
|
||||
if (ADDR_IS_MEM (pa)) M[pa >> 2] = val;
|
||||
else {
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* vax_octa.c - VAX octaword and h_floating instructions
|
||||
|
||||
Copyright (c) 2004-2006, Robert M Supnik
|
||||
Copyright (c) 2004-2008, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -25,6 +25,7 @@
|
||||
|
||||
This module simulates the VAX h_floating instruction set.
|
||||
|
||||
28-May-08 RMS Inlined physical memory routines
|
||||
10-May-06 RMS Fixed bug in reported VA on faulting cross-page write
|
||||
03-May-06 RMS Fixed MNEGH to test negated sign, clear C
|
||||
Fixed carry propagation in qp_inc, qp_neg, qp_add
|
||||
@@ -50,8 +51,6 @@ extern int32 trpirq;
|
||||
extern int32 p1;
|
||||
extern jmp_buf save_env;
|
||||
|
||||
extern int32 Read (uint32 va, int32 size, int32 acc);
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 Test (uint32 va, int32 acc, int32 *status);
|
||||
|
||||
#define WORDSWAP(x) ((((x) & WMASK) << 16) | (((x) >> 16) & WMASK))
|
||||
|
||||
@@ -254,7 +254,6 @@ int32 tmr1_inta (void);
|
||||
int32 parity (int32 val, int32 odd);
|
||||
t_stat sysd_powerup (void);
|
||||
|
||||
extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
|
||||
extern int32 cqmap_rd (int32 pa);
|
||||
extern void cqmap_wr (int32 pa, int32 val, int32 lnt);
|
||||
|
||||
@@ -441,6 +441,22 @@ typedef struct {
|
||||
#define LOG_CPU_R 0x2 /* REI */
|
||||
#define LOG_CPU_P 0x4 /* context */
|
||||
|
||||
/* Function prototypes for virtual memory interface */
|
||||
|
||||
int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||
void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||
|
||||
/* Function prototypes for physical memory interface (inlined) */
|
||||
|
||||
SIM_INLINE int32 ReadB (uint32 pa);
|
||||
SIM_INLINE int32 ReadW (uint32 pa);
|
||||
SIM_INLINE int32 ReadL (uint32 pa);
|
||||
SIM_INLINE int32 ReadLP (uint32 pa);
|
||||
SIM_INLINE void WriteB (uint32 pa, int32 val);
|
||||
SIM_INLINE void WriteW (uint32 pa, int32 val);
|
||||
SIM_INLINE void WriteL (uint32 pa, int32 val);
|
||||
void WriteLP (uint32 pa, int32 val);
|
||||
|
||||
/* Function prototypes for I/O */
|
||||
|
||||
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf);
|
||||
|
||||
Reference in New Issue
Block a user