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mirror of https://github.com/simh/simh.git synced 2026-05-09 16:22:21 +00:00

PDP11: Add missing descriptive info for various device SHOW commands

This commit is contained in:
Mark Pizzolato
2022-07-26 18:42:58 -07:00
parent 6fe6b38228
commit 67c8534055
8 changed files with 65 additions and 65 deletions

View File

@@ -587,7 +587,7 @@ REG cpu_reg[] = {
MTAB cpu_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "TYPE", NULL,
NULL, &cpu_show_model },
NULL, &cpu_show_model, NULL, "Display current model features" },
#if !defined (UC15)
{ MTAB_XTD|MTAB_VDV, MOD_1103, NULL, "11/03", &cpu_set_model, NULL, NULL, "Set CPU type to 11/03" },
{ MTAB_XTD|MTAB_VDV, MOD_1104, NULL, "11/04", &cpu_set_model, NULL, NULL, "Set CPU type to 11/04" },

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@@ -218,13 +218,13 @@ REG pclk_reg[] = {
};
MTAB pclk_mod[] = {
{ UNIT_LINE50HZ, UNIT_LINE50HZ, "50 Hz Line Frequency", "50HZ", &pclk_set_line },
{ UNIT_LINE50HZ, 0, "60 Hz Line Frequency", "60HZ", &pclk_set_line },
{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL, NULL, &pclk_show_freq, NULL },
{ UNIT_LINE50HZ, UNIT_LINE50HZ, "50 Hz Line Frequency", "50HZ", &pclk_set_line, NULL, NULL, "50 ticks per second" },
{ UNIT_LINE50HZ, 0, "60 Hz Line Frequency", "60HZ", &pclk_set_line, NULL, NULL, "60 ticks per second" },
{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL, NULL, &pclk_show_freq, NULL, "Clock tick frequency" },
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
&set_vec, &show_vec, NULL },
&set_vec, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};

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@@ -111,9 +111,9 @@ REG ptr_reg[] = {
MTAB ptr_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};
@@ -162,9 +162,9 @@ REG ptp_reg[] = {
MTAB ptp_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};

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@@ -227,9 +227,9 @@ REG mba0_reg[] = {
MTAB mba0_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0100, "ADDRESS", "ADDRESS",
&set_addr, &show_addr, NULL },
&set_addr, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
&set_vec, &show_vec, NULL },
&set_vec, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};
@@ -260,9 +260,9 @@ REG mba1_reg[] = {
MTAB mba1_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0040, "ADDRESS", "ADDRESS",
&set_addr, &show_addr, NULL },
&set_addr, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
&set_vec, &show_vec, NULL },
&set_vec, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};
@@ -293,9 +293,9 @@ REG mba2_reg[] = {
MTAB mba2_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0040, "ADDRESS", "ADDRESS",
&set_addr, &show_addr, NULL },
&set_addr, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
&set_vec, &show_vec, NULL },
&set_vec, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};

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@@ -190,14 +190,14 @@ MTAB rx_mod[] = {
&set_writelock, NULL, NULL, "Write lock floppy drive" },
#if defined (VM_PDP11)
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 004, "ADDRESS", "ADDRESS",
&set_addr, &show_addr, NULL },
&set_addr, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
&set_vec, &show_vec, NULL },
&set_vec, &show_vec, NULL, "Interrupt vector" },
#else
{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
#endif
{ 0 }
};

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@@ -144,9 +144,9 @@ MTAB tti_mod[] = {
{ MTAB_XTD|MTAB_VDV, TT_PAR_ODD, NULL, "ODD", &tty_set_parity, NULL, NULL, "Odd Parity" },
{ MTAB_XTD|MTAB_VDV, 0, "MODE", NULL, NULL, &sim_tt_show_modepar, NULL, "Mode and Parity" },
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};
@@ -210,9 +210,9 @@ MTAB tto_mod[] = {
{ MTAB_XTD|MTAB_VDV, TT_PAR_ODD, NULL, "ODD", &tty_set_parity, NULL, NULL, "Odd Parity" },
{ MTAB_XTD|MTAB_VDV, 0, "MODE", NULL, NULL, &sim_tt_show_modepar, NULL, "Mode and Parity" },
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};
@@ -262,15 +262,15 @@ REG clk_reg[] = {
MTAB clk_mod[] = {
{ MTAB_XTD|MTAB_VDV, 50, NULL, "50HZ",
&clk_set_freq, NULL, NULL },
&clk_set_freq, NULL, NULL, "60 ticks per second" },
{ MTAB_XTD|MTAB_VDV, 60, NULL, "60HZ",
&clk_set_freq, NULL, NULL },
&clk_set_freq, NULL, NULL, "60 ticks per second" },
{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL,
NULL, &clk_show_freq, NULL },
NULL, &clk_show_freq, NULL, "Clock tick frequency" },
{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};

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@@ -140,9 +140,9 @@ REG uca_reg[] = {
MTAB uc15_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 006, "ADDRESS", NULL,
NULL, &show_addr, NULL },
NULL, &show_addr, NULL, "Bus address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
NULL, &show_vec, NULL, "Interrupt vector" },
{ 0 }
};