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https://github.com/simh/simh.git
synced 2026-05-09 16:22:21 +00:00
PDP11: Add missing descriptive info for various device SHOW commands
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@@ -587,7 +587,7 @@ REG cpu_reg[] = {
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MTAB cpu_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "TYPE", NULL,
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NULL, &cpu_show_model },
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NULL, &cpu_show_model, NULL, "Display current model features" },
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#if !defined (UC15)
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{ MTAB_XTD|MTAB_VDV, MOD_1103, NULL, "11/03", &cpu_set_model, NULL, NULL, "Set CPU type to 11/03" },
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{ MTAB_XTD|MTAB_VDV, MOD_1104, NULL, "11/04", &cpu_set_model, NULL, NULL, "Set CPU type to 11/04" },
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@@ -218,13 +218,13 @@ REG pclk_reg[] = {
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};
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MTAB pclk_mod[] = {
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{ UNIT_LINE50HZ, UNIT_LINE50HZ, "50 Hz Line Frequency", "50HZ", &pclk_set_line },
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{ UNIT_LINE50HZ, 0, "60 Hz Line Frequency", "60HZ", &pclk_set_line },
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{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL, NULL, &pclk_show_freq, NULL },
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{ UNIT_LINE50HZ, UNIT_LINE50HZ, "50 Hz Line Frequency", "50HZ", &pclk_set_line, NULL, NULL, "50 ticks per second" },
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{ UNIT_LINE50HZ, 0, "60 Hz Line Frequency", "60HZ", &pclk_set_line, NULL, NULL, "60 ticks per second" },
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{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL, NULL, &pclk_show_freq, NULL, "Clock tick frequency" },
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -111,9 +111,9 @@ REG ptr_reg[] = {
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MTAB ptr_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -162,9 +162,9 @@ REG ptp_reg[] = {
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MTAB ptp_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -227,9 +227,9 @@ REG mba0_reg[] = {
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MTAB mba0_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0100, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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&set_addr, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -260,9 +260,9 @@ REG mba1_reg[] = {
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MTAB mba1_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0040, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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&set_addr, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -293,9 +293,9 @@ REG mba2_reg[] = {
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MTAB mba2_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0040, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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&set_addr, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -190,14 +190,14 @@ MTAB rx_mod[] = {
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&set_writelock, NULL, NULL, "Write lock floppy drive" },
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#if defined (VM_PDP11)
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 004, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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&set_addr, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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&set_vec, &show_vec, NULL, "Interrupt vector" },
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#else
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{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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#endif
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{ 0 }
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};
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@@ -144,9 +144,9 @@ MTAB tti_mod[] = {
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{ MTAB_XTD|MTAB_VDV, TT_PAR_ODD, NULL, "ODD", &tty_set_parity, NULL, NULL, "Odd Parity" },
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{ MTAB_XTD|MTAB_VDV, 0, "MODE", NULL, NULL, &sim_tt_show_modepar, NULL, "Mode and Parity" },
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -210,9 +210,9 @@ MTAB tto_mod[] = {
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{ MTAB_XTD|MTAB_VDV, TT_PAR_ODD, NULL, "ODD", &tty_set_parity, NULL, NULL, "Odd Parity" },
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{ MTAB_XTD|MTAB_VDV, 0, "MODE", NULL, NULL, &sim_tt_show_modepar, NULL, "Mode and Parity" },
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -262,15 +262,15 @@ REG clk_reg[] = {
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MTAB clk_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 50, NULL, "50HZ",
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&clk_set_freq, NULL, NULL },
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&clk_set_freq, NULL, NULL, "60 ticks per second" },
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{ MTAB_XTD|MTAB_VDV, 60, NULL, "60HZ",
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&clk_set_freq, NULL, NULL },
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&clk_set_freq, NULL, NULL, "60 ticks per second" },
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{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL,
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NULL, &clk_show_freq, NULL },
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NULL, &clk_show_freq, NULL, "Clock tick frequency" },
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{ MTAB_XTD|MTAB_VDV, 0, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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@@ -140,9 +140,9 @@ REG uca_reg[] = {
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MTAB uc15_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 006, "ADDRESS", NULL,
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NULL, &show_addr, NULL },
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "VECTOR", NULL,
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NULL, &show_vec, NULL },
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NULL, &show_vec, NULL, "Interrupt vector" },
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{ 0 }
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};
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