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SWTP6800, IBMPC, IBMPCXT, isys8010, isys8020, imds-225: sim_interval fix

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Properly sequence change to sim_interval so that debug behavior is as
expected.
This commit is contained in:
Bill
2016-10-11 15:56:10 -07:00
parent 5e9d8e0996
commit 6b5ab2bc06
5 changed files with 6 additions and 8 deletions
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2
Intel-Systems/common/i8008.c
View File

@@ -345,7 +345,6 @@ int32 sim_instr (void)
if (reason = sim_process_event())
break;
}
sim_interval--; /* countdown clock */
if (int_req > 0) { /* interrupt? */
// sim_printf("\ni8008: int_req=%04X", int_req);
@@ -365,6 +364,7 @@ int32 sim_instr (void)
break;
}
sim_interval--; /* countdown clock */
PCX = PC;
if (uptr->flags & UNIT_TRACE) {

2
Intel-Systems/common/i8080.c
View File

@@ -416,7 +416,6 @@ int32 sim_instr (void)
if ((reason = sim_process_event()))
break;
}
sim_interval--; /* countdown clock */
if (int_req > 0) { /* interrupt? */
// sim_printf("\ni8080: int_req=%04X IM=%04X", int_req, IM);
@@ -460,6 +459,7 @@ int32 sim_instr (void)
break;
}
sim_interval--; /* countdown clock */
PCX = PC;
// fprintf(fpd, "%04X\n", PC);

5
Intel-Systems/common/i8088.c
View File

@@ -587,7 +587,6 @@ int32 sim_instr (void)
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break;
}
sim_interval--; /* countdown clock */
if (int_req > 0) { /* interrupt? */
@@ -601,12 +600,10 @@ int32 sim_instr (void)
break;
}
sim_interval--; /* countdown clock */
PCX = IP;
IR = OP = fetch_byte(0); /* fetch instruction */
/* Handle below all operations which refer to registers or
register pairs. After that, a large switch statement
takes care of all other opcodes */