github.com/simh.simh
1
0
Fork 0
mirror of https://github.com/simh/simh.git synced 2026-04-28 04:44:55 +00:00
Code Releases Activity

PDP8, PDP18b: Fixed RF, DF, DT device bug if read overwrites WC memory location

Browse Source
This commit is contained in:
Bob Supnik
2021-06-08 01:43:32 -07:00
committed by Mark Pizzolato
parent e039527a34
commit 6edc4994eb
5 changed files with 42 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
PDP8/pdp8_dt.c
View File

@@ -25,6 +25,7 @@
dt TC08/TU56 DECtape
03-May-21 RMS Fixed bug if read overwrites WC memory location
01-Jul-20 RMS Fixed comments in bootstrap (Bernhard Baehr)
15-Mar-17 RMS Fixed dt_seterr to clear successor states
17-Sep-13 RMS Changed to use central set_bootpc routine
@@ -764,10 +765,10 @@ switch (fnc) { /* at speed, check fnc *
sim_activate (uptr, DTU_LPERB (uptr) * dt_ltime);/* sched next block */
M[DT_WC] = (M[DT_WC] + 1) & 07777; /* incr word cnt */
ma = DTB_GETMEX (dtsb) | M[DT_CA]; /* get mem addr */
if (MEM_ADDR_OK (ma)) /* store block # */
M[ma] = blk & 07777;
if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
dtsb = dtsb | DTB_DTF; /* set DTF */
if (MEM_ADDR_OK (ma)) /* store block # */
M[ma] = blk & 07777;
break;
case DTS_OFR: /* off reel */
@@ -806,22 +807,22 @@ switch (fnc) { /* at speed, check fnc *
case 0: /* normal read */
M[DT_WC] = (M[DT_WC] + 1) & 07777; /* incr WC, CA */
M[DT_CA] = (M[DT_CA] + 1) & 07777;
if (M[DT_WC] == 0) /* wc ovf? */
dt_substate = DTO_WCO;
ma = DTB_GETMEX (dtsb) | M[DT_CA]; /* get mem addr */
ba = (blk * DTU_BSIZE (uptr)) + wrd; /* buffer ptr */
dat = fbuf[ba]; /* get tape word */
if (dir) /* rev? comp obv */
dat = dt_comobv (dat);
if (MEM_ADDR_OK (ma)) /* mem addr legal? */
M[ma] = dat;
if (M[DT_WC] == 0) /* wc ovf? */
dt_substate = DTO_WCO; /* fall through */
M[ma] = dat; /* fall through */
case DTO_WCO: /* wc ovf, not sob */
if (wrd != (dir? 0: DTU_BSIZE (uptr) - 1)) /* not last? */
sim_activate (uptr, DT_WSIZE * dt_ltime);
else {
dt_substate = dt_substate | DTO_SOB;
sim_activate (uptr, ((2 * DT_HTLIN) + DT_WSIZE) * dt_ltime);
if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
dtsb = dtsb | DTB_DTF; /* set DTF */
}
break;
@@ -910,6 +911,8 @@ switch (fnc) { /* at speed, check fnc *
relpos = DT_LIN2OF (uptr->pos, uptr); /* cur pos in blk */
M[DT_WC] = (M[DT_WC] + 1) & 07777; /* incr WC, CA */
M[DT_CA] = (M[DT_CA] + 1) & 07777;
if (M[DT_WC] == 0)
dt_substate = DTO_WCO;
ma = DTB_GETMEX (dtsb) | M[DT_CA]; /* get mem addr */
if ((relpos >= DT_HTLIN) && /* in data zone? */
(relpos < (DTU_LPERB (uptr) - DT_HTLIN))) {
@@ -923,9 +926,7 @@ switch (fnc) { /* at speed, check fnc *
sim_activate (uptr, DT_WSIZE * dt_ltime);
if (MEM_ADDR_OK (ma)) /* mem addr legal? */
M[ma] = dat;
if (M[DT_WC] == 0)
dt_substate = DTO_WCO;
if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
dtsb = dtsb | DTB_DTF; /* set DTF */
break;