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Official simh-V3.9-0-rc3 Merge

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This commit is contained in:
Mark Pizzolato
2012-04-23 04:02:02 -07:00
parent 15570e5e8d
commit 73bd8c36e7
62 changed files with 5364 additions and 3806 deletions
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5
PDP11/pdp11_dc.c
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@@ -1,6 +1,6 @@
/* pdp11_dc.c: PDP-11 DC11 multiple terminal interface simulator
Copyright (c) 1993-2011, Robert M Supnik
Copyright (c) 1993-2012, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
dci,dco DC11 terminal input/output
18-Apr-2012 RMS Modified to use clock coscheduling
17-Aug-2011 RMS Added AUTOCONFIGURE modifier
19-Nov-2008 RMS Revised for common TMXR show routines
Revised to autoconfigure vectors
@@ -367,7 +368,7 @@ int32 ln, c, temp;
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return SCPE_OK;
sim_activate (uptr, tmxr_poll); /* continue poll */
sim_activate (uptr, clk_cosched (tmxr_poll)); /* continue poll */
ln = tmxr_poll_conn (&dcx_desc); /* look for connect */
if (ln >= 0) { /* got one? */
dcx_ldsc[ln].rcve = 1; /* set rcv enb */

5
PDP11/pdp11_dl.c
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@@ -1,6 +1,6 @@
/* pdp11_dl.c: PDP-11 multiple terminal interface simulator
Copyright (c) 1993-2011, Robert M Supnik
Copyright (c) 1993-2012, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
dli,dlo DL11 terminal input/output
18-Apr-2012 RMS Modified to use clock coscheduling
17-Aug-2011 RMS Added AUTOCONFIGURE modifier
19-Nov-2008 RMS Revised for common TMXR show routines
Revised to autoconfigure vectors
@@ -330,7 +331,7 @@ int32 ln, c, temp;
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return SCPE_OK;
sim_activate (uptr, tmxr_poll); /* continue poll */
sim_activate (uptr, clk_cosched (tmxr_poll)); /* continue poll */
ln = tmxr_poll_conn (&dlx_desc); /* look for connect */
if (ln >= 0) { /* got one? rcv enb */
dlx_ldsc[ln].rcve = 1;

2
PDP11/pdp11_dz.c
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@@ -410,7 +410,7 @@ if (t) { /* any enabled? */
dz_update_rcvi (); /* upd rcv intr */
tmxr_poll_tx (&dz_desc); /* poll output */
dz_update_xmti (); /* upd xmt intr */
sim_activate (uptr, tmxr_poll); /* reactivate */
sim_activate (uptr, clk_cosched (tmxr_poll)); /* reactivate */
}
return SCPE_OK;
}

10
PDP11/pdp11_stddev.c
View File

@@ -1,6 +1,6 @@
/* pdp11_stddev.c: PDP-11 standard I/O devices simulator
Copyright (c) 1993-2008, Robert M Supnik
Copyright (c) 1993-2012, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
tti,tto DL11 terminal input/output
clk KW11L (and other) line frequency clock
18-Apr-12 RMS Modified to use clock coscheduling
20-May-08 RMS Standardized clock delay at 1mips
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
29-Oct-06 RMS Synced keyboard and clock
@@ -287,7 +288,8 @@ t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmr_poll)));
/* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
@@ -307,7 +309,7 @@ t_stat tti_reset (DEVICE *dptr)
tti_unit.buf = 0;
tti_csr = 0;
CLR_INT (TTI);
sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
return SCPE_OK;
}
@@ -475,7 +477,7 @@ clk_tps = clk_default; /* set default tps */
clk_csr = CSR_DONE; /* set done */
CLR_INT (CLK);
sim_rtcn_init (clk_unit.wait, TMR_CLK); /* init line clock */
sim_activate_abs (&clk_unit, clk_unit.wait); /* activate unit */
sim_activate (&clk_unit, clk_unit.wait); /* activate unit */
tmr_poll = clk_unit.wait; /* set timer poll */
tmxr_poll = clk_unit.wait; /* set mux poll */
return SCPE_OK;

6
PDP11/pdp11_xq.c
View File

@@ -2137,12 +2137,12 @@ void xq_start_receiver(CTLR* xq)
/* start the read service timer or enable asynch reading as appropriate */
if (xq->var->must_poll)
sim_activate(xq->unit, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
sim_activate(xq->unit, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
else
if ((xq->var->poll == 0) || (xq->var->mode == XQ_T_DELQA_PLUS))
eth_set_async(xq->var->etherface, xq->var->coalesce_latency_ticks);
else
sim_activate(xq->unit, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
sim_activate(xq->unit, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
}
void xq_stop_receiver(CTLR* xq)
@@ -2517,7 +2517,7 @@ t_stat xq_svc(UNIT* uptr)
/* resubmit service timer */
if ((xq->var->must_poll) || (xq->var->poll && (xq->var->mode != XQ_T_DELQA_PLUS)))
sim_activate(uptr, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
sim_activate(uptr, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
return SCPE_OK;
}

49
PDP11/pdp11_xu.c
View File

@@ -105,6 +105,7 @@ extern FILE *sim_log;
t_stat xu_rd(int32* data, int32 PA, int32 access);
t_stat xu_wr(int32 data, int32 PA, int32 access);
t_stat xu_svc(UNIT * uptr);
t_stat xu_tmrsvc(UNIT * uptr);
t_stat xu_reset (DEVICE * dptr);
t_stat xu_attach (UNIT * uptr, char * cptr);
t_stat xu_detach (UNIT * uptr);
@@ -132,7 +133,8 @@ DIB xua_dib = { IOBA_XU, IOLN_XU, &xu_rd, &xu_wr,
1, IVCL (XU), VEC_XU, {&xu_int} };
UNIT xua_unit[] = {
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) }, /* receive timer */
{ UDATA (&xu_tmrsvc, UNIT_IDLE|UNIT_DIS, 0) }
};
struct xu_device xua = {
@@ -185,7 +187,7 @@ DEBTAB xu_debug[] = {
DEVICE xu_dev = {
"XU", xua_unit, xua_reg, xu_mod,
1, XU_RDX, 8, 1, XU_RDX, 8,
2, XU_RDX, 8, 1, XU_RDX, 8,
&xu_ex, &xu_dep, &xu_reset,
NULL, &xu_attach, &xu_detach,
&xua_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_DEBUG,
@@ -554,8 +556,6 @@ t_stat xu_svc(UNIT* uptr)
{
int queue_size;
CTLR* xu = xu_unit2ctlr(uptr);
const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00};
const int one_second = clk_tps * tmr_poll;
/* First pump any queued packets into the system */
if ((xu->var->ReadQ.count > 0) && ((xu->var->pcsr1 & PCSR1_STATE) == STATE_RUNNING))
@@ -574,30 +574,39 @@ t_stat xu_svc(UNIT* uptr)
if ((xu->var->ReadQ.count > 0) && ((xu->var->pcsr1 & PCSR1_STATE) == STATE_RUNNING))
xu_process_receive(xu);
/* send identity packet when timer expires */
if (--xu->var->idtmr <= 0) {
if ((xu->var->mode & MODE_DMNT) == 0) /* if maint msg is not disabled */
xu_system_id(xu, mop_multicast, 0); /* then send ID packet */
xu->var->idtmr = XU_ID_TIMER_VAL * one_second; /* reset timer */
}
/* has one second timer expired? if so, update stats and reset timer */
if (++xu->var->sectmr >= XU_SERVICE_INTERVAL) {
upd_stat16 (&xu->var->stats.secs, 1);
xu->var->sectmr = 0;
}
/* resubmit service timer if controller not halted */
switch (xu->var->pcsr1 & PCSR1_STATE) {
case STATE_READY:
case STATE_RUNNING:
sim_activate(&xu->unit[0], tmxr_poll);
sim_activate(&xu->unit[0], clk_cosched(tmxr_poll));
break;
};
return SCPE_OK;
}
t_stat xu_tmrsvc(UNIT* uptr)
{
CTLR* xu = xu_unit2ctlr(uptr);
const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00};
const int one_second = clk_tps * tmr_poll;
/* send identity packet when timer expires */
if (--xu->var->idtmr <= 0) {
if ((xu->var->mode & MODE_DMNT) == 0) /* if maint msg is not disabled */
xu_system_id(xu, mop_multicast, 0); /* then send ID packet */
xu->var->idtmr = XU_ID_TIMER_VAL; /* reset timer */
}
/* update stats */
upd_stat16 (&xu->var->stats.secs, 1);
/* resubmit service timer */
sim_activate(uptr, one_second);
return SCPE_OK;
}
void xu_write_callback (CTLR* xu, int status)
{
xu->var->write_buffer.status = status;
@@ -673,6 +682,10 @@ t_stat xu_sw_reset (CTLR* xu)
/* activate device if not disabled */
if ((xu->dev->flags & DEV_DIS) == 0) {
sim_activate_abs(&xu->unit[0], clk_cosched (tmxr_poll));
/* start service timer */
if (xu->var->etherface)
sim_activate_abs(&xu->unit[1], tmr_poll * clk_tps);
}
/* clear load_server address */