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SIGMA: Fix three kinds of error in I/O modules.
Discovered while getting standalone System Exerciser to run:
IO: DVT_NOTDEV macro incorrect, Device mapping algorithm creates false
dispatch points.
This mapped Multi Unit Controller and Single Unit Controller to same
device.
DP, DP, MT, RAD: Test for non-existent device returns wrong status.
DP, DK, MT: TIO status should return non-operational for unattached device.
This commit is contained in:
committed by
Mark Pizzolato
parent
b523caac82
commit
93fe10c1e2
25
sigma/sigma_io.c
Executable file → Normal file
25
sigma/sigma_io.c
Executable file → Normal file
@@ -1,6 +1,6 @@
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/* sigma_io.c: XDS Sigma IO simulator
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/* sigma_io.c: XDS Sigma IO simulator
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Copyright (c) 2007-2022, Robert M Supnik
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Copyright (c) 2007-2024, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -23,6 +23,9 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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11-Feb-2024 RMS Fixed false dispatch bug (Ken Rector)
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04-May-2023 RMS Fixed location 21 usage in even register case (Ken Rector)
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15-Dec-2022 RMS Moved SIO interrupt test to devices
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23-Jul-2022 RMS Made chan_ctl_time accessible as a register
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21-Jul-2022 RMS Added numeric channel numbers to SET/SHOW
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07-Jul-2022 RMS Fixed dangling else in read/write direct (Ken Rector)
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@@ -473,14 +476,27 @@ CC |= CC1|CC2; /* no recognition */
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return 0;
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}
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/* Initiate I/O instruction */
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/* Initiate I/O instruction
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False dispatch problem. Although device numbers are not permitted to overlap,
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there is nothing to stop programs from issuing IO instructions to a multi-
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unit device address using its single-unit counterpart, or vice-versa.
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For example, an IO address of 0x00 will map to the dispatch used for
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0x80, and vice versa. This routine must detect that the device
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address actually agrees with the type of device in that dispatch slot.
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*/
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t_bool io_init_inst (uint32 rn, uint32 ad, uint32 ch, uint32 dev, uint32 r0)
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{
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uint32 loc20;
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t_bool ch_mu, dva_mu;
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if (ch >= chan_num) /* bad chan? */
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if ((dev >= CHAN_N_DEV) || (ch >= chan_num)) /* bad dev or chan? */
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return FALSE;
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ch_mu = (chan[ch].chsf[dev] & CHSF_MU) != 0; /* does chan think MU? */
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dva_mu = (ad & DVA_MU) != 0; /* is dva MU? */
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if (ch_mu != dva_mu) /* not the same? */
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return FALSE; /* dev not there */
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loc20 = ((ad & 0xFF) << 24) | /* <0:7> = dev ad */
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((rn & 1) | (rn? 3: 0) << 22) | /* <8:9> = reg ind */
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(r0 & (cpu_tab[cpu_model].pamask >> 1)); /* <14/16:31> = r0 */
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@@ -493,7 +509,6 @@ return (chan[ch].disp[dev] != NULL)? TRUE: FALSE;
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uint32 io_set_status (uint32 rn, uint32 ch, uint32 dev, uint32 dvst, t_bool tdv)
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{
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uint32 mrgst;
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uint32 odd = rn & 1;
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if ((rn != 0) && !(dvst & DVT_NOST)) { /* return status? */
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if (tdv)
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