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mirror of https://github.com/simh/simh.git synced 2026-05-03 06:28:41 +00:00

Intel-Systems: Reorganize for clean builds with Release targets.

This commit is contained in:
Bill Beech
2020-08-02 14:19:52 -07:00
parent 6fdc447410
commit 964cb721ed
69 changed files with 2805 additions and 425 deletions

View File

@@ -75,8 +75,8 @@ extern t_stat i8259_reset (DEVICE *dptr);
extern uint8 i8259a(t_bool io, uint8 data, uint8 devnum);
extern uint8 i8259b(t_bool io, uint8 data, uint8 devnum);
extern DEVICE i8259_dev;
extern uint8 EPROM_get_mbyte(uint16 addr);
extern UNIT EPROM_unit;
extern uint8 EPROM_get_mbyte(uint16 addr, uint8 devnum);
extern UNIT EPROM_unit[];
extern t_stat EPROM_reset (DEVICE *dptr, uint16 base, uint16 size);
extern uint8 RAM_get_mbyte(uint16 addr);
extern void RAM_put_mbyte(uint16 addr, uint8 val);
@@ -87,7 +87,7 @@ extern t_stat i8253_cfg(uint8 base, uint8 devnum);
extern t_stat i8255_cfg(uint8 base, uint8 devnum);
extern t_stat i8259_cfg(uint8 base, uint8 devnum);
extern t_stat RAM_cfg(uint16 base, uint16 size);
extern t_stat EPROM_cfg(uint16 base, uint16 size);
extern t_stat EPROM_cfg(uint16 base, uint16 size, uint8 devnum);
extern t_stat multibus_cfg();
// globals
@@ -102,7 +102,7 @@ t_stat SBC_config(void)
i8255_cfg(I8255_BASE_0, 0);
i8255_cfg(I8255_BASE_1, 1);
i8259_cfg(I8259_BASE, 0);
EPROM_cfg(ROM_BASE, ROM_SIZE);
EPROM_cfg(ROM_BASE, ROM_SIZE, 0);
RAM_cfg(RAM_BASE, RAM_SIZE);
return SCPE_OK;
}
@@ -131,8 +131,8 @@ uint8 get_mbyte(uint16 addr)
{
/* if local EPROM handle it */
if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */
if ((addr >= EPROM_unit.u3) && ((uint16)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) {
return EPROM_get_mbyte(addr);
if ((addr >= EPROM_unit->u3) && ((uint16)addr <= (EPROM_unit->u3 + EPROM_unit->capac))) {
return EPROM_get_mbyte(addr, 0);
}
} /* if local RAM handle it */
if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */
@@ -160,7 +160,7 @@ void put_mbyte(uint16 addr, uint8 val)
{
/* if local EPROM handle it */
if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */
if ((addr >= EPROM_unit.u3) && ((uint16)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) {
if ((addr >= EPROM_unit->u3) && ((uint16)addr <= (EPROM_unit->u3 + EPROM_unit->capac))) {
sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, PCX);
return;
}

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@@ -66,9 +66,15 @@ DEVICE *sim_devices[] = {
&EPROM_dev,
&RAM_dev,
&multibus_dev,
#if defined (SBC064_NUM) && (SBC064_NUM > 0)
&isbc064_dev,
#endif
#if defined (SBC201_NUM) && (SBC201_NUM > 0)
&isbc201_dev,
#endif
#if defined (SBC202_NUM) && (SBC202_NUM > 0)
&isbc202_dev,
#endif
NULL
};