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mirror of https://github.com/simh/simh.git synced 2026-01-26 04:01:38 +00:00

More General cleanup migrate to using sim_printf vs separate calls to printf and fprintf(sim_log).

This commit is contained in:
Mark Pizzolato
2014-10-24 14:37:37 -07:00
parent ebf53c9cda
commit 995ab8f1e2
23 changed files with 118 additions and 117 deletions

View File

@@ -60,7 +60,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
TRACE_PRINT1(DBG_UART_WR,"WR DATA = 0x%02x",chip->obuf);
if (chip->init==3) { /* is fully initialized */
if ((chip->mode & I8251_MODE_BAUD)==I8251_MODE_SYNC) {
printf("i8251: sync mode not implemented\n");
sim_printf("i8251: sync mode not implemented\n");
return STOP_IMPL;
}
if (chip->cmd & I8251_CMD_TXEN) {
@@ -93,7 +93,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
chip->cmd = value;
TRACE_PRINT1(DBG_UART_WR,"WR CMD = 0x%02x",value);
if (value & I8251_CMD_EH) {
printf("i8251: hunt mode not implemented\n");
sim_printf("i8251: hunt mode not implemented\n");
return STOP_IMPL;
}
if (value & I8251_CMD_IR)
@@ -101,7 +101,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
if (value & I8251_CMD_ER)
chip->status &= ~(I8251_ST_FE|I8251_ST_OE|I8251_ST_PE);
if (value & I8251_CMD_SBRK)
printf("i8251: BREAK sent\n");
sim_printf("i8251: BREAK sent\n");
if (value & I8251_CMD_RXE) {
sim_activate(chip->in,chip->in->wait);
} else {

View File

@@ -32,7 +32,7 @@
static t_stat i8255_error(const char* err)
{
printf("I8255: Missing method '%s'\n",err);
sim_printf("I8255: Missing method '%s'\n",err);
return STOP_IMPL;
}

View File

@@ -64,7 +64,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
switch (chip->state) {
default:
case 0: /* after reset */
printf("PIC: write addr=1 without initialization\n");
sim_printf("PIC: write addr=1 without initialization\n");
return SCPE_IOERR;
case 1: /* expect ICW2 */
TRACE_PRINT2(DBG_PIC_WR,"WR ICW2: addr=%d data=0x%x",addr,value);
@@ -73,7 +73,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
chip->state = (chip->icw1 & I8259_ICW1_IC4) ? 4 : 5;
} else {
/* attempt to program cascade mode */
printf("PIC: attempt to program chip for cascade mode - not wired for this!\n");
sim_printf("PIC: attempt to program chip for cascade mode - not wired for this!\n");
chip->state = 0;
return SCPE_IOERR;
}
@@ -82,15 +82,15 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
TRACE_PRINT2(DBG_PIC_WR,"WR ICW4 addr=%d data=0x%x",addr,value);
chip->icw4 = value;
if (chip->icw4 & I8259_ICW4_AEOI) {
printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n");
sim_printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n");
return SCPE_IOERR;
}
if (chip->icw4 & I8259_ICW4_BUF) {
printf("PIC: attempt to program chip for buffered mode - not wired for this!\n");
sim_printf("PIC: attempt to program chip for buffered mode - not wired for this!\n");
return SCPE_IOERR;
}
if (chip->icw4 & I8259_ICW4_SFNM) {
printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n");
sim_printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n");
return SCPE_IOERR;
}
chip->state = 5;
@@ -115,7 +115,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
if (value & I8259_OCW3) { /* ocw3 */
TRACE_PRINT2(DBG_PIC_WR,"WR OCW3 addr=%d data=0x%x",addr,value);
if (value & I8259_OCW3_ESMM) {
printf("PIC: ESMM not yet supported\n");
sim_printf("PIC: ESMM not yet supported\n");
return STOP_IMPL;
}
if (value & I8259_OCW3_POLL) {
@@ -148,7 +148,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
break;
case 0x80: /* rotate in autoeoi (set) */
case 0x00: /* rotate in autoeoi (clear) */
printf("PIC: AEOI not supported\n");
sim_printf("PIC: AEOI not supported\n");
return SCPE_IOERR;
case 0xc0: /* set prio */
chip->prio = value & 7;

View File

@@ -230,14 +230,14 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
if(uptr->capac > 0) {
fgets(header, 4, uptr->fileref);
if(strncmp(header, "IMD", 3)) {
printf("I8272: Only IMD disk images are supported\n");
sim_printf("I8272: Only IMD disk images are supported\n");
chip->drive[i].uptr = NULL;
return SCPE_OPENERR;
}
} else {
/* create a disk image file in IMD format. */
if (diskCreate(uptr->fileref, "$Id: i8272.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) {
printf("I8272: Failed to create IMD disk.\n");
sim_printf("I8272: Failed to create IMD disk.\n");
chip->drive[i].uptr = NULL;
return SCPE_OPENERR;
}
@@ -247,19 +247,19 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
uptr->u3 = IMAGE_TYPE_IMD;
if (uptr->flags & UNIT_I8272_VERBOSE) {
printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr,
sim_printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac);
}
if(uptr->u3 == IMAGE_TYPE_IMD) {
if (uptr->flags & UNIT_I8272_VERBOSE)
printf("--------------------------------------------------------\n");
sim_printf("--------------------------------------------------------\n");
chip->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_I8272_VERBOSE, dptr, DBG_FD_IMD, 0);
if (uptr->flags & UNIT_I8272_VERBOSE)
printf("\n");
sim_printf("\n");
if (chip->drive[i].imd == NULL) {
printf("I8272: IMD disk corrupt.\n");
sim_printf("I8272: IMD disk corrupt.\n");
chip->drive[i].uptr = NULL;
return SCPE_OPENERR;
}
@@ -443,7 +443,7 @@ static t_stat i8272_secread(I8272* chip)
dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_secsz));
if (dip->imd == NULL) {
printf(".imd is NULL!" NLP);
sim_printf(".imd is NULL!" NLP);
return SCPE_STOP;
}
@@ -479,7 +479,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
t_stat rc;
I8272_DRIVE_INFO* dip;
if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) {
printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv);
sim_printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv);
return SCPE_IERR;
}
@@ -504,7 +504,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
*value &= ~I8272_MSR_FDC_BUSY;
break;
default:
printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state);
sim_printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state);
return SCPE_IERR;
}
TRACE_PRINT1(DBG_FD_STATUS,"RD FDC MSR = 0x%02x",*value);
@@ -551,7 +551,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
return SCPE_OK;
default:
printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state);
sim_printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state);
return SCPE_IERR;
}
}
@@ -763,7 +763,7 @@ static t_stat i8272_sensedrive(I8272* chip)
t_bool track0;
if ((dip = i8272_select_drive(chip,chip->cmd[1])) == NULL) {
printf("i8272_sensedrive: i8272_select_drive returns 0\n");
sim_printf("i8272_sensedrive: i8272_select_drive returns 0\n");
st3 = DRIVE_STATUS_FAULT;
track0 = FALSE;
} else {
@@ -929,7 +929,7 @@ t_stat i8272_write(I8272* chip, int addr, uint32 value)
uint8 cmd;
I8272_DRIVE_INFO* dip;
if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) {
printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv);
sim_printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv);
return SCPE_IERR;
}
@@ -1008,7 +1008,7 @@ t_stat i8272_write(I8272* chip, int addr, uint32 value)
return i8272_format(chip);
case I8272_READ_TRACK:
printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX);
sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX);
chip->fdc_sector = 1; /* Read entire track from sector 1...eot */
case I8272_READ_DATA:
case I8272_READ_DELETED_DATA: