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PDQ-3, SAGE: Coverity Fixes
CID Action 1416081 changed variable answer to int 1416082 checked returned values with ASSURE - read error means corrupted target code. 1416088 added return 1416109 This fallthru was intentional - duplicated code to make coverity happy 1416111 This fallthru was intentional - duplicated code to make coverity happy 1416116 This fallthru was intentional - duplicated code to make coverity happy 1416117 This fallthru was intentional - duplicated code to make coverity happy 1416124 protected against negative return 1416142 added ASSURE, however this case won't happen since reg_intpending==true implies positive int level 1416145 checked non-NULL, return SCPE_ARG if NULL 1416150 since only 2 drives are supported, fdc_selected is decoded to 0 and 1 only (allowed 2 and 3 before) 1416152 restrict to 2 drives only 1416166 checked value with ASSURE 1416101 typo: should have been resx 1416106 unnecessary code removed 1416110 this fallthru was intentional - duplicated code to make coverity happy 1416112 this fallthru was intentional - duplicated code to make coverity happy 1416148 change condition to check for negative value 1416179 break was remainder from former logic - removed 1415866 code was remainder from former unimplemented instruction trap - removed
This commit is contained in:
committed by
Mark Pizzolato
parent
489752596b
commit
9a9b5deb9c
@@ -134,7 +134,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
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if (chip->isr & bit) break;
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bit = bit << 1; if (bit==0x100) bit = 1;
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}
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chip->isr &= ~bit; break;
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chip->isr &= ~bit;
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if ((value & I8259_OCW2_MODE) == 0xa0) {
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chip->prio = 7 - i + chip->prio; if (chip->prio>7) chip->prio -= 8;
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}
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@@ -245,7 +245,6 @@ t_stat m68kcpu_peripheral_reset()
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t_stat rc;
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DEVICE** devs = sim_devices;
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DEVICE* dptr;
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if (!devs) return SCPE_IERR;
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while ((dptr = *devs) != NULL) {
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if (dptr != cpudev_self) {
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@@ -1804,7 +1803,7 @@ do_bclr8: SETZ8(res & src1);
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case 000600: case 001600: case 002600: case 003600:
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case 004600: case 005600: case 006600: case 007600: /*chk*/
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src1 = DRX;
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SETF(src1 < 0,FLAG_N);
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SETF((src1 & BIT31) != 0,FLAG_N);
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ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC));
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rc = CCR_N || src1 > res ? m68k_gen_exception(6,&PC) : SCPE_OK;
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break;
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@@ -2534,7 +2533,6 @@ do_neg32: res = m68k_sub32(0,srcx1,0,TRUE);
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CLRF(FLAG_C|FLAG_V);
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rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC);
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break;
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rc = STOP_IMPL; break;
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case 0000200: case 00000220: case 0000230: case 0000240:
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case 0000250: case 00000260: case 0000270: /* and.l -> d*/
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ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC));
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@@ -3186,7 +3184,7 @@ do_ror32: reg = DR+IR_REGY;
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if (cnt) {
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cnt &= 31;
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resx = (resx>>cnt) | (resx<<(32-cnt));
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SETF(MASK_33(res),FLAG_C);
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SETF(MASK_33(resx),FLAG_C);
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*reg = (int32)resx;
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} else {
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CLRF(FLAG_C);
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@@ -115,6 +115,7 @@ static t_stat sioterm_svc(UNIT* uptr)
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chip->crlf = chip->crlf==1 ? 2 : 0; break;
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case 0:
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if (chip->crlf==2) goto set_stat;
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chip->crlf = 0; break;
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default:
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chip->crlf = 0;
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}
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@@ -390,6 +391,7 @@ static t_stat consterm_svc(UNIT* uptr)
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chip->crlf = (chip->crlf==1) ? 2 : 0; break;
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case 0:
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if (chip->crlf==2) goto set_stat;
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chip->crlf = 0; break;
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default:
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chip->crlf = 0;
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}
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