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Notes For V3.8

Browse Source 
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.1.2 GRI

- Added support for the GRI-99 processor.

1.1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

1.2 3.8-1

1.2.1 SCP and libraries

- Added capability to set line connection order for terminal multiplexers.

1.2.2 HP2100

- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2009-02-08 09:06:00 -08:00
committed by Mark Pizzolato
parent 59aa4a73b1
commit 9c4779c061
286 changed files with 40587 additions and 19094 deletions
Download Patch File Download Diff File Expand all files Collapse all files

274
Interdata/id16_cpu.c
View File

@@ -1,6 +1,6 @@
/* id16_cpu.c: Interdata 16b CPU simulator
Copyright (c) 2000-2007, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -176,11 +176,15 @@ typedef struct {
#define PSW_GETMAP(x) (((x) >> PSW_V_MAP) & PSW_M_MAP)
#define SEXT16(x) (((x) & SIGN16)? ((int32) ((x) | 0xFFFF8000)): \
((int32) ((x) & 0x7FFF)))
#define CC_GL_16(x) if ((x) & SIGN16) cc = CC_L; \
else if (x) cc = CC_G; \
#define CC_GL_16(x) if ((x) & SIGN16) \
cc = CC_L; \
else if (x) \
cc = CC_G; \
else cc = 0
#define CC_GL_32(x) if ((x) & SIGN32) cc = CC_L; \
else if (x) cc = CC_G; \
#define CC_GL_32(x) if ((x) & SIGN32) \
cc = CC_L; \
else if (x) \
cc = CC_G; \
else cc = 0
#define BUILD_PSW(x) (((PSW & ~CC_MASK) | (x)) & psw_mask)
#define CPU_x16 (cpu_unit.flags & (UNIT_716 | UNIT_816 | UNIT_816E))
@@ -553,7 +557,8 @@ t_stat reason;
/* Restore register state */
if (devtab_init ()) return SCPE_STOP; /* check conflicts */
if (devtab_init ()) /* check conflicts */
return SCPE_STOP;
pawidth = PAWIDTH16; /* default width */
if (cpu_unit.flags & UNIT_816E) { /* 8/16E? */
dec_flgs = 0; /* all instr ok */
@@ -599,7 +604,8 @@ while (reason == 0) { /* loop until halted */
int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break;
if (reason = sim_process_event ())
break;
int_eval ();
}
@@ -614,7 +620,8 @@ while (reason == 0) { /* loop until halted */
else if (cc == 0) { /* ready? */
if (blk_io.dfl & BL_RD) { /* read? */
t = dev_tab[dev] (dev, IO_RD, 0); /* get byte */
if ((t == 0) && (blk_io.dfl & BL_LZ)) continue;
if ((t == 0) && (blk_io.dfl & BL_LZ))
continue;
blk_io.dfl = blk_io.dfl & ~BL_LZ; /* non-zero seen */
WriteB (blk_io.cur, t); /* write mem */
}
@@ -669,7 +676,8 @@ while (reason == 0) { /* loop until halted */
ityp = drom & OP_MASK;
if ((drom == 0) || (drom & dec_flgs)) { /* not in model? */
if (stop_inst) reason = STOP_RSRV; /* stop or */
if (stop_inst) /* stop or */
reason = STOP_RSRV;
else cc = swap_psw (ILOPSW, cc); /* swap PSW */
continue;
}
@@ -692,21 +700,24 @@ while (reason == 0) { /* loop until halted */
case OP_RX: /* reg-mem */
PC = (PC + 2) & VAMASK; /* increment PC */
ir2 = ea = ReadH (PC); /* fetch address */
if (r2) ea = (ir2 + R[r2]) & VAMASK; /* index calculation */
if (r2) /* index calculation */
ea = (ir2 + R[r2]) & VAMASK;
opnd = ea; /* operand is ea */
break;
case OP_RXB: /* reg-mem byte */
PC = (PC + 2) & VAMASK; /* increment PC */
ir2 = ea = ReadH (PC); /* fetch address */
if (r2) ea = (ea + R[r2]) & VAMASK; /* index calculation */
if (r2) /* index calculation */
ea = (ir2 + R[r2]) & VAMASK;
opnd = ReadB (ea); /* fetch operand */
break;
case OP_RXH: /* reg-mem halfword */
PC = (PC + 2) & VAMASK; /* increment PC */
ir2 = ea = ReadH (PC); /* fetch address */
if (r2) ea = (ea + R[r2]) & VAMASK; /* index calculation */
if (r2) /* index calculation */
ea = (ir2 + R[r2]) & VAMASK;
opnd = ReadH (ea); /* fetch operand */
break;
@@ -723,7 +734,8 @@ while (reason == 0) { /* loop until halted */
hst[hst_p].ea = ea;
hst[hst_p].opnd = opnd;
hst_p = hst_p + 1;
if (hst_p >= hst_lnt) hst_p = 0;
if (hst_p >= hst_lnt)
hst_p = 0;
}
PC = (PC + 2) & VAMASK; /* increment PC */
@@ -884,15 +896,18 @@ while (reason == 0) { /* loop until halted */
case 0xC5: /* CLHI - RS */
rslt = (R[r1] - opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (R[r1] < opnd) cc = cc | CC_C; /* set C if borrow */
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16) cc = cc | CC_V;
if (R[r1] < opnd) /* set C if borrow */
cc = cc | CC_C;
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16)
cc = cc | CC_V;
break;
case 0xD4: /* CLB - RXB */
t = R[r1] & DMASK8;
rslt = (t - opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (t < opnd) cc = cc | CC_C; /* set C if borrow */
if (t < opnd) /* set C if borrow */
cc = cc | CC_C;
break;
/* Shift instructions */
@@ -902,7 +917,8 @@ while (reason == 0) { /* loop until halted */
case 0x90: /* SRLS - NO */
rslt = R[r1] >> opnd; /* result */
CC_GL_16 (rslt); /* set G,L */
if (opnd && ((R[r1] >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((R[r1] >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = rslt; /* store result */
break;
@@ -912,14 +928,16 @@ while (reason == 0) { /* loop until halted */
rslt = R[r1] << opnd; /* raw result */
R[r1] = rslt & DMASK16; /* masked result */
CC_GL_16 (R[r1]); /* set G,L */
if (opnd && (rslt & 0x10000)) cc = cc | CC_C; /* set C if shft out */
if (opnd && (rslt & 0x10000)) /* set C if shft out */
cc = cc | CC_C;
break;
case 0xCE: /* SRHA - RS */
opnd = opnd & 0xF; /* shift count */
rslt = (SEXT16 (R[r1]) >> opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (opnd && ((R[r1] >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((R[r1] >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = rslt; /* store result */
break;
@@ -928,14 +946,16 @@ while (reason == 0) { /* loop until halted */
rslt = R[r1] << opnd; /* raw result */
R[r1] = (R[r1] & SIGN16) | (rslt & MMASK16); /* arith result */
CC_GL_16 (R[r1]); /* set G,L */
if (opnd && (rslt & SIGN16)) cc = cc | CC_C; /* set C if shft out */
if (opnd && (rslt & SIGN16)) /* set C if shft out */
cc = cc | CC_C;
break;
case 0xEA: /* RRL - RS */
r1p1 = (r1 + 1) & 0xF; /* R1 + 1 */
opnd = opnd & 0x1F; /* shift count */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
if (opnd) rslt = (t >> opnd) | (t << (32 - opnd)); /* result */
if (opnd) /* result */
rslt = (t >> opnd) | (t << (32 - opnd));
else rslt = t; /* no shift */
CC_GL_32 (rslt); /* set G,L 32b */
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
@@ -946,7 +966,8 @@ while (reason == 0) { /* loop until halted */
r1p1 = (r1 + 1) & 0xF; /* R1 + 1 */
opnd = opnd & 0x1F; /* shift count */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
if (opnd) rslt = (t << opnd) | (t >> (32 - opnd)); /* result */
if (opnd) /* result */
rslt = (t << opnd) | (t >> (32 - opnd));
else rslt = t; /* no shift */
CC_GL_32 (rslt); /* set G,L 32b */
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
@@ -959,7 +980,8 @@ while (reason == 0) { /* loop until halted */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
rslt = t >> opnd; /* result */
CC_GL_32 (rslt); /* set G,L 32b */
if (opnd && ((t >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((t >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
R[r1p1] = rslt & DMASK16; /* lo result */
break;
@@ -970,7 +992,8 @@ while (reason == 0) { /* loop until halted */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
rslt = t << opnd; /* result */
CC_GL_32 (rslt); /* set G,L 32b */
if (opnd && ((t << (opnd - 1)) & SIGN32)) cc = cc | CC_C;
if (opnd && ((t << (opnd - 1)) & SIGN32))
cc = cc | CC_C;
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
R[r1p1] = rslt & DMASK16; /* lo result */
break;
@@ -981,7 +1004,8 @@ while (reason == 0) { /* loop until halted */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
rslt = ((int32) t) >> opnd; /* signed result */
CC_GL_32 (rslt); /* set G,L 32b */
if (opnd && ((t >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((t >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
R[r1p1] = rslt & DMASK16; /* lo result */
break;
@@ -992,7 +1016,8 @@ while (reason == 0) { /* loop until halted */
t = (R[r1] << 16) | R[r1p1]; /* form 32b op */
rslt = (t & SIGN32) | ((t << opnd) & MMASK32); /* signed result */
CC_GL_32 (rslt); /* set G,L 32b */
if (opnd && ((t << opnd) & SIGN32)) cc = cc | CC_C;
if (opnd && ((t << opnd) & SIGN32))
cc = cc | CC_C;
R[r1] = (rslt >> 16) & DMASK16; /* hi result */
R[r1p1] = rslt & DMASK16; /* lo result */
break;
@@ -1005,16 +1030,20 @@ while (reason == 0) { /* loop until halted */
case 0xCA: /* AHI - RS */
rslt = (R[r1] + opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (rslt < opnd) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16) cc = cc | CC_V;
if (rslt < opnd) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16)
cc = cc | CC_V;
R[r1] = rslt;
break;
case 0x61: /* AHM - RXH */
rslt = (R[r1] + opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (rslt < opnd) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16) cc = cc | CC_V;
if (rslt < opnd) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16)
cc = cc | CC_V;
WriteH (ea, rslt); /* store in memory */
break;
@@ -1024,8 +1053,10 @@ while (reason == 0) { /* loop until halted */
case 0xCB: /* SHI - RS */
rslt = (R[r1] - opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L */
if (R[r1] < opnd) cc = cc | CC_C; /* set C if borrow */
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16) cc = cc | CC_V;
if (R[r1] < opnd) /* set C if borrow */
cc = cc | CC_C;
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16)
cc = cc | CC_V;
R[r1] = rslt;
break;
@@ -1034,8 +1065,10 @@ while (reason == 0) { /* loop until halted */
case 0xC9: /* CHI - RS */
sr = SEXT16 (R[r1]); /* sign ext */
st = SEXT16 (opnd);
if (sr < st) cc = CC_C | CC_L; /* < sets C, L */
else if (sr > st) cc = CC_G; /* > sets G */
if (sr < st) /* < sets C, L */
cc = CC_C | CC_L;
else if (sr > st) /* > sets G */
cc = CC_G;
else cc = 0;
if (((R[r1] ^ opnd) & (~opnd ^ (sr - st))) & SIGN16)
cc = cc | CC_V;
@@ -1082,8 +1115,10 @@ while (reason == 0) { /* loop until halted */
t = R[r1] + opnd + ((cc & CC_C) != 0); /* raw result */
rslt = t & DMASK16; /* masked result */
CC_GL_16 (rslt); /* set G,L */
if (t > DMASK16) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16) cc = cc | CC_V;
if (t > DMASK16) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16)
cc = cc | CC_V;
R[r1] = rslt; /* store result */
break;
@@ -1092,8 +1127,10 @@ while (reason == 0) { /* loop until halted */
t = R[r1] - opnd - ((cc & CC_C) != 0); /* raw result */
rslt = t & DMASK16; /* masked result */
CC_GL_16 (rslt); /* set G,L */
if (t > DMASK16) cc = cc | CC_C; /* set C if borrow */
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16) cc = cc | CC_V;
if (t > DMASK16) /* set C if borrow */
cc = cc | CC_C;
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN16)
cc = cc | CC_V;
R[r1] = rslt; /* store result */
break;
@@ -1220,19 +1257,22 @@ while (reason == 0) { /* loop until halted */
PCQ_ENTRY; /* effective branch */
PC = ReadH ((ea + 2) & VAMASK); /* read PC */
cc = newPSW (ReadH (ea)); /* read PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0x95: /* EPSR - NO */
R[r1] = BUILD_PSW (cc); /* save PSW */
case 0x33: /* LPSR - NO */
cc = newPSW (R[r2]); /* load new PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0x73: /* LPS - RXH */
cc = newPSW (opnd); /* load new PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0x64: /* ATL - RX */
@@ -1258,7 +1298,8 @@ while (reason == 0) { /* loop until halted */
case 0x8: case 0x9: case 0xA: case 0xB:
case 0xC: case 0xD: case 0xE:
if (R[r1] & SIGN16) map = map & ~0x8; /* S1? clr map<0> */
if (R[r1] & SIGN16) /* S1? clr map<0> */
map = map & ~0x8;
else {
map = 0; /* else 1:1 map */
R[r1] = R[r1] | SIGN16; /* set sign */
@@ -1330,7 +1371,8 @@ case 0xDE: /* OC - RX */
t = 0; /* read zero */
cc = CC_V; /* set V */
}
if (OP_TYPE (op) != OP_RR) WriteB (ea, t); /* RX or RR? */
if (OP_TYPE (op) != OP_RR) /* RX or RR? */
WriteB (ea, t);
else R[r2] = t & DMASK8;
int_eval (); /* re-eval intr */
break;
@@ -1352,7 +1394,8 @@ case 0xDE: /* OC - RX */
t = 0; /* read zero */
cc = CC_V; /* set V */
}
if (OP_TYPE (op) != OP_RR) WriteH (ea, t); /* RX or RR? */
if (OP_TYPE (op) != OP_RR) /* RX or RR? */
WriteH (ea, t);
else R[r2] = t;
int_eval (); /* re-eval intr */
break;
@@ -1369,7 +1412,8 @@ case 0xDE: /* OC - RX */
t = dev_tab[dev] (dev, IO_SS, 0); /* get status */
}
else t = STA_EX; /* no */
if (OP_TYPE (op) != OP_RR) WriteB (ea, t); /* RR or RX? */
if (OP_TYPE (op) != OP_RR) /* RR or RX? */
WriteB (ea, t);
else R[r2] = t & DMASK8;
cc = t & 0xF;
int_eval (); /* re-eval intr */
@@ -1392,7 +1436,8 @@ case 0xDE: /* OC - RX */
if (OP_TYPE (op) != OP_RR)
lim = ReadH ((ea + 2) & VAMASK);
else lim = R[(r2 + 1) & 0xF];
if (opnd > lim) cc = 0; /* start > end? */
if (opnd > lim) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
blk_io.dfl = dev; /* set status block */
@@ -1411,7 +1456,8 @@ case 0xDE: /* OC - RX */
if (OP_TYPE (op) != OP_RR)
lim = ReadH ((ea + 2) & VAMASK);
else lim = R[(r2 + 1) & 0xF];
if (opnd > lim) cc = 0; /* start > end? */
if (opnd > lim) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
blk_io.dfl = dev | BL_RD; /* set status block */
@@ -1427,7 +1473,8 @@ case 0xDE: /* OC - RX */
dev = ReadB (AL_DEV); /* get device */
t = ReadB (AL_IOC); /* get command */
if (DEV_ACC (dev)) { /* dev exist? */
if (AL_BUF > ea) cc = 0; /* start > end? */
if (AL_BUF > ea) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
dev_tab[dev] (dev, IO_OC, t); /* start dev */
@@ -1456,7 +1503,8 @@ uint32 newPSW (uint32 val)
{
PSW = val & psw_mask; /* store PSW */
int_eval (); /* update intreq */
if (PSW & PSW_WAIT) qevent = qevent | EV_WAIT; /* wait state? */
if (PSW & PSW_WAIT) /* wait state? */
qevent = qevent | EV_WAIT;
else qevent = qevent & ~EV_WAIT;
if (cpu_unit.flags & UNIT_816E) { /* mapping enabled? */
uint32 map = PSW_GETMAP (PSW); /* get new map */
@@ -1464,7 +1512,8 @@ if (cpu_unit.flags & UNIT_816E) { /* mapping enabled? */
s1_rel = s1_rel_const[map]; /* constants */
}
else s0_rel = s1_rel = 0; /* no relocation */
if (PSW & PSW_AIO) SET_ENB (v_DS); /* PSW<4> controls */
if (PSW & PSW_AIO) /* PSW<4> controls */
SET_ENB (v_DS);
else CLR_ENB (v_DS); /* DS interrupts */
return PSW & CC_MASK;
}
@@ -1477,7 +1526,8 @@ WriteH (loc, BUILD_PSW (cc)); /* write PSW, PC */
WriteH (loc + 2, PC);
cc = newPSW (ReadH (loc + 4)); /* read PSW, PC */
PC = ReadH (loc + 6);
if (PSW & PSW_SQI) cc = testsysq (cc); /* sys q int enb? */
if (PSW & PSW_SQI) /* sys q int enb? */
cc = testsysq (cc);
return cc; /* return CC */
}
@@ -1506,18 +1556,21 @@ uint32 slt, usd, wra, t;
t = ReadH (ea); /* slots/used */
slt = (t >> 8) & DMASK8; /* # slots */
usd = t & DMASK8; /* # used */
if (usd >= slt) return CC_V; /* list full? */
if (usd >= slt) /* list full? */
return CC_V;
usd = usd + 1; /* inc # used */
WriteB (ea + Q16_USD, usd); /* rewrite */
if (flg) { /* ABL? */
wra = ReadB ((ea + Q16_BOT) & VAMASK); /* get bottom */
t = wra + 1; /* adv bottom */
if (t >= slt) t = 0; /* wrap if necc */
if (t >= slt) /* wrap if necc */
t = 0;
WriteB ((ea + Q16_BOT) & VAMASK, t); /* rewrite bottom */
}
else { /* ATL */
wra = ReadB ((ea + Q16_TOP) & VAMASK); /* get top */
if (wra == 0) wra = (slt - 1) & DMASK8; /* wrap if necc */
if (wra == 0) /* wrap if necc */
wra = (slt - 1) & DMASK8;
else wra = wra - 1; /* dec top */
WriteB ((ea + Q16_TOP) & VAMASK, wra); /* rewrite top */
}
@@ -1532,23 +1585,27 @@ uint32 slt, usd, rda, t;
t = ReadH (ea); /* get slots/used */
slt = (t >> 8) & DMASK8; /* # slots */
usd = t & DMASK8; /* # used */
if (usd == 0) return CC_V; /* empty? */
if (usd == 0) /* empty? */
return CC_V;
usd = usd - 1; /* dec used */
WriteB (ea + Q16_USD, usd); /* rewrite */
if (flg) { /* RBL? */
rda = ReadB ((ea + Q16_BOT) & VAMASK); /* get bottom */
if (rda == 0) rda = (slt - 1) & DMASK8; /* wrap if necc */
if (rda == 0) /* wrap if necc */
rda = (slt - 1) & DMASK8;
else rda = rda - 1; /* dec bottom */
WriteB ((ea + Q16_BOT) & VAMASK, rda); /* rewrite bottom */
}
else {
rda = ReadB ((ea + Q16_TOP) & VAMASK); /* RTL, get top */
t = rda + 1; /* adv top */
if (t >= slt) t = 0; /* wrap if necc */
if (t >= slt) /* wrap if necc */
t = 0;
WriteB ((ea + Q16_TOP) & VAMASK, t); /* rewrite top */
}
R[r1] = ReadH ((ea + Q16_BASE + (rda * Q16_SLNT)) & VAMASK); /* read slot */
if (usd) return CC_G; /* set cc's */
if (usd) /* set cc's */
return CC_G;
else return 0;
}
@@ -1574,8 +1631,10 @@ do {
}
vec = vec & ~1; /* get CCW addr */
ccw = ReadH (vec); /* read CCW */
if (DEV_ACC (dev)) dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
if (ccw & CCW16_NOP) break; /* NOP? exit */
if (DEV_ACC (dev)) /* select dev */
dev_tab[dev] (dev, IO_ADR, 0);
if (ccw & CCW16_NOP) /* NOP? exit */
break;
if (ccw & CCW16_INIT) { /* init set? */
ccw = ccw & ~CCW16_INIT; /* clr init */
WriteH (vec, ccw); /* rewrite */
@@ -1593,7 +1652,8 @@ do {
ba = ReadH ((vec + CCB16_STR) & VAMASK); /* get cnt wd */
ba = (ba - 1) & DMASK16; /* decr */
WriteH ((vec + CCB16_STR) & VAMASK, ba); /* rewrite */
if (ba) break; /* nz? exit */
if (ba) /* nz? exit */
break;
} /* end if dmt */
else if (fnc != CCW16_NUL) { /* rd or wr? */
if (DEV_ACC (dev)) /* dev exist? */
@@ -1605,7 +1665,8 @@ do {
}
else { /* ok, do xfer */
bpi = CCW16_BPI (ccw); /* get bytes/int */
if (bpi == 0) bpi = 16; /* max 16B */
if (bpi == 0) /* max 16B */
bpi = 16;
ba = ReadH ((vec + CCB16_STR) & VAMASK); /* get start */
for (i = 0; i < bpi; i++) { /* do # bytes */
if (fnc == CCW16_RD) { /* chan read? */
@@ -1623,7 +1684,8 @@ do {
trm = ReadB ((vec + CCB16_TRM) & VAMASK); /* get term chr */
if ((ba <= ea) && /* not at end? */
(((ccw & CCW16_TRM) == 0) || /* not term chr? */
(by != trm))) break; /* exit */
(by != trm))) /* exit */
break;
ccw = ccw | CCW16_NOP; /* nop CCW */
WriteH (vec, ccw); /* rewrite CCW */
} /* end else sta */
@@ -1644,7 +1706,8 @@ do {
if (ccw & CCW16_CHN) { /* chain */
t = ReadH ((vec + CCB16_CHN) & VAMASK); /* get chain wd */
WriteH (INTSVT + dev + dev, t); /* wr int svc tab */
if (ccw & CCW16_CON) rpt = TRUE; /* cont? */
if (ccw & CCW16_CON) /* cont? */
rpt = TRUE;
}
} while (rpt);
@@ -1664,7 +1727,8 @@ int t;
switch (op) {
case IO_ADR: /* select */
if (!drmod) drpos = srpos = 0; /* norm mode? clr */
if (!drmod) /* norm mode? clr */
drpos = srpos = 0;
return BY; /* byte only */
case IO_OC: /* command */
@@ -1673,13 +1737,15 @@ switch (op) {
drmod = 1;
drpos = srpos = 0; /* init cntrs */
}
else if (op == 0x80) drmod = 0; /* x80 = norm */
else if (op == 0x80) /* x80 = norm */
drmod = 0;
break;
case IO_WD: /* write */
if (drpos < 4)
DR = (DR & ~(DMASK8 << (drpos * 8))) | (dat << (drpos * 8));
else if (drpos == 4) DRX = dat;
else if (drpos == 4)
DRX = dat;
drpos = (drpos + 1) &
((cpu_unit.flags & (UNIT_716 | UNIT_816))? 7: 3);
break;
@@ -1746,9 +1812,9 @@ void WriteB (uint32 loc, uint32 val)
uint32 pa = (loc + ((loc & VA_S1)? s1_rel: s0_rel)) & PAMASK16E;
val = val & DMASK8;
if (MEM_ADDR_OK (pa)) M[pa >> 1] = ((pa & 1)?
((M[pa >> 1] & ~DMASK8) | val):
((M[pa >> 1] & DMASK8) | (val << 8)));
if (MEM_ADDR_OK (pa))
M[pa >> 1] = ((pa & 1)? ((M[pa >> 1] & ~DMASK8) | val):
((M[pa >> 1] & DMASK8) | (val << 8)));
return;
}
@@ -1756,7 +1822,8 @@ void WriteH (uint32 loc, uint32 val)
{
uint32 pa = (loc + ((loc & VA_S1)? s1_rel: s0_rel)) & PAMASK16E;
if (MEM_ADDR_OK (pa)) M[pa >> 1] = val & DMASK16;
if (MEM_ADDR_OK (pa))
M[pa >> 1] = val & DMASK16;
return;
}
@@ -1774,8 +1841,10 @@ else {
pa = loc;
pa1 = loc1;
}
if (MEM_ADDR_OK (pa)) M[pa >> 1] = (val >> 16) & DMASK16;
if (MEM_ADDR_OK (pa1)) M[pa1 >> 1] = val & DMASK16;
if (MEM_ADDR_OK (pa))
M[pa >> 1] = (val >> 16) & DMASK16;
if (MEM_ADDR_OK (pa1))
M[pa1 >> 1] = val & DMASK16;
return;
}
@@ -1814,10 +1883,13 @@ DR = 0; /* clr display */
drmod = 0;
blk_io.dfl = blk_io.cur = blk_io.end = 0; /* no block IO */
sim_brk_types = sim_brk_dflt = SWMASK ('E'); /* init bkpts */
if (M == NULL) M = (uint16 *) calloc (MAXMEMSIZE16E >> 1, sizeof (uint16));
if (M == NULL) return SCPE_MEM;
if (M == NULL)
M = (uint16 *) calloc (MAXMEMSIZE16E >> 1, sizeof (uint16));
if (M == NULL)
return SCPE_MEM;
pcq_r = find_reg ("PCQ", NULL, dptr); /* init PCQ */
if (pcq_r) pcq_r->qptr = 0;
if (pcq_r)
pcq_r->qptr = 0;
else return SCPE_IERR;
return SCPE_OK;
}
@@ -1827,11 +1899,14 @@ return SCPE_OK;
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
{
if (sw & SWMASK ('V')) {
if (addr > VAMASK) return SCPE_NXM;
if (addr > VAMASK)
return SCPE_NXM;
addr = (addr + ((addr & VA_S1)? s1_rel: s0_rel)) & PAMASK16E;
}
if (addr >= MEMSIZE) return SCPE_NXM;
if (vptr != NULL) *vptr = IOReadH (addr);
if (addr >= MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
*vptr = IOReadH (addr);
return SCPE_OK;
}
@@ -1840,10 +1915,12 @@ return SCPE_OK;
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
{
if (sw & SWMASK ('V')) {
if (addr > VAMASK) return SCPE_NXM;
if (addr > VAMASK)
return SCPE_NXM;
addr = (addr + ((addr & VA_S1)? s1_rel: s0_rel)) & PAMASK16E;
}
if (addr >= MEMSIZE) return SCPE_NXM;
if (addr >= MEMSIZE)
return SCPE_NXM;
IOWriteH (addr, val);
return SCPE_OK;
}
@@ -1857,12 +1934,14 @@ uint32 i;
if ((val <= 0) || ((val & 0xFFF) != 0) ||
(((uint32) val) > ((uptr->flags & UNIT_816E)? MAXMEMSIZE16E: MAXMEMSIZE16)))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i = i + 2) mc = mc | M[i >> 1];
return SCPE_ARG;
for (i = val; i < MEMSIZE; i = i + 2)
mc = mc | M[i >> 1];
if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
MEMSIZE = val;
for (i = MEMSIZE; i < MAXMEMSIZE16E; i = i + 2) M[i >> 1] = 0;
for (i = MEMSIZE; i < MAXMEMSIZE16E; i = i + 2)
M[i >> 1] = 0;
return SCPE_OK;
}
@@ -1874,7 +1953,8 @@ uint32 i;
if (!(val & UNIT_816E) && (MEMSIZE > MAXMEMSIZE16)) {
MEMSIZE = MAXMEMSIZE16;
for (i = MEMSIZE; i < MAXMEMSIZE16E; i = i + 2) M[i >> 1] = 0;
for (i = MEMSIZE; i < MAXMEMSIZE16E; i = i + 2)
M[i >> 1] = 0;
printf ("Reducing memory to 64KB\n");
}
return SCPE_OK;
@@ -1886,7 +1966,8 @@ t_stat cpu_set_consint (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if ((uptr->flags & (UNIT_716 | UNIT_816 | UNIT_816E)) == 0)
return SCPE_NOFNC;
if (PSW & PSW_AIO) SET_INT (v_DS);
if (PSW & PSW_AIO)
SET_INT (v_DS);
return SCPE_OK;
}
@@ -1898,12 +1979,14 @@ uint32 i, lnt;
t_stat r;
if (cptr == NULL) {
for (i = 0; i < hst_lnt; i++) hst[i].vld = 0;
for (i = 0; i < hst_lnt; i++)
hst[i].vld = 0;
hst_p = 0;
return SCPE_OK;
}
lnt = (uint32) get_uint (cptr, 10, HIST_MAX, &r);
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN))) return SCPE_ARG;
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN)))
return SCPE_ARG;
hst_p = 0;
if (hst_lnt) {
free (hst);
@@ -1912,7 +1995,8 @@ if (hst_lnt) {
}
if (lnt) {
hst = (InstHistory *) calloc (lnt, sizeof (InstHistory));
if (hst == NULL) return SCPE_MEM;
if (hst == NULL)
return SCPE_MEM;
hst_lnt = lnt;
}
return SCPE_OK;
@@ -1930,21 +2014,25 @@ InstHistory *h;
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */
if (hst_lnt == 0) /* enabled? */
return SCPE_NOFNC;
if (cptr) {
lnt = (int32) get_uint (cptr, 10, hst_lnt, &r);
if ((r != SCPE_OK) || (lnt == 0)) return SCPE_ARG;
if ((r != SCPE_OK) || (lnt == 0))
return SCPE_ARG;
}
else lnt = hst_lnt;
di = hst_p - lnt; /* work forward */
if (di < 0) di = di + hst_lnt;
if (di < 0)
di = di + hst_lnt;
fprintf (st, "PC r1 opnd ea IR\n\n");
for (k = 0; k < lnt; k++) { /* print specified */
h = &hst[(di++) % hst_lnt]; /* entry pointer */
if (h->vld) { /* instruction? */
fprintf (st, "%04X %04X %04X ", h->pc, h->r1, h->opnd);
op = (h->ir1 >> 8) & 0xFF;
if (OP_TYPE (op) >= OP_RX) fprintf (st, "%04X ", h->ea);
if (OP_TYPE (op) >= OP_RX)
fprintf (st, "%04X ", h->ea);
else fprintf (st, " ");
sim_eval[0] = h->ir1;
sim_eval[1] = h->ir2;

5
Interdata/id16_dboot.c
View File

@@ -1,6 +1,6 @@
/* id16_dboot.c: Interdata 16b simulator disk bootstrap
Copyright (c) 2000-2006, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -343,7 +343,8 @@ for (i = typ = 0; dboot_tab[i].name != NULL; i++) {
break;
}
}
if (typ == 0) return SCPE_NOFNC;
if (typ == 0)
return SCPE_NOFNC;
IOWriteBlk (DBOOT_BEG, DBOOT_LEN, dboot_rom); /* copy boot */
IOWriteB (AL_DEV, pt_dib.dno); /* bin input dev */

125
Interdata/id16_sys.c
View File

@@ -100,7 +100,8 @@ const char *sim_stop_messages[] = {
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
if (flag) return pt_dump (fileref, cptr, fnam);
if (flag)
return pt_dump (fileref, cptr, fnam);
return lp_load (fileref, cptr, fnam);
}
@@ -284,29 +285,38 @@ int32 bflag, c1, c2, rdx;
t_stat r;
DEVICE *dptr;
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
if (uptr == NULL) /* anon = CPU */
uptr = &cpu_unit;
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth < 16) bflag = 1; /* 8b dev? */
if (dptr == NULL)
return SCPE_IERR;
if (dptr->dwidth < 16) /* 8b dev? */
bflag = 1;
else bflag = 0; /* assume 16b */
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
if (sw & SWMASK ('D')) /* get radix */
rdx = 10;
else if (sw & SWMASK ('O'))
rdx = 8;
else if (sw & SWMASK ('H'))
rdx = 16;
else rdx = dptr->dradix;
if (sw & SWMASK ('A')) { /* ASCII char? */
if (bflag) c1 = val[0] & 0x7F;
if (bflag)
c1 = val[0] & 0x7F;
else c1 = (val[0] >> ((addr & 1)? 0: 8)) & 0x7F; /* get byte */
fprintf (of, (c1 < 0x20)? "<%02X>": "%c", c1);
return 0;
}
if (sw & SWMASK ('B')) { /* byte? */
if (bflag) c1 = val[0] & 0xFF;
if (bflag)
c1 = val[0] & 0xFF;
else c1 = (val[0] >> ((addr & 1)? 0: 8)) & 0xFF; /* get byte */
fprint_val (of, c1, rdx, 8, PV_RZRO);
return 0;
}
if (bflag) return SCPE_ARG; /* 16b only */
if (bflag) /* 16b only */
return SCPE_ARG;
if (sw & SWMASK ('C')) { /* string? */
c1 = (val[0] >> 8) & 0x7F;
@@ -321,7 +331,8 @@ if (sw & SWMASK ('F')) { /* fullword? */
}
if (sw & SWMASK ('M')) { /* inst format? */
r = fprint_sym_m (of, addr, val); /* decode inst */
if (r <= 0) return r;
if (r <= 0)
return r;
}
fprint_val (of, val[0], rdx, 16, PV_RZRO);
@@ -392,7 +403,8 @@ for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
break;
} /* end case */
if (r2) fprintf (of, "(R%d)", r2);
if (r2)
fprintf (of, "(R%d)", r2);
return -3;
} /* end if */
} /* end for */
@@ -415,19 +427,24 @@ int32 reg;
if ((*cptr == 'R') || (*cptr == 'r')) { /* R? */
cptr++; /* skip */
if (rtype == R_M) return -1; /* cant be mask */
if (rtype == R_M) /* cant be mask */
return -1;
}
if ((*cptr >= '0') && (*cptr <= '9')) {
reg = *cptr++ - '0';
if ((*cptr >= '0') && (*cptr <= '9'))
reg = (reg * 10) + (*cptr - '0');
else --cptr;
if (reg > 0xF) return -1;
if (reg > 0xF)
return -1;
}
else if ((*cptr >= 'a') && (*cptr <= 'f')) reg = (*cptr - 'a') + 10;
else if ((*cptr >= 'A') && (*cptr <= 'F')) reg = (*cptr - 'A') + 10;
else if ((*cptr >= 'a') && (*cptr <= 'f'))
reg = (*cptr - 'a') + 10;
else if ((*cptr >= 'A') && (*cptr <= 'F'))
reg = (*cptr - 'A') + 10;
else return -1;
if ((rtype == R_F) && (reg & 1)) return -1;
if ((rtype == R_F) && (reg & 1))
return -1;
*optr = cptr + 1;
return reg;
}
@@ -450,7 +467,8 @@ int32 sign = 1;
if (*cptr == '.') { /* relative? */
cptr++;
*ea = addr;
if (*cptr == '+') cptr++; /* .+? */
if (*cptr == '+') /* .+? */
cptr++;
else if (*cptr == '-') { /* .-? */
sign = -1;
cptr++;
@@ -460,7 +478,8 @@ if (*cptr == '.') { /* relative? */
else *ea = 0;
errno = 0;
*ea = *ea + (sign * ((int32) strtoul (cptr, tptr, 16)));
if (errno || (cptr == *tptr)) return SCPE_ARG;
if (errno || (cptr == *tptr))
return SCPE_ARG;
return SCPE_OK;
}
@@ -472,19 +491,27 @@ int32 bflag, by, rdx, num;
t_stat r;
DEVICE *dptr;
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
if (uptr == NULL) /* anon = CPU */
uptr = &cpu_unit;
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth < 16) bflag = 1; /* 8b device? */
if (dptr == NULL)
return SCPE_IERR;
if (dptr->dwidth < 16) /* 8b dev? */
bflag = 1;
else bflag = 0; /* assume 16b */
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
if (sw & SWMASK ('D')) /* get radix */
rdx = 10;
else if (sw & SWMASK ('O'))
rdx = 8;
else if (sw & SWMASK ('H'))
rdx = 16;
else rdx = dptr->dradix;
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (bflag) val[0] = (t_value) cptr[0];
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
if (bflag)
val[0] = (t_value) cptr[0];
else val[0] = (addr & 1)?
(val[0] & ~0xFF) | ((t_value) cptr[0]):
(val[0] & 0xFF) | (((t_value) cptr[0]) << 8);
@@ -492,32 +519,39 @@ if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
}
if (sw & SWMASK ('B')) { /* byte? */
by = get_uint (cptr, rdx, DMASK8, &r); /* get byte */
if (r != SCPE_OK) return SCPE_ARG;
if (bflag) val[0] = by;
if (r != SCPE_OK)
return SCPE_ARG;
if (bflag)
val[0] = by;
else val[0] = (addr & 1)?
(val[0] & ~0xFF) | by:
(val[0] & 0xFF) | (by << 8);
return 0;
}
if (bflag) return SCPE_ARG; /* 16b only */
if (bflag) /* 16b only */
return SCPE_ARG;
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII chars? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = ((t_value) cptr[0] << 8) | (t_value) cptr[1];
return -1;
}
if (sw & SWMASK ('F')) {
num = (int32) get_uint (cptr, rdx, DMASK32, &r); /* get number */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
val[0] = (num >> 16) & DMASK16;
val[1] = num & DMASK16;
return -3;
}
r = parse_sym_m (cptr, addr, val); /* try to parse inst */
if (r <= 0) return r;
if (r <= 0)
return r;
val[0] = (int32) get_uint (cptr, rdx, DMASK16, &r); /* get number */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
return -1;
}
@@ -542,19 +576,22 @@ char *tptr, gbuf[CBUFSIZE];
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
if (opcode[i] == NULL)
return SCPE_ARG;
inst = opc_val[i] & 0xFFFF; /* get value */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
if (r1_type[j]) { /* any R1 field? */
cptr = get_glyph (cptr, gbuf, ','); /* get R1 field */
if ((r1 = get_reg (gbuf, &tptr, r1_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG; /* all done? */
return SCPE_ARG;
if (*tptr != 0) /* all done? */
return SCPE_ARG;
inst = inst | (r1 << 4); /* or in R1 */
}
cptr = get_glyph (cptr, gbuf, 0); /* get operand */
if (*cptr) return SCPE_ARG; /* should be end */
if (*cptr) /* should be end */
return SCPE_ARG;
switch (j) { /* case on class */
case I_V_FF: case I_V_SI: /* flt-flt, sh imm */
@@ -562,7 +599,8 @@ switch (j) { /* case on class */
case I_V_R: /* register */
if ((r2 = get_reg (gbuf, &tptr, r2_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG; /* all done? */
if (*tptr != 0) /* all done? */
return SCPE_ARG;
inst = inst | r2; /* or in R2 */
break;
@@ -570,14 +608,17 @@ switch (j) { /* case on class */
case I_V_MX: case I_V_RX: /* mask/reg-mem */
case I_V_X: /* memory */
r = get_addr (gbuf, &tptr, &t, addr); /* get addr */
if ((r != SCPE_OK) || (t > PAMASK16)) return SCPE_ARG;
if ((r != SCPE_OK) || (t > PAMASK16))
return SCPE_ARG;
if (*tptr == '(') { /* index? */
if ((r2 = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG;
if (*tptr++ != ')') return SCPE_ARG;
if (*tptr++ != ')')
return SCPE_ARG;
inst = inst | r2; /* or in R2 */
}
if (*tptr != 0) return SCPE_ARG;
if (*tptr != 0)
return SCPE_ARG;
val[0] = inst;
val[1] = t;
return -3;

356
Interdata/id32_cpu.c
View File

@@ -1,6 +1,6 @@
/* id32_cpu.c: Interdata 32b CPU simulator
Copyright (c) 2000-2007, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -197,11 +197,15 @@ typedef struct {
((int32) ((x) & 0x7FFF)))
#define SEXT15(x) (((x) & 0x4000)? ((int32) ((x) | ~0x3FFF)): \
((int32) ((x) & 0x3FFF)))
#define CC_GL_16(x) if ((x) & SIGN16) cc = CC_L; \
else if (x) cc = CC_G; \
#define CC_GL_16(x) if ((x) & SIGN16) \
cc = CC_L; \
else if (x) \
cc = CC_G; \
else cc = 0
#define CC_GL_32(x) if ((x) & SIGN32) cc = CC_L; \
else if (x) cc = CC_G; \
#define CC_GL_32(x) if ((x) & SIGN32) \
cc = CC_L; \
else if (x) \
cc = CC_G; \
else cc = 0
#define BUILD_PSW(x) (((PSW & ~CC_MASK) | (x)) & PSW_MASK)
#define NEG(x) ((~(x) + 1) & DMASK32)
@@ -614,7 +618,8 @@ int abortval;
/* Restore register state */
if (devtab_init ()) return SCPE_STOP; /* check conflicts */
if (devtab_init ()) /* check conflicts */
return SCPE_STOP;
if (cpu_unit.flags & (UNIT_DPFP | UNIT_832)) {
fp_in_hwre = 1; /* fp in hwre */
dec_flgs = 0; /* all instr ok */
@@ -623,7 +628,8 @@ else {
fp_in_hwre = 0; /* fp in ucode */
dec_flgs = OP_DPF; /* sp only */
}
if (cpu_unit.flags & UNIT_8RS) psw_reg_mask = 7; /* 8 register sets */
if (cpu_unit.flags & UNIT_8RS) /* 8 register sets */
psw_reg_mask = 7;
else psw_reg_mask = 1; /* 2 register sets */
int_eval (); /* eval interrupts */
cc = newPSW (PSW & PSW_MASK); /* split PSW, eval wait */
@@ -642,7 +648,8 @@ reason = 0;
abortval = setjmp (save_env); /* set abort hdlr */
if (abortval != 0) { /* mem mgt abort? */
qevent = qevent | EV_MAC; /* set MAC intr */
if (cpu_unit.flags & UNIT_832) PC = oPC; /* 832? restore PC */
if (cpu_unit.flags & UNIT_832) /* 832? restore PC */
PC = oPC;
}
/* Event handling */
@@ -657,7 +664,8 @@ while (reason == 0) { /* loop until halted */
int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break;
if (reason = sim_process_event ())
break;
int_eval ();
}
@@ -679,7 +687,8 @@ while (reason == 0) { /* loop until halted */
else if (cc == 0) { /* ready, no err? */
if (blk_io.dfl & BL_RD) { /* read? */
t = dev_tab[dev] (dev, IO_RD, 0); /* get byte */
if ((t == 0) && (blk_io.dfl & BL_LZ)) continue;
if ((t == 0) && (blk_io.dfl & BL_LZ))
continue;
blk_io.dfl = blk_io.dfl & ~BL_LZ; /* non-zero seen */
WriteB (blk_io.cur, t, VW); /* write mem */
}
@@ -731,7 +740,8 @@ while (reason == 0) { /* loop until halted */
ityp = drom & OP_MASK; /* instruction type */
if ((drom == 0) || (drom & dec_flgs)) { /* not in model? */
if (stop_inst) reason = STOP_RSRV; /* stop or */
if (stop_inst) /* stop or */
reason = STOP_RSRV;
else cc = exception (ILOPSW, cc, 0); /* exception */
continue;
}
@@ -755,7 +765,8 @@ while (reason == 0) { /* loop until halted */
case OP_RI1: /* reg-imm 1 */
ir2 = ReadH ((PC + 2) & VAMASK, VE); /* fetch immed */
opnd = SEXT16 (ir2); /* sign extend */
if (r2) opnd = (opnd + R[r2]) & DMASK32; /* index calculation */
if (r2) /* index calculation */
opnd = (opnd + R[r2]) & DMASK32;
PC = (PC + 4) & VAMASK; /* increment PC */
break;
@@ -763,7 +774,8 @@ while (reason == 0) { /* loop until halted */
ir2 = ReadH ((PC + 2) & VAMASK, VE); /* fetch imm hi */
ir3 = ReadH ((PC + 4) & VAMASK, VE); /* fetch imm lo */
opnd = (ir2 << 16) | ir3; /* 32b immediate */
if (r2) opnd = (opnd + R[r2]) & DMASK32; /* index calculation */
if (r2) /* index calculation */
opnd = (opnd + R[r2]) & DMASK32;
PC = (PC + 6) & VAMASK; /* increment PC */
break;
@@ -782,17 +794,21 @@ while (reason == 0) { /* loop until halted */
ea = (ir2 & 0xFF) << 16; /* shift to place */
ir3 = ReadH ((PC + 4) & VAMASK, VE); /* fetch addr lo */
ea = ea | ir3; /* finish addr */
if (rx2) ea = ea + R[rx2]; /* index calc 2 */
if (rx2) /* index calc 2 */
ea = ea + R[rx2];
PC = (PC + 6) & VAMASK; /* increment PC */
}
if (r2) ea = ea + R[r2]; /* index calculation */
if (r2) /* index calculation */
ea = ea + R[r2];
ea = ea & VAMASK;
if (ityp == OP_RXF) opnd = ReadF (ea, VR); /* get fw operand? */
if (ityp == OP_RXF) /* get fw operand? */
opnd = ReadF (ea, VR);
else if (ityp == OP_RXH) { /* get hw operand? */
t = ReadH (ea, VR); /* read halfword */
opnd = SEXT16 (t); /* sign extend */
}
else if (ityp == OP_RXB) opnd = ReadB (ea, VR); /* get byte opnd? */
else if (ityp == OP_RXB) /* get byte opnd? */
opnd = ReadB (ea, VR);
else opnd = ea; /* just address */
break;
@@ -809,9 +825,11 @@ while (reason == 0) { /* loop until halted */
hst[hst_p].ea = ea;
hst[hst_p].opnd = opnd;
hst_p = hst_p + 1;
if (hst_p >= hst_lnt) hst_p = 0;
if (hst_p >= hst_lnt)
hst_p = 0;
}
if (qevent & EV_MAC) continue; /* MAC abort on fetch? */
if (qevent & EV_MAC) /* MAC abort on fetch? */
continue;
switch (op) { /* case on opcode */
/* Load/store instructions */
@@ -1007,22 +1025,26 @@ while (reason == 0) { /* loop until halted */
case 0xF5: /* CI - RI2 */
rslt = (R[r1] - opnd) & DMASK32; /* result */
CC_GL_32 (rslt); /* set G,L */
if (R[r1] < opnd) cc = cc | CC_C; /* set C if borrow */
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN32) cc = cc | CC_V;
if (R[r1] < opnd) /* set C if borrow */
cc = cc | CC_C;
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN32)
cc = cc | CC_V;
break;
case 0xD4: /* CLB - RXB */
t = R[r1] & DMASK8;
rslt = (t - opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L 16b */
if (t < opnd) cc = cc | CC_C; /* set C if borrow */
if (t < opnd) /* set C if borrow */
cc = cc | CC_C;
break;
case 0x12: /* CHVR - RR */
t = cc & CC_C; /* save C */
R[r1] = (SEXT16 (opnd & DMASK16)) & DMASK32; /* result */
CC_GL_32 (R[r1]); /* set G, L */
if (R[r1] != opnd) cc = cc | CC_V; /* wont fit? set V */
if (R[r1] != opnd) /* wont fit? set V */
cc = cc | CC_V;
cc = cc | t; /* restore C */
break;
@@ -1033,7 +1055,8 @@ while (reason == 0) { /* loop until halted */
case 0x90: /* SRHLS - NO */
rslt = (R[r1] & DMASK16) >> opnd; /* result */
CC_GL_16 (rslt); /* set G,L 16b */
if (opnd && (((R[r1] & DMASK16) >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && (((R[r1] & DMASK16) >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = (R[r1] & ~DMASK16) | rslt; /* store result */
break;
@@ -1042,7 +1065,8 @@ while (reason == 0) { /* loop until halted */
case 0x91: /* SLHLS - NO */
rslt = R[r1] << opnd; /* result */
CC_GL_16 (rslt & DMASK16); /* set G,L 16b */
if (opnd && (rslt & 0x10000)) cc = cc | CC_C; /* set C if shft out */
if (opnd && (rslt & 0x10000)) /* set C if shft out */
cc = cc | CC_C;
R[r1] = (R[r1] & ~DMASK16) | (rslt & DMASK16); /* store result */
break;
@@ -1050,7 +1074,8 @@ while (reason == 0) { /* loop until halted */
opnd = opnd & 0xF; /* shift count */
rslt = (SEXT16 (R[r1]) >> opnd) & DMASK16; /* result */
CC_GL_16 (rslt); /* set G,L 16b */
if (opnd && ((R[r1] >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((R[r1] >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = (R[r1] & ~DMASK16) | rslt; /* store result */
break;
@@ -1059,7 +1084,8 @@ while (reason == 0) { /* loop until halted */
rslt = R[r1] << opnd; /* raw result */
R[r1] = (R[r1] & ~MMASK16) | (rslt & MMASK16);
CC_GL_16 (R[r1] & DMASK16); /* set G,L 16b */
if (opnd && (rslt & SIGN16)) cc = cc | CC_C; /* set C if shft out */
if (opnd && (rslt & SIGN16)) /* set C if shft out */
cc = cc | CC_C;
break;
case 0xEC: /* SRL - RI1 */
@@ -1067,7 +1093,8 @@ while (reason == 0) { /* loop until halted */
case 0x10: /* SRLS - NO */
rslt = R[r1] >> opnd; /* result */
CC_GL_32 (rslt); /* set G,L */
if (opnd && ((R[r1] >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((R[r1] >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = rslt; /* store result */
break;
@@ -1076,7 +1103,8 @@ while (reason == 0) { /* loop until halted */
case 0x11: /* SLLS - NO */
rslt = (R[r1] << opnd) & DMASK32; /* result */
CC_GL_32 (rslt); /* set G,L */
if (opnd && ((R[r1] << (opnd - 1)) & SIGN32)) cc = cc | CC_C;
if (opnd && ((R[r1] << (opnd - 1)) & SIGN32))
cc = cc | CC_C;
R[r1] = rslt; /* store result */
break;
@@ -1084,7 +1112,8 @@ while (reason == 0) { /* loop until halted */
opnd = opnd & 0x1F; /* shift count */
rslt = (SEXT32 (R[r1]) >> opnd) & DMASK32; /* result */
CC_GL_32 (rslt); /* set G,L */
if (opnd && ((R[r1] >> (opnd - 1)) & 1)) cc = cc | CC_C;
if (opnd && ((R[r1] >> (opnd - 1)) & 1))
cc = cc | CC_C;
R[r1] = rslt; /* store result */
break;
@@ -1093,20 +1122,21 @@ while (reason == 0) { /* loop until halted */
rslt = (R[r1] << opnd) & DMASK32; /* raw result */
R[r1] = (R[r1] & SIGN32) | (rslt & MMASK32); /* arith result */
CC_GL_32 (R[r1]); /* set G,L */
if (opnd && (rslt & SIGN32)) cc = cc | CC_C; /* set C if shft out */
if (opnd && (rslt & SIGN32)) /* set C if shft out */
cc = cc | CC_C;
break;
case 0xEA: /* RRL - RI1 */
opnd = opnd & 0x1F; /* shift count */
if (opnd) R[r1] = (R[r1] >> opnd) | /* if cnt > 0 */
((R[r1] << (32 - opnd)) & DMASK32); /* rotate */
if (opnd) /* if cnt > 0 */
R[r1] = (R[r1] >> opnd) | ((R[r1] << (32 - opnd)) & DMASK32);
CC_GL_32 (R[r1]); /* set G,L */
break;
case 0xEB: /* RLL - RI1 */
opnd = opnd & 0x1F; /* shift count */
if (opnd) R[r1] = ((R[r1] << opnd) & DMASK32) | /* if cnt > 0 */
(R[r1] >> (32 - opnd)); /* rotate */
if (opnd)
R[r1] = ((R[r1] << opnd) & DMASK32) | (R[r1] >> (32 - opnd));
CC_GL_32 (R[r1]); /* set G,L */
break;
@@ -1116,7 +1146,8 @@ while (reason == 0) { /* loop until halted */
t = 1u << (15 - (R[r1] & 0xF)); /* bit mask in HW */
ea = (ea + ((R[r1] >> 3) & ~1)) & VAMASK; /* HW location */
opnd = ReadH (ea, VR); /* read HW */
if (opnd & t) cc = CC_G; /* test bit */
if (opnd & t) /* test bit */
cc = CC_G;
else cc = 0;
break;
@@ -1125,7 +1156,8 @@ while (reason == 0) { /* loop until halted */
ea = (ea + ((R[r1] >> 3) & ~1)) & VAMASK; /* HW location */
opnd = ReadH (ea, VR); /* read HW */
WriteH (ea, opnd | t, VW); /* set bit, rewr */
if (opnd & t) cc = CC_G; /* test bit */
if (opnd & t) /* test bit */
cc = CC_G;
else cc = 0;
break;
@@ -1134,7 +1166,8 @@ while (reason == 0) { /* loop until halted */
ea = (ea + ((R[r1] >> 3) & ~1)) & VAMASK; /* HW location */
opnd = ReadH (ea, VR); /* read HW */
WriteH (ea, opnd & ~t, VW); /* clr bit, rewr */
if (opnd & t) cc = CC_G; /* test bit */
if (opnd & t) /* test bit */
cc = CC_G;
else cc = 0;
break;
@@ -1143,7 +1176,8 @@ while (reason == 0) { /* loop until halted */
ea = (ea + ((R[r1] >> 3) & ~1)) & VAMASK; /* HW location */
opnd = ReadH (ea, VR); /* read HW */
WriteH (ea, opnd ^ t, VW); /* com bit, rewr */
if (opnd & t) cc = CC_G; /* test bit */
if (opnd & t) /* test bit */
cc = CC_G;
else cc = 0;
break;
@@ -1157,8 +1191,10 @@ while (reason == 0) { /* loop until halted */
case 0xFA: /* AI - RI2 */
rslt = (R[r1] + opnd) & DMASK32; /* result */
CC_GL_32 (rslt); /* set G,L */
if (rslt < opnd) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN32) cc = cc | CC_V;
if (rslt < opnd) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN32)
cc = cc | CC_V;
R[r1] = rslt;
break;
@@ -1166,16 +1202,20 @@ while (reason == 0) { /* loop until halted */
rslt = (R[r1] + opnd) & DMASK32; /* result */
WriteF (ea, rslt, VW); /* write result */
CC_GL_32 (rslt); /* set G,L */
if (rslt < opnd) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN32) cc = cc | CC_V;
if (rslt < opnd) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN32)
cc = cc | CC_V;
break;
case 0x61: /* AHM - RXH */
rslt = (R[r1] + opnd) & DMASK16; /* result */
WriteH (ea, rslt, VW); /* write result */
CC_GL_16 (rslt); /* set G,L 16b */
if (rslt < (opnd & DMASK16)) cc = cc | CC_C; /* set C if carry */
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16) cc = cc | CC_V;
if (rslt < (opnd & DMASK16)) /* set C if carry */
cc = cc | CC_C;
if (((~R[r1] ^ opnd) & (R[r1] ^ rslt)) & SIGN16)
cc = cc | CC_V;
break;
case 0x0B: /* SR - RR */
@@ -1186,8 +1226,10 @@ while (reason == 0) { /* loop until halted */
case 0xFB: /* SI - RI2 */
rslt = (R[r1] - opnd) & DMASK32; /* result */
CC_GL_32 (rslt); /* set G,L */
if (R[r1] < opnd) cc = cc | CC_C; /* set C if borrow */
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN32) cc = cc | CC_V;
if (R[r1] < opnd) /* set C if borrow */
cc = cc | CC_C;
if (((R[r1] ^ opnd) & (~opnd ^ rslt)) & SIGN32)
cc = cc | CC_V;
R[r1] = rslt;
break;
@@ -1219,7 +1261,8 @@ while (reason == 0) { /* loop until halted */
t = 0; /* no cout */
if (mpy & 1) { /* cond add */
rslt = (rslt + mpc) & DMASK32;
if (rslt < mpc) t = SIGN32;
if (rslt < mpc)
t = SIGN32;
}
rlo = (rlo >> 1) | ((rslt & 1) << 31); /* shift result */
rslt = (rslt >> 1) | t;
@@ -1271,8 +1314,10 @@ while (reason == 0) { /* loop until halted */
t = t | 1; /* set quo bit */
}
}
if (quos & SIGN32) t = NEG (t); /* res -? neg quo */
if (R[r1] & SIGN32) rslt = NEG (rslt); /* adj rem sign */
if (quos & SIGN32) /* res -? neg quo */
t = NEG (t);
if (R[r1] & SIGN32) /* adj rem sign */
rslt = NEG (rslt);
if (t && ((t ^ quos) & SIGN32)) { /* res sign wrong? */
if (PSW & PSW_AFI) /* if enabled, */
cc = exception (AFIPSW, cc, 0); /* exception */
@@ -1409,7 +1454,8 @@ while (reason == 0) { /* loop until halted */
case 0xE3: /* SCP - RXH */
opnd = opnd & DMASK16; /* zero ext operand */
if (opnd & CCW32_B1) t = ea + CCB32_B1C; /* point to buf */
if (opnd & CCW32_B1) /* point to buf */
t = ea + CCB32_B1C;
else t = ea + CCB32_B0C;
sr = ReadH (t & VAMASK, VR); /* get count */
sr = SEXT16 (sr); /* sign extend */
@@ -1430,27 +1476,30 @@ while (reason == 0) { /* loop until halted */
case 0x18: /* LPSWR - RR */
PCQ_ENTRY; /* effective branch */
PC = R[(r2 + 1) & 0xF] & VAMASK; /* new PC (old reg set) */
if (DEBUG_PRI (cpu_dev, LOG_CPU_C)) fprintf (sim_deb,
">>LPSWR: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
if (DEBUG_PRI (cpu_dev, LOG_CPU_C))
fprintf (sim_deb, ">>LPSWR: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
cc = newPSW (opnd); /* new PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0xC2: /* LPSW - RXF */
PCQ_ENTRY; /* effective branch */
PC = ReadF ((ea + 4) & VAMASK, VR) & VAMASK; /* new PC */
if (DEBUG_PRI (cpu_dev, LOG_CPU_C)) fprintf (sim_deb,
">>LPSW: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
if (DEBUG_PRI (cpu_dev, LOG_CPU_C))
fprintf (sim_deb, ">>LPSW: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
cc = newPSW (opnd); /* new PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0x95: /* EPSR - NO */
R[r1] = BUILD_PSW (cc); /* save PSW */
cc = newPSW (R[r2]); /* load new PSW */
if (PSW & PSW_SQI) cc = testsysq (cc); /* test for q */
if (PSW & PSW_SQI) /* test for q */
cc = testsysq (cc);
break;
case 0x64: /* ATL - RX */
@@ -1467,7 +1516,8 @@ while (reason == 0) { /* loop until halted */
opnd = opnd & DMASK16; /* zero ext opnd */
t = (R[r1] & 0x3F) ^ opnd;
for (i = 0; i < 6; i++) {
if (t & 1) t = (t >> 1) ^ 0x0F01;
if (t & 1)
t = (t >> 1) ^ 0x0F01;
else t = t >> 1;
}
WriteH (ea, t, VW);
@@ -1477,7 +1527,8 @@ while (reason == 0) { /* loop until halted */
opnd = opnd & DMASK16; /* zero ext opnd */
t = (R[r1] & 0xFF) ^ opnd;
for (i = 0; i < 8; i++) {
if (t & 1) t = (t >> 1) ^ 0xA001;
if (t & 1)
t = (t >> 1) ^ 0xA001;
else t = t >> 1;
}
WriteH (ea, t, VW);
@@ -1486,7 +1537,8 @@ while (reason == 0) { /* loop until halted */
case 0xE7: /* TLATE - RXF */
t = (opnd + ((R[r1] & DMASK8) << 1)) & VAMASK; /* table entry */
rslt = ReadH (t, VR); /* get entry */
if (rslt & SIGN16) R[r1] = rslt & DMASK8; /* direct xlate? */
if (rslt & SIGN16) /* direct xlate? */
R[r1] = rslt & DMASK8;
else {
PCQ_ENTRY; /* branch */
PC = rslt << 1;
@@ -1550,7 +1602,8 @@ while (reason == 0) { /* loop until halted */
t = 0;
cc = CC_V;
}
if (OP_TYPE (op) != OP_RR) WriteB (ea, t, VW); /* RX or RR? */
if (OP_TYPE (op) != OP_RR) /* RX or RR? */
WriteB (ea, t, VW);
else R[r2] = t & DMASK8;
int_eval (); /* re-eval intr */
break;
@@ -1572,7 +1625,8 @@ while (reason == 0) { /* loop until halted */
t = 0;
cc = CC_V;
}
if (OP_TYPE (op) != OP_RR) WriteH (ea, t, VW); /* RX or RR? */
if (OP_TYPE (op) != OP_RR) /* RX or RR? */
WriteH (ea, t, VW);
else R[r2] = t & DMASK16;
int_eval (); /* re-eval intr */
break;
@@ -1585,7 +1639,8 @@ while (reason == 0) { /* loop until halted */
t = dev_tab[dev] (dev, IO_SS, 0); /* get status */
}
else t = STA_EX; /* no */
if (OP_TYPE (op) != OP_RR) WriteB (ea, t, VW); /* RX or RR? */
if (OP_TYPE (op) != OP_RR) /* RX or RR? */
WriteB (ea, t, VW);
else R[r2] = t & DMASK8;
cc = t & 0xF;
int_eval (); /* re-eval intr */
@@ -1608,7 +1663,8 @@ while (reason == 0) { /* loop until halted */
if (OP_TYPE (op) != OP_RR)
lim = ReadF ((ea + 4) & VAMASK, VR);
else lim = R[(r2 + 1) & 0xF];
if (opnd > lim) cc = 0; /* start > end? */
if (opnd > lim) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
blk_io.dfl = dev; /* set status block */
@@ -1627,7 +1683,8 @@ while (reason == 0) { /* loop until halted */
if (OP_TYPE (op) != OP_RR)
lim = ReadF ((ea + 4) & VAMASK, VR);
else lim = R[(r2 + 1) & 0xF];
if (opnd > lim) cc = 0; /* start > end? */
if (opnd > lim) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
blk_io.dfl = dev | BL_RD; /* set status block */
@@ -1643,7 +1700,8 @@ while (reason == 0) { /* loop until halted */
dev = ReadB (AL_DEV, P); /* get device */
t = ReadB (AL_IOC, P); /* get command */
if (DEV_ACC (dev)) { /* dev exist? */
if (AL_BUF > ea) cc = 0; /* start > end? */
if (AL_BUF > ea) /* start > end? */
cc = 0;
else { /* no, start I/O */
dev_tab[dev] (dev, IO_ADR, 0); /* select dev */
dev_tab[dev] (dev, IO_OC, t); /* start dev */
@@ -1676,9 +1734,11 @@ uint32 rs = PSW_GETREG (val); /* register set */
R = &GREG[rs * 16]; /* set register set */
PSW = val & PSW_MASK; /* store PSW */
int_eval (); /* update intreq */
if (PSW & PSW_WAIT) qevent = qevent | EV_WAIT; /* wait state? */
if (PSW & PSW_WAIT) /* wait state? */
qevent = qevent | EV_WAIT;
else qevent = qevent & ~EV_WAIT;
if (PSW & PSW_EXI) SET_ENB (v_DS); /* enable/disable */
if (PSW & PSW_EXI) /* enable/disable */
SET_ENB (v_DS);
else CLR_ENB (v_DS); /* console intr */
return PSW & CC_MASK;
}
@@ -1700,9 +1760,9 @@ else {
GREG[14] = oldPSW; /* 7/32, PSW to set 0 14 */
GREG[15] = oldPC; /* PC to set 0 15 */
}
if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
">>Exc %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
loc, oldPC, oldPSW, PC, PSW | cc | flg);
if (DEBUG_PRI (cpu_dev, LOG_CPU_I))
fprintf (sim_deb, ">>Exc %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
loc, oldPC, oldPSW, PC, PSW | cc | flg);
return cc | flg; /* return CC */
}
@@ -1715,7 +1775,8 @@ int32 usd = ReadH (qb + Q32_USD, P); /* get use count */
if (usd) { /* entries? */
cc = exception (SQTPSW, cc, 0); /* take sysq exc */
if (cpu_unit.flags & UNIT_832) R[13] = qb; /* R13 = sys q addr */
if (cpu_unit.flags & UNIT_832) /* R13 = sys q addr */
R[13] = qb;
else GREG[13] = qb;
}
return cc;
@@ -1730,18 +1791,21 @@ uint32 slt, usd, wra, t;
t = ReadF (ea, VR); /* slots/used */
slt = (t >> 16) & DMASK16; /* # slots */
usd = t & DMASK16; /* # used */
if (usd >= slt) return CC_V; /* list full? */
if (usd >= slt) /* list full? */
return CC_V;
usd = (usd + 1) & DMASK16; /* inc # used */
WriteH (ea + Q32_USD, usd, VW); /* rewrite */
if (flg) { /* ABL? */
wra = ReadH ((ea + Q32_BOT) & VAMASK, VR); /* get bottom */
t = wra + 1; /* adv bottom */
if (t >= slt) t = 0; /* wrap if necc */
if (t >= slt) /* wrap if necc */
t = 0;
WriteH ((ea + Q32_BOT) & VAMASK, t, VW); /* rewrite bottom */
}
else {
wra = ReadH ((ea + Q32_TOP) & VAMASK, VR); /* ATL, get top */
if (wra == 0) wra = (slt - 1) & DMASK16; /* wrap if necc */
if (wra == 0)
wra = (slt - 1) & DMASK16; /* wrap if necc */
else wra = wra - 1; /* dec top */
WriteH ((ea + Q32_TOP) & VAMASK, wra, VW); /* rewrite top */
}
@@ -1758,23 +1822,27 @@ uint32 slt, usd, rda, t;
t = ReadF (ea, VR); /* get slots/used */
slt = (t >> 16) & DMASK16; /* # slots */
usd = t & DMASK16; /* # used */
if (usd == 0) return CC_V; /* empty? */
if (usd == 0) /* empty? */
return CC_V;
usd = usd - 1; /* dec used */
WriteH (ea + Q32_USD, usd, VW); /* rewrite */
if (flg) { /* RBL? */
rda = ReadH ((ea + Q32_BOT) & VAMASK, VR); /* get bottom */
if (rda == 0) rda = (slt - 1) & DMASK16; /* wrap if necc */
if (rda == 0) /* wrap if necc */
rda = (slt - 1) & DMASK16;
else rda = rda - 1; /* dec bottom */
WriteH ((ea + Q32_BOT) & VAMASK, rda, VW); /* rewrite bottom */
}
else {
rda = ReadH ((ea + Q32_TOP) & VAMASK, VR); /* RTL, get top */
t = rda + 1; /* adv top */
if (t >= slt) t = 0; /* wrap if necc */
if (t >= slt) /* wrap if necc */
t = 0;
WriteH ((ea + Q32_TOP) & VAMASK, t, VW); /* rewrite top */
}
R[r1] = ReadF ((ea + Q32_BASE + (rda * Q32_SLNT)) & VAMASK, VR); /* read slot */
if (usd) return CC_G;
if (usd)
return CC_G;
else return 0;
}
@@ -1792,9 +1860,9 @@ newPSW (0x2800); /* new PSW */
R[0] = oldPSW; /* save old PSW */
R[1] = PC; /* save PC */
R[2] = dev; /* set dev # */
if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
">>Int %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
dev, PC, oldPSW, vec, 0x2800);
if (DEBUG_PRI (cpu_dev, LOG_CPU_I))
fprintf (sim_deb, ">>Int %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
dev, PC, oldPSW, vec, 0x2800);
if (DEV_ACC (dev)) { /* dev exist? */
hw = dev_tab[dev] (dev, IO_ADR, 0); /* select, get hw */
R[3] = st = dev_tab[dev] (dev, IO_SS, 0); /* sense status */
@@ -1853,7 +1921,8 @@ if (ccw & CCW32_FST) { /* fast mode? */
} /* end if bufc <= 0 */
} /* end fast */
else { /* slow mode */
if (ccw & CCW32_B1) ccwb = ccwa + CCB32_B1C; /* which buf? */
if (ccw & CCW32_B1) /* which buf? */
ccwb = ccwa + CCB32_B1C;
else ccwb = ccwa + CCB32_B0C;
t = ReadH (ccwb, VR); /* get count */
bufc = SEXT16 (t); /* sign ext */
@@ -1894,7 +1963,8 @@ else { /* slow mode */
t = t ^ by; /* start LRC */
if (ccw & CCW32_CRC) { /* CRC? */
for (i = 0; i < 8; i++) {
if (t & 1) t = (t >> 1) ^ 0xA001;
if (t & 1)
t = (t >> 1) ^ 0xA001;
else t = t >> 1;
}
}
@@ -1922,7 +1992,8 @@ int t;
switch (op) {
case IO_ADR: /* select */
if (!drmod) drpos = srpos = 0; /* norm mode? clr */
if (!drmod) /* norm mode? clr */
drpos = srpos = 0;
return BY; /* byte only */
case IO_OC: /* command */
@@ -1931,13 +2002,15 @@ switch (op) {
drmod = 1;
drpos = srpos = 0; /* init cntrs */
}
else if (op == 0x80) drmod = 0; /* x80 = norm */
else if (op == 0x80) /* x80 = norm */
drmod = 0;
break;
case IO_WD: /* write */
if (drpos < 4)
DR = (DR & ~(DMASK8 << (drpos * 8))) | (dat << (drpos * 8));
else if (drpos == 4) DRX = dat;
else if (drpos == 4)
DRX = dat;
drpos = (drpos + 1) & 0x7;
break;
@@ -1996,11 +2069,15 @@ seg = VA_GETSEG (va); /* get seg num */
off = VA_GETOFF (va); /* get offset */
mapr = ReadF ((base + (seg << 2)) & VAMASK, rel); /* get seg reg */
lim = GET_SRL (mapr); /* get limit */
if (off >= lim) return CC_C; /* limit viol? */
if ((mapr & SR_PRS) == 0) return CC_V; /* not present? */
if (off >= lim) /* limit viol? */
return CC_C;
if ((mapr & SR_PRS) == 0) /* not present? */
return CC_V;
*pa = off + (mapr & SRF_MASK); /* translate */
if (mapr & (SR_WRP | SR_WPI)) return CC_G; /* write prot? */
if (mapr & SR_EXP) return CC_L; /* exec prot? */
if (mapr & (SR_WRP | SR_WPI)) /* write prot? */
return CC_G;
if (mapr & SR_EXP) /* exec prot? */
return CC_L;
return 0; /* ok */
}
@@ -2030,7 +2107,8 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
else val = M[loc >> 2]; /* get mem word */
}
else if (rel == 0) val = M[loc >> 2]; /* phys ref? */
else if (rel == 0) /* phys ref? */
val = M[loc >> 2];
else {
uint32 pa = Reloc (loc, rel); /* relocate */
val = M[pa >> 2];
@@ -2049,7 +2127,8 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
else val = M[loc >> 2]; /* get mem word */
}
else if (rel == 0) val = M[loc >> 2]; /* phys ref? */
else if (rel == 0) /* phys ref? */
val = M[loc >> 2];
else {
uint32 pa = Reloc (loc, rel); /* relocate */
val = M[pa >> 2];
@@ -2068,7 +2147,8 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
else val = M[loc >> 2]; /* get mem word */
}
else if (rel == 0) val = M[loc >> 2]; /* phys ref? */
else if (rel == 0) /* phys ref? */
val = M[loc >> 2];
else {
uint32 pa = Reloc (loc, rel); /* relocate */
val = M[pa >> 2];
@@ -2093,9 +2173,10 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
}
}
else if (rel != 0) pa = Reloc (loc, rel); /* !phys? relocate */
if (MEM_ADDR_OK (pa)) M[pa >> 2] =
(M[pa >> 2] & ~(DMASK8 << sc)) | (val << sc);
else if (rel != 0) /* !phys? relocate */
pa = Reloc (loc, rel);
if (MEM_ADDR_OK (pa))
M[pa >> 2] = (M[pa >> 2] & ~(DMASK8 << sc)) | (val << sc);
return;
}
@@ -2116,10 +2197,11 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
}
}
else if (rel != 0) pa = Reloc (loc, rel); /* !phys? relocate */
if (MEM_ADDR_OK (pa)) M[pa >> 2] = (loc & 2)?
((M[pa >> 2] & ~DMASK16) | val):
((M[pa >> 2] & DMASK16) | (val << 16));
else if (rel != 0) /* !phys? relocate */
pa = Reloc (loc, rel);
if (MEM_ADDR_OK (pa))
M[pa >> 2] = (loc & 2)? ((M[pa >> 2] & ~DMASK16) | val):
((M[pa >> 2] & DMASK16) | (val << 16));
return;
}
@@ -2143,8 +2225,10 @@ if ((PSW & PSW_REL) == 0) { /* reloc off? */
}
}
}
else if (rel != 0) pa = Reloc (loc, rel); /* !phys? relocate */
if (MEM_ADDR_OK (pa)) M[pa >> 2] = val & DMASK32;
else if (rel != 0) /* !phys? relocate */
pa = Reloc (loc, rel);
if (MEM_ADDR_OK (pa))
M[pa >> 2] = val & DMASK32;
return;
}
@@ -2190,10 +2274,13 @@ DR = 0; /* clear display */
drmod = 0;
blk_io.dfl = blk_io.cur = blk_io.end = 0; /* no block I/O */
sim_brk_types = sim_brk_dflt = SWMASK ('E'); /* init bkpts */
if (M == NULL) M = (uint32 *) calloc (MAXMEMSIZE32 >> 2, sizeof (uint32));
if (M == NULL) return SCPE_MEM;
if (M == NULL)
M = (uint32 *) calloc (MAXMEMSIZE32 >> 2, sizeof (uint32));
if (M == NULL)
return SCPE_MEM;
pcq_r = find_reg ("PCQ", NULL, dptr); /* init PCQ */
if (pcq_r) pcq_r->qptr = 0;
if (pcq_r)
pcq_r->qptr = 0;
else return SCPE_IERR;
return SCPE_OK;
}
@@ -2204,10 +2291,13 @@ t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
{
if ((sw & SWMASK ('V')) && (PSW & PSW_REL)) {
int32 cc = RelocT (addr, MAC_BASE, P, &addr);
if (cc & (CC_C | CC_V)) return SCPE_NXM;
if (cc & (CC_C | CC_V))
return SCPE_NXM;
}
if (addr >= MEMSIZE) return SCPE_NXM;
if (vptr != NULL) *vptr = IOReadH (addr);
if (addr >= MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
*vptr = IOReadH (addr);
return SCPE_OK;
}
@@ -2217,9 +2307,11 @@ t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
{
if ((sw & SWMASK ('V')) && (PSW & PSW_REL)) {
int32 cc = RelocT (addr, MAC_BASE, P, &addr);
if (cc & (CC_C | CC_V)) return SCPE_NXM;
if (cc & (CC_C | CC_V))
return SCPE_NXM;
}
if (addr >= MEMSIZE) return SCPE_NXM;
if (addr >= MEMSIZE)
return SCPE_NXM;
IOWriteH (addr, val);
return SCPE_OK;
}
@@ -2233,11 +2325,13 @@ uint32 i;
if ((val <= 0) || (val > MAXMEMSIZE32) || ((val & 0xFFFF) != 0))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i = i + 4) mc = mc | M[i >> 2];
for (i = val; i < MEMSIZE; i = i + 4)
mc = mc | M[i >> 2];
if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
MEMSIZE = val;
for (i = MEMSIZE; i < MAXMEMSIZE32; i = i + 4) M[i >> 2] = 0;
for (i = MEMSIZE; i < MAXMEMSIZE32; i = i + 4)
M[i >> 2] = 0;
return SCPE_OK;
}
@@ -2250,8 +2344,10 @@ REG *rptr;
int32 i;
rptr = find_reg ("R0", NULL, &cpu_dev);
if (rptr == NULL) return;
for (i = 0; i < 16; i++, rptr++) rptr->loc = (void *) (rbase + i);
if (rptr == NULL)
return;
for (i = 0; i < 16; i++, rptr++)
rptr->loc = (void *) (rbase + i);
return;
}
@@ -2259,7 +2355,8 @@ return;
t_stat cpu_set_consint (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (PSW & PSW_EXI) SET_INT (v_DS);
if (PSW & PSW_EXI)
SET_INT (v_DS);
return SCPE_OK;
}
@@ -2271,12 +2368,14 @@ uint32 i, lnt;
t_stat r;
if (cptr == NULL) {
for (i = 0; i < hst_lnt; i++) hst[i].pc = 0;
for (i = 0; i < hst_lnt; i++)
hst[i].pc = 0;
hst_p = 0;
return SCPE_OK;
}
lnt = (uint32) get_uint (cptr, 10, HIST_MAX, &r);
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN))) return SCPE_ARG;
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN)))
return SCPE_ARG;
hst_p = 0;
if (hst_lnt) {
free (hst);
@@ -2285,7 +2384,8 @@ if (hst_lnt) {
}
if (lnt) {
hst = (InstHistory *) calloc (lnt, sizeof (InstHistory));
if (hst == NULL) return SCPE_MEM;
if (hst == NULL)
return SCPE_MEM;
hst_lnt = lnt;
}
return SCPE_OK;
@@ -2303,21 +2403,25 @@ InstHistory *h;
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */
if (hst_lnt == 0) /* enabled? */
return SCPE_NOFNC;
if (cptr) {
lnt = (int32) get_uint (cptr, 10, hst_lnt, &r);
if ((r != SCPE_OK) || (lnt == 0)) return SCPE_ARG;
if ((r != SCPE_OK) || (lnt == 0))
return SCPE_ARG;
}
else lnt = hst_lnt;
di = hst_p - lnt; /* work forward */
if (di < 0) di = di + hst_lnt;
if (di < 0)
di = di + hst_lnt;
fprintf (st, "PC r1 operand ea IR\n\n");
for (k = 0; k < lnt; k++) { /* print specified */
h = &hst[(di++) % hst_lnt]; /* entry pointer */
if (h->pc & HIST_PC) { /* instruction? */
fprintf (st, "%06X %08X %08X ", h->pc & VAMASK32, h->r1, h->opnd);
op = (h->ir1 >> 8) & 0xFF;
if (OP_TYPE (op) >= OP_RX) fprintf (st, "%06X ", h->ea);
if (OP_TYPE (op) >= OP_RX)
fprintf (st, "%06X ", h->ea);
else fprintf (st, " ");
sim_eval[0] = h->ir1;
sim_eval[1] = h->ir2;

8
Interdata/id32_dboot.c
View File

@@ -1,6 +1,6 @@
/* id32_dboot.c: Interdata 32b simulator disk bootstrap
Copyright (c) 2000-2006, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -299,7 +299,8 @@ uptr = dptr->units + u; /* get capacity */
cap = uptr->capac >> 20;
for (i = typ = 0; dboot_tab[i].name != NULL; i++) {
if ((strcmp (dboot_tab[i].name, dptr->name) == 0) &&
((dboot_tab[i].sw == 0) || (dboot_tab[i].sw & sim_switches)) &&
((dboot_tab[i].sw == 0) ||
(dboot_tab[i].sw & sim_switches)) &&
(dboot_tab[i].cap == cap)) {
typ = dboot_tab[i].dtype;
off = dboot_tab[i].offset;
@@ -307,7 +308,8 @@ for (i = typ = 0; dboot_tab[i].name != NULL; i++) {
break;
}
}
if (typ == 0) return SCPE_NOFNC;
if (typ == 0)
return SCPE_NOFNC;
IOWriteBlk (DBOOT_BEG, DBOOT_LEN, dboot_rom); /* copy boot */
IOWriteB (AL_DEV, ttp_dib.dno); /* bin input dev */

156
Interdata/id32_sys.c
View File

@@ -104,7 +104,8 @@ const char *sim_stop_messages[] = {
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
if (flag) return pt_dump (fileref, cptr, fnam);
if (flag)
return pt_dump (fileref, cptr, fnam);
return lp_load (fileref, cptr, fnam);
}
@@ -306,19 +307,23 @@ uint32 rx2;
if ((ea1 & 0xC000) == 0) { /* RX1 */
fprintf (of, "%-X", ea1);
if (rx) fprintf (of, "(R%d)", rx);
if (rx)
fprintf (of, "(R%d)", rx);
return -3;
}
if (ea1 & 0x8000) { /* RX2 */
ea1 = addr + 4 + SEXT15 (ea1);
fprintf (of, "%-X", ea1 & VAMASK32);
if (rx) fprintf (of, "(R%d)", rx);
if (rx)
fprintf (of, "(R%d)", rx);
return -3;
}
rx2 = (ea1 >> 8) & 0xF; /* RX3 */
fprintf (of, "%-X", ((ea1 << 16) | ea2) & VAMASK32);
if (rx && !rx2) fprintf (of, "(R%d)", rx);
if (rx2) fprintf (of, "(R%d,R%d)", rx, rx2);
if (rx && !rx2)
fprintf (of, "(R%d)", rx);
if (rx2)
fprintf (of, "(R%d,R%d)", rx, rx2);
return -5;
}
@@ -342,29 +347,38 @@ int32 bflag, c1, c2, rdx;
t_stat r;
DEVICE *dptr;
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
if (uptr == NULL) /* anon = CPU */
uptr = &cpu_unit;
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth < 16) bflag = 1; /* 8b dev? */
if (dptr == NULL)
return SCPE_IERR;
if (dptr->dwidth < 16) /* 8b dev? */
bflag = 1;
else bflag = 0; /* assume 16b */
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
if (sw & SWMASK ('D')) /* get radix */
rdx = 10;
else if (sw & SWMASK ('O'))
rdx = 8;
else if (sw & SWMASK ('H'))
rdx = 16;
else rdx = dptr->dradix;
if (sw & SWMASK ('A')) { /* ASCII char? */
if (bflag) c1 = val[0] & 0x7F;
if (bflag)
c1 = val[0] & 0x7F;
else c1 = (val[0] >> ((addr & 1)? 0: 8)) & 0x7F; /* get byte */
fprintf (of, (c1 < 0x20)? "<%02X>": "%c", c1);
return 0;
}
if (sw & SWMASK ('B')) { /* byte? */
if (bflag) c1 = val[0] & 0xFF;
if (bflag)
c1 = val[0] & 0xFF;
else c1 = (val[0] >> ((addr & 1)? 0: 8)) & 0xFF; /* get byte */
fprint_val (of, c1, rdx, 8, PV_RZRO);
return 0;
}
if (bflag) return SCPE_ARG; /* 16b only */
if (bflag) /* 16b only */
return SCPE_ARG;
if (sw & SWMASK ('C')) { /* string? */
c1 = (val[0] >> 8) & 0x7F;
@@ -379,7 +393,8 @@ if (sw & SWMASK ('W')) { /* halfword? */
}
if (sw & SWMASK ('M')) { /* inst format? */
r = fprint_sym_m (of, addr, val); /* decode inst */
if (r <= 0) return r;
if (r <= 0)
return r;
}
fprint_val (of, (val[0] << 16) | val[1], rdx, 32, PV_RZRO);
@@ -430,7 +445,7 @@ for (i = 0; opc_val[i] != 0xFFFF; i++) { /* loop thru ops */
fprintf (of, "%-X,", r1);
case I_V_SX: /* ext short branch */
fprintf (of, "%-X", ((inst & MSK_SBF)?
(addr + r2 + r2): (addr - r2 - r2)));
(addr + r2 + r2): (addr - r2 - r2)));
return -1;
case I_V_R: /* register */
@@ -439,12 +454,14 @@ for (i = 0; opc_val[i] != 0xFFFF; i++) { /* loop thru ops */
case I_V_RI: /* reg-immed */
fprintf (of, "R%d,%-X", r1, ea1);
if (r2) fprintf (of, "(R%d)", r2);
if (r2)
fprintf (of, "(R%d)", r2);
return -3;
case I_V_RF: /* reg-full imm */
fprintf (of, "R%d,%-X", r1, (ea1 << 16) | ea2);
if (r2) fprintf (of, "(R%d)", r2);
if (r2)
fprintf (of, "(R%d)", r2);
return -5;
case I_V_MX: /* mask-memory */
@@ -479,19 +496,24 @@ int32 reg;
if ((*cptr == 'R') || (*cptr == 'r')) { /* R? */
cptr++; /* skip */
if (rtype == R_M) return -1; /* cant be mask */
if (rtype == R_M) /* cant be mask */
return -1;
}
if ((*cptr >= '0') && (*cptr <= '9')) {
reg = *cptr++ - '0';
if ((*cptr >= '0') && (*cptr <= '9'))
reg = (reg * 10) + (*cptr - '0');
else --cptr;
if (reg > 0xF) return -1;
if (reg > 0xF)
return -1;
}
else if ((*cptr >= 'a') && (*cptr <= 'f')) reg = (*cptr - 'a') + 10;
else if ((*cptr >= 'A') && (*cptr <= 'F')) reg = (*cptr - 'A') + 10;
else if ((*cptr >= 'a') && (*cptr <= 'f'))
reg = (*cptr - 'a') + 10;
else if ((*cptr >= 'A') && (*cptr <= 'F'))
reg = (*cptr - 'A') + 10;
else return -1;
if ((rtype == R_F) && (reg & 1)) return -1;
if ((rtype == R_F) && (reg & 1))
return -1;
*optr = cptr + 1;
return reg;
}
@@ -514,14 +536,17 @@ int32 idx;
errno = 0;
*imm = strtoul (cptr, &tptr, 16); /* get immed */
if (errno || (*imm > max) || (cptr == tptr)) return SCPE_ARG;
if (errno || (*imm > max) || (cptr == tptr))
return SCPE_ARG;
if (*tptr == '(') { /* index? */
if ((idx = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG;
if (*tptr++ != ')') return SCPE_ARG;
if (*tptr++ != ')')
return SCPE_ARG;
*inst = *inst | idx;
}
if (*tptr != 0) return SCPE_ARG;
if (*tptr != 0)
return SCPE_ARG;
return SCPE_OK;
}
@@ -543,7 +568,8 @@ int32 sign = 1;
if (*cptr == '.') { /* relative? */
cptr++;
*ea = addr;
if (*cptr == '+') cptr++; /* .+? */
if (*cptr == '+') /* .+? */
cptr++;
else if (*cptr == '-') { /* .-? */
sign = -1;
cptr++;
@@ -553,7 +579,8 @@ if (*cptr == '.') { /* relative? */
else *ea = 0;
errno = 0;
*ea = *ea + (sign * ((int32) strtoul (cptr, tptr, 16)));
if (errno || (cptr == *tptr)) return SCPE_ARG;
if (errno || (cptr == *tptr))
return SCPE_ARG;
return SCPE_OK;
}
@@ -565,19 +592,27 @@ int32 bflag, by, rdx, num;
t_stat r;
DEVICE *dptr;
if (uptr == NULL) uptr = &cpu_unit; /* anon = CPU */
if (uptr == NULL) /* anon = CPU */
uptr = &cpu_unit;
dptr = find_dev_from_unit (uptr); /* find dev */
if (dptr == NULL) return SCPE_IERR;
if (dptr->dwidth < 16) bflag = 1; /* 8b device? */
if (dptr == NULL)
return SCPE_IERR;
if (dptr->dwidth < 16) /* 8b dev? */
bflag = 1;
else bflag = 0; /* assume 16b */
if (sw & SWMASK ('D')) rdx = 10; /* get radix */
else if (sw & SWMASK ('O')) rdx = 8;
else if (sw & SWMASK ('H')) rdx = 16;
if (sw & SWMASK ('D')) /* get radix */
rdx = 10;
else if (sw & SWMASK ('O'))
rdx = 8;
else if (sw & SWMASK ('H'))
rdx = 16;
else rdx = dptr->dradix;
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (bflag) val[0] = (t_value) cptr[0];
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
if (bflag)
val[0] = (t_value) cptr[0];
else val[0] = (addr & 1)?
(val[0] & ~0xFF) | ((t_value) cptr[0]):
(val[0] & 0xFF) | (((t_value) cptr[0]) << 8);
@@ -585,30 +620,36 @@ if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
}
if (sw & SWMASK ('B')) { /* byte? */
by = get_uint (cptr, rdx, DMASK8, &r); /* get byte */
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
if (bflag) val[0] = by;
else val[0] = (addr & 1)?
(val[0] & ~0xFF) | by:
(val[0] & 0xFF) | (by << 8);
return 0;
}
if (bflag) return SCPE_ARG; /* 16b only */
if (bflag) /* 16b only */
return SCPE_ARG;
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII chars? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = ((t_value) cptr[0] << 8) | (t_value) cptr[1];
return -1;
}
if (sw & SWMASK ('W')) { /* halfword? */
val[0] = (int32) get_uint (cptr, rdx, DMASK16, &r); /* get number */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
return -1;
}
r = parse_sym_m (cptr, addr, val); /* try to parse inst */
if (r <= 0) return r;
if (r <= 0)
return r;
num = (int32) get_uint (cptr, rdx, DMASK32, &r); /* get number */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
val[0] = (num >> 16) & DMASK16;
val[1] = num & DMASK16;
return -3;
@@ -636,27 +677,31 @@ char *tptr, gbuf[CBUFSIZE];
vp = 0;
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
if (opcode[i] == NULL)
return SCPE_ARG;
inst = opc_val[i] & 0xFFFF; /* get value */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
if (r1_type[j]) { /* any R1 field? */
cptr = get_glyph (cptr, gbuf, ','); /* get R1 field */
if ((r1 = get_reg (gbuf, &tptr, r1_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG;
return SCPE_ARG;
if (*tptr != 0)
return SCPE_ARG;
inst = inst | (r1 << 4); /* or in R1 */
}
cptr = get_glyph (cptr, gbuf, 0); /* get operand */
if (*cptr) return SCPE_ARG; /* should be end */
if (*cptr) /* should be end */
return SCPE_ARG;
switch (j) { /* case on class */
case I_V_FF: case I_V_SI: /* flt-flt, sh imm */
case I_V_MR: case I_V_RR: /* mask/reg-register */
case I_V_R: /* register */
if ((r2 = get_reg (gbuf, &tptr, r2_type[j])) < 0)
return SCPE_ARG;
if (*tptr != 0) return SCPE_ARG;
return SCPE_ARG;
if (*tptr != 0)
return SCPE_ARG;
inst = inst | r2; /* or in R2 */
break;
@@ -664,7 +709,8 @@ switch (j) { /* case on class */
case I_V_MX: case I_V_RX: /* mask/reg-memory */
case I_V_X: /* memory */
r = get_addr (gbuf, &tptr, &t, addr); /* get addr */
if (r != SCPE_OK) return SCPE_ARG; /* error? */
if (r != SCPE_OK) /* error? */
return SCPE_ARG;
rx2 = 0; /* assume no 2nd */
if (*tptr == '(') { /* index? */
if ((r2 = get_reg (tptr + 1, &tptr, R_R)) < 0)
@@ -674,9 +720,11 @@ switch (j) { /* case on class */
if ((rx2 = get_reg (tptr + 1, &tptr, R_R)) < 0)
return SCPE_ARG;
}
if (*tptr++ != ')') return SCPE_ARG; /* all done? */
if (*tptr++ != ')') /* all done? */
return SCPE_ARG;
}
if (*tptr != 0) return SCPE_ARG;
if (*tptr != 0)
return SCPE_ARG;
val[0] = inst; /* store inst */
if (rx2 == 0) { /* no 2nd? */
if (t < 0x4000) { /* RX1? */
@@ -697,14 +745,16 @@ switch (j) { /* case on class */
case I_V_RI: /* 16b immediate */
r = get_imm (gbuf, &t, &inst, DMASK16); /* process imm */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
val[0] = inst;
val[1] = t;
return -3;
case I_V_RF:
r = get_imm (gbuf, &t, &inst, DMASK32); /* process imm */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
val[0] = inst;
val[1] = (t >> 16) & DMASK16;
val[2] = t & DMASK16;

99
Interdata/id_dp.c
View File

@@ -1,6 +1,6 @@
/* id_dp.c: Interdata 2.5MB/10MB cartridge disk simulator
Copyright (c) 2001-2005, Robert M. Supnik
Copyright (c) 2001-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -276,7 +276,8 @@ switch (op) { /* case IO op */
case IO_WD: /* write data */
if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
">>DPC WD = %02X, STA = %02X\n", dat, dp_sta);
if (dp_sta & STC_IDL) dp_hdsc = dat & HS_MASK; /* idle? hdsc */
if (dp_sta & STC_IDL) /* idle? hdsc */
dp_hdsc = dat & HS_MASK;
else { /* data xfer */
dp_sta = dp_sta | STA_BSY; /* set busy */
dp_db = dat & 0xFF; /* store data */
@@ -285,7 +286,8 @@ switch (op) { /* case IO op */
case IO_SS: /* status */
t = dp_sta & STC_MASK; /* get status */
if (t & SETC_EX) t = t | STA_EX; /* test for EX */
if (t & SETC_EX) /* test for EX */
t = t | STA_EX;
return t;
case IO_OC: /* command */
@@ -298,15 +300,19 @@ switch (op) { /* case IO op */
}
u = (dp_svun - dp_dib.dno - o_DP0) / o_DP0; /* get unit */
uptr = dp_dev.units + u; /* ignore if busy */
if (!(dp_sta & STC_IDL) || sim_is_active (uptr)) break;
if (!(dp_sta & STC_IDL) || sim_is_active (uptr))
break;
dp_cmd = f; /* save cmd */
if (dp_cmd == CMC_WR) dp_sta = 0; /* write: bsy=0 else */
if (dp_cmd == CMC_WR) /* write: bsy=0 else */
dp_sta = 0;
else dp_sta = STA_BSY; /* bsy=1,idl,err=0 */
dp_1st = 1; /* xfr not started */
dp_bptr = 0; /* buffer empty */
if (dp_svun & o_DPF) dp_plat = 1; /* upper platter? */
if (dp_svun & o_DPF) /* upper platter? */
dp_plat = 1;
else dp_plat = 0; /* no, lower */
if (good_cmd[f]) sim_activate (uptr, dp_rtime); /* legal? sched */
if (good_cmd[f]) /* legal? sched */
sim_activate (uptr, dp_rtime);
break;
}
@@ -321,18 +327,21 @@ int32 diff;
uint32 t, u;
UNIT *uptr;
if (dev == dp_dib.dno) return dpc (dev, op, dat); /* controller? */
if (dev == dp_dib.dno) /* controller? */
return dpc (dev, op, dat);
u = (dev - dp_dib.dno - o_DP0) / o_DP0; /* get unit num */
uptr = dp_dev.units + u; /* get unit ptr */
switch (op) { /* case IO op */
case IO_ADR: /* select */
if (dp_sta & STC_IDL) dp_svun = dev; /* idle? save unit */
if (dp_sta & STC_IDL) /* idle? save unit */
dp_svun = dev;
return BY; /* byte only */
case IO_WD: /* write data */
if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
">>DP%d WD = %02X, STA = %02X\n", u, dat, dp_sta);
if (DEBUG_PRS (dp_dev))
fprintf (sim_deb, ">>DP%d WD = %02X, STA = %02X\n",
u, dat, dp_sta);
if (GET_DTYPE (uptr->flags) == TYPE_2315) /* 2.5MB drive? */
dp_cyl = dat & 0xFF; /* cyl is 8b */
else dp_cyl = ((dp_cyl << 8) | dat) & DMASK16; /* insert byte */
@@ -344,19 +353,25 @@ switch (op) { /* case IO op */
((dp_sta & STC_IDL)? 0: STD_ILK) |
(uptr->STD & STD_UST);
else t = STD_MOV | STD_NRDY; /* off = X'09' */
if (t & SETD_EX) t = t | STA_EX; /* test for ex */
if (t & SETD_EX) /* test for ex */
t = t | STA_EX;
return t;
case IO_OC: /* command */
if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
">>DP%d OC = %02X, STA = %02X\n", u, dat, dp_sta);
if (DEBUG_PRS (dp_dev))
fprintf (sim_deb, ">>DP%d OC = %02X, STA = %02X\n",
u, dat, dp_sta);
dpd_arm[u] = int_chg (v_DPC + u + 1, dat, dpd_arm[u]);
if (dat & CMD_SK) t = dp_cyl; /* seek? get cyl */
else if (dat & CMD_RST) t = 0; /* rest? cyl 0 */
if (dat & CMD_SK) /* seek? get cyl */
t = dp_cyl;
else if (dat & CMD_RST) /* rest? cyl 0 */
t = 0;
else break; /* no action */
diff = t - uptr->CYL;
if (diff < 0) diff = -diff; /* ABS cyl diff */
else if (diff == 0) diff = 1; /* must be nz */
if (diff < 0) /* ABS cyl diff */
diff = -diff;
else if (diff == 0) /* must be nz */
diff = 1;
uptr->STD = STD_MOV; /* stat = moving */
uptr->CYL = t; /* put on cyl */
sim_activate (uptr, diff * dp_stime); /* schedule */
@@ -383,12 +398,14 @@ t_stat r;
if (uptr->STD & STD_MOV) { /* seek? */
uptr->STD = 0; /* clr seek in prog */
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_OK; /* offl? hangs */
if ((uptr->flags & UNIT_ATT) == 0) /* offl? hangs */
return SCPE_OK;
if (cyl >= drv_tab[dtype].cyl) { /* bad cylinder? */
uptr->STD = STD_ILA; /* error */
uptr->CYL = drv_tab[dtype].cyl - 1; /* put at edge */
}
if (dpd_arm[u]) SET_INT (v_DPC + u + 1); /* req intr */
if (dpd_arm[u]) /* req intr */
SET_INT (v_DPC + u + 1);
return SCPE_OK;
}
@@ -400,8 +417,10 @@ switch (dp_cmd & 0x7) { /* case on func */
case CMC_RD: /* read */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* sch transfer? */
if (dp_dter (uptr, dp_1st)) return SCPE_OK; /* check xfr err */
if (r = dp_rds (uptr)) return r; /* read sec, err? */
if (dp_dter (uptr, dp_1st)) /* check xfr err */
return SCPE_OK;
if (r = dp_rds (uptr)) /* read sec, err? */
return r;
dp_1st = 0;
t = sch_wrmem (dp_dib.sch, dpxb, DP_NUMBY); /* write to memory */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */
@@ -415,10 +434,12 @@ switch (dp_cmd & 0x7) { /* case on func */
case CMC_WR: /* write */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* sch transfer? */
if (dp_dter (uptr, dp_1st)) return SCPE_OK; /* check xfr err */
if (dp_dter (uptr, dp_1st)) /* check xfr err */
return SCPE_OK;
dp_bptr = sch_rdmem (dp_dib.sch, dpxb, DP_NUMBY); /* read from mem */
dp_db = dpxb[dp_bptr - 1]; /* last byte */
if (r = dp_wds (uptr)) return r; /* write sec, err? */
if (r = dp_wds (uptr)) /* write sec, err? */
return r;
dp_1st = 0;
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */
sim_activate (uptr, dp_rtime); /* reschedule */
@@ -441,7 +462,8 @@ t_stat dp_rds (UNIT *uptr)
uint32 i;
i = fxread (dpxb, sizeof (uint8), DP_NUMBY, uptr->fileref);
for ( ; i < DP_NUMBY; i++) dpxb[i] = 0; /* fill with 0's */
for ( ; i < DP_NUMBY; i++) /* fill with 0's */
dpxb[i] = 0;
if (ferror (uptr->fileref)) { /* error? */
perror ("DP I/O error");
clearerr (uptr->fileref);
@@ -482,7 +504,8 @@ if (((uptr->flags & UNIT_ATT) == 0) || /* not attached? */
hd = GET_SRF (dp_hdsc); /* get head */
sc = GET_SEC (dp_hdsc); /* get sector */
if (dp_cyl != (uint32) uptr->CYL) { /* wrong cylinder? */
if (dp_cyl == 0) uptr->CYL = 0;
if (dp_cyl == 0)
uptr->CYL = 0;
else {
dp_done (STC_ACF); /* error, done */
return TRUE;
@@ -498,7 +521,8 @@ if (!first && (sc == 0) && (hd == 0)) { /* cyl overflow? */
}
sa = GET_SA (dp_plat, uptr->CYL, hd, sc, dtype); /* curr disk addr */
fseek (uptr->fileref, sa * DP_NUMBY, SEEK_SET);
if ((sc + 1) < DP_NUMSC) dp_hdsc = dp_hdsc + 1; /* end of track? */
if ((sc + 1) < DP_NUMSC) /* end of track? */
dp_hdsc = dp_hdsc + 1;
else dp_hdsc = (dp_hdsc ^ HS_HMASK) & HS_HMASK; /* sec 0, nxt srf */
return FALSE;
}
@@ -509,7 +533,8 @@ void dp_done (uint32 flg)
{
dp_sta = (dp_sta | STC_IDL | flg) & ~STA_BSY; /* set flag, idle */
SET_INT (v_DPC); /* unmaskable intr */
if (flg) sch_stop (dp_dib.sch); /* if err, stop ch */
if (flg) /* if err, stop ch */
sch_stop (dp_dib.sch);
return;
}
@@ -548,10 +573,13 @@ t_stat r;
uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size;
r = attach_unit (uptr, cptr); /* attach unit */
if (r != SCPE_OK) return r; /* error? */
if (r != SCPE_OK) /* error? */
return r;
uptr->CYL = 0;
if ((uptr->flags & UNIT_AUTO) == 0) return SCPE_OK; /* autosize? */
if ((p = ftell (uptr->fileref)) == 0) return SCPE_OK;
if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */
return SCPE_OK;
if ((p = ftell (uptr->fileref)) == 0)
return SCPE_OK;
for (i = 0; drv_tab[i].surf != 0; i++) {
if (p <= drv_tab[i].size) {
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
@@ -568,8 +596,10 @@ t_stat dp_detach (UNIT *uptr)
{
uint32 u = uptr - dp_dev.units;
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK; /* attached? */
if (dpd_arm[u]) SET_INT (v_DPC + u + 1); /* if arm, intr */
if (!(uptr->flags & UNIT_ATT)) /* attached? */
return SCPE_OK;
if (dpd_arm[u]) /* if arm, intr */
SET_INT (v_DPC + u + 1);
return detach_unit (uptr);
}
@@ -577,7 +607,8 @@ return detach_unit (uptr);
t_stat dp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
if (uptr->flags & UNIT_ATT)
return SCPE_ALATT;
uptr->capac = drv_tab[GET_DTYPE (val)].size;
return SCPE_OK;
}

65
Interdata/id_fd.c
View File

@@ -1,6 +1,6 @@
/* id_fd.c: Interdata floppy disk simulator
Copyright (c) 2001-2005, Robert M Supnik
Copyright (c) 2001-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -214,8 +214,10 @@ switch (op) { /* case IO op */
return BY; /* byte only */
case IO_RD: /* read */
if (fd_sta & (STA_IDL | STA_BSY)) return fd_db; /* idle, busy? */
if (fd_bptr < FD_NUMBY) fd_db = fdxb[fd_bptr++];/* get byte */
if (fd_sta & (STA_IDL | STA_BSY)) /* idle, busy? */
return fd_db;
if (fd_bptr < FD_NUMBY) /* get byte */
fd_db = fdxb[fd_bptr++];
if (fd_bptr >= FD_NUMBY) { /* buf end? */
if (ctab[fnc] & C_RD) { /* disk read? */
sched_seek (uptr, uptr->LRN + 1); /* sched read */
@@ -234,7 +236,7 @@ switch (op) { /* case IO op */
break;
}
if (fd_bptr < FD_NUMBY) /* if room, */
fdxb[fd_bptr++] = fd_db = dat; /* store byte */
fdxb[fd_bptr++] = fd_db = dat; /* store byte */
if (fd_bptr >= FD_NUMBY) { /* buf end? */
if (ctab[fnc] & C_WD) { /* disk write? */
sched_seek (uptr, uptr->LRN + 1); /* sched write */
@@ -248,8 +250,10 @@ switch (op) { /* case IO op */
case IO_SS: /* status */
t = fd_sta & STA_MASK; /* get status */
if ((uptr->flags & UNIT_ATT) == 0) t = t | STA_DU;
if (t & SET_EX) t = t | STA_EX; /* test for ex */
if ((uptr->flags & UNIT_ATT) == 0)
t = t | STA_DU;
if (t & SET_EX) /* test for ex */
t = t | STA_EX;
return t;
case IO_OC: /* command */
@@ -260,7 +264,8 @@ switch (op) { /* case IO op */
uptr = fd_dev.units + u;
if (fnc == FNC_STOP) { /* stop? */
uptr->FNC = uptr->FNC | FNC_STOPPING; /* flag stop */
if (sim_is_active (uptr)) break; /* busy? cont */
if (sim_is_active (uptr)) /* busy? cont */
break;
if (ctab[GET_FNC (uptr->FNC)] & C_WD) { /* write? */
sched_seek (uptr, uptr->LRN + 1); /* sched write */
fd_sta = fd_sta | STA_BSY; /* set busy */
@@ -275,14 +280,17 @@ switch (op) { /* case IO op */
fd_es[u][1] = u; /* init ext sta */
}
else fd_sta = (fd_sta & ~STA_IDL) | STA_BSY;
if (fnc == FNC_BOOT) t = LRN_BOOT; /* boot? fixed sec */
else if (fd_wdv) t = fd_lrn; /* valid data? use */
if (fnc == FNC_BOOT) /* boot? fixed sec */
t = LRN_BOOT;
else if (fd_wdv) /* valid data? use */
t = fd_lrn;
else t = uptr->LRN; /* use prev */
fd_wdv = 0; /* data invalid */
fd_bptr = 0; /* init buffer */
uptr->FNC = fnc; /* save function */
uptr->LRN = t; /* save LRN */
if (ctab[fnc] & C_RD) sched_seek (uptr, t); /* seek now? */
if (ctab[fnc] & C_RD) /* seek now? */
sched_seek (uptr, t);
else sim_activate (uptr, fd_ctime); /* start cmd */
}
break;
@@ -313,8 +321,10 @@ switch (fnc) { /* case on function */
case FNC_BOOT: /* boot, buf empty */
case FNC_RD: /* read, buf empty */
if (uptr->FNC & FNC_STOPPING) break; /* stopped? */
if (fd_dte (uptr, FALSE)) return SCPE_OK; /* xfr error? */
if (uptr->FNC & FNC_STOPPING) /* stopped? */
break;
if (fd_dte (uptr, FALSE)) /* xfr error? */
return SCPE_OK;
da = GET_DA (uptr->LRN); /* get disk addr */
for (i = 0; i < FD_NUMBY; i++) /* read sector */
fdxb[i] = fbuf[da + i];
@@ -329,7 +339,8 @@ switch (fnc) { /* case on function */
break;
case FNC_WR: case FNC_DEL: /* write block */
if (fd_dte (uptr, TRUE)) return SCPE_OK; /* xfr error? */
if (fd_dte (uptr, TRUE)) /* xfr error? */
return SCPE_OK;
if (fd_bptr) { /* any transfer? */
da = GET_DA (uptr->LRN); /* get disk addr */
for (i = fd_bptr; i < FD_NUMBY; i++) /* pad sector */
@@ -345,7 +356,7 @@ switch (fnc) { /* case on function */
}
break;
case FNC_RSTA: /* read status */
case FNC_RSTA: /* read status */
if (uptr->flags & UNIT_WPRT) /* wr protected? */
fd_es[u][0] = fd_es[u][0] | ES0_WRP;
if (GET_TRK (uptr->LRN) == 0) /* on track 0? */
@@ -354,11 +365,13 @@ switch (fnc) { /* case on function */
fd_es[u][0] = fd_es[u][0] | ES0_FLT; /* set err */
fd_es[u][1] = fd_es[u][1] | ES1_NRDY;
}
for (i = 0; i < ES_SIZE; i++) fdxb[i] = fd_es[u][i]; /* copy to buf */
for (i = ES_SIZE; i < FD_NUMBY; i++) fdxb[i] = 0;
for (i = 0; i < ES_SIZE; i++) /* copy to buf */
fdxb[i] = fd_es[u][i];
for (i = ES_SIZE; i < FD_NUMBY; i++)
fdxb[i] = 0;
break;
case FNC_RDID: /* read ID */
case FNC_RDID: /* read ID */
if ((uptr->flags & UNIT_BUF) == 0) { /* not attached? */
fd_done (u, STA_ERR, ES0_ERR | ES0_FLT, ES1_NRDY);
return SCPE_OK;
@@ -387,7 +400,8 @@ if (uptr->FNC & FNC_STOPPING) { /* stopping? */
sim_activate (uptr, fd_ctime); /* schedule */
}
fd_sta = fd_sta & ~STA_BSY; /* clear busy */
if (fd_arm) SET_INT (v_FD); /* if armed, int */
if (fd_arm) /* if armed, int */
SET_INT (v_FD);
return SCPE_OK;
}
@@ -397,8 +411,10 @@ void sched_seek (UNIT *uptr, int32 newlrn)
{
int32 diff = newlrn - uptr->LRN; /* LRN diff */
if (diff < 0) diff = -diff; /* ABS */
if (diff < 10) diff = 10; /* MIN 10 */
if (diff < 0) /* ABS */
diff = -diff;
if (diff < 10)
diff = 10; /* MIN 10 */
sim_activate (uptr, diff * fd_stime); /* schedule */
return;
}
@@ -408,7 +424,8 @@ return;
void fd_done (uint32 u, uint32 nsta, uint32 nes0, uint32 nes1)
{
fd_sta = (fd_sta | STA_IDL | nsta) & ~STA_BSY; /* set idle */
if (fd_arm) SET_INT (v_FD); /* if armed, int */
if (fd_arm) /* if armed, int */
SET_INT (v_FD);
fd_es[u][0] = fd_es[u][0] | nes0; /* set ext state */
fd_es[u][1] = fd_es[u][1] | nes1;
return;
@@ -444,7 +461,8 @@ uint32 i, wrk;
for (i = 0; i < cnt; i++) {
wrk = crc ^ dat;
crc = (crc << 1) & DMASK16;
if (wrk & SIGN16) crc = ((crc ^ 0x1020) + 1) & DMASK16;
if (wrk & SIGN16)
crc = ((crc ^ 0x1020) + 1) & DMASK16;
dat = (dat << 1) & DMASK16;
}
return crc;
@@ -498,7 +516,8 @@ t_stat fd_boot (int32 unitno, DEVICE *dptr)
extern uint32 PC, dec_flgs;
extern uint16 decrom[];
if (decrom[0xD5] & dec_flgs) return SCPE_NOFNC; /* AL defined? */
if (decrom[0xD5] & dec_flgs) /* AL defined? */
return SCPE_NOFNC;
IOWriteBlk (BOOT_START, BOOT_LEN, boot_rom); /* copy boot */
IOWriteB (AL_DEV, fd_dib.dno); /* set dev no */
IOWriteB (AL_IOC, 0x86 + (unitno << CMD_V_UNIT)); /* set dev cmd, unit num */

40
Interdata/id_fp.c
View File

@@ -1,6 +1,6 @@
/* id_fp.c: Interdata floating point instructions
Copyright (c) 2000-2005, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -218,7 +218,8 @@ uint32 f_flt (uint32 op, uint32 r1, uint32 r2) /* 16b */
struct ufp res = { 0, 0x44, 0, 0 }; /* +, 16**4 */
uint32 cc;
if (R[r2] == 0) cc = 0; /* zero arg? */
if (R[r2] == 0) /* zero arg? */
cc = 0;
else if (R[r2] & SIGN16) { /* neg arg? */
res.sign = FP_M_SIGN; /* set sign */
res.h = ((~R[r2] + 1) & DMASK16) << 8; /* get magnitude */
@@ -264,8 +265,10 @@ int32 ediff;
ReadFP2 (&fop2, op, r2, ea); /* get op2, norm */
UnpackFPR (&fop1, op, r1); /* get op1, norm */
if (op & 1) fop2.sign = fop2.sign ^ 1; /* if sub, inv sign2 */
if (fop1.h == 0) fop1 = fop2; /* if op1 = 0, res = op2 */
if (op & 1) /* if sub, inv sign2 */
fop2.sign = fop2.sign ^ 1;
if (fop1.h == 0) /* if op1 = 0, res = op2 */
fop1 = fop2;
else if (fop2.h != 0) { /* if op2 = 0, no add */
if ((fop1.exp < fop2.exp) || /* |op1| < |op2|? */
((fop1.exp == fop2.exp) &&
@@ -277,13 +280,15 @@ else if (fop2.h != 0) { /* if op2 = 0, no add */
}
ediff = fop1.exp - fop2.exp; /* exp difference */
if (OP_DPFP (op) || fp_in_hwre) { /* dbl prec or hwre? */
if (ediff >= 14) fop2.h = fop2.l = 0; /* diff too big? */
if (ediff >= 14) /* diff too big? */
fop2.h = fop2.l = 0;
else if (ediff) { /* any difference? */
FR_RSH_V (fop2, ediff * 4); /* shift frac */
}
}
else { /* sgl prec ucode */
if (ediff >= 6) fop2.h = 0; /* diff too big? */
if (ediff >= 6) /* diff too big? */
fop2.h = 0;
else if (ediff) /* any difference? */
fop2.h = fop2.h >> (ediff * 4); /* shift frac */
}
@@ -328,7 +333,8 @@ if (fop1.h && fop2.h) { /* if both != 0 */
return StoreFPX (&res, op, r1); /* early out */
if ((fop1.l | fop2.l) == 0) { /* 24b x 24b? */
for (i = 0; i < 24; i++) { /* 24 iterations */
if (fop2.h & 1) res.h = res.h + fop1.h; /* add hi only */
if (fop2.h & 1) /* add hi only */
res.h = res.h + fop1.h;
FR_RSH_K (res, 1); /* shift dp res */
fop2.h = fop2.h >> 1;
}
@@ -336,13 +342,17 @@ if (fop1.h && fop2.h) { /* if both != 0 */
else { /* some low 0's */
if (fop2.l != 0) { /* 56b x 56b? */
for (i = 0; i < 32; i++) { /* do low 32b */
if (fop2.l & 1) { FR_ADD (res, fop1); }
if (fop2.l & 1) {
FR_ADD (res, fop1);
}
FR_RSH_K (res, 1);
fop2.l = fop2.l >> 1;
}
}
for (i = 0; i < 24; i++) { /* do hi 24b */
if (fop2.h & 1) { FR_ADD (res, fop1); }
if (fop2.h & 1) {
FR_ADD (res, fop1);
}
FR_RSH_K (res, 1);
fop2.h = fop2.h >> 1;
}
@@ -364,7 +374,8 @@ int32 i;
ReadFP2 (&fop2, op, r2, ea); /* get op2, norm */
UnpackFPR (&fop1, op, r1); /* get op1, norm */
if (fop2.h == 0) return CC_C | CC_V; /* div by zero? */
if (fop2.h == 0) /* div by zero? */
return CC_C | CC_V;
if (fop1.h) { /* dvd != 0? */
quo.sign = fop1.sign ^ fop2.sign; /* sign = diff */
quo.exp = fop1.exp - fop2.exp + FP_BIAS; /* exp = diff */
@@ -388,7 +399,8 @@ if (fop1.h) { /* dvd != 0? */
}
if (!OP_DPFP (op)) { /* single? */
quo.h = quo.l; /* move quotient */
if (fop1.h >= (fop2.h << 3)) quo.l = FP_ROUND;
if (fop1.h >= (fop2.h << 3))
quo.l = FP_ROUND;
else quo.l = 0;
} /* don't need to normalize */
} /* end if fop1.h */
@@ -429,7 +441,8 @@ uint32 hi;
if (OP_TYPE (op) > OP_RR) { /* mem ref? */
hi = ReadF (ea, VR); /* get hi */
if (OP_DPFP (op)) fop->l = ReadF (ea + 4, VR); /* dp? get lo */
if (OP_DPFP (op)) /* dp? get lo */
fop->l = ReadF (ea + 4, VR);
else fop->l = 0; /* sp, lo = 0 */
}
else {
@@ -515,7 +528,8 @@ uint32 StoreFPX (struct ufp *fop, uint32 op, uint32 r1)
{
uint32 cc = CC_V;
if (fop->exp < 0) fop->h = fop->l = 0; /* undf? clean 0 */
if (fop->exp < 0) /* undf? clean 0 */
fop->h = fop->l = 0;
else {
fop->h = (fop->sign)? 0xFFFFFFFF: 0x7FFFFFFF; /* overflow */
fop->l = 0xFFFFFFFF;

72
Interdata/id_idc.c
View File

@@ -1,6 +1,6 @@
/* id_idc.c: Interdata MSM/IDC disk controller simulator
Copyright (c) 2001-2006, Robert M. Supnik
Copyright (c) 2001-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -375,7 +375,8 @@ switch (op) { /* case IO op */
case IO_SS: /* status */
t = idc_sta & STC_MASK; /* get status */
if (t & SETC_EX) t = t | STA_EX; /* test for EX */
if (t & SETC_EX) /* test for EX */
t = t | STA_EX;
return t;
case IO_OC: /* command */
@@ -437,13 +438,15 @@ uint32 id (uint32 dev, uint32 op, uint32 dat)
uint32 t, u, f;
UNIT *uptr;
if (dev == idc_dib.dno) return idc (dev, op, dat); /* controller? */
if (dev == idc_dib.dno) /* controller? */
return idc (dev, op, dat);
u = (dev - idc_dib.dno - o_ID0) / o_ID0; /* get unit num */
uptr = idc_dev.units + u; /* get unit ptr */
switch (op) { /* case IO op */
case IO_ADR: /* select */
if (idc_sta & STC_IDL) idc_svun = u; /* idle? save unit */
if (idc_sta & STC_IDL) /* idle? save unit */
idc_svun = u;
return BY; /* byte only */
case IO_RD: /* read data */
@@ -463,7 +466,8 @@ switch (op) { /* case IO op */
(sim_is_active (uptr)? STD_NRDY: 0) |
(uptr->STD & STD_UST);
else t = STD_NRDY | STD_OFFL; /* off = X'09' */
if (t & SETD_EX) t = t | STA_EX; /* test for ex */
if (t & SETD_EX) /* test for ex */
t = t | STA_EX;
return t;
case IO_OC: /* command */
@@ -475,7 +479,8 @@ switch (op) { /* case IO op */
if ((f == 0) || /* if nop, */
(f == CMDX_MASK) || /* 0x30, */
!(idc_sta & STC_IDL) || /* !idle, */
sim_is_active (uptr)) break; /* unit busy, ignore */
sim_is_active (uptr)) /* unit busy, ignore */
break;
uptr->FNC = f | CMC_DRV; /* save cmd */
idc_sta = idc_sta & ~STC_IDL; /* clr idle */
sim_activate (uptr, idc_ctime); /* schedule */
@@ -509,7 +514,8 @@ if (uptr->FNC & CMC_DRV) { /* drive cmd? */
SET_INT (v_IDC + u + 1); /* req intr */
else idd_sirq |= (1 << (v_IDC + u + 1)); /* def intr */
}
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_OK;
if ((uptr->flags & UNIT_ATT) == 0)
return SCPE_OK;
if (((f & CMDX_MASK) == 0) && /* seek? */
(f & (CMD_SK | CMD_RST))) {
if (idd_dcy[u] >= drv_tab[dtype].cyl) /* bad cylinder? */
@@ -527,7 +533,8 @@ if (uptr->FNC & CMC_DRV) { /* drive cmd? */
sim_activate (uptr, idc_ctime);
}
else if (f >= CMDF_SCY) { /* tag? */
if (f & CMDF_SHD) uptr->HD = idd_db & HD_MASK;
if (f & CMDF_SHD)
uptr->HD = idd_db & HD_MASK;
else if (f & CMDF_SCY) {
if (idd_db >= drv_tab[dtype].cyl) /* bad cylinder? */
uptr->STD = uptr->STD | STD_SKI; /* set seek inc */
@@ -535,7 +542,8 @@ if (uptr->FNC & CMC_DRV) { /* drive cmd? */
}
}
else if (f & (CMD_SK | CMD_RST)) { /* seek? */
if (f == CMD_RST) idd_dcy[u] = 0; /* restore? */
if (f == CMD_RST) /* restore? */
idd_dcy[u] = 0;
if (idd_dcy[u] >= drv_tab[dtype].cyl) { /* bad cylinder? */
uptr->STD = uptr->STD | STD_SKI; /* set seek inc */
idd_dcy[u] = uptr->CYL; /* no motion */
@@ -544,8 +552,10 @@ if (uptr->FNC & CMC_DRV) { /* drive cmd? */
else { /* cylinder ok */
uptr->STD = uptr->STD & ~STD_SKI; /* clr seek inc */
diff = idd_dcy[u] - uptr->CYL;
if (diff < 0) diff = -diff; /* ABS cyl diff */
else if (diff == 0) diff = 1; /* must be nz */
if (diff < 0) /* ABS cyl diff */
diff = -diff;
else if (diff == 0) /* must be nz */
diff = 1;
sim_activate (uptr, diff * idc_stime);
}
}
@@ -564,10 +574,12 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
#endif
case CMC_RD: /* read */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* sch transfer? */
if (idc_dter (uptr, idc_1st)) return SCPE_OK; /* dte? done */
if (r = idc_rds (uptr)) return r; /* read sec, err? */
if (idc_dter (uptr, idc_1st)) /* dte? done */
return SCPE_OK;
if (r = idc_rds (uptr)) /* read sec, err? */
return r;
idc_1st = 0;
t = sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */
t = sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */
sim_activate (uptr, idc_rtime); /* reschedule */
return SCPE_OK;
@@ -577,12 +589,14 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
idc_sta = idc_sta | STC_DTE; /* cant work */
break;
case CMC_WR: /* write */
case CMC_WR: /* write */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* sch transfer? */
if (idc_dter (uptr, idc_1st)) return SCPE_OK; /* dte? done */
if (idc_dter (uptr, idc_1st)) /* dte? done */
return SCPE_OK;
idc_bptr = sch_rdmem (idc_dib.sch, idcxb, IDC_NUMBY); /* read mem */
idc_db = idcxb[idc_bptr - 1]; /* last byte */
if (r = idc_wds (uptr)) return r; /* write sec, err? */
if (r = idc_wds (uptr)) /* write sec, err? */
return r;
idc_1st = 0;
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */
sim_activate (uptr, idc_rtime); /* reschedule */
@@ -649,7 +663,8 @@ if (ferror (uptr->fileref)) { /* error? */
idc_done (STC_DTE);
return SCPE_IOERR;
}
for ( ; i < IDC_NUMBY; i++) idcxb[i] = 0; /* fill with 0's */
for ( ; i < IDC_NUMBY; i++) /* fill with 0's */
idcxb[i] = 0;
return SCPE_OK;
}
@@ -704,7 +719,8 @@ if (hd >= drv_tab[dtype].surf) { /* bad head? */
sa = GET_SA (cy, hd, sc, dtype); /* curr disk addr */
fseek (uptr->fileref, sa * IDC_NUMBY, SEEK_SET); /* seek to pos */
idc_sec = (idc_sec + 1) & SC_MASK; /* incr disk addr */
if (idc_sec == 0) uptr->HD = uptr->HD + 1;
if (idc_sec == 0)
uptr->HD = uptr->HD + 1;
return FALSE;
}
@@ -713,10 +729,12 @@ return FALSE;
void idc_done (uint32 flg)
{
idc_sta = (idc_sta | STC_IDL | flg) & ~STA_BSY; /* set flag, idle */
if (idc_arm) SET_INT (v_IDC); /* if armed, intr */
if (idc_arm) /* if armed, intr */
SET_INT (v_IDC);
int_req[l_IDC] = int_req[l_IDC] | idd_sirq; /* restore drv ints */
idd_sirq = 0; /* clear saved */
if (flg) sch_stop (idc_dib.sch); /* if err, stop sch */
if (flg) /* if err, stop sch */
sch_stop (idc_dib.sch);
return;
}
@@ -760,10 +778,13 @@ t_stat r;
uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size;
r = attach_unit (uptr, cptr); /* attach unit */
if (r != SCPE_OK) return r; /* error? */
if (r != SCPE_OK) /* error? */
return r;
uptr->CYL = 0;
if ((uptr->flags & UNIT_AUTO) == 0) return SCPE_OK; /* autosize? */
if ((p = ftell (uptr->fileref)) == 0) return SCPE_OK;
if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */
return SCPE_OK;
if ((p = ftell (uptr->fileref)) == 0)
return SCPE_OK;
for (i = 0; drv_tab[i].surf != 0; i++) {
if (p <= drv_tab[i].size) {
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
@@ -778,7 +799,8 @@ return SCPE_OK;
t_stat idc_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
if (uptr->flags & UNIT_ATT)
return SCPE_ALATT;
uptr->capac = drv_tab[GET_DTYPE (val)].size;
return SCPE_OK;
}

176
Interdata/id_io.c
View File

@@ -1,6 +1,6 @@
/* id_io.c: Interdata CPU-independent I/O routines
Copyright (c) 2001-2006, Robert M. Supnik
Copyright (c) 2001-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -84,6 +84,7 @@ uint32 sch (uint32 dev, uint32 op, uint32 dat);
void sch_ini (t_bool dtpl);
t_stat sch_reset (DEVICE *dptr);
t_stat sch_set_nchan (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sch_show_nchan (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sch_show_reg (FILE *st, UNIT *uptr, int32 val, void *desc);
/* Selector channel data structures
@@ -113,8 +114,8 @@ REG sch_reg[] = {
};
MTAB sch_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VAL, 0, "channels", "CHANNELS",
&sch_set_nchan, NULL, &sch_reg[0] },
{ MTAB_XTD|MTAB_VDV, 0, "channels", "CHANNELS",
&sch_set_nchan, &sch_show_nchan, NULL },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "0", NULL,
NULL, &sch_show_reg, NULL },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "1", NULL,
@@ -166,14 +167,16 @@ switch (op) { /* case IO op */
case IO_WD: /* write data */
if (pawidth != PAWIDTH32) { /* 16b? max 4 */
if (sch_wdc[ch] >= 4) break; /* stop at 4 */
if (sch_wdc[ch] >= 4) /* stop at 4 */
break;
sch_sa[ch] = ((sch_sa[ch] << 8) | /* ripple ea to sa */
(sch_ea[ch] >> 8)) & DMASK16;
sch_ea[ch] = ((sch_ea[ch] << 8) | /* ripple ea low */
dat) & DMASK16; /* insert byte */
}
else { /* 32b? max 6 */
if (sch_wdc[ch] >= 6) break; /* stop at 6 */
if (sch_wdc[ch] >= 6) /* stop at 6 */
break;
if (sch_wdc[ch] != 5) { /* if not last */
sch_sa[ch] = ((sch_sa[ch] << 8) | /* ripple ea<15:8> to sa */
((sch_ea[ch] >> 8) & DMASK8)) & PAMASK32;
@@ -186,11 +189,14 @@ switch (op) { /* case IO op */
break;
case IO_SS: /* status */
if (sch_cmd[ch] & SCHC_GO) return STA_BSY; /* test busy */
if (sch_cmd[ch] & SCHC_SSTA) return 0; /* test sch sta */
if (sch_cmd[ch] & SCHC_GO) /* test busy */
return STA_BSY;
if (sch_cmd[ch] & SCHC_SSTA) /* test sch sta */
return 0;
else {
sdv = sch_sdv[ch]; /* get dev */
if (dev_tab[sdv] == 0) return CC_V; /* not there? */
if (dev_tab[sdv] == 0) /* not there? */
return CC_V;
dev_tab[sdv] (sdv, IO_ADR, 0); /* select dev */
t = dev_tab[sdv] (sdv, IO_SS, 0); /* get status */
return t & ~STA_BSY; /* clr busy */
@@ -232,7 +238,8 @@ t_bool sch_blk (uint32 dev)
{
uint32 ch = sch_tab[dev] - 1;
if ((ch < sch_max) && (sch_cmd[ch] & SCHC_GO)) return TRUE;
if ((ch < sch_max) && (sch_cmd[ch] & SCHC_GO))
return TRUE;
return FALSE;
}
@@ -240,7 +247,8 @@ return FALSE;
void sch_adr (uint32 ch, uint32 dev)
{
if (ch < sch_max) sch_sdv[ch] = dev;
if (ch < sch_max)
sch_sdv[ch] = dev;
return;
}
@@ -250,7 +258,8 @@ t_bool sch_actv (uint32 ch, uint32 dev)
{
if ((ch < sch_max) && /* chan valid, */
(sch_cmd[ch] & SCHC_GO) && /* on, and */
(sch_sdv[ch] == dev)) return TRUE; /* set for dev? */
(sch_sdv[ch] == dev)) /* set for dev? */
return TRUE;
return FALSE; /* no */
}
@@ -260,7 +269,8 @@ uint32 sch_rdmem (uint32 ch, uint8 *buf, uint32 cnt)
{
uint32 addr, end, xfr, inc;
if ((ch >= sch_max) || ((sch_cmd[ch] & SCHC_GO) == 0)) return 0;
if ((ch >= sch_max) || ((sch_cmd[ch] & SCHC_GO) == 0))
return 0;
addr = sch_sa[ch]; /* start */
end = sch_ea[ch]; /* end */
xfr = MIN (cnt, end - addr + 1); /* sch xfr cnt */
@@ -280,7 +290,8 @@ uint32 sch_wrmem (uint32 ch, uint8 *buf, uint32 cnt)
{
uint32 addr, end, xfr, inc;
if ((ch >= sch_max) || ((sch_cmd[ch] & SCHC_GO) == 0)) return 0;
if ((ch >= sch_max) || ((sch_cmd[ch] & SCHC_GO) == 0))
return 0;
addr = sch_sa[ch]; /* start */
end = sch_ea[ch]; /* end */
xfr = MIN (cnt, end - addr + 1); /* sch xfr cnt */
@@ -339,18 +350,22 @@ DIB *dibp;
uint32 i, newmax;
t_stat r;
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
newmax = get_uint (cptr, 10, SCH_NUMCH, &r); /* get new max */
if ((r != SCPE_OK) || (newmax == sch_max)) return r; /* err or no chg? */
if (newmax == 0) return SCPE_ARG; /* must be > 0 */
if ((r != SCPE_OK) || (newmax == sch_max)) /* err or no chg? */
return r;
if (newmax == 0) /* must be > 0 */
return SCPE_ARG;
if (newmax < sch_max) { /* reducing? */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru dev */
dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp && (dibp->sch >= (int32) newmax)) { /* dev using chan? */
printf ("Device %02X uses channel %d\n",
dibp->dno, dibp->sch);
if (sim_log) fprintf (sim_log, "Device %02X uses channel %d\n",
dibp->dno, dibp->sch);
dibp->dno, dibp->sch);
if (sim_log)
fprintf (sim_log, "Device %02X uses channel %d\n",
dibp->dno, dibp->sch);
return SCPE_OK;
}
}
@@ -360,12 +375,22 @@ sch_reset_ch (sch_max); /* reset chan */
return SCPE_OK;
}
/* Show number of channels */
t_stat sch_show_nchan (FILE *st, UNIT *uptr, int32 val, void *desc)
{
fprintf (st, "channels=%d", sch_max);
return SCPE_OK;
}
/* Show channel registers */
t_stat sch_show_reg (FILE *st, UNIT *uptr, int32 val, void *desc)
{
if (val < 0) return SCPE_IERR;
if (val >= (int32) sch_max) fprintf (st, "Channel %d disabled\n", val);
if (val < 0)
return SCPE_IERR;
if (val >= (int32) sch_max)
fprintf (st, "Channel %d disabled\n", val);
else {
fprintf (st, "SA: %05X\n", sch_sa[val]);
fprintf (st, "EA: %05X\n", sch_ea[val]);
@@ -383,7 +408,8 @@ void sch_ini (t_bool dtpl)
{
uint32 i;
for (i = 0; i < sch_max; i++) sch_tplte[i] = i;
for (i = 0; i < sch_max; i++)
sch_tplte[i] = i;
sch_tplte[sch_max] = TPL_END;
return;
}
@@ -453,9 +479,12 @@ return armdis;
int32 io_2b (int32 val, int32 pos, int32 old)
{
int32 t = (val >> pos) & 3;
if (t == 0) return old;
if (t == 1) return 1;
if (t == 2) return 0;
if (t == 0)
return old;
if (t == 1)
return 1;
if (t == 2)
return 0;
return old ^1;
}
@@ -465,9 +494,12 @@ uint32 IOReadBlk (uint32 loc, uint32 cnt, uint8 *buf)
{
uint32 i;
if (!MEM_ADDR_OK (loc) || (cnt == 0)) return 0;
if (!MEM_ADDR_OK (loc + cnt - 1)) cnt = MEMSIZE - loc;
for (i = 0; i < cnt; i++) buf[i] = IOReadB (loc + i);
if (!MEM_ADDR_OK (loc) || (cnt == 0))
return 0;
if (!MEM_ADDR_OK (loc + cnt - 1))
cnt = MEMSIZE - loc;
for (i = 0; i < cnt; i++)
buf[i] = IOReadB (loc + i);
return cnt;
}
@@ -475,9 +507,12 @@ uint32 IOWriteBlk (uint32 loc, uint32 cnt, uint8 *buf)
{
uint32 i;
if (!MEM_ADDR_OK (loc) || (cnt == 0)) return 0;
if (!MEM_ADDR_OK (loc + cnt - 1)) cnt = MEMSIZE - loc;
for (i = 0; i < cnt; i++) IOWriteB (loc + i, buf[i]);
if (!MEM_ADDR_OK (loc) || (cnt == 0))
return 0;
if (!MEM_ADDR_OK (loc + cnt - 1))
cnt = MEMSIZE - loc;
for (i = 0; i < cnt; i++)
IOWriteB (loc + i, buf[i]);
return cnt;
}
@@ -490,14 +525,19 @@ DIB *dibp;
uint32 newch;
t_stat r;
if (cptr == NULL) return SCPE_ARG;
if (uptr == NULL) return SCPE_IERR;
if (cptr == NULL)
return SCPE_ARG;
if (uptr == NULL)
return SCPE_IERR;
dptr = find_dev_from_unit (uptr);
if (dptr == NULL) return SCPE_IERR;
if (dptr == NULL)
return SCPE_IERR;
dibp = (DIB *) dptr->ctxt;
if ((dibp == NULL) || (dibp->sch < 0)) return SCPE_IERR;
if ((dibp == NULL) || (dibp->sch < 0))
return SCPE_IERR;
newch = get_uint (cptr, 16, sch_max - 1, &r); /* get new */
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
dibp->sch = newch; /* store */
return SCPE_OK;
}
@@ -509,11 +549,14 @@ t_stat show_sch (FILE *st, UNIT *uptr, int32 val, void *desc)
DEVICE *dptr;
DIB *dibp;
if (uptr == NULL) return SCPE_IERR;
if (uptr == NULL)
return SCPE_IERR;
dptr = find_dev_from_unit (uptr);
if (dptr == NULL) return SCPE_IERR;
if (dptr == NULL)
return SCPE_IERR;
dibp = (DIB *) dptr->ctxt;
if ((dibp == NULL) || (dibp->sch < 0)) return SCPE_IERR;
if ((dibp == NULL) || (dibp->sch < 0))
return SCPE_IERR;
fprintf (st, "selch=%X", dibp->sch);
return SCPE_OK;
}
@@ -527,15 +570,21 @@ DIB *dibp;
uint32 newdev;
t_stat r;
if (cptr == NULL) return SCPE_ARG;
if (uptr == NULL) return SCPE_IERR;
if (cptr == NULL)
return SCPE_ARG;
if (uptr == NULL)
return SCPE_IERR;
dptr = find_dev_from_unit (uptr);
if (dptr == NULL) return SCPE_IERR;
if (dptr == NULL)
return SCPE_IERR;
dibp = (DIB *) dptr->ctxt;
if (dibp == NULL) return SCPE_IERR;
if (dibp == NULL)
return SCPE_IERR;
newdev = get_uint (cptr, 16, DEV_MAX, &r); /* get new */
if ((r != SCPE_OK) || (newdev == dibp->dno)) return r;
if (newdev == 0) return SCPE_ARG; /* must be > 0 */
if ((r != SCPE_OK) || (newdev == dibp->dno))
return r;
if (newdev == 0) /* must be > 0 */
return SCPE_ARG;
dibp->dno = newdev; /* store */
return SCPE_OK;
}
@@ -547,11 +596,14 @@ t_stat show_dev (FILE *st, UNIT *uptr, int32 val, void *desc)
DEVICE *dptr;
DIB *dibp;
if (uptr == NULL) return SCPE_IERR;
if (uptr == NULL)
return SCPE_IERR;
dptr = find_dev_from_unit (uptr);
if (dptr == NULL) return SCPE_IERR;
if (dptr == NULL)
return SCPE_IERR;
dibp = (DIB *) dptr->ctxt;
if ((dibp == NULL) || (dibp->dno == 0)) return SCPE_IERR;
if ((dibp == NULL) || (dibp->dno == 0))
return SCPE_IERR;
fprintf (st, "devno=%02X", dibp->dno);
return SCPE_OK;
}
@@ -571,35 +623,43 @@ for (i = 0; i < DEVNO; i++) {
dev_tab[i] = NULL;
sch_tab[i] = 0;
}
for (i = 0; i < (INTSZ * 32); i++) int_tab[i] = 0;
for (i = 0; i < (DEVNO / 32); i++) dmap[i] = 0;
for (i = 0; i < (INTSZ * 32); i++)
int_tab[i] = 0;
for (i = 0; i < (DEVNO / 32); i++)
dmap[i] = 0;
/* Test each device for conflict; add to map; init tables */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */
dibp = (DIB *) dptr->ctxt; /* get DIB */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) continue; /* exist, enabled? */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */
continue;
dno = dibp->dno; /* get device num */
if (dibp->ini) dibp->ini (TRUE); /* gen dno template */
if (dibp->ini) /* gen dno template */
dibp->ini (TRUE);
tplte = dibp->tplte; /* get template */
if (tplte == NULL) tplte = dflt_tplte; /* none? use default */
if (tplte == NULL) /* none? use default */
tplte = dflt_tplte;
for ( ; *tplte != TPL_END; tplte++) { /* loop thru template */
t = (dno + *tplte) & DEV_MAX; /* loop thru template */
dmsk = 1u << (t & 0x1F); /* bit to test */
doff = t / 32; /* word to test */
if (dmap[doff] & dmsk) { /* in use? */
printf ("Device number conflict, devno = %02X\n", t);
if (sim_log) fprintf (sim_log,
"Device number conflict, devno = %02X\n", t);
if (sim_log)
fprintf (sim_log, "Device number conflict, devno = %02X\n", t);
return TRUE;
}
dmap[doff] = dmap[doff] | dmsk;
if (dibp->sch >= 0) sch_tab[t] = dibp->sch + 1;
if (dibp->sch >= 0)
sch_tab[t] = dibp->sch + 1;
dev_tab[t] = dibp->iot;
}
if (dibp->ini) dibp->ini (FALSE); /* gen int template */
if (dibp->ini) /* gen int template */
dibp->ini (FALSE);
tplte = dibp->tplte; /* get template */
if (tplte == NULL) tplte = dflt_tplte; /* none? use default */
if (tplte == NULL) /* none? use default */
tplte = dflt_tplte;
for (j = dibp->irq; *tplte != TPL_END; j++, tplte++)
int_tab[j] = (dno + *tplte) & DEV_MAX;
} /* end for i */

48
Interdata/id_lp.c
View File

@@ -163,7 +163,8 @@ int32 t;
t_stat r = SCPE_OK;
lpt_sta = 0; /* clear busy */
if (lpt_arm) SET_INT (v_LPT); /* armed? intr */
if (lpt_arm) /* armed? intr */
SET_INT (v_LPT);
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (lpt_stopioe, SCPE_UNATT);
t = uptr->buf; /* get character */
@@ -171,9 +172,12 @@ if (lpt_spnd || ((t >= LF) && (t < CR))) { /* spc pend or spc op? *
lpt_spnd = 0;
if (lpt_bufout (uptr) != SCPE_OK) /* print */
return SCPE_IOERR;
if ((t == 1) || (t == LF)) lpt_spc (uptr, 1); /* single space */
else if (t == VT) r = lpt_vfu (uptr, VT_VFU - 1); /* VT->VFU */
else if (t == 0xC) r = lpt_vfu (uptr, FF_VFU - 1); /* FF->VFU */
if ((t == 1) || (t == LF)) /* single space */
lpt_spc (uptr, 1);
else if (t == VT) /* VT->VFU */
r = lpt_vfu (uptr, VT_VFU - 1);
else if (t == 0xC) /* FF->VFU */
r = lpt_vfu (uptr, FF_VFU - 1);
else if ((t >= SPC_BASE) && (t < VFU_BASE))
lpt_spc (uptr, t - SPC_BASE); /* space */
else if ((t >= VFU_BASE) && (t < VFU_BASE + VFU_WIDTH))
@@ -193,7 +197,8 @@ else if (t == CR) { /* CR? */
else if (t >= 0x20) { /* printable? */
if ((uptr->flags & UNIT_UC) && islower (t)) /* UC only? */
t = toupper (t);
if (lpt_bptr < LPT_WIDTH) lpxb[lpt_bptr++] = t;
if (lpt_bptr < LPT_WIDTH)
lpxb[lpt_bptr++] = t;
}
return r;
}
@@ -218,7 +223,8 @@ if (lpxb[0]) { /* any char left? */
}
}
lpt_bptr = 0; /* reset buffer */
for (i = 0; i < LPT_WIDTH; i++) lpxb[i] = ' ';
for (i = 0; i < LPT_WIDTH; i++)
lpxb[i] = ' ';
lpxb[LPT_WIDTH] = 0;
return r;
}
@@ -235,7 +241,8 @@ if ((ch == (FF_VFU - 1)) && VFUP (ch, lpt_vfut[0])) { /* top of form? */
for (i = 1; i < lpt_vful + 1; i++) { /* sweep thru cct */
lpt_vfup = (lpt_vfup + 1) % lpt_vful; /* adv pointer */
if (VFUP (ch, lpt_vfut[lpt_vfup])) { /* chan punched? */
for (j = 0; j < i; j++) fputc ('\n', uptr->fileref);
for (j = 0; j < i; j++)
fputc ('\n', uptr->fileref);
return SCPE_OK;
}
}
@@ -246,9 +253,11 @@ t_stat lpt_spc (UNIT *uptr, int32 cnt)
{
int32 i;
if (cnt == 0) fputc ('\r', uptr->fileref);
if (cnt == 0)
fputc ('\r', uptr->fileref);
else {
for (i = 0; i < cnt; i++) fputc ('\n', uptr->fileref);
for (i = 0; i < cnt; i++)
fputc ('\n', uptr->fileref);
lpt_vfup = (lpt_vfup + cnt) % lpt_vful;
}
return SCPE_OK;
@@ -263,7 +272,8 @@ int32 i;
sim_cancel (&lpt_unit); /* deactivate */
lpt_sta = 0; /* clr busy */
lpt_bptr = 0; /* clr buf ptr */
for (i = 0; i < LPT_WIDTH; i++) lpxb[i] = ' '; /* clr buf */
for (i = 0; i < LPT_WIDTH; i++) /* clr buf */
lpxb[i] = ' ';
lpxb[LPT_WIDTH] = 0;
CLR_INT (v_LPT); /* clearr int */
CLR_ENB (v_LPT); /* disable int */
@@ -288,30 +298,36 @@ uint32 rpt;
t_stat r;
char cbuf[CBUFSIZE], gbuf[CBUFSIZE];
if (*cptr != 0) return SCPE_ARG;
if (*cptr != 0)
return SCPE_ARG;
ptr = 0;
for ( ; (cptr = fgets (cbuf, CBUFSIZE, fileref)) != NULL; ) { /* until eof */
mask = 0;
if (*cptr == '(') { /* repeat count? */
cptr = get_glyph (cptr + 1, gbuf, ')'); /* get 1st field */
rpt = get_uint (gbuf, 10, VFU_LNT, &r); /* repeat count */
if (r != SCPE_OK) return SCPE_FMT;
if (r != SCPE_OK)
return SCPE_FMT;
}
else rpt = 1;
while (*cptr != 0) { /* get col no's */
cptr = get_glyph (cptr, gbuf, ','); /* get next field */
col = get_uint (gbuf, 10, 7, &r); /* column number */
if (r != SCPE_OK) return SCPE_FMT;
if (r != SCPE_OK)
return SCPE_FMT;
mask = mask | (1 << col); /* set bit */
}
for ( ; rpt > 0; rpt--) { /* store vals */
if (ptr >= VFU_LNT) return SCPE_FMT;
if (ptr >= VFU_LNT)
return SCPE_FMT;
vfubuf[ptr++] = mask;
}
}
if (ptr == 0) return SCPE_FMT;
if (ptr == 0)
return SCPE_FMT;
lpt_vful = ptr;
lpt_vfup = 0;
for (rpt = 0; rpt < lpt_vful; rpt++) lpt_vfut[rpt] = vfubuf[rpt];
for (rpt = 0; rpt < lpt_vful; rpt++)
lpt_vfut[rpt] = vfubuf[rpt];
return SCPE_OK;
}

68
Interdata/id_mt.c
View File

@@ -1,6 +1,6 @@
/* id_mt.c: Interdata magnetic tape simulator
Copyright (c) 2001-2006, Robert M Supnik
Copyright (c) 2001-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -186,7 +186,8 @@ switch (op) { /* case IO op */
return BY; /* byte only */
case IO_RD: /* read data */
if (mt_xfr) mt_sta = mt_sta | STA_BSY; /* xfr? set busy */
if (mt_xfr) /* xfr? set busy */
mt_sta = mt_sta | STA_BSY;
return mt_db; /* return data */
case IO_WD: /* write data */
@@ -204,7 +205,8 @@ switch (op) { /* case IO op */
if (uptr->flags & UNIT_ATT) /* attached? */
t = mt_sta | (uptr->UST & STA_UFLGS); /* yes, unit status */
else t = mt_sta | STA_DU; /* no, dev unavail */
if (t & SET_EX) t = t | STA_EX; /* test for ex */
if (t & SET_EX) /* test for ex */
t = t | STA_EX;
return t;
case IO_OC: /* command */
@@ -217,7 +219,8 @@ switch (op) { /* case IO op */
if (((uptr->flags & UNIT_ATT) == 0) || /* ignore if unatt */
bad_cmd[f] || /* or bad cmd */
(((f == MTC_WR) || (f == MTC_WEOF)) && /* or write */
sim_tape_wrp (uptr))) break; /* and protected */
sim_tape_wrp (uptr))) /* and protected */
break;
for (i = 0; i < MT_NUMDR; i++) { /* check other drvs */
if (sim_is_active (&mt_unit[i]) && /* active? */
(mt_unit[i].UCMD != MTC_REW)) { /* not rewind? */
@@ -228,7 +231,8 @@ switch (op) { /* case IO op */
if (sim_is_active (uptr) && /* unit active? */
!(uptr->UCMD & (MTC_STOP1 | MTC_STOP2))) /* not stopping? */
break; /* ignore */
if ((f == MTC_WR) || (f == MTC_REW)) mt_sta = 0;/* write, rew: bsy=0 */
if ((f == MTC_WR) || (f == MTC_REW)) /* write, rew: bsy=0 */
mt_sta = 0;
else mt_sta = STA_BSY; /* bsy=1,nmtn,eom,err=0 */
mt_bptr = mt_blnt = 0; /* not yet started */
if ((f == MTC_RD) || (f == MTC_WR)) /* data xfr? */
@@ -271,7 +275,8 @@ if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
uptr->UST = 0; /* set status */
mt_xfr = 0; /* clr op flags */
mt_sta = STA_ERR | STA_EOM; /* set status */
if (mt_arm[u]) SET_INT (v_MT + u); /* interrupt */
if (mt_arm[u]) /* interrupt */
SET_INT (v_MT + u);
return IORETURN (mt_stopioe, SCPE_UNATT);
}
@@ -279,14 +284,16 @@ if (uptr->UCMD & MTC_STOP2) { /* stop, gen NMTN? */
uptr->UCMD = 0; /* clr cmd */
uptr->UST = uptr->UST | STA_NMTN; /* set nmtn */
mt_xfr = 0; /* clr xfr */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
return SCPE_OK;
}
if (uptr->UCMD & MTC_STOP1) { /* stop, gen EOM? */
uptr->UCMD = uptr->UCMD | MTC_STOP2; /* clr cmd */
mt_sta = (mt_sta & ~STA_BSY) | STA_EOM; /* clr busy, set eom */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
sim_activate (uptr, mt_rtime); /* schedule */
return SCPE_OK;
}
@@ -299,7 +306,8 @@ switch (uptr->UCMD) { /* case on function */
uptr->UCMD = 0; /* clr cmd */
uptr->UST = STA_NMTN | STA_EOT; /* update status */
mt_sta = mt_sta & ~STA_BSY; /* don't set EOM */
if (mt_arm[u]) SET_INT (v_MT + u); /* interrupt */
if (mt_arm[u]) /* interrupt */
SET_INT (v_MT + u);
return SCPE_OK;
/* For read, busy = 1 => buffer empty
@@ -313,7 +321,8 @@ switch (uptr->UCMD) { /* case on function */
case MTC_RD: /* read */
if (mt_blnt == 0) { /* first time? */
st = sim_tape_rdrecf (uptr, mtxb, &tbc, MT_MAXFR); /* read rec */
if (st == MTSE_RECE) mt_sta = mt_sta | STA_ERR; /* rec in err? */
if (st == MTSE_RECE) /* rec in err? */
mt_sta = mt_sta | STA_ERR;
else if (st != SCPE_OK) { /* other error? */
r = mt_map_err (uptr, st); /* map error */
if (sch_actv (mt_dib.sch, dev)) /* if sch, stop */
@@ -335,7 +344,8 @@ switch (uptr->UCMD) { /* case on function */
mt_sta = mt_sta | STA_ERR; /* read overrun */
mt_db = mtxb[mt_bptr++]; /* get next byte */
mt_sta = mt_sta & ~STA_BSY; /* !busy = buf full */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
sim_activate (uptr, mt_wtime); /* reschedule */
return SCPE_OK;
}
@@ -351,7 +361,8 @@ switch (uptr->UCMD) { /* case on function */
if (mt_bptr < MT_MAXFR) /* if room */
mtxb[mt_bptr++] = mt_db; /* store in buf */
mt_sta = mt_sta & ~STA_BSY; /* !busy = buf emp */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
sim_activate (uptr, mt_wtime); /* reschedule */
return SCPE_OK;
}
@@ -366,14 +377,16 @@ switch (uptr->UCMD) { /* case on function */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */
mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) SET_INT (v_MT + u); /* interrupt */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
break;
case MTC_SKFF: /* skip file fwd */
while ((st = sim_tape_sprecf (uptr, &tbc)) == MTSE_OK) ;
if (st == MTSE_TMK) { /* stopped by tmk? */
mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
}
else r = mt_map_err (uptr, st); /* map error */
break;
@@ -382,7 +395,8 @@ switch (uptr->UCMD) { /* case on function */
while ((st = sim_tape_sprecr (uptr, &tbc)) == MTSE_OK) ;
if (st == MTSE_TMK) { /* stopped by tmk? */
mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
}
else r = mt_map_err (uptr, st); /* map error */
break;
@@ -416,12 +430,14 @@ switch (st) {
case MTSE_TMK: /* end of file */
mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) SET_INT (v_MT + u); /* set intr */
if (mt_arm[u]) /* set intr */
SET_INT (v_MT + u);
break;
case MTSE_IOERR: /* IO error */
mt_sta = mt_sta | STA_ERR; /* set err */
if (mt_stopioe) return SCPE_IOERR;
if (mt_stopioe)
return SCPE_IOERR;
break;
case MTSE_INVRL: /* invalid rec lnt */
@@ -473,9 +489,11 @@ int32 u = uptr - mt_dev.units;
t_stat r;
r = sim_tape_attach (uptr, cptr);
if (r != SCPE_OK) return r;
if (r != SCPE_OK)
return r;
uptr->UST = STA_EOT;
if (mt_arm[u]) SET_INT (v_MT + u);
if (mt_arm[u])
SET_INT (v_MT + u);
return r;
}
@@ -486,10 +504,13 @@ t_stat mt_detach (UNIT* uptr)
int32 u = uptr - mt_dev.units;
t_stat r;
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK;
if (!(uptr->flags & UNIT_ATT))
return SCPE_OK;
r = sim_tape_detach (uptr);
if (r != SCPE_OK) return r;
if (mt_arm[u]) SET_INT (v_MT + u);
if (r != SCPE_OK)
return r;
if (mt_arm[u])
SET_INT (v_MT + u);
uptr->UST = 0;
return SCPE_OK;
}
@@ -511,7 +532,8 @@ extern uint16 decrom[];
extern DIB sch_dib;
uint32 sch_dev;
if (decrom[0xD5] & dec_flgs) return SCPE_NOFNC; /* AL defined? */
if (decrom[0xD5] & dec_flgs) /* AL defined? */
return SCPE_NOFNC;
sim_tape_rewind (&mt_unit[unitno]); /* rewind */
sch_dev = sch_dib.dno + mt_dib.sch; /* sch dev # */
IOWriteBlk (BOOT_START, BOOT_LEN, boot_rom); /* copy boot */

102
Interdata/id_pas.c
View File

@@ -1,6 +1,6 @@
/* id_pas.c: Interdata programmable async line adapter simulator
Copyright (c) 2001-2007, Robert M Supnik
Copyright (c) 2001-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
pas Programmable asynchronous line adapter(s)
19-Nov-08 RMS Revised for common TMXR show routines
18-Jun-07 RMS Added UNIT_IDLE flag
18-Oct-06 RMS Synced PASLA to clock
22-Nov-05 RMS Revised for new terminal processing routines
@@ -111,8 +112,6 @@ t_stat paso_svc (UNIT *uptr);
t_stat pas_reset (DEVICE *dptr);
t_stat pas_attach (UNIT *uptr, char *cptr);
t_stat pas_detach (UNIT *uptr);
t_stat pas_summ (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat pas_show (FILE *st, UNIT *uptr, int32 val, void *desc);
int32 pas_par (int32 cmd, int32 c);
t_stat pas_vlines (UNIT *uptr, int32 val, char *cptr, void *desc);
void pas_reset_ln (int32 i);
@@ -129,8 +128,6 @@ DIB pas_dib = { d_PAS, -1, v_PAS, pas_tplte, &pas, &pas_ini };
UNIT pas_unit = { UDATA (&pasi_svc, UNIT_ATTABLE|UNIT_IDLE, 0), 0 };
REG pas_nlreg = { DRDATA (NLINES, PAS_ENAB, 6), PV_LEFT };
REG pas_reg[] = {
{ BRDATA (STA, pas_sta, 16, 8, PAS_LINES) },
{ BRDATA (CMD, pas_cmd, 16, 16, PAS_LINES) },
@@ -146,17 +143,18 @@ REG pas_reg[] = {
};
MTAB pas_mod[] = {
{ MTAB_XTD | MTAB_VDV | MTAB_VAL, 0, "lines", "LINES",
&pas_vlines, NULL, &pas_nlreg },
{ MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
&tmxr_dscln, NULL, &pas_desc },
{ UNIT_ATT, UNIT_ATT, "connections", NULL, NULL, &pas_summ },
&tmxr_dscln, NULL, (void *) &pas_desc },
{ UNIT_ATT, UNIT_ATT, "summary", NULL,
NULL, &tmxr_show_summ, (void *) &pas_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
NULL, &pas_show, NULL },
NULL, &tmxr_show_cstat, (void *) &pas_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "STATISTICS", NULL,
NULL, &pas_show, NULL },
NULL, &tmxr_show_cstat, (void *) &pas_desc },
{ MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
&set_dev, &show_dev, NULL },
{ MTAB_XTD | MTAB_VDV, 0, "LINES", "LINES",
&pas_vlines, &tmxr_show_lines, (void *) &pas_desc },
{ 0 }
};
@@ -273,10 +271,12 @@ switch (op) { /* case IO op */
}
else {
t = pas_sta[ln] & STA_RCV; /* get static */
if (!pas_rchp[ln]) t = t | STA_BSY; /* no char? busy */
if (!pas_rchp[ln]) /* no char? busy */
t = t | STA_BSY;
if (pas_ldsc[ln].conn == 0) /* not connected? */
t = t | STA_BSY | STA_EX; /* = !dsr */
if (t & SET_EX) t = t | STA_EX; /* test for ex */
if (t & SET_EX) /* test for ex */
t = t | STA_EX;
}
return t;
@@ -296,7 +296,8 @@ switch (op) { /* case IO op */
tmxr_linemsg (&pas_ldsc[ln], "\r\nLine hangup\r\n");
tmxr_reset_ln (&pas_ldsc[ln]); /* reset line */
pas_sta[ln] = pas_sta[ln] | STA_CROF; /* no carrier */
if (pas_rarm[ln]) SET_INT (v_PAS + ln + ln);
if (pas_rarm[ln])
SET_INT (v_PAS + ln + ln);
}
}
break;
@@ -315,7 +316,8 @@ t_stat pasi_svc (UNIT *uptr)
{
int32 ln, c, out;
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_OK; /* attached? */
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return SCPE_OK;
sim_activate (uptr, lfc_poll); /* continue poll */
ln = tmxr_poll_conn (&pas_desc); /* look for connect */
if (ln >= 0) { /* got one? */
@@ -323,7 +325,8 @@ if (ln >= 0) { /* got one? */
((pas_cmd[ln] & CMD_DTR) == 0)) /* & !dtr? */
pas_sta[ln] = pas_sta[ln] | STA_RING | STA_CROF; /* set ring, no cd */
else pas_sta[ln] = pas_sta[ln] & ~STA_CROF; /* just answer */
if (pas_rarm[ln]) SET_INT (v_PAS + ln + ln); /* interrupt */
if (pas_rarm[ln]) /* interrupt */
SET_INT (v_PAS + ln + ln);
pas_ldsc[ln].rcve = 1; /* rcv enabled */
}
tmxr_poll_rx (&pas_desc); /* poll for input */
@@ -331,8 +334,10 @@ for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */
if (pas_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&pas_ldsc[ln])) { /* any char? */
pas_sta[ln] = pas_sta[ln] & ~(STA_FR | STA_PF);
if (pas_rchp[ln]) pas_sta[ln] = pas_sta[ln] | STA_OVR;
if (pas_rarm[ln]) SET_INT (v_PAS + ln + ln);
if (pas_rchp[ln])
pas_sta[ln] = pas_sta[ln] | STA_OVR;
if (pas_rarm[ln])
SET_INT (v_PAS + ln + ln);
if (c & SCPE_BREAK) { /* break? */
pas_sta[ln] = pas_sta[ln] | STA_FR; /* framing error */
pas_rbuf[ln] = 0; /* no character */
@@ -347,7 +352,8 @@ for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */
if ((pas_cmd[ln] & CMD_ECHO) && pas_ldsc[ln].xmte) {
TMLN *lp = &pas_ldsc[ln]; /* get line */
out = sim_tt_outcvt (out, TT_GET_MODE (pasl_unit[ln].flags));
if (out >= 0) tmxr_putc_ln (lp, out); /* output char */
if (out >= 0) /* output char */
tmxr_putc_ln (lp, out);
tmxr_poll_tx (&pas_desc); /* poll xmt */
}
} /* end else normal */
@@ -355,7 +361,8 @@ for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */
} /* end if conn */
else if ((pas_sta[ln] & STA_CROF) == 0) { /* not conn, was conn? */
pas_sta[ln] = pas_sta[ln] | STA_CROF; /* no carrier */
if (pas_rarm[ln]) SET_INT (v_PAS + ln + ln); /* intr */
if (pas_rarm[ln]) /* intr */
SET_INT (v_PAS + ln + ln);
}
} /* end for */
return SCPE_OK;
@@ -386,7 +393,8 @@ if (pas_ldsc[ln].conn) { /* connected? */
}
}
pas_sta[ln] = pas_sta[ln] & ~STA_BSY; /* not busy */
if (pas_xarm[ln]) SET_INT (v_PASX + ln + ln); /* set intr */
if (pas_xarm[ln]) /* set intr */
SET_INT (v_PASX + ln + ln);
return SCPE_OK;
}
@@ -461,7 +469,8 @@ else {
if (pas_unit.flags & UNIT_ATT) /* master att? */
sim_activate_abs (&pas_unit, lfc_poll); /* cosched with clock */
else sim_cancel (&pas_unit); /* else stop */
for (i = 0; i < PAS_LINES; i++) pas_reset_ln (i);
for (i = 0; i < PAS_LINES; i++)
pas_reset_ln (i);
return SCPE_OK;
}
@@ -472,7 +481,8 @@ t_stat pas_attach (UNIT *uptr, char *cptr)
t_stat r;
r = tmxr_attach (&pas_desc, uptr, cptr); /* attach */
if (r != SCPE_OK) return r; /* error */
if (r != SCPE_OK) /* error */
return r;
sim_activate_abs (uptr, 100); /* quick poll */
return SCPE_OK;
}
@@ -485,42 +495,12 @@ int32 i;
t_stat r;
r = tmxr_detach (&pas_desc, uptr); /* detach */
for (i = 0; i < PAS_LINES; i++) pas_ldsc[i].rcve = 0; /* disable rcv */
for (i = 0; i < PAS_LINES; i++) /* disable rcv */
pas_ldsc[i].rcve = 0;
sim_cancel (uptr); /* stop poll */
return r;
}
/* Show summary processor */
t_stat pas_summ (FILE *st, UNIT *uptr, int32 val, void *desc)
{
int32 i, t;
for (i = t = 0; i < PAS_LINES; i++) t = t + (pas_ldsc[i].conn != 0);
if (t == 1) fprintf (st, "1 connection");
else fprintf (st, "%d connections", t);
return SCPE_OK;
}
/* SHOW CONN/STAT processor */
t_stat pas_show (FILE *st, UNIT *uptr, int32 val, void *desc)
{
int32 i, t;
for (i = t = 0; i < PAS_LINES; i++) t = t + (pas_ldsc[i].conn != 0);
if (t) {
for (i = 0; i < PAS_LINES; i++) {
if (pas_ldsc[i].conn) {
if (val) tmxr_fconns (st, &pas_ldsc[i], i);
else tmxr_fstats (st, &pas_ldsc[i], i);
}
}
}
else fprintf (st, "all disconnected\n");
return SCPE_OK;
}
/* Change number of lines */
t_stat pas_vlines (UNIT *uptr, int32 val, char *cptr, void *desc)
@@ -528,12 +508,16 @@ t_stat pas_vlines (UNIT *uptr, int32 val, char *cptr, void *desc)
int32 newln, i, t;
t_stat r;
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
newln = get_uint (cptr, 10, PAS_LINES, &r);
if ((r != SCPE_OK) || (newln == PAS_ENAB)) return r;
if (newln == 0) return SCPE_ARG;
if ((r != SCPE_OK) || (newln == PAS_ENAB))
return r;
if (newln == 0)
return SCPE_ARG;
if (newln < PAS_ENAB) {
for (i = newln, t = 0; i < PAS_ENAB; i++) t = t | pas_ldsc[i].conn;
for (i = newln, t = 0; i < PAS_ENAB; i++)
t = t | pas_ldsc[i].conn;
if (t && !get_yn ("This will disconnect users; proceed [N]?", FALSE))
return SCPE_OK;
for (i = newln; i < PAS_ENAB; i++) {

53
Interdata/id_pt.c
View File

@@ -1,6 +1,6 @@
/* id_pt.c: Interdata paper tape reader
Copyright (c) 2000-2005, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -135,7 +135,8 @@ switch (op) { /* case IO op */
}
else { /* not active */
pt_sta = pt_sta & ~STA_BSY; /* busy = 0 */
if (pt_arm) SET_INT (v_PT); /* no, set int */
if (pt_arm) /* no, set int */
SET_INT (v_PT);
}
}
if (pt_rd) { /* reader? */
@@ -158,12 +159,14 @@ switch (op) { /* case IO op */
pt_sta = pt_sta & ~STA_DU; /* clr eof */
}
pt_chp = 0; /* clr char pend */
if (pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
if (pt_rd) /* set busy */
pt_sta = pt_sta | STA_BSY;
return (pt_unit[PTR].buf & 0xFF); /* return char */
case IO_WD: /* write */
pt_unit[PTP].buf = dat & DMASK8; /* save char */
if (!pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
if (!pt_rd) /* set busy */
pt_sta = pt_sta | STA_BSY;
sim_activate (&pt_unit[PTP], pt_unit[PTP].wait);
break;
@@ -173,7 +176,8 @@ switch (op) { /* case IO op */
t = t | STA_NMTN; /* stopped? */
if ((pt_unit[pt_rd? PTR: PTP].flags & UNIT_ATT) == 0)
t = t | STA_DU; /* offline? */
if (t & SET_EX) t = t | STA_EX; /* test for EX */
if (t & SET_EX) /* test for EX */
t = t | STA_EX;
return t;
}
@@ -190,14 +194,17 @@ if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if (pt_rd) { /* read mode? */
pt_sta = pt_sta & ~STA_BSY; /* clear busy */
if (pt_arm) SET_INT (v_PT); /* if armed, intr */
if (pt_chp) pt_sta = pt_sta | STA_OVR; /* overrun? */
if (pt_arm) /* if armed, intr */
SET_INT (v_PT);
if (pt_chp) /* overrun? */
pt_sta = pt_sta | STA_OVR;
}
pt_chp = 1; /* char pending */
if ((temp = getc (uptr->fileref)) == EOF) { /* error? */
if (feof (uptr->fileref)) { /* eof? */
pt_sta = pt_sta | STA_DU; /* set DU */
if (ptr_stopioe) printf ("PTR end of file\n");
if (ptr_stopioe)
printf ("PTR end of file\n");
else return SCPE_OK;
}
else perror ("PTR I/O error");
@@ -206,7 +213,8 @@ if ((temp = getc (uptr->fileref)) == EOF) { /* error? */
}
uptr->buf = temp & DMASK8; /* store char */
uptr->pos = uptr->pos + 1; /* incr pos */
if (pt_slew) sim_activate (uptr, uptr->wait); /* slew? continue */
if (pt_slew) /* slew? continue */
sim_activate (uptr, uptr->wait);
return SCPE_OK;
}
@@ -216,7 +224,8 @@ if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptp_stopioe, SCPE_UNATT);
if (!pt_rd) { /* write mode? */
pt_sta = pt_sta & ~STA_BSY; /* clear busy */
if (pt_arm) SET_INT (v_PT); /* if armed, intr */
if (pt_arm) /* if armed, intr */
SET_INT (v_PT);
}
if (putc (uptr->buf, uptr -> fileref) == EOF) { /* write char */
perror ("PTP I/O error");
@@ -339,22 +348,30 @@ uint32 i, lo, hi, cs;
char *tptr;
extern DEVICE cpu_dev;
if ((cptr == NULL) || (*cptr == 0)) return SCPE_2FARG;
if ((cptr == NULL) || (*cptr == 0))
return SCPE_2FARG;
tptr = get_range (NULL, cptr, &lo, &hi, cpu_dev.aradix, 0xFFFF, 0);
if ((tptr == NULL) || (lo < INTSVT)) return SCPE_ARG;
if (*tptr != 0) return SCPE_2MARG;
for (i = lo, cs = 0; i <= hi; i++) cs = cs ^ IOReadB (i);
if ((tptr == NULL) || (lo < INTSVT))
return SCPE_ARG;
if (*tptr != 0)
return SCPE_2MARG;
for (i = lo, cs = 0; i <= hi; i++)
cs = cs ^ IOReadB (i);
IOWriteBlk (LOAD_START, LOAD_LEN, load_rom);
IOWriteB (LOAD_LO, (lo >> 8) & 0xFF);
IOWriteB (LOAD_LO + 1, lo & 0xFF);
IOWriteB (LOAD_HI, (hi >> 8) & 0xFF);
IOWriteB (LOAD_HI + 1, hi & 0xFF);
IOWriteB (LOAD_CS, cs & 0xFF);
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
for (i = 0; i < LOAD_LDR; i++)
fputc (0, of);
for (i = LOAD_START; i < (LOAD_START + LOAD_LEN); i++)
fputc (IOReadB (i), of);
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
for (i = lo; i <= hi; i++) fputc (IOReadB (i), of);
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
for (i = 0; i < LOAD_LDR; i++)
fputc (0, of);
for (i = lo; i <= hi; i++)
fputc (IOReadB (i), of);
for (i = 0; i < LOAD_LDR; i++)
fputc (0, of);
return SCPE_OK;
}

38
Interdata/id_tt.c
View File

@@ -1,6 +1,6 @@
/* id_tt.c: Interdata teletype
Copyright (c) 2000-2007, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -143,7 +143,8 @@ switch (op) { /* case IO op */
if (tt_rd != old_rd) { /* rw change? */
if (tt_rd? tt_chp: !sim_is_active (&tt_unit[TTO])) {
tt_sta = 0; /* busy = 0 */
if (tt_arm) SET_INT (v_TT); /* req intr */
if (tt_arm) /* req intr */
SET_INT (v_TT);
}
else {
tt_sta = STA_BSY; /* busy = 1 */
@@ -155,18 +156,21 @@ switch (op) { /* case IO op */
case IO_RD: /* read */
tt_chp = 0; /* clear pend */
if (tt_rd) tt_sta = (tt_sta | STA_BSY) & ~STA_OVR;
if (tt_rd)
tt_sta = (tt_sta | STA_BSY) & ~STA_OVR;
return (tt_unit[TTI].buf & 0xFF);
case IO_WD: /* write */
tt_unit[TTO].buf = dat & 0xFF; /* save char */
if (!tt_rd) tt_sta = tt_sta | STA_BSY; /* set busy */
if (!tt_rd) /* set busy */
tt_sta = tt_sta | STA_BSY;
sim_activate (&tt_unit[TTO], tt_unit[TTO].wait);
break;
case IO_SS: /* status */
t = tt_sta & STA_MASK; /* get status */
if (t & SET_EX) t = t | STA_EX; /* test for EX */
if (t & SET_EX) /* test for EX */
t = t | STA_EX;
return t;
}
@@ -181,11 +185,14 @@ int32 out, temp;
sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_poll)); /* continue poll */
tt_sta = tt_sta & ~STA_BRK; /* clear break */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return temp;
if (tt_rd) { /* read mode? */
tt_sta = tt_sta & ~STA_BSY; /* clear busy */
if (tt_arm) SET_INT (v_TT); /* if armed, intr */
if (tt_chp) tt_sta = tt_sta | STA_OVR; /* got char? overrun */
if (tt_arm) /* if armed, intr */
SET_INT (v_TT);
if (tt_chp) /* got char? overrun */
tt_sta = tt_sta | STA_OVR;
}
tt_chp = 1; /* char pending */
out = temp & 0x7F; /* echo is 7B */
@@ -219,7 +226,8 @@ if (ch >= 0) {
}
if (!tt_rd) { /* write mode? */
tt_sta = tt_sta & ~STA_BSY; /* clear busy */
if (tt_arm) SET_INT (v_TT); /* if armed, intr */
if (tt_arm) /* if armed, intr */
SET_INT (v_TT);
}
uptr->pos = uptr->pos + 1; /* incr count */
return SCPE_OK;
@@ -229,7 +237,8 @@ return SCPE_OK;
t_stat tt_reset (DEVICE *dptr)
{
if (dptr->flags & DEV_DIS) sim_cancel (&tt_unit[TTI]); /* dis? cancel poll */
if (dptr->flags & DEV_DIS) /* dis? cancel poll */
sim_cancel (&tt_unit[TTI]);
else sim_activate_abs (&tt_unit[TTI], KBD_WAIT (tt_unit[TTI].wait, lfc_poll));
sim_cancel (&tt_unit[TTO]); /* cancel output */
tt_rd = tt_fdpx = 1; /* read, full duplex */
@@ -246,7 +255,8 @@ return SCPE_OK;
t_stat tt_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
{
tt_unit[TTO].flags = (tt_unit[TTO].flags & ~TT_MODE) | val;
if (val == TT_MODE_7P) val = TT_MODE_7B;
if (val == TT_MODE_7P)
val = TT_MODE_7B;
tt_unit[TTI].flags = (tt_unit[TTI].flags & ~TT_MODE) | val;
return SCPE_OK;
}
@@ -255,11 +265,13 @@ return SCPE_OK;
t_stat tt_set_break (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (tt_dev.flags & DEV_DIS) return SCPE_NOFNC;
if (tt_dev.flags & DEV_DIS)
return SCPE_NOFNC;
tt_sta = tt_sta | STA_BRK;
if (tt_rd) { /* read mode? */
tt_sta = tt_sta & ~STA_BSY; /* clear busy */
if (tt_arm) SET_INT (v_TT); /* if armed, intr */
if (tt_arm) /* if armed, intr */
SET_INT (v_TT);
}
sim_cancel (&tt_unit[TTI]); /* restart TT poll */
sim_activate (&tt_unit[TTI], tt_unit[TTI].wait); /* so brk is seen */

35
Interdata/id_ttp.c
View File

@@ -1,6 +1,6 @@
/* id_ttp.c: Interdata PASLA console interface
Copyright (c) 2000-2007, Robert M. Supnik
Copyright (c) 2000-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -151,8 +151,10 @@ switch (op) { /* case IO op */
if (xmt) t = ttp_sta & STA_XMT; /* xmt? just busy */
else { /* rcv */
t = ttp_sta & STA_RCV; /* get static */
if (!ttp_kchp) t = t | STA_BSY; /* no char? busy */
if (t & SET_EX) t = t | STA_EX; /* test for ex */
if (!ttp_kchp) /* no char? busy */
t = t | STA_BSY;
if (t & SET_EX) /* test for ex */
t = t | STA_EX;
}
return t;
@@ -179,10 +181,13 @@ int32 c, out;
sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_poll)); /* continue poll */
ttp_sta = ttp_sta & ~STA_FR; /* clear break */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c; /* no char or error? */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
ttp_sta = ttp_sta & ~STA_PF; /* clear parity err */
if (ttp_kchp) ttp_sta = ttp_sta | STA_OVR; /* overrun? */
if (ttp_karm) SET_INT (v_TTP);
if (ttp_kchp) /* overrun? */
ttp_sta = ttp_sta | STA_OVR;
if (ttp_karm)
SET_INT (v_TTP);
if (c & SCPE_BREAK) { /* break? */
ttp_sta = ttp_sta | STA_FR; /* framing error */
uptr->buf = 0; /* no character */
@@ -197,7 +202,8 @@ else {
ttp_kchp = 1; /* char pending */
if (ttp_cmd & CMD_ECHO) {
out = sim_tt_outcvt (out, TT_GET_MODE (uptr->flags));
if (c >= 0) sim_putchar (out);
if (c >= 0)
sim_putchar (out);
ttp_unit[TTO].pos = ttp_unit[TTO].pos + 1;
}
}
@@ -219,7 +225,8 @@ if (c >= 0) {
}
}
ttp_sta = ttp_sta & ~STA_BSY; /* not busy */
if (ttp_tarm) SET_INT (v_TTP + 1); /* set intr */
if (ttp_tarm) /* set intr */
SET_INT (v_TTP + 1);
uptr->pos = uptr->pos + 1; /* incr count */
return SCPE_OK;
}
@@ -228,7 +235,8 @@ return SCPE_OK;
t_stat ttp_reset (DEVICE *dptr)
{
if (dptr->flags & DEV_DIS) sim_cancel (&ttp_unit[TTI]);
if (dptr->flags & DEV_DIS)
sim_cancel (&ttp_unit[TTI]);
else sim_activate_abs (&ttp_unit[TTI], KBD_WAIT (ttp_unit[TTI].wait, lfc_poll));
sim_cancel (&ttp_unit[TTO]);
CLR_INT (v_TTP); /* clear int */
@@ -247,7 +255,8 @@ return SCPE_OK;
t_stat ttp_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
{
ttp_unit[TTO].flags = (ttp_unit[TTO].flags & ~TT_MODE) | val;
if (val == TT_MODE_7P) val = TT_MODE_7B;
if (val == TT_MODE_7P)
val = TT_MODE_7B;
ttp_unit[TTI].flags = (ttp_unit[TTI].flags & ~TT_MODE) | val;
return SCPE_OK;
}
@@ -256,9 +265,11 @@ return SCPE_OK;
t_stat ttp_set_break (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (ttp_dev.flags & DEV_DIS) return SCPE_NOFNC;
if (ttp_dev.flags & DEV_DIS)
return SCPE_NOFNC;
ttp_sta = ttp_sta | STA_FR;
if (ttp_karm) SET_INT (v_TTP); /* if armed, intr */
if (ttp_karm) /* if armed, intr */
SET_INT (v_TTP);
sim_cancel (&ttp_unit[TTI]); /* restart TT poll */
sim_activate (&ttp_unit[TTI], ttp_unit[TTI].wait);
return SCPE_OK;

38
Interdata/id_uvc.c
View File

@@ -1,6 +1,6 @@
/* id_uvc.c: Interdata universal clock
Copyright (c) 2001-2007, Robert M. Supnik
Copyright (c) 2001-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -190,7 +190,8 @@ switch (op) { /* case IO op */
case IO_RD: /* read */
t = pic_rd_cic (); /* get cic */
if (pic_rdp) t = t & DMASK8; /* 2nd? get lo */
if (pic_rdp) /* 2nd? get lo */
t = t & DMASK8;
else t = (t >> 8) & DMASK8; /* 1st? get hi */
pic_rdp = pic_rdp ^ 1; /* flip byte ptr */
return t;
@@ -201,7 +202,8 @@ switch (op) { /* case IO op */
break;
case IO_WD: /* write */
if (pic_wdp) pic_db = (pic_db & 0xFF00) | dat;
if (pic_wdp)
pic_db = (pic_db & 0xFF00) | dat;
else pic_db = (pic_db & 0xFF) | (dat << 8);
pic_wdp = pic_wdp ^ 1; /* flip byte ptr */
break;
@@ -222,7 +224,8 @@ switch (op) { /* case IO op */
pic_ovf = 0; /* clear flag */
sim_cancel (&pic_unit); /* stop clock */
pic_rdp = pic_wdp = 0; /* init ptrs */
if (pic_ric & PIC_RATE) pic_sched (TRUE); /* any rate? */
if (pic_ric & PIC_RATE) /* any rate? */
pic_sched (TRUE);
} /* end if start */
break;
} /* end case */
@@ -236,16 +239,20 @@ t_stat pic_svc (UNIT *uptr)
{
t_bool rate_chg = FALSE;
if (pic_cnti) pic_cic = 0; /* one shot? */
if (pic_cnti) /* one shot? */
pic_cic = 0;
pic_cic = pic_cic - pic_decr; /* decrement */
if (pic_cic <= 0) { /* overflow? */
if (pic_wdp) pic_ovf = 1; /* broken wr? set flag */
if (pic_arm) SET_INT (v_PIC); /* if armed, intr */
if (pic_wdp) /* broken wr? set flag */
pic_ovf = 1;
if (pic_arm) /* if armed, intr */
SET_INT (v_PIC);
if (GET_RATE (pic_ric) != GET_RATE (pic_db)) /* rate change? */
rate_chg = TRUE;
pic_ric = pic_db; /* new ric */
pic_cic = GET_CTR (pic_ric); /* new cic */
if ((pic_ric & PIC_RATE) == 0) return SCPE_OK;
if ((pic_ric & PIC_RATE) == 0)
return SCPE_OK;
}
pic_sched (rate_chg);
return SCPE_OK;
@@ -269,14 +276,16 @@ if (!(pic_unit.flags & UNIT_DIAG) && /* not diag? */
((intv_usec % 1000) == 0)) { /* 1ms multiple? */
pic_cnti = 0; /* clr mode */
pic_decr = pic_usec[3 - r]; /* set decrement */
if (strt) t = sim_rtcn_init (pic_time[3], TMR_PIC); /* init or */
if (strt) /* init or */
t = sim_rtcn_init (pic_time[3], TMR_PIC);
else t = sim_rtcn_calb (PIC_TPS, TMR_PIC); /* calibrate */
}
else {
pic_cnti = 1; /* set mode */
pic_decr = 1; /* decr = 1 */
t = pic_time[r] * intv; /* interval */
if (t == 1) t++; /* for diagn */
if (t == 1) /* for diagn */
t++;
}
sim_activate (&pic_unit, t); /* activate */
return;
@@ -290,7 +299,8 @@ if (sim_is_active (&pic_unit) && pic_cnti) { /* running, one shot? */
uint32 delta = sim_grtime () - pic_save; /* interval */
uint32 tm = pic_time[pic_map[GET_RATE (pic_ric)]]; /* ticks/intv */
delta = delta / tm; /* ticks elapsed */
if (delta >= ((uint32) pic_cic)) return 0; /* cap value */
if (delta >= ((uint32) pic_cic)) /* cap value */
return 0;
return pic_cic - delta;
}
return pic_cic;
@@ -357,8 +367,10 @@ return SCPE_OK;
t_stat lfc_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (cptr) return SCPE_ARG;
if ((val != 100) && (val != 120)) return SCPE_IERR;
if (cptr)
return SCPE_ARG;
if ((val != 100) && (val != 120))
return SCPE_IERR;
lfc_tps = val;
return SCPE_OK;
}