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Intel-Systems, IBMPC: Standardize to CRLF line endings and spaces for tabs
This commit is contained in:
Bill Beech
committed by
Mark Pizzolato
Mark Pizzolato
parent
18efafe927
commit
a221ac4055
@@ -1,203 +1,203 @@
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/* iram.c: Intel RAM simulator for 16-bit SBCs
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Copyright (c) 2011, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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These functions support a simulated RAM device in low memory on an iSBC. These
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SBCs do not have the capability to switch off this RAM. In most cases a portion
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of the RAM is dual-ported so it also appears in the multibus memory map at
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a configurable location.
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Unit will support 16K SRAM sizes.
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*/
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#include <stdio.h>
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#include "multibus_defs.h"
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#define UNIT_V_RSIZE (UNIT_V_UF) /* RAM Size */
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#define UNIT_RSIZE (0x1 << UNIT_V_RSIZE)
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#define UNIT_NONE (0) /* No unit */
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#define UNIT_16K (1) /* 16KB */
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/* function prototypes */
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t_stat RAM_svc (UNIT *uptr);
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t_stat RAM_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat RAM_reset (DEVICE *dptr);
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int32 RAM_get_mbyte(int32 addr);
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void RAM_put_mbyte(int32 addr, int32 val);
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/* SIMH RAM Standard I/O Data Structures */
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UNIT RAM_unit = { UDATA (NULL, UNIT_BINK, 0), KBD_POLL_WAIT };
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MTAB RAM_mod[] = {
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{ UNIT_RSIZE, UNIT_NONE, "None", "none", &RAM_set_size },
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{ UNIT_RSIZE, UNIT_16K, "16KB", "16KB", &RAM_set_size },
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{ 0 }
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};
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DEBTAB RAM_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE RAM_dev = {
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"RAM", //name
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&RAM_unit, //units
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NULL, //registers
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RAM_mod, //modifiers
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1, //numunits
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16, //aradix
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32, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&RAM_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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RAM_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* global variables */
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uint8 *RAM_buf = NULL; /* RAM buffer pointer */
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/* RAM functions */
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/* RAM set size = none or 16KB */
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t_stat RAM_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: val=%d\n", val);
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if ((val < UNIT_NONE) || (val > UNIT_16K)) {
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: Size error\n");
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return SCPE_ARG;
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}
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RAM_unit.capac = 0x4000 * val; /* set size */
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RAM_unit.u3 = 0x0000; /* base is 0 */
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RAM_unit.u4 = val; /* save val */
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if (RAM_buf) { /* if changed, allocate new buffer */
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free (RAM_buf);
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RAM_buf = NULL;
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}
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: Done\n");
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return (RAM_reset (NULL)); /* force reset after reconfig */
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}
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/* RAM reset */
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t_stat RAM_reset (DEVICE *dptr)
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{
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int j;
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FILE *fp;
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: \n");
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if (RAM_unit.capac == 0) { /* if undefined */
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sim_printf(" RAM: defaulted for 16KB\n");
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sim_printf(" \"set RAM 16KB\"\n");
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RAM_unit.capac = 0x4000;
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RAM_unit.u3 = 0;
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RAM_unit.u4 = 1;
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}
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sim_printf(" RAM: Initializing [%04X-%04XH]\n",
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RAM_unit.u3,
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RAM_unit.u3 + RAM_unit.capac - 1);
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if (RAM_buf == NULL) { /* no buffer allocated */
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RAM_buf = malloc(RAM_unit.capac);
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if (RAM_buf == NULL) {
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: Malloc error\n");
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return SCPE_MEM;
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}
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}
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: Done\n");
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return SCPE_OK;
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}
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/* I/O instruction handlers, called from the CPU module when an
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RAM memory read or write is issued.
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*/
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/* get a byte from memory */
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int32 RAM_get_mbyte(int32 addr)
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{
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int32 val, org, len;
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org = RAM_unit.u3;
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len = RAM_unit.capac - 1;
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf("RAM_get_mbyte: addr=%04X", addr);
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if ((addr >= org) && (addr <= org + len)) {
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val = *(RAM_buf + (addr - org));
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf(" val=%04X\n", val);
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return (val & 0xFF);
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}
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf(" Out of range\n", addr);
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return 0xFF;
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}
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/* put a byte to memory */
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void RAM_put_mbyte(int32 addr, int32 val)
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{
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int32 org, len;
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org = RAM_unit.u3;
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len = RAM_unit.capac - 1;
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf("RAM_put_mbyte: addr=%04X, val=%02X", addr, val);
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if ((addr >= org) && (addr < org + len)) {
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*(RAM_buf + (addr - org)) = val & 0xFF;
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf("\n");
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return;
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}
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf(" Out of range\n", val);
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}
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/* end of iram.c */
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/* iram.c: Intel RAM simulator for 16-bit SBCs
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Copyright (c) 2011, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
|
||||
|
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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These functions support a simulated RAM device in low memory on an iSBC. These
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SBCs do not have the capability to switch off this RAM. In most cases a portion
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of the RAM is dual-ported so it also appears in the multibus memory map at
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a configurable location.
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Unit will support 16K SRAM sizes.
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*/
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#include <stdio.h>
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#include "multibus_defs.h"
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#define UNIT_V_RSIZE (UNIT_V_UF) /* RAM Size */
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#define UNIT_RSIZE (0x1 << UNIT_V_RSIZE)
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#define UNIT_NONE (0) /* No unit */
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#define UNIT_16K (1) /* 16KB */
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/* function prototypes */
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t_stat RAM_svc (UNIT *uptr);
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t_stat RAM_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat RAM_reset (DEVICE *dptr);
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int32 RAM_get_mbyte(int32 addr);
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void RAM_put_mbyte(int32 addr, int32 val);
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/* SIMH RAM Standard I/O Data Structures */
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UNIT RAM_unit = { UDATA (NULL, UNIT_BINK, 0), KBD_POLL_WAIT };
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MTAB RAM_mod[] = {
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{ UNIT_RSIZE, UNIT_NONE, "None", "none", &RAM_set_size },
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{ UNIT_RSIZE, UNIT_16K, "16KB", "16KB", &RAM_set_size },
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{ 0 }
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};
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DEBTAB RAM_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE RAM_dev = {
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"RAM", //name
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&RAM_unit, //units
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NULL, //registers
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RAM_mod, //modifiers
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1, //numunits
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16, //aradix
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32, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&RAM_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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RAM_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* global variables */
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uint8 *RAM_buf = NULL; /* RAM buffer pointer */
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/* RAM functions */
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/* RAM set size = none or 16KB */
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t_stat RAM_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: val=%d\n", val);
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if ((val < UNIT_NONE) || (val > UNIT_16K)) {
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: Size error\n");
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return SCPE_ARG;
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}
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RAM_unit.capac = 0x4000 * val; /* set size */
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RAM_unit.u3 = 0x0000; /* base is 0 */
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RAM_unit.u4 = val; /* save val */
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if (RAM_buf) { /* if changed, allocate new buffer */
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free (RAM_buf);
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RAM_buf = NULL;
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}
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_set_size: Done\n");
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return (RAM_reset (NULL)); /* force reset after reconfig */
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}
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/* RAM reset */
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t_stat RAM_reset (DEVICE *dptr)
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{
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int j;
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FILE *fp;
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: \n");
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if (RAM_unit.capac == 0) { /* if undefined */
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sim_printf(" RAM: defaulted for 16KB\n");
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sim_printf(" \"set RAM 16KB\"\n");
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RAM_unit.capac = 0x4000;
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RAM_unit.u3 = 0;
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RAM_unit.u4 = 1;
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}
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sim_printf(" RAM: Initializing [%04X-%04XH]\n",
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RAM_unit.u3,
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RAM_unit.u3 + RAM_unit.capac - 1);
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if (RAM_buf == NULL) { /* no buffer allocated */
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RAM_buf = malloc(RAM_unit.capac);
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if (RAM_buf == NULL) {
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: Malloc error\n");
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return SCPE_MEM;
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}
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}
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if (RAM_dev.dctrl & DEBUG_flow)
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sim_printf("RAM_reset: Done\n");
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return SCPE_OK;
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}
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/* I/O instruction handlers, called from the CPU module when an
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RAM memory read or write is issued.
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*/
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/* get a byte from memory */
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int32 RAM_get_mbyte(int32 addr)
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{
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int32 val, org, len;
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org = RAM_unit.u3;
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len = RAM_unit.capac - 1;
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf("RAM_get_mbyte: addr=%04X", addr);
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if ((addr >= org) && (addr <= org + len)) {
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val = *(RAM_buf + (addr - org));
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf(" val=%04X\n", val);
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return (val & 0xFF);
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}
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if (RAM_dev.dctrl & DEBUG_read)
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sim_printf(" Out of range\n", addr);
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return 0xFF;
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}
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/* put a byte to memory */
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void RAM_put_mbyte(int32 addr, int32 val)
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{
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int32 org, len;
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org = RAM_unit.u3;
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len = RAM_unit.capac - 1;
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf("RAM_put_mbyte: addr=%04X, val=%02X", addr, val);
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if ((addr >= org) && (addr < org + len)) {
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*(RAM_buf + (addr - org)) = val & 0xFF;
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf("\n");
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return;
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}
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if (RAM_dev.dctrl & DEBUG_write)
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sim_printf(" Out of range\n", val);
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}
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/* end of iram.c */
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Reference in New Issue
Block a user