1
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mirror of https://github.com/simh/simh.git synced 2026-02-18 21:38:16 +00:00

Notes For V3.8

The makefile now works for Linux and most Unix's. However, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.1.2 GRI

- Added support for the GRI-99 processor.

1.1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

1.2 3.8-1

1.2.1 SCP and libraries

- Added capability to set line connection order for terminal multiplexers.

1.2.2 HP2100

- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.

1.3 3.8-2

1.3.1 SCP and libraries

- Added line history capability for *nix hosts.
- Added "SHOW SHOW" and "SHOW <dev> SHOW" commands.

1.3.2 1401

- Added "no rewind" option to magtape boot.

1.3.3 PDP-11

- Added RD32 support to RQ
- Added debug support to RL

1.3.4 PDP-8

- Added FPP support (many thanks to Rick Murphy for debugging the code)

1.3.5 VAX-11/780

- Added AUTORESTART switch support, and VMS REBOOT command support

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2011-03-23 14:39:00 -07:00
committed by Mark Pizzolato
parent 35eac703c3
commit a9fd3dd518
77 changed files with 12846 additions and 1522 deletions

View File

@@ -124,21 +124,21 @@
/* 780 microcode patch 37 - only test LR<23:0> for appropriate length */
#define ML_LR_TEST(r) if ((uint32)((r) & 0xFFFFFF) > 0x200000) RSVD_OPND_FAULT
#define ML_LR_TEST(r) if (((uint32)((r) & 0xFFFFFF)) > 0x200000) RSVD_OPND_FAULT
/* 780 microcode patch 38 - only test PxBR<31>=1 and xBR<1:0> = 0 */
/* 780 microcode patch 38 - only test PxBR<31>=1, PxBR<30> = 0, and xBR<1:0> = 0 */
#define ML_PXBR_TEST(r) if ((((r) & 0x80000000) == 0) || \
((r) & 0x00000003)) RSVD_OPND_FAULT
#define ML_SBR_TEST(r) if ((r) & 0x00000003) RSVD_OPND_FAULT
#define ML_PXBR_TEST(r) if (((((uint32)(r)) & 0x80000000) == 0) || \
((((uint32)(r)) & 0x40000003) != 0)) RSVD_OPND_FAULT
#define ML_SBR_TEST(r) if ((((uint32)(r)) & 0xC0000003) != 0) RSVD_OPND_FAULT
/* 780 microcode patch 78 - only test xCBB<1:0> = 0 */
#define ML_PA_TEST(r) if ((r) & 0x00000003) RSVD_OPND_FAULT
#define ML_PA_TEST(r) if ((((uint32)(r)) & 0x00000003) != 0) RSVD_OPND_FAULT
#define LP_AST_TEST(r) if ((r) > AST_MAX) RSVD_OPND_FAULT
#define LP_MBZ84_TEST(r) if ((r) & 0xF8C00000) RSVD_OPND_FAULT
#define LP_MBZ92_TEST(r) if ((r) & 0x7FC00000) RSVD_OPND_FAULT
#define LP_MBZ84_TEST(r) if ((((uint32)(r)) & 0xF8C00000) != 0) RSVD_OPND_FAULT
#define LP_MBZ92_TEST(r) if ((((uint32)(r)) & 0x7FC00000) != 0) RSVD_OPND_FAULT
/* Memory */

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@@ -1,6 +1,6 @@
/* vax780_sbi.c: VAX 11/780 SBI
Copyright (c) 2004-2008, Robert M Supnik
Copyright (c) 2004-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -27,9 +27,10 @@
sbi bus controller
21-Mar-2011 RMS Added autoreboot capability (from Mark Pizzalato)
31-May-2008 RMS Fixed machine_check calling sequence (found by Peter Schorn)
03-May-2006 RMS Fixed writes to ACCS
28-May-08 RMS Inlined physical memory routines
28-May-2008 RMS Inlined physical memory routines
*/
#include "vax_defs.h"
@@ -100,6 +101,7 @@ uint32 sbi_sc = 0; /* SBI silo comparator *
uint32 sbi_mt = 0; /* SBI maintenance */
uint32 sbi_er = 0; /* SBI error status */
uint32 sbi_tmo = 0; /* SBI timeout addr */
char cpu_boot_cmd[CBUFSIZE] = { 0 }; /* boot command */
static t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md);
static t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md);
@@ -132,6 +134,8 @@ t_stat sbi_reset (DEVICE *dptr);
void sbi_set_tmo (int32 pa);
void uba_eval_int (void);
t_stat vax780_boot (int32 flag, char *ptr);
t_stat vax780_boot_parse (int32 flag, char *ptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
extern t_stat vax780_fload (int flag, char *cptr);
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
@@ -175,6 +179,7 @@ REG sbi_reg[] = {
{ HRDATA (SBIMT, sbi_mt, 32) },
{ HRDATA (SBIER, sbi_er, 32) },
{ HRDATA (SBITMO, sbi_tmo, 32) },
{ BRDATA (BOOTCMD, cpu_boot_cmd, 16, 8, CBUFSIZE), REG_HRO },
{ NULL }
};
@@ -246,7 +251,7 @@ if ((ipl < IPL_TTINT) && (tti_int || tto_int)) /* console int */
if (ipl >= IPL_SMAX) /* ipl >= sw max? */
return 0;
if ((t = SISR & sw_int_mask[ipl]) == 0)
return 0; /* eligible req */
return 0; /* eligible req */
for (i = IPL_SMAX; i > ipl; i--) { /* check swre int */
if ((t >> i) & 1) /* req != 0? int */
return i;
@@ -587,11 +592,18 @@ sbi_er = sbi_er & ~SBIER_TMOW1C; /* clr SBIER<tmo> etc */
return cc;
}
/* Console entry */
/* Console entry - only reached if CONHALT is set (AUTORESTART is set */
int32 con_halt (int32 code, int32 cc)
{
ABORT (STOP_HALT);
if ((cpu_boot_cmd[0] == 0) || /* saved boot cmd? */
(vax780_boot_parse (0, cpu_boot_cmd) != SCPE_OK) || /* reparse the boot cmd */
(reset_all (0) != SCPE_OK) || /* reset the world */
(cpu_boot (0, NULL) != SCPE_OK)) /* set up boot code */
ABORT (STOP_BOOT); /* any error? */
printf ("Rebooting...\n");
if (sim_log)
fprintf (sim_log, "Rebooting...\n");
return cc;
}
@@ -604,6 +616,19 @@ return cc;
t_stat vax780_boot (int32 flag, char *ptr)
{
t_stat r;
r = vax780_boot_parse (flag, ptr); /* parse the boot cmd */
if (r != SCPE_OK) /* error? */
return r;
strncpy (cpu_boot_cmd, ptr, CBUFSIZE); /* save for reboot */
return run_cmd (flag, "CPU");
}
/* Parse boot command, set up registers - also used on reset */
t_stat vax780_boot_parse (int32 flag, char *ptr)
{
char gbuf[CBUFSIZE];
char *slptr, *regptr;
int32 i, r5v, unitno;
@@ -649,7 +674,7 @@ for (i = 0; boot_tab[i].name != NULL; i++) {
R[3] = unitno;
R[4] = 0;
R[5] = r5v;
return run_cmd (flag, "CPU");
return SCPE_OK;
}
}
return SCPE_NOFNC;
@@ -662,8 +687,8 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
t_stat r;
printf ("Loading boot code from vmb.exe\n");
if (sim_log) fprintf (sim_log,
"Loading boot code from vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r != SCPE_OK)
return r;

View File

@@ -1,6 +1,6 @@
/* vax780_stddev.c: VAX 11/780 standard I/O devices
Copyright (c) 1998-2008, Robert M Supnik
Copyright (c) 1998-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,7 @@
todr TODR clock
tmr interval timer
21-Mar-11 RMS Added reboot capability
17-Aug-08 RMS Resync TODR on any clock reset
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
29-Oct-06 RMS Added clock coscheduler function
@@ -207,6 +208,8 @@ t_stat fl_wr_txdb (int32 data);
t_bool fl_test_xfr (UNIT *uptr, t_bool wr);
void fl_protocol_error (void);
extern int32 con_halt (int32 code, int32 cc);
/* TTI data structures
tti_dev TTI device descriptor
@@ -778,16 +781,20 @@ else {
}
else if (sel == TXDB_MISC) { /* misc function? */
switch (data & MISC_MASK) { /* case on function */
case MISC_CLWS:
comm_region[COMM_WRMS] = 0;
case MISC_CLCS:
comm_region[COMM_CLDS] = 0;
break;
case MISC_SWDN:
ABORT (STOP_SWDN);
break;
case MISC_BOOT:
ABORT (STOP_BOOT);
con_halt (0, 0); /* set up reboot */
break;
}
}

View File

@@ -619,7 +619,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
if (!uba_map_addr (ba + i, &ma)) /* page inv or NXM? */
return (bc - i);
pbc = VA_PAGSIZE - VA_GETOFF (ma); /* left in page */
if (pbc > (bc - i)) /* limit to rem xfr */
if (pbc > (bc - i)) /* limit to rem xfr */
pbc = bc - i;
if (DEBUG_PRI (uba_dev, UBA_DEB_XFR))
fprintf (sim_deb, ">>UBA: 8b read, ma = %X, bc = %X\n", ma, pbc);

View File

@@ -1,6 +1,6 @@
/* vax_cpu.c: VAX CPU
Copyright (c) 1998-2010, Robert M Supnik
Copyright (c) 1998-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
cpu VAX central processor
23-Mar-11 RMS Revised for new idle design (from Mark Pizzolato)
24-Apr-10 RMS Added OLDVMS idle timer option
Fixed bug in SET CPU IDLE
21-May-08 RMS Removed inline support
@@ -175,8 +176,9 @@
#define UNIT_CONH (1u << UNIT_V_CONH)
#define UNIT_MSIZE (1u << UNIT_V_MSIZE)
#define GET_CUR acc = ACC_MASK (PSL_GETCUR (PSL))
#define VAX_IDLE_DFLT 1000
#define OLD_IDLE_DFLT 200
#define VAX_IDLE_VMS 0x1
#define VAX_IDLE_ULT 0x2
#define VAX_IDLE_QUAD 0x3
#define OPND_SIZE 16
#define INST_SIZE 52
@@ -261,9 +263,8 @@ int32 cpu_astop = 0;
int32 mchk_va, mchk_ref; /* mem ref param */
int32 ibufl, ibufh; /* prefetch buf */
int32 ibcnt, ppc; /* prefetch ctl */
uint32 cpu_idle_ipl_mask = 0x8; /* idle if on IPL 3 */
uint32 cpu_idle_type = 1; /* default to VMS */
int32 cpu_idle_wait = VAX_IDLE_DFLT; /* for these cycles */
uint32 cpu_idle_mask = VAX_IDLE_VMS; /* idle mask */
uint32 cpu_idle_type = 1; /* default VMS */
jmp_buf save_env;
REG *pcq_r = NULL; /* PC queue reg ptr */
int32 pcq[PCQ_SIZE] = { 0 }; /* PC queue */
@@ -387,8 +388,8 @@ int32 cpu_get_vsw (int32 sw);
SIM_INLINE int32 get_istr (int32 lnt, int32 acc);
int32 ReadOcta (int32 va, int32 *opnd, int32 j, int32 acc);
t_bool cpu_show_opnd (FILE *st, InstHistory *h, int32 line);
int32 cpu_psl_ipl_idle (int32 newpsl);
t_stat cpu_idle_svc (UNIT *uptr);
void cpu_idle (void);
/* CPU data structures
@@ -445,9 +446,8 @@ REG cpu_reg[] = {
{ FLDATA (CRDERR, crd_err, 0) },
{ FLDATA (MEMERR, mem_err, 0) },
{ FLDATA (HLTPIN, hlt_pin, 0) },
{ HRDATA (IDLE_IPL, cpu_idle_ipl_mask, 16), REG_HIDDEN },
{ DRDATA (IDLE_TYPE, cpu_idle_type, 4), REG_HRO },
{ DRDATA (IDLE_WAIT, cpu_idle_wait, 16), REG_HIDDEN },
{ HRDATA (IDLE_MASK, cpu_idle_mask, 16), REG_HIDDEN },
{ DRDATA (IDLE_INDX, cpu_idle_type, 4), REG_HRO },
{ BRDATA (PCQ, pcq, 16, 32, PCQ_SIZE), REG_RO+REG_CIRC },
{ HRDATA (PCQP, pcq_p, 6), REG_HRO },
{ HRDATA (BADABO, badabo, 32), REG_HRO },
@@ -1571,6 +1571,16 @@ for ( ;; ) {
case TSTL:
CC_IIZZ_L (op0); /* set cc's */
if ((cc == CC_Z) &&
((((PSL & PSL_IS) != 0) && /* on IS? */
(PSL_GETIPL (PSL) == 0x1) && /* at IPL 1? */
((cpu_idle_mask & VAX_IDLE_ULT) != 0))|| /* running Ultrix or friends? */
((PSL_GETIPL (PSL) == 0x0) && /* at IPL 0? */
((fault_PC & 0x80000000) != 0) && /* in system space? */
((PC - fault_PC) == 6) && /* 6 byte instruction? */
((fault_PC & 0x7fffffff) < 0x4000) && /* in low system space? */
((cpu_idle_mask & VAX_IDLE_QUAD) != 0)))) /* running Quad or friends? */
cpu_idle(); /* idle loop */
break;
/* Single operand instructions with source, read/write - op src.mx
@@ -2109,14 +2119,20 @@ for ( ;; ) {
case BRB:
BRANCHB (brdisp); /* branch */
if ((PC == fault_PC) && (PSL_GETIPL (PSL) == 0x1F))
ABORT (STOP_LOOP);
if (PC == fault_PC) { /* to self? */
if (PSL_GETIPL (PSL) == 0x1F) /* int locked out? */
ABORT (STOP_LOOP); /* infinite loop */
cpu_idle (); /* idle loop */
}
break;
case BRW:
BRANCHW (brdisp); /* branch */
if ((PC == fault_PC) && (PSL_GETIPL (PSL) == 0x1F))
ABORT (STOP_LOOP);
if (PC == fault_PC) { /* to self? */
if (PSL_GETIPL (PSL) == 0x1F) /* int locked out? */
ABORT (STOP_LOOP); /* infinite loop */
cpu_idle (); /* idle loop */
}
break;
case BSBB:
@@ -2348,8 +2364,13 @@ for ( ;; ) {
*/
case BBS:
if (op_bb_n (opnd, acc)) /* br if bit set */
if (op_bb_n (opnd, acc)) { /* br if bit set */
BRANCHB (brdisp);
if (((PSL & PSL_IS) != 0) && /* on IS? */
(PSL_GETIPL (PSL) == 0x3) && /* at IPL 3? */
((cpu_idle_mask & VAX_IDLE_VMS) != 0)) /* running VMS? */
cpu_idle (); /* idle loop */
}
break;
case BBC:
@@ -3071,24 +3092,15 @@ opnd[j++] = Read (va + 12, L_LONG, acc);
return j;
}
/* Check new PSL IPL for idle start
Checked only on exception or REI, not on MTPR #IPL,
to allow for local locking within the idle loop */
/* Schedule idle before the next instruction */
int32 cpu_psl_ipl_idle (int32 newpsl)
void cpu_idle (void)
{
if (((newpsl ^ PSL) & PSL_IPL) != 0) {
sim_cancel (&cpu_unit);
if (sim_idle_enab && ((newpsl & PSL_CUR) == 0)) {
uint32 newipl = PSL_GETIPL (newpsl);
if (cpu_idle_ipl_mask & (1u << newipl))
sim_activate (&cpu_unit, cpu_idle_wait);
}
}
return newpsl;
sim_activate_abs (&cpu_unit, 0);
return;
}
/* Idle timer has expired with no PSL change */
/* Idle service */
t_stat cpu_idle_svc (UNIT *uptr)
{
@@ -3108,15 +3120,17 @@ PSL = PSL_IS | PSL_IPL1F;
SISR = 0;
ASTLVL = 4;
mapen = 0;
if (M == NULL)
M = (uint32 *) calloc (((uint32) MEMSIZE) >> 2, sizeof (uint32));
if (M == NULL)
return SCPE_MEM;
pcq_r = find_reg ("PCQ", NULL, dptr);
if (pcq_r)
FLUSH_ISTR; /* init I-stream */
if (M == NULL) { /* first time init? */
sim_brk_types = sim_brk_dflt = SWMASK ('E');
pcq_r = find_reg ("PCQ", NULL, dptr);
if (pcq_r == NULL)
return SCPE_IERR;
pcq_r->qptr = 0;
else return SCPE_IERR;
sim_brk_types = sim_brk_dflt = SWMASK ('E');
M = (uint32 *) calloc (((uint32) MEMSIZE) >> 2, sizeof (uint32));
if (M == NULL)
return SCPE_MEM;
}
return build_dib_tab ();
}
@@ -3381,17 +3395,16 @@ return more;
struct os_idle {
char *name;
uint32 mask;
int32 value;
};
static struct os_idle os_tab[] = {
{ "VMS", 0x8, VAX_IDLE_DFLT },
{ "NETBSD", 0x2, VAX_IDLE_DFLT },
{ "ULTRIX", 0x2, VAX_IDLE_DFLT },
{ "OPENBSD", 0x1, VAX_IDLE_DFLT },
{ "32V", 0x1, VAX_IDLE_DFLT },
{ "OLDVMS", 0xB, OLD_IDLE_DFLT },
{ NULL, 0, 0 }
{ "VMS", VAX_IDLE_VMS },
{ "NETBSD", VAX_IDLE_ULT },
{ "ULTRIX", VAX_IDLE_ULT },
{ "OPENBSD", VAX_IDLE_QUAD },
{ "32V", VAX_IDLE_QUAD },
{ "ALL", VAX_IDLE_VMS|VAX_IDLE_ULT|VAX_IDLE_QUAD },
{ NULL, 0 }
};
/* Set and show idle */
@@ -3404,8 +3417,7 @@ if (cptr != NULL) {
for (i = 0; os_tab[i].name != NULL; i++) {
if (strcmp (os_tab[i].name, cptr) == 0) {
cpu_idle_type = i + 1;
cpu_idle_ipl_mask = os_tab[i].mask;
cpu_idle_wait = os_tab[i].value;
cpu_idle_mask = os_tab[i].mask;
return sim_set_idle (uptr, val, NULL, desc);
}
}

View File

@@ -1,6 +1,6 @@
/* vax_cpu1.c: VAX complex instructions
Copyright (c) 1998-2008, Robert M Supnik
Copyright (c) 1998-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
23-Mar-11 RMS Revised idle design (from Mark Pizzolato)
28-May-08 RMS Inlined physical memory routines
29-Apr-07 RMS Separated base register access checks for 11/780
10-May-06 RMS Added access check on system PTE for 11/780
@@ -109,7 +110,6 @@ extern t_bool chk_tb_ent (uint32 va);
extern int32 ReadIPR (int32 rg);
extern void WriteIPR (int32 rg, int32 val);
extern t_bool BadCmPSL (int32 newpsl);
extern int32 cpu_psl_ipl_idle (int32 newpsl);
extern jmp_buf save_env;
@@ -1137,9 +1137,9 @@ else {
}
}
if (ei > 0) /* if int, new IPL */
PSL = cpu_psl_ipl_idle (newpsl | (ipl << PSL_V_IPL));
else PSL = cpu_psl_ipl_idle (newpsl | /* exc, old IPL/1F */
((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) | (oldcur << PSL_V_PRV));
PSL = newpsl | (ipl << PSL_V_IPL);
else PSL = newpsl | /* exc, old IPL/1F */
((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) | (oldcur << PSL_V_PRV);
if (DEBUG_PRI (cpu_dev, LOG_CPU_I))
fprintf (sim_deb, ">>IEX: PC=%08x, PSL=%08x, SP=%08x, VEC=%08x, nPSL=%08x, nSP=%08x\n",
PC, oldpsl, oldsp, vec, PSL, SP);
@@ -1249,7 +1249,7 @@ else STK[oldcur] = SP;
if (DEBUG_PRI (cpu_dev, LOG_CPU_R))
fprintf (sim_deb, ">>REI: PC=%08x, PSL=%08x, SP=%08x, nPC=%08x, nPSL=%08x, nSP=%08x\n",
PC, PSL, SP - 8, newpc, newpsl, ((newpsl & IS)? IS: STK[newcur]));
PSL = cpu_psl_ipl_idle ((PSL & PSL_TP) | (newpsl & ~CC_MASK)); /* set PSL */
PSL = (PSL & PSL_TP) | (newpsl & ~CC_MASK); /* set PSL */
if (PSL & PSL_IS) /* set new stack */
SP = IS;
else {

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@@ -1,6 +1,6 @@
/* vax_sys.c: VAX simulator interface
Copyright (c) 1998-2008, Robert M Supnik
Copyright (c) 1998-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
21-Mar-11 RMS Modified string for STOP_BOOT message
19-Nov-08 RMS Moved bad block routine to I/O library
03-Nov-05 RMS Added 780 stop codes
04-Sep-05 RMS Fixed missing assignment (found by Peter Schorn)
@@ -100,7 +101,7 @@ const char *sim_stop_messages[] = {
"Infinite loop",
"Sanity timer expired",
"Software done",
"Reboot requested",
"Reboot request failed",
"Unknown error",
"Unknown abort code"
};

View File

@@ -1,6 +1,6 @@
/* vax_syscm.c: PDP-11 compatibility mode symbolic decode and parse
Copyright (c) 1993-2008, Robert M Supnik
Copyright (c) 1993-2010, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,8 @@
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
22-May-10 RMS Fixed t_addr printouts for 64b big-endian systems
(found by Mark Pizzolato)
12-Nov-06 RMS Fixed operand order in EIS instructions (found by W.F.J. Mueller)
27-Sep-05 RMS Fixed warnings compiling with 64b addresses
15-Sep-04 RMS Cloned from pdp11_sys.c
@@ -242,13 +244,13 @@ switch (mode) {
case 6:
if (reg != 7)
fprintf (of, "%-X(%s)", nval, rname[reg]);
else fprintf (of, "%-X", (nval + addr + 4) & 0177777);
else fprintf (of, "%-X", (int32)((nval + addr + 4) & 0177777));
break;
case 7:
if (reg != 7)
fprintf (of, "@%-X(%s)", nval, rname[reg]);
else fprintf (of, "@%-X", (nval + addr + 4) & 0177777);
else fprintf (of, "@%-X", (int32)((nval + addr + 4) & 0177777));
break;
} /* end case */
@@ -326,7 +328,7 @@ for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
case I_V_BR: /* cond branch */
fprintf (of, "%s ", opcode[i]);
brdisp = (l8b + l8b + ((l8b & 0200)? 0177002: 2)) & 0177777;
fprintf (of, "%-X", (addr + brdisp) & 0177777);
fprintf (of, "%-X", (int32)((addr + brdisp) & 0177777));
break;
case I_V_8B: /* 8b */
@@ -336,7 +338,7 @@ for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
case I_V_SOB: /* sob */
fprintf (of, "%s %s,", opcode[i], rname[srcr]);
brdisp = (dstm * 2) - 2;
fprintf (of, "%-X", (addr - brdisp) & 0177777);
fprintf (of, "%-X", (int32)((addr - brdisp) & 0177777));
break;
case I_V_RSOP: /* rsop */

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@@ -1,6 +1,6 @@
/* vax_sysdev.c: VAX 3900 system-specific logic
Copyright (c) 1998-2008, Robert M Supnik
Copyright (c) 1998-2011, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -32,6 +32,7 @@
cso console storage output
sysd system devices (SSC miscellany)
23-Dec-10 RMS Added power clear call to boot routine (from Mark Pizzolato)
25-Oct-05 RMS Automated CMCTL extended memory
16-Aug-05 RMS Fixed C++ declaration and cast problems
10-Mar-05 RMS Fixed bug in timer schedule routine (from Mark Hittinger)
@@ -275,6 +276,7 @@ extern void txcs_wr (int32 dat);
extern void txdb_wr (int32 dat);
extern void ioreset_wr (int32 dat);
extern uint32 sim_os_msec();
extern void cpu_idle (void);
/* ROM data structures
@@ -1556,6 +1558,7 @@ if (*rom == 0) { /* no boot? */
if (r != SCPE_OK)
return r;
}
sysd_powerup ();
return SCPE_OK;
}