mirror of
https://github.com/simh/simh.git
synced 2026-01-26 20:12:23 +00:00
Notes For V3.5-0
The source set has been extensively overhauled. For correct viewing, set Visual C++ or Emacs to have tab stops every 4 characters. 1. New Features in 3.4-1 1.1 All Ethernet devices - Added Windows user-defined adapter names (from Timothe Litt) 1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors - Added support for SET <unit>n DISCONNECT 1.3 VAX - Added latent QDSS support - Revised autoconfigure to handle QDSS 1.4 PDP-11 - Revised autoconfigure to handle more casees 2. Bugs Fixed in 3.4-1 2.1 SCP and libraries - Trim trailing spaces on all input (for example, attach file names) - Fixed sim_sock spurious SIGPIPE error in Unix/Linux - Fixed sim_tape misallocation of TPC map array for 64b simulators 2.2 1401 - Fixed bug, CPU reset was clearing SSB through SSG 2.3 PDP-11 - Fixed bug in VH vector display routine - Fixed XU runt packet processing (found by Tim Chapman) 2.4 Interdata - Fixed bug in SHOW PAS CONN/STATS - Fixed potential integer overflow exception in divide 2.5 SDS - Fixed bug in SHOW MUX CONN/STATS 2.6 HP - Fixed bug in SHOW MUX CONN/STATS 2.7 PDP-8 - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.8 PDP-18b - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.9 Nova, Eclipse - Fixed potential integer overflow exception in divide
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
ec60bbf329
commit
b7c1eae41f
@@ -1,6 +1,6 @@
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/* id_pt.c: Interdata paper tape reader
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Copyright (c) 2000-2004, Robert M. Supnik
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Copyright (c) 2000-2005, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -19,14 +19,14 @@
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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pt paper tape reader and punch
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pt paper tape reader and punch
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25-Apr-03 RMS Revised for extended file support
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10-Apr-03 RMS Fixed type problem in ptr service (from Mark Pizzolato)
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25-Apr-03 RMS Revised for extended file support
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10-Apr-03 RMS Fixed type problem in ptr service (from Mark Pizzolato)
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*/
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#include "id_defs.h"
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@@ -34,25 +34,25 @@
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/* Device definitions */
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#define PTR 0 /* unit subscripts */
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#define PTP 1
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#define PTR 0 /* unit subscripts */
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#define PTP 1
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#define STA_OVR 0x80 /* overrun */
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#define STA_NMTN 0x10 /* no motion */
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#define STA_MASK (STA_BSY | STA_OVR | STA_DU) /* static bits */
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#define SET_EX (STA_OVR | STA_NMTN) /* set EX */
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#define STA_OVR 0x80 /* overrun */
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#define STA_NMTN 0x10 /* no motion */
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#define STA_MASK (STA_BSY | STA_OVR | STA_DU) /* static bits */
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#define SET_EX (STA_OVR | STA_NMTN) /* set EX */
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#define CMD_V_RUN 4 /* run/stop */
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#define CMD_V_SLEW 2 /* slew/step */
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#define CMD_V_RD 0 /* read/write */
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#define CMD_V_RUN 4 /* run/stop */
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#define CMD_V_SLEW 2 /* slew/step */
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#define CMD_V_RD 0 /* read/write */
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extern uint32 int_req[INTSZ], int_enb[INTSZ];
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uint32 pt_run = 0, pt_slew = 0; /* ptr modes */
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uint32 pt_rd = 1, pt_chp = 0; /* pt state */
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uint32 pt_arm = 0; /* int arm */
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uint32 pt_sta = STA_BSY; /* status */
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uint32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
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uint32 pt_run = 0, pt_slew = 0; /* ptr modes */
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uint32 pt_rd = 1, pt_chp = 0; /* pt state */
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uint32 pt_arm = 0; /* int arm */
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uint32 pt_sta = STA_BSY; /* status */
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uint32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
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DEVICE pt_dev;
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uint32 pt (uint32 dev, uint32 op, uint32 dat);
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@@ -60,270 +60,278 @@ t_stat ptr_svc (UNIT *uptr);
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t_stat ptp_svc (UNIT *uptr);
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t_stat pt_boot (int32 unitno, DEVICE *dptr);
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t_stat pt_reset (DEVICE *dptr);
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/* PT data structures
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pt_dev PT device descriptor
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pt_unit PT unit descriptors
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pt_reg PT register list
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pt_dev PT device descriptor
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pt_unit PT unit descriptors
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pt_reg PT register list
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*/
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DIB pt_dib = { d_PT, -1, v_PT, NULL, &pt, NULL };
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UNIT pt_unit[] = {
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{ UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
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SERIAL_IN_WAIT },
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{ UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0),
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SERIAL_OUT_WAIT } };
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{ UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
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SERIAL_IN_WAIT },
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{ UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT }
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};
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REG pt_reg[] = {
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{ HRDATA (STA, pt_sta, 8) },
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{ HRDATA (RBUF, pt_unit[PTR].buf, 8) },
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{ DRDATA (RPOS, pt_unit[PTR].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (RTIME, pt_unit[PTR].wait, 24), PV_LEFT },
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{ FLDATA (RSTOP_IOE, ptr_stopioe, 0) },
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{ HRDATA (PBUF, pt_unit[PTP].buf, 8) },
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{ DRDATA (PPOS, pt_unit[PTP].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (PTIME, pt_unit[PTP].wait, 24), PV_LEFT },
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{ FLDATA (PSTOP_IOE, ptp_stopioe, 0) },
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{ FLDATA (IREQ, int_req[l_PT], i_PT) },
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{ FLDATA (IENB, int_enb[l_PT], i_PT) },
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{ FLDATA (IARM, pt_arm, 0) },
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{ FLDATA (RD, pt_rd, 0) },
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{ FLDATA (RUN, pt_run, 0) },
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{ FLDATA (SLEW, pt_slew, 0) },
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{ FLDATA (CHP, pt_chp, 0) },
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{ HRDATA (DEVNO, pt_dib.dno, 8), REG_HRO },
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{ NULL } };
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{ HRDATA (STA, pt_sta, 8) },
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{ HRDATA (RBUF, pt_unit[PTR].buf, 8) },
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{ DRDATA (RPOS, pt_unit[PTR].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (RTIME, pt_unit[PTR].wait, 24), PV_LEFT },
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{ FLDATA (RSTOP_IOE, ptr_stopioe, 0) },
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{ HRDATA (PBUF, pt_unit[PTP].buf, 8) },
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{ DRDATA (PPOS, pt_unit[PTP].pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (PTIME, pt_unit[PTP].wait, 24), PV_LEFT },
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{ FLDATA (PSTOP_IOE, ptp_stopioe, 0) },
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{ FLDATA (IREQ, int_req[l_PT], i_PT) },
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{ FLDATA (IENB, int_enb[l_PT], i_PT) },
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{ FLDATA (IARM, pt_arm, 0) },
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{ FLDATA (RD, pt_rd, 0) },
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{ FLDATA (RUN, pt_run, 0) },
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{ FLDATA (SLEW, pt_slew, 0) },
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{ FLDATA (CHP, pt_chp, 0) },
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{ HRDATA (DEVNO, pt_dib.dno, 8), REG_HRO },
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{ NULL }
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};
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MTAB pt_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "devno", "DEVNO",
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&set_dev, &show_dev, NULL },
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{ 0 } };
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{ MTAB_XTD|MTAB_VDV, 0, "devno", "DEVNO",
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&set_dev, &show_dev, NULL },
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{ 0 }
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};
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DEVICE pt_dev = {
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"PT", pt_unit, pt_reg, pt_mod,
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2, 10, 31, 1, 16, 8,
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NULL, NULL, &pt_reset,
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&pt_boot, NULL, NULL,
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&pt_dib, DEV_DISABLE };
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"PT", pt_unit, pt_reg, pt_mod,
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2, 10, 31, 1, 16, 8,
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NULL, NULL, &pt_reset,
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&pt_boot, NULL, NULL,
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&pt_dib, DEV_DISABLE
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};
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/* Paper tape: IO routine */
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uint32 pt (uint32 dev, uint32 op, uint32 dat)
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{
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uint32 t, old_rd, old_run;
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switch (op) { /* case IO op */
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case IO_ADR: /* select */
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return BY; /* byte only */
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case IO_OC: /* command */
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old_rd = pt_rd; /* save curr rw */
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old_run = pt_run; /* save curr run */
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pt_arm = int_chg (v_PT, dat, pt_arm); /* upd int ctrl */
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pt_rd = io_2b (dat, CMD_V_RD, pt_rd); /* upd read/wr */
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if (old_rd != pt_rd) { /* rw change? */
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pt_sta = pt_sta & ~STA_OVR; /* clr overrun */
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if (sim_is_active (&pt_unit[pt_rd? PTR: PTP])) {
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pt_sta = pt_sta | STA_BSY; /* busy = 1 */
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CLR_INT (v_PT); } /* clear int */
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else { /* not active */
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pt_sta = pt_sta & ~STA_BSY; /* busy = 0 */
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if (pt_arm) SET_INT (v_PT); } } /* no, set int */
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if (pt_rd) { /* reader? */
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pt_run = io_2b (dat, CMD_V_RUN, pt_run); /* upd run/stop */
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pt_slew = io_2b (dat, CMD_V_SLEW, pt_slew); /* upd slew/inc */
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if (pt_run) { /* run set? */
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if (old_run == 0) { /* run 0 -> 1? */
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sim_activate (&pt_unit[PTR], pt_unit[PTR].wait);
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pt_sta = pt_sta & ~STA_DU; } } /* clear eof */
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else sim_cancel (&pt_unit[PTR]); } /* clr, stop rdr */
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else pt_sta = pt_sta & ~STA_DU; /* punch, clr eof */
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break;
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case IO_RD: /* read */
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if (pt_run && !pt_slew) { /* incremental? */
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sim_activate (&pt_unit[PTR], pt_unit[PTR].wait);
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pt_sta = pt_sta & ~STA_DU; } /* clr eof */
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pt_chp = 0; /* clr char pend */
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if (pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
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return (pt_unit[PTR].buf & 0xFF); /* return char */
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case IO_WD: /* write */
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pt_unit[PTP].buf = dat & DMASK8; /* save char */
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if (!pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
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sim_activate (&pt_unit[PTP], pt_unit[PTP].wait);
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break;
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case IO_SS: /* status */
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t = pt_sta & STA_MASK; /* get status */
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if (pt_rd && !pt_run && !sim_is_active (&pt_unit[PTR]))
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t = t | STA_NMTN; /* stopped? */
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if ((pt_unit[pt_rd? PTR: PTP].flags & UNIT_ATT) == 0)
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t = t | STA_DU; /* offline? */
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if (t & SET_EX) t = t | STA_EX; /* test for EX */
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return t; }
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switch (op) { /* case IO op */
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case IO_ADR: /* select */
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return BY; /* byte only */
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case IO_OC: /* command */
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old_rd = pt_rd; /* save curr rw */
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old_run = pt_run; /* save curr run */
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pt_arm = int_chg (v_PT, dat, pt_arm); /* upd int ctrl */
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pt_rd = io_2b (dat, CMD_V_RD, pt_rd); /* upd read/wr */
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if (old_rd != pt_rd) { /* rw change? */
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pt_sta = pt_sta & ~STA_OVR; /* clr overrun */
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if (sim_is_active (&pt_unit[pt_rd? PTR: PTP])) {
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pt_sta = pt_sta | STA_BSY; /* busy = 1 */
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CLR_INT (v_PT); /* clear int */
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}
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else { /* not active */
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pt_sta = pt_sta & ~STA_BSY; /* busy = 0 */
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if (pt_arm) SET_INT (v_PT); /* no, set int */
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}
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}
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if (pt_rd) { /* reader? */
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pt_run = io_2b (dat, CMD_V_RUN, pt_run); /* upd run/stop */
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pt_slew = io_2b (dat, CMD_V_SLEW, pt_slew); /* upd slew/inc */
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if (pt_run) { /* run set? */
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if (old_run == 0) { /* run 0 -> 1? */
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sim_activate (&pt_unit[PTR], pt_unit[PTR].wait);
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pt_sta = pt_sta & ~STA_DU; /* clear eof */
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}
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}
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else sim_cancel (&pt_unit[PTR]); /* clr, stop rdr */
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}
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else pt_sta = pt_sta & ~STA_DU; /* punch, clr eof */
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break;
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case IO_RD: /* read */
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if (pt_run && !pt_slew) { /* incremental? */
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sim_activate (&pt_unit[PTR], pt_unit[PTR].wait);
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pt_sta = pt_sta & ~STA_DU; /* clr eof */
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}
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pt_chp = 0; /* clr char pend */
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if (pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
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return (pt_unit[PTR].buf & 0xFF); /* return char */
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case IO_WD: /* write */
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pt_unit[PTP].buf = dat & DMASK8; /* save char */
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if (!pt_rd) pt_sta = pt_sta | STA_BSY; /* set busy */
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sim_activate (&pt_unit[PTP], pt_unit[PTP].wait);
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break;
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case IO_SS: /* status */
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t = pt_sta & STA_MASK; /* get status */
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if (pt_rd && !pt_run && !sim_is_active (&pt_unit[PTR]))
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t = t | STA_NMTN; /* stopped? */
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if ((pt_unit[pt_rd? PTR: PTP].flags & UNIT_ATT) == 0)
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t = t | STA_DU; /* offline? */
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if (t & SET_EX) t = t | STA_EX; /* test for EX */
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return t;
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}
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return 0;
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}
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/* Unit service */
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t_stat ptr_svc (UNIT *uptr)
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{
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int32 temp;
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if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptr_stopioe, SCPE_UNATT);
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if (pt_rd) { /* read mode? */
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pt_sta = pt_sta & ~STA_BSY; /* clear busy */
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if (pt_arm) SET_INT (v_PT); /* if armed, intr */
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if (pt_chp) pt_sta = pt_sta | STA_OVR; } /* overrun? */
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pt_chp = 1; /* char pending */
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if ((temp = getc (uptr->fileref)) == EOF) { /* error? */
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if (feof (uptr->fileref)) { /* eof? */
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pt_sta = pt_sta | STA_DU; /* set DU */
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if (ptr_stopioe) printf ("PTR end of file\n");
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else return SCPE_OK; }
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else perror ("PTR I/O error");
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clearerr (uptr->fileref);
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return SCPE_IOERR; }
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uptr->buf = temp & DMASK8; /* store char */
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uptr->pos = uptr->pos + 1; /* incr pos */
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if (pt_slew) sim_activate (uptr, uptr->wait); /* slew? continue */
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if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptr_stopioe, SCPE_UNATT);
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if (pt_rd) { /* read mode? */
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pt_sta = pt_sta & ~STA_BSY; /* clear busy */
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if (pt_arm) SET_INT (v_PT); /* if armed, intr */
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if (pt_chp) pt_sta = pt_sta | STA_OVR; /* overrun? */
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}
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pt_chp = 1; /* char pending */
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if ((temp = getc (uptr->fileref)) == EOF) { /* error? */
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if (feof (uptr->fileref)) { /* eof? */
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pt_sta = pt_sta | STA_DU; /* set DU */
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if (ptr_stopioe) printf ("PTR end of file\n");
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else return SCPE_OK;
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}
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else perror ("PTR I/O error");
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clearerr (uptr->fileref);
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return SCPE_IOERR;
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}
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uptr->buf = temp & DMASK8; /* store char */
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uptr->pos = uptr->pos + 1; /* incr pos */
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if (pt_slew) sim_activate (uptr, uptr->wait); /* slew? continue */
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return SCPE_OK;
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}
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t_stat ptp_svc (UNIT *uptr)
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{
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if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptp_stopioe, SCPE_UNATT);
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if (!pt_rd) { /* write mode? */
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pt_sta = pt_sta & ~STA_BSY; /* clear busy */
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if (pt_arm) SET_INT (v_PT); } /* if armed, intr */
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if (putc (uptr->buf, uptr -> fileref) == EOF) { /* write char */
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perror ("PTP I/O error");
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clearerr (uptr -> fileref);
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return SCPE_IOERR; }
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uptr -> pos = uptr -> pos + 1; /* incr pos */
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if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptp_stopioe, SCPE_UNATT);
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if (!pt_rd) { /* write mode? */
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pt_sta = pt_sta & ~STA_BSY; /* clear busy */
|
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if (pt_arm) SET_INT (v_PT); /* if armed, intr */
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}
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if (putc (uptr->buf, uptr -> fileref) == EOF) { /* write char */
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perror ("PTP I/O error");
|
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clearerr (uptr -> fileref);
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return SCPE_IOERR;
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}
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uptr -> pos = uptr -> pos + 1; /* incr pos */
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return SCPE_OK;
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||||
}
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||||
|
||||
|
||||
/* Reset routine */
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||||
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t_stat pt_reset (DEVICE *dptr)
|
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{
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sim_cancel (&pt_unit[PTR]); /* deactivate units */
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sim_cancel (&pt_unit[PTR]); /* deactivate units */
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sim_cancel (&pt_unit[PTP]);
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pt_rd = 1; /* read */
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pt_chp = pt_run = pt_slew = 0; /* stop, inc, disarm */
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pt_sta = STA_BSY; /* buf empty */
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CLR_INT (v_PT); /* clear int */
|
||||
CLR_ENB (v_PT); /* disable int */
|
||||
pt_arm = 0; /* disarm int */
|
||||
pt_rd = 1; /* read */
|
||||
pt_chp = pt_run = pt_slew = 0; /* stop, inc, disarm */
|
||||
pt_sta = STA_BSY; /* buf empty */
|
||||
CLR_INT (v_PT); /* clear int */
|
||||
CLR_ENB (v_PT); /* disable int */
|
||||
pt_arm = 0; /* disarm int */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Bootstrap routine */
|
||||
|
||||
#define BOOT_START 0x50
|
||||
#define BOOT_LEN (sizeof (boot_rom) / sizeof (uint8))
|
||||
#define BOOT3_START 0x3E
|
||||
#define BOOT3_LEN (sizeof (boot_rom) / sizeof (uint8))
|
||||
#define BOOT_START 0x50
|
||||
#define BOOT_LEN (sizeof (boot_rom) / sizeof (uint8))
|
||||
#define BOOT3_START 0x3E
|
||||
#define BOOT3_LEN (sizeof (boot_rom) / sizeof (uint8))
|
||||
|
||||
static uint8 boot_rom[] = {
|
||||
0xD5, 0x00, /* ST AL CF */
|
||||
0x00, 0xCF,
|
||||
0x43, 0x00, /* BR 80 */
|
||||
0x00, 0x80
|
||||
};
|
||||
0xD5, 0x00, 0x00, 0xCF, /* ST AL CF */
|
||||
0x43, 0x00, 0x00, 0x80 /* BR 80 */
|
||||
};
|
||||
|
||||
static uint8 boot3_rom[] = {
|
||||
0xC8, 0x20, /* ST LHI 2,80 */
|
||||
0x00, 0x80,
|
||||
0xC8, 0x30, /* LHI 3,1 */
|
||||
0x00, 0x01,
|
||||
0xC8, 0x40, /* LHI 4,CF */
|
||||
0x00, 0xCF,
|
||||
0xD3, 0xA0, /* LB A,78 */
|
||||
0x00, 0x78,
|
||||
0xDE, 0xA0, /* OC A,79 */
|
||||
0x00, 0x79,
|
||||
0x9D, 0xAE, /* LP SSR A,E */
|
||||
0x42, 0xF0, /* BTC F,LP */
|
||||
0x00, 0x52,
|
||||
0x9B, 0xAE, /* RDR A,E */
|
||||
0x08, 0xEE, /* LHR E,E */
|
||||
0x43, 0x30, /* BZ LP */
|
||||
0x00, 0x52,
|
||||
0x43, 0x00, /* BR STO */
|
||||
0x00, 0x6C,
|
||||
0x9D, 0xAE, /* LP1 SSR A,E */
|
||||
0x42, 0xF0, /* BTC F,LP1 */
|
||||
0x00, 0x64,
|
||||
0x9B, 0xAE, /* RDR A,E */
|
||||
0xD2, 0xE2, /* STO STB E,0(2) */
|
||||
0x00, 0x00,
|
||||
0xC1, 0x20, /* BXLE 2,LP1 */
|
||||
0x00, 0x64,
|
||||
0x43, 0x00, /* BR 80 */
|
||||
0x00, 0x80
|
||||
};
|
||||
0xC8, 0x20, 0x00, 0x80, /* ST LHI 2,80 */
|
||||
0xC8, 0x30, 0x00, 0x01, /* LHI 3,1 */
|
||||
0xC8, 0x40, 0x00, 0xCF, /* LHI 4,CF */
|
||||
0xD3, 0xA0, 0x00, 0x78, /* LB A,78 */
|
||||
0xDE, 0xA0, 0x00, 0x79, /* OC A,79 */
|
||||
0x9D, 0xAE, /* LP SSR A,E */
|
||||
0x42, 0xF0, 0x00, 0x52, /* BTC F,LP */
|
||||
0x9B, 0xAE, /* RDR A,E */
|
||||
0x08, 0xEE, /* LHR E,E */
|
||||
0x43, 0x30, 0x00, 0x52, /* BZ LP */
|
||||
0x43, 0x00, 0x00, 0x6C, /* BR STO */
|
||||
0x9D, 0xAE, /* LP1 SSR A,E */
|
||||
0x42, 0xF0, 0x00, 0x64, /* BTC F,LP1 */
|
||||
0x9B, 0xAE, /* RDR A,E */
|
||||
0xD2, 0xE2, 0x00, 0x00, /* STO STB E,0(2) */
|
||||
0xC1, 0x20, 0x00, 0x64, /* BXLE 2,LP1 */
|
||||
0x43, 0x00, 0x00, 0x80 /* BR 80 */
|
||||
};
|
||||
|
||||
t_stat pt_boot (int32 unitno, DEVICE *dptr)
|
||||
{
|
||||
extern uint32 PC, dec_flgs;
|
||||
extern uint16 decrom[];
|
||||
|
||||
if (decrom[0xD5] & dec_flgs) /* AL defined? */
|
||||
IOWriteBlk (BOOT3_START, BOOT3_LEN, boot3_rom); /* no, 50 seq */
|
||||
else IOWriteBlk (BOOT_START, BOOT_LEN, boot_rom); /* copy AL boot */
|
||||
IOWriteB (AL_DEV, pt_dib.dno); /* set dev no */
|
||||
IOWriteB (AL_IOC, 0x99); /* set dev cmd */
|
||||
IOWriteB (AL_SCH, 0); /* clr sch dev no */
|
||||
if (decrom[0xD5] & dec_flgs) /* AL defined? */
|
||||
IOWriteBlk (BOOT3_START, BOOT3_LEN, boot3_rom); /* no, 50 seq */
|
||||
else IOWriteBlk (BOOT_START, BOOT_LEN, boot_rom); /* copy AL boot */
|
||||
IOWriteB (AL_DEV, pt_dib.dno); /* set dev no */
|
||||
IOWriteB (AL_IOC, 0x99); /* set dev cmd */
|
||||
IOWriteB (AL_SCH, 0); /* clr sch dev no */
|
||||
PC = BOOT_START;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Dump routine */
|
||||
|
||||
#define LOAD_START 0x80
|
||||
#define LOAD_LO 0x8A
|
||||
#define LOAD_HI 0x8E
|
||||
#define LOAD_CS 0x93
|
||||
#define LOAD_LEN (sizeof (load_rom) / sizeof (uint8))
|
||||
#define LOAD_LDR 50
|
||||
#define LOAD_START 0x80
|
||||
#define LOAD_LO 0x8A
|
||||
#define LOAD_HI 0x8E
|
||||
#define LOAD_CS 0x93
|
||||
#define LOAD_LEN (sizeof (load_rom) / sizeof (uint8))
|
||||
#define LOAD_LDR 50
|
||||
|
||||
static uint8 load_rom[] = {
|
||||
0x24, 0x21, /* BOOT LIS R2,1 */
|
||||
0x23, 0x03, /* BS BOOT */
|
||||
0x00, 0x00, /* 32b psw pointer */
|
||||
0x00, 0x00, /* 32b reg pointer */
|
||||
0xC8, 0x10, /* ST LHI R1,lo */
|
||||
0x00, 0x00,
|
||||
0xC8, 0x30, /* LHI R3,hi */
|
||||
0x00, 0x00,
|
||||
0xC8, 0x60, /* LHI R3,cs */
|
||||
0x00, 0x00,
|
||||
0xD3, 0x40, /* LB R4,X'78' */
|
||||
0x00, 0x78,
|
||||
0xDE, 0x40, /* OC R4,X'79' */
|
||||
0x00, 0x79,
|
||||
0x9D, 0x45, /* LDR SSR R4,R5 */
|
||||
0x20, 0x91, /* BTBS 9,.-2 */
|
||||
0x9B, 0x45, /* RDR R4,R5 */
|
||||
0x08, 0x55, /* L(H)R R5,R5 */
|
||||
0x22, 0x34, /* BZS LDR */
|
||||
0xD2, 0x51, /* LOOP STB R5,0(R1) */
|
||||
0x00, 0x00,
|
||||
0x07, 0x65, /* X(H)R R6,R5 */
|
||||
0x9A, 0x26, /* WDR R2,R6 */
|
||||
0x9D, 0x45, /* SSR R4,R5 */
|
||||
0x20, 0x91, /* BTBS 9,.-2 */
|
||||
0x9B, 0x45, /* RDR R4,R5 */
|
||||
0xC1, 0x10, /* BXLE R1,LOOP */
|
||||
0x00, 0xA6,
|
||||
0x24, 0x78, /* LIS R7,8 */
|
||||
0x91, 0x7C, /* SLLS R7,12 */
|
||||
0x95, 0x57, /* EPSR R5,R7 */
|
||||
0x22, 0x03 /* BS .-6 */
|
||||
};
|
||||
0x24, 0x21, /* BOOT LIS R2,1 */
|
||||
0x23, 0x03, /* BS BOOT */
|
||||
0x00, 0x00, /* 32b psw pointer */
|
||||
0x00, 0x00, /* 32b reg pointer */
|
||||
0xC8, 0x10, /* ST LHI R1,lo */
|
||||
0x00, 0x00,
|
||||
0xC8, 0x30, /* LHI R3,hi */
|
||||
0x00, 0x00,
|
||||
0xC8, 0x60, /* LHI R3,cs */
|
||||
0x00, 0x00,
|
||||
0xD3, 0x40, /* LB R4,X'78' */
|
||||
0x00, 0x78,
|
||||
0xDE, 0x40, /* OC R4,X'79' */
|
||||
0x00, 0x79,
|
||||
0x9D, 0x45, /* LDR SSR R4,R5 */
|
||||
0x20, 0x91, /* BTBS 9,.-2 */
|
||||
0x9B, 0x45, /* RDR R4,R5 */
|
||||
0x08, 0x55, /* L(H)R R5,R5 */
|
||||
0x22, 0x34, /* BZS LDR */
|
||||
0xD2, 0x51, /* LOOP STB R5,0(R1) */
|
||||
0x00, 0x00,
|
||||
0x07, 0x65, /* X(H)R R6,R5 */
|
||||
0x9A, 0x26, /* WDR R2,R6 */
|
||||
0x9D, 0x45, /* SSR R4,R5 */
|
||||
0x20, 0x91, /* BTBS 9,.-2 */
|
||||
0x9B, 0x45, /* RDR R4,R5 */
|
||||
0xC1, 0x10, /* BXLE R1,LOOP */
|
||||
0x00, 0xA6,
|
||||
0x24, 0x78, /* LIS R7,8 */
|
||||
0x91, 0x7C, /* SLLS R7,12 */
|
||||
0x95, 0x57, /* EPSR R5,R7 */
|
||||
0x22, 0x03 /* BS .-6 */
|
||||
};
|
||||
|
||||
t_stat pt_dump (FILE *of, char *cptr, char *fnam)
|
||||
{
|
||||
@@ -344,7 +352,7 @@ IOWriteB (LOAD_HI + 1, hi & 0xFF);
|
||||
IOWriteB (LOAD_CS, cs & 0xFF);
|
||||
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
|
||||
for (i = LOAD_START; i < (LOAD_START + LOAD_LEN); i++)
|
||||
fputc (IOReadB (i), of);
|
||||
fputc (IOReadB (i), of);
|
||||
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
|
||||
for (i = lo; i <= hi; i++) fputc (IOReadB (i), of);
|
||||
for (i = 0; i < LOAD_LDR; i++) fputc (0, of);
|
||||
|
||||
Reference in New Issue
Block a user