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mirror of https://github.com/simh/simh.git synced 2026-01-29 13:11:26 +00:00

VAX: Change to load ROMs or other boot code directly from built in memory arrays.

Prior logic attempted to load the desired file from the current default directory and if that failed wrote the in memory boot code image to the desired file and then retried the desired load..

A user can still explicitly load a ROM image with a "LOAD -R romfile.bin" command prior to a BOOT attempt if they want to test or otherwise run with a different ROM.
This commit is contained in:
Mark Pizzolato
2015-09-28 09:19:38 -07:00
parent 4921d92650
commit c3a879da2d
10 changed files with 52 additions and 29 deletions

View File

@@ -117,7 +117,7 @@ if (sim_switches & SWMASK ('O')) { /* origin? */
if (r != SCPE_OK)
return SCPE_ARG;
}
while ((i = getc (fileref)) != EOF) { /* read byte stream */
while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
else WriteB (origin, i); /* store byte */

View File

@@ -144,7 +144,7 @@ else {
return SCPE_ARG;
}
}
while ((i = getc (fileref)) != EOF) { /* read byte stream */
while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */

View File

@@ -117,7 +117,7 @@ if (sim_switches & SWMASK ('O')) { /* origin? */
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */
while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */
if (sim_switches & SWMASK ('R')) { /* ROM0? */
return SCPE_NXM;
}

View File

@@ -126,7 +126,7 @@ else
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */
while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */

View File

@@ -131,7 +131,7 @@ if (sim_switches & SWMASK ('O')) { /* origin? */
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */
while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */
if (sim_switches & SWMASK ('R')) { /* ROM0? */
if (origin >= ROMSIZE)
return SCPE_NXM;

View File

@@ -127,7 +127,7 @@ if (sim_switches & SWMASK ('O')) { /* origin? */
return SCPE_ARG;
}
while ((val = getc (fileref)) != EOF) { /* read byte stream */
while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
WriteB (origin, val); /* memory */

View File

@@ -3570,27 +3570,16 @@ t_stat cpu_load_bootcode (const char *filename, const unsigned char *builtin_cod
char args[CBUFSIZE];
t_stat r;
sim_printf ("Loading boot code from %s\n", filename);
sim_printf ("Loading boot code from %s%s\n", builtin_code ? "internal " : "", filename);
if (builtin_code)
sim_set_memory_load_file (builtin_code, size);
if (rom)
sprintf (args, "-R %s", filename);
else
sprintf (args, "-O %s %X", filename, (int)offset);
r = load_cmd (0, args);
if (r != SCPE_OK) {
if (builtin_code) {
FILE *f;
if ((f = sim_fopen (filename, "wb"))) {
sim_printf ("Saving boot code to %s\n", filename);
sim_fwrite ((void *)builtin_code, 1, size, f);
fclose (f);
sim_printf ("Loading boot code from %s\n", filename);
r = load_cmd (0, args);
}
}
return r;
}
return SCPE_OK;
sim_set_memory_load_file (NULL, 0);
return r;
}
t_stat cpu_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)

View File

@@ -139,7 +139,7 @@ else {
return SCPE_ARG;
}
}
while ((i = getc (fileref)) != EOF) { /* read byte stream */
while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */