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Notes For V2.9-11
1. New Features 1.1 GRI-909 - This is a new simulator for the GRI-909. - It has been hand-tested; so far, no software has been discovered. 1.2 VAX - SET CPU CONHALT will cause a HALT instruction to return to the boot ROM console rather than to SIMH. SET CPU SIMHALT restores the default behavior. - BRB/W self at IPL 1F stops the simulator. This is the default behavior of VMS at exit. 1.3 PDP-18b - ATTACH -A PTR/PTP attaches the reader and punch in ASCII mode. In ASCII mode, the reader automatically sets the high order bit of incoming alphabetic data, and the punch clears the high order bit of outgoing data. 1.4 SCP - DO -V echoes commands from the file as they are executed. - Under Windows, execution priority is set BELOW_NORMAL when the simulator is running. 2. Release Notes 2.1 Bugs Fixed - PDP-11 CPU: fixed updating of MMR0 on a memory management error. - VAX FPA: changed function names to avoid conflict with C math library. - 1401 MT: read end of record generates group mark without word mark. - 1401 DP: fixed address generation and checking. - SCP: an EXIT within a DO command will cause the simulator to exit. 3. In Progress - Interdata 16b/32b: coded, not tested. - SDS 940: coded, not tested. - IBM 1620: coded, not tested. If you would like to help with the debugging of the untested simulators, they can be made available by special request.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
701f0fe028
commit
df6475181c
@@ -1,6 +1,6 @@
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/* pdp11_ts.c: TS11/TSV05 magnetic tape simulator
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Copyright (c) 1993-2001, Robert M Supnik
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Copyright (c) 1993-2002, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -25,6 +25,12 @@
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ts TS11/TSV05 magtape
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30-May-02 RMS Widened POS to 32b
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22-Apr-02 RMS Added maximum record length protection
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04-Apr-02 RMS Fixed bug in residual frame count after space operation
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16-Feb-02 RMS Fixed bug in message header logic
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26-Jan-02 RMS Revised bootstrap to conform to M9312
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06-Jan-02 RMS Revised enable/disable support
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30-Nov-01 RMS Added read only unit, extended SET/SHOW support
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09-Nov-01 RMS Added bus map, VAX support
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15-Oct-01 RMS Integrated debug logging across simulator
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@@ -91,7 +97,6 @@ extern int32 cpu_18b, cpu_ubm;
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#define UNIT_V_WLK (UNIT_V_UF + 0) /* write locked */
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#define UNIT_WLK (1 << UNIT_V_WLK)
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#define TS_MAXFR (1 << 16) /* max xfer */
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#define UNIT_WPRT (UNIT_WLK | UNIT_RO) /* write protect */
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/* TSBA/TSDB - 17772520: base address/data buffer register
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@@ -118,7 +123,8 @@ extern int32 cpu_18b, cpu_ubm;
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#define TSSR_SSR 0000200 /* subsystem ready */
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#define TSSR_OFL 0000100 /* offline */
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#define TSSR_V_TC 1 /* term class */
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#define TSSR_TC (07 << TSSR_V_TC)
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#define TSSR_M_TC 07
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#define TSSR_TC (TSSR_M_TC << TSSR_V_TC)
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#define TC0 (0 << TSSR_V_TC) /* ok */
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#define TC1 (1 << TSSR_V_TC) /* attention */
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#define TC2 (2 << TSSR_V_TC) /* status alert */
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@@ -128,6 +134,7 @@ extern int32 cpu_18b, cpu_ubm;
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#define TC6 (6 << TSSR_V_TC) /* pos lost */
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#define TC7 (7 << TSSR_V_TC) /* fatal err */
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#define TSSR_MBZ 0060060
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#define GET_TC(x) (((x) >> TSSR_V_TC) & TSSR_M_TC)
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#define TSDBX_M_XA 017 /* ext addr */
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#define TSDBX_BOOT 0000200 /* boot */
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@@ -254,6 +261,7 @@ extern int32 cpu_18b, cpu_ubm;
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extern int32 int_req[IPL_HLVL];
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extern UNIT cpu_unit;
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extern int32 cpu_log;
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extern FILE *sim_log;
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uint8 *tsxb = NULL; /* xfer buffer */
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int32 tssr = 0; /* status register */
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@@ -267,8 +275,9 @@ int32 ts_ownm = 0; /* tape owns msg */
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int32 ts_qatn = 0; /* queued attn */
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int32 ts_bcmd = 0; /* boot cmd */
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int32 ts_time = 10; /* record latency */
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int32 ts_enb = TS_DF_ENB; /* device enable */
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t_stat ts_rd (int32 *data, int32 PA, int32 access);
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t_stat ts_wr (int32 data, int32 PA, int32 access);
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t_stat ts_svc (UNIT *uptr);
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t_stat ts_reset (DEVICE *dptr);
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t_stat ts_attach (UNIT *uptr, char *cptr);
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@@ -287,6 +296,8 @@ void ts_endcmd (int32 ssf, int32 xs0f, int32 msg);
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ts_mod TS modifier list
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*/
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DIB ts_dib = { TS_DF_ENB, IOBA_TS, IOLN_TS, &ts_rd, &ts_wr };
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UNIT ts_unit = { UDATA (&ts_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) };
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REG ts_reg[] = {
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@@ -315,14 +326,21 @@ REG ts_reg[] = {
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{ FLDATA (OWNC, ts_ownc, 0) },
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{ FLDATA (OWNM, ts_ownm, 0) },
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{ DRDATA (TIME, ts_time, 24), PV_LEFT + REG_NZ },
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{ DRDATA (POS, ts_unit.pos, 31), PV_LEFT + REG_RO },
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{ DRDATA (POS, ts_unit.pos, 32), PV_LEFT + REG_RO },
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{ FLDATA (WLK, ts_unit.flags, UNIT_V_WLK), REG_HRO },
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{ FLDATA (*DEVENB, ts_enb, 0), REG_HRO },
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{ GRDATA (DEVADDR, ts_dib.ba, TS_RDX, 32, 0), REG_HRO },
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{ FLDATA (*DEVENB, ts_dib.enb, 0), REG_HRO },
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{ NULL } };
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MTAB ts_mod[] = {
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{ UNIT_WLK, 0, "write enabled", "ENABLED", NULL },
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{ UNIT_WLK, 0, "write enabled", "WRITEENABLED", NULL },
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{ UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", NULL },
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{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, &ts_dib },
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{ MTAB_XTD|MTAB_VDV, 1, NULL, "ENABLED",
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&set_enbdis, NULL, &ts_dib },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "DISABLED",
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&set_enbdis, NULL, &ts_dib },
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{ 0 } };
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DEVICE ts_dev = {
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@@ -409,12 +427,13 @@ int32 ts_spacef (UNIT *uptr, int32 fc, t_bool upd)
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int32 st;
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t_mtrlnt tbc;
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do { if (st = ts_rdlntf (uptr, &tbc)) return st; /* read rec lnt */
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do { fc = (fc - 1) & DMASK; /* decr wc */
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if (upd) msgrfc = fc;
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if (st = ts_rdlntf (uptr, &tbc)) return st; /* read rec lnt */
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uptr -> pos = uptr -> pos + sizeof (t_mtrlnt); /* update pos */
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if (tbc == 0) return (XTC (XS0_TMK | XS0_RLS, TC2));
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uptr -> pos = uptr -> pos + ((MTRL (tbc) + 1) & ~1) + sizeof (t_mtrlnt);
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fc = (fc - 1) & DMASK; /* decr wc */
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if (upd) msgrfc = fc; }
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}
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while (fc != 0);
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return 0;
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}
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@@ -459,13 +478,15 @@ int32 ts_spacer (UNIT *uptr, int32 fc, t_bool upd)
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int32 st;
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t_mtrlnt tbc;
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if (upd) msgrfc = fc;
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do { if (uptr -> pos == 0) break; /* BOT? */
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fc = (fc - 1) & DMASK; /* decr wc */
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if (upd) msgrfc = fc;
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if (st = ts_rdlntr (uptr, &tbc)) return st; /* read rec lnt */
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uptr -> pos = uptr -> pos - sizeof (t_mtrlnt); /* update pos */
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if (tbc == 0) return (XTC (XS0_TMK | XS0_RLS, TC2));
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uptr -> pos = uptr -> pos - ((MTRL (tbc) + 1) & ~1) - sizeof (t_mtrlnt);
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fc = (fc - 1) & DMASK; /* decr wc */
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if (upd) msgrfc = fc; }
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}
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while (fc != 0);
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if (uptr -> pos == 0) {
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msgxs3 = msgxs3 | XS3_RIB;
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@@ -509,8 +530,8 @@ if (tbc == 0) { /* tape mark? */
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if (fc == 0) fc = 0200000; /* byte count */
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tsba = (cmdadh << 16) | cmdadl; /* buf addr */
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tbc = MTRL (tbc); /* ignore err flag */
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wbc = (tbc > TS_MAXFR)? TS_MAXFR: tbc; /* cap rec size */
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wbc = (wbc > fc)? fc: wbc; /* cap buf size */
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if (tbc > MT_MAXFR) return SCPE_MTRLNT; /* record too long? */
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wbc = (tbc > fc)? fc: tbc; /* cap buf size */
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i = fxread (tsxb, sizeof (uint8), wbc, uptr -> fileref); /* read record */
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if (ferror (uptr -> fileref)) return XTC (XS0_EOT | XS0_RLS, TC2);
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for ( ; i < wbc; i++) tsxb[i] = 0; /* fill with 0's */
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@@ -545,8 +566,8 @@ if (tbc == 0) { /* tape mark? */
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if (fc == 0) fc = 0200000; /* byte count */
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tsba = (cmdadh << 16) | cmdadl + fc; /* buf addr */
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tbc = MTRL (tbc); /* ignore err flag */
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wbc = (tbc > TS_MAXFR)? TS_MAXFR: tbc; /* cap rec size */
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wbc = (wbc > fc)? fc: wbc; /* cap buf size */
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if (tbc > MT_MAXFR) return SCPE_MTRLNT; /* record too long? */
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wbc = (tbc > fc)? fc: tbc; /* cap buf size */
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fseek (uptr -> fileref, uptr -> pos - sizeof (t_mtrlnt) - wbc, SEEK_SET);
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i = fxread (tsxb, sizeof (uint8), wbc, uptr -> fileref);
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for ( ; i < wbc; i++) tsxb[i] = 0; /* fill with 0's */
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@@ -787,6 +808,9 @@ case FNC_POS:
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break; }
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ts_cmpendcmd (st0, 0);
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break; }
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if (DBG_LOG (LOG_TS))
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fprintf (sim_log, ">>TS: cmd=%o, mod=%o, buf=%o, lnt=%d, sta=%o, tc=%o, pos=%d\n",
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fnc, mod, cmdadl, cmdlnt, msgxs0, GET_TC (tssr), ts_unit.pos);
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return SCPE_OK;
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}
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@@ -821,10 +845,12 @@ static const int32 msg[8] = {
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MSG_ACK | MSG_CERR, MSG_ACK | MSG_CERR,
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MSG_ACK | MSG_CERR, MSG_ACK | MSG_CERR };
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xs0 = GET_X (s0 | s1); /* or XS0 errs */
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ssr = GET_T (s0 | s1) & ~TSSR_TC; /* or SSR errs */
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tc = MAX (s0 & TSSR_TC, s1 & TSSR_TC); /* max term code */
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ts_endcmd (ssr | tc, xs0, msg[tc]); /* end cmd */
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xs0 = GET_X (s0) | GET_X (s1); /* or XS0 errs */
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s0 = GET_T (s0); /* get SSR errs */
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s1 = GET_T (s1);
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ssr = (s0 | s1) & ~TSSR_TC; /* or SSR errs */
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tc = MAX (GET_TC (s0), GET_TC (s1)); /* max term code */
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ts_endcmd (ssr | (tc << TSSR_V_TC), xs0, msg[tc]); /* end cmd */
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return;
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}
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@@ -857,11 +883,7 @@ return;
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t_stat ts_reset (DEVICE *dptr)
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{
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int32 i;
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#if defined (VM_PDP11)
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extern int32 tm_enb;
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if (ts_enb) tm_enb = 0; /* TM or TS */
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#endif
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ts_unit.pos = 0;
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tsba = tsdbx = 0;
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ts_ownc = ts_ownm = 0;
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@@ -873,7 +895,7 @@ for (i = 0; i < WCH_PLNT; i++) tswchp[i] = 0;
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for (i = 0; i < MSG_PLNT; i++) tsmsgp[i] = 0;
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msgxs0 = ts_updxs0 (XS0_VCK);
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CLR_INT (TS);
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if (tsxb == NULL) tsxb = calloc (TS_MAXFR, sizeof (unsigned int8));
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if (tsxb == NULL) tsxb = calloc (MT_MAXFR, sizeof (unsigned int8));
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if (tsxb == NULL) return SCPE_MEM;
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return SCPE_OK;
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}
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@@ -939,9 +961,9 @@ static const int32 boot_rom[] = {
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0005711, /* tst (r1) ; err? */
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0100421, /* bmi hlt */
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0005000, /* clr r0 */
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0012705, 0051515, /* mov #MS, r5 */
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0012704, 0001066+020, /* mov #sgnt+20, r4 */
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0005007, /* clr r7 */
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0046523, /* pad */
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0046523, /* sgnt: "SM" */
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0140004, /* pkt1: 140004, wcpk, 0, 8. */
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0001100,
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0000000,
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