diff --git a/I1401/i1401_sys.c b/I1401/i1401_sys.c
index 3b9dc881..bab227f3 100644
--- a/I1401/i1401_sys.c
+++ b/I1401/i1401_sys.c
@@ -1,6 +1,6 @@
 /* i1401_sys.c: IBM 1401 simulator interface
 
-   Copyright (c) 1993-2008, Robert M. Supnik
+   Copyright (c) 1993-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   25-Mar-12    RMS     Fixed && -> & in test (Peter Schorn)
    20-Sep-05    RMS     Revised for new code tables
    04-Jan-05    WVS     Added address argument support
    14-Nov-04    WVS     Added data printout support
diff --git a/Interdata/id_defs.h b/Interdata/id_defs.h
index 77b643dd..2afd3446 100644
--- a/Interdata/id_defs.h
+++ b/Interdata/id_defs.h
@@ -1,6 +1,6 @@
 /* id_defs.h: Interdata 16b/32b simulator definitions
 
-   Copyright (c) 2000-2010, Robert M. Supnik
+   Copyright (c) 2000-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    The author gratefully acknowledges the help of Carl Friend and Al Kossow,
    who provided key documents about the Interdata product line.
 
+   18-Apr-12    RMS     Added clock coschedule prototype
    22-May-10    RMS     Added check for 64b definitions
    09-Mar-06    RMS     Increased register sets to architectural limit
    25-Jan-04    RMS     Removed local logging support
@@ -483,4 +484,6 @@ t_stat set_dev (UNIT *uptr, int32 val, char *cptr, void *desc);
 t_stat show_sch (FILE *st, UNIT *uptr, int32 val, void *desc);
 t_stat show_dev (FILE *st, UNIT *uptr, int32 val, void *desc);
 
+int32 lfc_cosched (int32 wait);
+
 #endif
diff --git a/Interdata/id_pas.c b/Interdata/id_pas.c
index 7ce00973..dfc27ccf 100644
--- a/Interdata/id_pas.c
+++ b/Interdata/id_pas.c
@@ -25,6 +25,7 @@
 
    pas          Programmable asynchronous line adapter(s)
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    21-Mar-12    RMS     Fixed TT_GET_MODE test to use TTUF_MODE_x (Michael Bloom)
    19-Nov-08    RMS     Revised for common TMXR show routines
    18-Jun-07    RMS     Added UNIT_IDLE flag
@@ -319,7 +320,7 @@ int32 ln, c, out;
 
 if ((uptr->flags & UNIT_ATT) == 0)                      /* attached? */
     return SCPE_OK;
-sim_activate (uptr, lfc_poll);                          /* continue poll */
+sim_activate (uptr, lfc_cosched (lfc_poll));            /* continue poll */
 ln = tmxr_poll_conn (&pas_desc);                        /* look for connect */
 if (ln >= 0) {                                          /* got one? */
     if ((pasl_unit[ln].flags & UNIT_MDM) &&             /* modem control */
@@ -468,7 +469,7 @@ else {
     pasl_dev.flags = pasl_dev.flags & ~DEV_DIS;
     }
 if (pas_unit.flags & UNIT_ATT)                          /* master att? */
-    sim_activate_abs (&pas_unit, lfc_poll);             /* cosched with clock */
+    sim_activate (&pas_unit, lfc_poll);
 else sim_cancel (&pas_unit);                            /* else stop */
 for (i = 0; i < PAS_LINES; i++)
     pas_reset_ln (i);
@@ -484,7 +485,7 @@ t_stat r;
 r = tmxr_attach (&pas_desc, uptr, cptr);                /* attach */
 if (r != SCPE_OK)                                       /* error */
     return r;
-sim_activate_abs (uptr, 100);                           /* quick poll */
+sim_activate (uptr, 100);                               /* quick poll */
 return SCPE_OK;
 }
 
diff --git a/Interdata/id_tt.c b/Interdata/id_tt.c
index e56f4c7c..64bdc3f3 100644
--- a/Interdata/id_tt.c
+++ b/Interdata/id_tt.c
@@ -1,6 +1,6 @@
 /* id_tt.c: Interdata teletype
 
-   Copyright (c) 2000-2008, Robert M. Supnik
+   Copyright (c) 2000-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    tt           console
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input
    18-Oct-06    RMS     Sync keyboard to LFC clock
    30-Sep-06    RMS     Fixed handling of non-printable characters in KSR mode
@@ -183,7 +184,8 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 out, temp;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_poll));   /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_cosched (lfc_poll)));
+                                                        /* continue poll */
 tt_sta = tt_sta & ~STA_BRK;                             /* clear break */
 if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)              /* no char or error? */
     return temp;
@@ -239,7 +241,7 @@ t_stat tt_reset (DEVICE *dptr)
 {
 if (dptr->flags & DEV_DIS)                              /* dis? cancel poll */
     sim_cancel (&tt_unit[TTI]);
-else sim_activate_abs (&tt_unit[TTI], KBD_WAIT (tt_unit[TTI].wait, lfc_poll));
+else sim_activate (&tt_unit[TTI], KBD_WAIT (tt_unit[TTI].wait, lfc_poll));
 sim_cancel (&tt_unit[TTO]);                             /* cancel output */
 tt_rd = tt_fdpx = 1;                                    /* read, full duplex */
 tt_chp = 0;                                             /* no char */
diff --git a/Interdata/id_ttp.c b/Interdata/id_ttp.c
index e580d303..660fd469 100644
--- a/Interdata/id_ttp.c
+++ b/Interdata/id_ttp.c
@@ -1,6 +1,6 @@
 /* id_ttp.c: Interdata PASLA console interface
 
-   Copyright (c) 2000-2008, Robert M. Supnik
+   Copyright (c) 2000-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    ttp          console (on PAS)
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input
    18-Oct-06    RMS     Sync keyboard to LFC clock
    22-Nov-05    RMS     Revised for new terminal processing routines
@@ -179,7 +180,8 @@ t_stat ttpi_svc (UNIT *uptr)
 {
 int32 c, out;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_poll));   /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_cosched (lfc_poll)));
+                                                        /* continue poll */
 ttp_sta = ttp_sta & ~STA_FR;                            /* clear break */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
@@ -237,7 +239,7 @@ t_stat ttp_reset (DEVICE *dptr)
 {
 if (dptr->flags & DEV_DIS)
     sim_cancel (&ttp_unit[TTI]);
-else sim_activate_abs (&ttp_unit[TTI], KBD_WAIT (ttp_unit[TTI].wait, lfc_poll));
+else sim_activate (&ttp_unit[TTI], KBD_WAIT (ttp_unit[TTI].wait, lfc_poll));
 sim_cancel (&ttp_unit[TTO]);
 CLR_INT (v_TTP);                                        /* clear int */
 CLR_ENB (v_TTP);
diff --git a/Interdata/id_uvc.c b/Interdata/id_uvc.c
index d94b2a65..7ccc070a 100644
--- a/Interdata/id_uvc.c
+++ b/Interdata/id_uvc.c
@@ -1,6 +1,6 @@
 /* id_uvc.c: Interdata universal clock
 
-   Copyright (c) 2001-2008, Robert M. Supnik
+   Copyright (c) 2001-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    pic          precision incremental clock
    lfc          line frequency clock
 
+   18-Apr-12    RMS     Added lfc_cosched routine
    18-Jun-07    RMS     Added UNIT_IDLE flag
    18-Oct-06    RMS     Changed LFC to be free running, export tmr_poll
    23-Jul-05    RMS     Fixed {} error in OC
@@ -351,12 +352,22 @@ if (lfc_arm) {                                          /* armed? */
 return SCPE_OK;
 }
 
+/* Clock coscheduling routine */
+
+int32 lfc_cosched (int32 wait)
+{
+int32 t;
+
+t = sim_is_active (&lfc_unit);
+return (t? t - 1: wait);
+}
+
 /* Reset routine */
 
 t_stat lfc_reset (DEVICE *dptr)
 {
 lfc_poll = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
-sim_activate_abs (&lfc_unit, lfc_poll);                 /* init clock */
+sim_activate (&lfc_unit, lfc_poll);                     /* init clock */
 CLR_INT (v_LFC);                                        /* clear int */
 CLR_ENB (v_LFC);                                        /* disable int */
 lfc_arm = 0;                                            /* disarm int */
diff --git a/NOVA/eclipse_cpu.c b/NOVA/eclipse_cpu.c
index 50f0bfcf..2e9efc42 100644
--- a/NOVA/eclipse_cpu.c
+++ b/NOVA/eclipse_cpu.c
@@ -2,7 +2,7 @@
 
    Modified from the original NOVA simulator by Robert Supnik.
 
-   Copyright (c) 1998-2006, Charles E Owen
+   Copyright (c) 1998-2012, Charles E Owen
    Portions Copyright (c) 1993-2002, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
@@ -28,8 +28,9 @@
 
    cpu          Eclipse central processor
 
-   07-Jun-06    RMS     Fixed bug in DIVS (found by Mark Hittinger)
-   22-Sep-05    RMS     Fixed declarations (from Sterling Garwood)
+   25-Mar-12    RMS     Fixed declarations (Mark Pizzolato)
+   07-Jun-06    RMS     Fixed bug in DIVS (Mark Hittinger)
+   22-Sep-05    RMS     Fixed declarations (Sterling Garwood)
    25-Aug-05    RMS     Fixed DIVS overflow cases
    29-Nov-03    CEO     Corrected POPJ and Bit operations bugs
    26-Nov-03    CEO     Added FPU and PIT devices 
diff --git a/NOVA/nova_defs.h b/NOVA/nova_defs.h
index 1dabed0e..5f5f6ffa 100644
--- a/NOVA/nova_defs.h
+++ b/NOVA/nova_defs.h
@@ -1,6 +1,6 @@
 /* nova_defs.h: NOVA/Eclipse simulator definitions 
 
-   Copyright (c) 1993-2010, Robert M. Supnik
+   Copyright (c) 1993-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   25-Mar-12    RMS     Added missing parameters to prototypes (Mark Pizzolato)
    22-May-10    RMS     Added check for 64b definitions
    04-Jul-07    BKR     BUSY/DONE/INTR "convenience" macros added,
                         INT_TRAP added for Nova 3, 4 trap instruction handling,
diff --git a/NOVA/nova_sys.c b/NOVA/nova_sys.c
index 6411e7d5..36a4cf22 100644
--- a/NOVA/nova_sys.c
+++ b/NOVA/nova_sys.c
@@ -1,6 +1,6 @@
 /* nova_sys.c: NOVA simulator interface
 
-   Copyright (c) 1993-2008, Robert M. Supnik
+   Copyright (c) 1993-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   25-Mar-12    RMS     Fixed declaration (Mark Pizzolato)
    04-Jul-07    BKR     DEC's IOF/ION changed to DG's INTDS/INTEN mnemonic,
                         Fixed QTY/ADCV device name,
                         RDSW changed to DDG's READS mnemonic,
diff --git a/PDP10/pdp10_cpu.c b/PDP10/pdp10_cpu.c
index b73e88c0..d5c9fc10 100644
--- a/PDP10/pdp10_cpu.c
+++ b/PDP10/pdp10_cpu.c
@@ -1,6 +1,6 @@
 /* pdp10_cpu.c: PDP-10 CPU simulator
 
-   Copyright (c) 1993-2008, Robert M. Supnik
+   Copyright (c) 1993-2012, Robert M. Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,9 +25,10 @@
 
    cpu          KS10 central processor
 
+   25-Mar-12    RMS     Added missing parameters to prototypes (Mark Pizzolato)
    17-Jul-07    RMS     Fixed non-portable usage in SHOW HISTORY
    28-Apr-07    RMS     Removed clock initialization
-   22-Sep-05    RMS     Fixed declarations (from Sterling Garwood)
+   22-Sep-05    RMS     Fixed declarations (Sterling Garwood)
                         Fixed warning in MOVNI
    16-Aug-05    RMS     Fixed C++ declaration and cast problems
    10-Nov-04    RMS     Added instruction history
diff --git a/PDP10/pdp10_fe.c b/PDP10/pdp10_fe.c
index 43df088c..97cbb20d 100644
--- a/PDP10/pdp10_fe.c
+++ b/PDP10/pdp10_fe.c
@@ -1,6 +1,6 @@
 /* pdp10_fe.c: PDP-10 front end (console terminal) simulator
 
-   Copyright (c) 1993-2007, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    fe           KS10 console front end
 
+   18-Apr-12    RMS     Added clock coscheduling
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input
    17-Oct-06    RMS     Synced keyboard to clock for idling
    28-May-04    RMS     Removed SET FE CTRL-C
@@ -142,7 +143,8 @@ t_stat fei_svc (UNIT *uptr)
 {
 int32 temp;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmxr_poll));  /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));  
+                                                        /* continue poll */
 if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)              /* no char or error? */
     return temp;
 if (temp & SCPE_BREAK)                                  /* ignore break */
@@ -161,7 +163,7 @@ t_stat fe_reset (DEVICE *dptr)
 fei_unit.buf = feo_unit.buf = 0;
 M[FE_CTYIN] = M[FE_CTYOUT] = 0;
 apr_flg = apr_flg & ~(APRF_ITC | APRF_CON);
-sim_activate_abs (&fei_unit, KBD_WAIT (fei_unit.wait, tmxr_poll));
+sim_activate (&fei_unit, KBD_WAIT (fei_unit.wait, tmxr_poll));
 return SCPE_OK;
 }
 
diff --git a/PDP10/pdp10_tim.c b/PDP10/pdp10_tim.c
index 726e06f4..c15cd503 100644
--- a/PDP10/pdp10_tim.c
+++ b/PDP10/pdp10_tim.c
@@ -1,6 +1,6 @@
 /* pdp10_tim.c: PDP-10 tim subsystem simulator
 
-   Copyright (c) 1993-2008, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    tim          timer subsystem
 
+   18-Apr-12    RMS     Removed absolute scheduling on reset
    18-Jun-07    RMS     Added UNIT_IDLE flag
    03-Nov-06    RMS     Rewritten to support idling
    29-Oct-06    RMS     Added clock coscheduling function
@@ -239,7 +240,7 @@ tim_period = 0;                                         /* clear timer */
 tim_ttg = 0;
 apr_flg = apr_flg & ~APRF_TIM;                          /* clear interrupt */
 tmr_poll = sim_rtc_init (tim_unit.wait);                /* init timer */
-sim_activate_abs (&tim_unit, tmr_poll);                 /* activate unit */
+sim_activate (&tim_unit, tmr_poll);                     /* activate unit */
 tmxr_poll = tmr_poll * tim_mult;                        /* set mux poll */
 return SCPE_OK;
 }
diff --git a/PDP11/pdp11_cr.c b/PDP11/pdp11_cr.c
index d8ee8258..521f3edd 100644
--- a/PDP11/pdp11_cr.c
+++ b/PDP11/pdp11_cr.c
@@ -589,7 +589,7 @@ static t_bool readCardASCII (   FILE    *fp,
                                 char    *ccard,
                                 char    *acard    )
 {
-    int    c, col;
+    int    c = 0, col;
 
     assert (colStart < colEnd);
     assert (colStart >= 1);
diff --git a/PDP11/pdp11_dc.c b/PDP11/pdp11_dc.c
index b1def4a7..1c653fe8 100644
--- a/PDP11/pdp11_dc.c
+++ b/PDP11/pdp11_dc.c
@@ -1,6 +1,6 @@
 /* pdp11_dc.c: PDP-11 DC11 multiple terminal interface simulator
 
-   Copyright (c) 1993-2011, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    dci,dco    DC11 terminal input/output
 
+   18-Apr-2012  RMS     Modified to use clock coscheduling
    17-Aug-2011  RMS     Added AUTOCONFIGURE modifier
    19-Nov-2008  RMS     Revised for common TMXR show routines
                         Revised to autoconfigure vectors
@@ -367,7 +368,7 @@ int32 ln, c, temp;
 
 if ((uptr->flags & UNIT_ATT) == 0)                      /* attached? */
     return SCPE_OK;
-sim_activate (uptr, tmxr_poll);                         /* continue poll */
+sim_activate (uptr, clk_cosched (tmxr_poll));           /* continue poll */
 ln = tmxr_poll_conn (&dcx_desc);                        /* look for connect */
 if (ln >= 0) {                                          /* got one? */
     dcx_ldsc[ln].rcve = 1;                              /* set rcv enb */
diff --git a/PDP11/pdp11_dl.c b/PDP11/pdp11_dl.c
index aebd38f4..2caf6832 100644
--- a/PDP11/pdp11_dl.c
+++ b/PDP11/pdp11_dl.c
@@ -1,6 +1,6 @@
 /* pdp11_dl.c: PDP-11 multiple terminal interface simulator
 
-   Copyright (c) 1993-2011, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    dli,dlo      DL11 terminal input/output
 
+   18-Apr-2012  RMS     Modified to use clock coscheduling
    17-Aug-2011  RMS     Added AUTOCONFIGURE modifier
    19-Nov-2008  RMS     Revised for common TMXR show routines
                         Revised to autoconfigure vectors
@@ -330,7 +331,7 @@ int32 ln, c, temp;
 
 if ((uptr->flags & UNIT_ATT) == 0)                      /* attached? */
     return SCPE_OK;
-sim_activate (uptr, tmxr_poll);                         /* continue poll */
+sim_activate (uptr, clk_cosched (tmxr_poll));           /* continue poll */
 ln = tmxr_poll_conn (&dlx_desc);                        /* look for connect */
 if (ln >= 0) {                                          /* got one? rcv enb */
     dlx_ldsc[ln].rcve = 1;
diff --git a/PDP11/pdp11_dz.c b/PDP11/pdp11_dz.c
index bb80d7fa..5e96a6de 100644
--- a/PDP11/pdp11_dz.c
+++ b/PDP11/pdp11_dz.c
@@ -157,7 +157,7 @@ uint32 dz_rxi = 0;                                      /* rcv interrupts */
 uint32 dz_txi = 0;                                      /* xmt interrupts */
 int32 dz_mctl = 0;                                      /* modem ctrl enabled */
 int32 dz_auto = 0;                                      /* autodiscon enabled */
-TMLN dz_ldsc[DZ_MUXES * DZ_LINES] = { 0 };              /* line descriptors */
+TMLN dz_ldsc[DZ_MUXES * DZ_LINES] = { {0} };            /* line descriptors */
 TMXR dz_desc = { DZ_MUXES * DZ_LINES, 0, 0, dz_ldsc };  /* mux descriptor */
 
 /* debugging bitmaps */
@@ -435,7 +435,7 @@ if (t) {                                                /* any enabled? */
     dz_update_rcvi ();                                  /* upd rcv intr */
     tmxr_poll_tx (&dz_desc);                            /* poll output */
     dz_update_xmti ();                                  /* upd xmt intr */
-    sim_activate (uptr, tmxr_poll);                     /* reactivate */
+    sim_activate (uptr, clk_cosched (tmxr_poll));       /* reactivate */
     }
 return SCPE_OK;
 }
diff --git a/PDP11/pdp11_io_lib.c b/PDP11/pdp11_io_lib.c
index 7ca23fb9..167d5d10 100644
--- a/PDP11/pdp11_io_lib.c
+++ b/PDP11/pdp11_io_lib.c
@@ -219,7 +219,7 @@ return show_vec (st, uptr, ((mp->lines * 2) / arg), desc);
 
 void init_ubus_tab (void)
 {
-int32 i, j;
+size_t i, j;
 
 for (i = 0; i < IPL_HLVL; i++) {                        /* clear intr tab */
     for (j = 0; j < 32; j++) {
diff --git a/PDP11/pdp11_rq.c b/PDP11/pdp11_rq.c
index aa6120a1..d1201983 100644
--- a/PDP11/pdp11_rq.c
+++ b/PDP11/pdp11_rq.c
@@ -2110,6 +2110,7 @@ return rq_putpkt (cp, pkt, TRUE);
 
 t_bool rq_deqf (MSC *cp, int32 *pkt)
 {
+*pkt = 0;
 if (cp->freq == 0)                                      /* no free pkts?? */
     return rq_fatal (cp, PE_NSR);
 cp->pbsy = cp->pbsy + 1;                                /* cnt busy pkts */
@@ -2160,6 +2161,7 @@ t_bool rq_getpkt (MSC *cp, int32 *pkt)
 {
 uint32 addr, desc;
 
+*pkt = 0;
 if (!rq_getdesc (cp, &cp->cq, &desc))                   /* get cmd desc */
     return ERR;
 if ((desc & UQ_DESC_OWN) == 0) {                        /* none */
@@ -2222,6 +2224,7 @@ t_bool rq_getdesc (MSC *cp, struct uq_ring *ring, uint32 *desc)
 uint32 addr = ring->ba + ring->idx;
 uint16 d[2];
 
+*desc = 0;
 if (Map_ReadW (addr, 4, d))                             /* fetch desc */
     return rq_fatal (cp, PE_QRE);                       /* err? dead */
 *desc = ((uint32) d[0]) | (((uint32) d[1]) << 16);
diff --git a/PDP11/pdp11_stddev.c b/PDP11/pdp11_stddev.c
index d68199b3..c20a0168 100644
--- a/PDP11/pdp11_stddev.c
+++ b/PDP11/pdp11_stddev.c
@@ -1,6 +1,6 @@
 /* pdp11_stddev.c: PDP-11 standard I/O devices simulator
 
-   Copyright (c) 1993-2008, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    tti,tto      DL11 terminal input/output
    clk          KW11L (and other) line frequency clock
 
+   18-Apr-12    RMS     Modified to use clock coscheduling
    20-May-08    RMS     Standardized clock delay at 1mips
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input, clock
    29-Oct-06	RMS     Synced keyboard and clock
@@ -287,7 +288,8 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 c;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll));   /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmr_poll)));
+                                                        /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
 if (c & SCPE_BREAK)                                     /* break? */
@@ -307,7 +309,7 @@ t_stat tti_reset (DEVICE *dptr)
 tti_unit.buf = 0;
 tti_csr = 0;
 CLR_INT (TTI);
-sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
+sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
 return SCPE_OK;
 }
 
@@ -475,7 +477,7 @@ clk_tps = clk_default;                                  /* set default tps */
 clk_csr = CSR_DONE;                                     /* set done */
 CLR_INT (CLK);
 sim_rtcn_init (clk_unit.wait, TMR_CLK);                 /* init line clock */
-sim_activate_abs (&clk_unit, clk_unit.wait);            /* activate unit */
+sim_activate (&clk_unit, clk_unit.wait);                /* activate unit */
 tmr_poll = clk_unit.wait;                               /* set timer poll */
 tmxr_poll = clk_unit.wait;                              /* set mux poll */
 return SCPE_OK;
diff --git a/PDP11/pdp11_sys.c b/PDP11/pdp11_sys.c
index 98ca200b..16ca83b4 100644
--- a/PDP11/pdp11_sys.c
+++ b/PDP11/pdp11_sys.c
@@ -27,7 +27,7 @@
    15-May-08    RMS     Added KE11-A, DC11 support
                         Renamed DL11
    04-Feb-08    RMS     Modified to allow -A, -B use with 8b devices
-   25-Jan-08    RMS     Added RC11, KG11A support (John Dundas)
+   25-Jan-08    RMS     Added RC11, KG11A support from John Dundas
    10-Sep-07    RMS     Cleaned up binary loader
    20-Dec-06    RMS     Added TA11 support
    12-Nov-06    RMS     Fixed operand order in EIS instructions (W.F.J. Mueller)
diff --git a/PDP11/pdp11_ts.c b/PDP11/pdp11_ts.c
index ccad942a..11ab6f11 100644
--- a/PDP11/pdp11_ts.c
+++ b/PDP11/pdp11_ts.c
@@ -25,6 +25,7 @@
 
    ts           TS11/TSV05 magtape
 
+   19-Mar-12    RMS     Fixed declaration of cpu_opt (Mark Pizzolato)
    22-May-10    RMS     Fixed t_addr printouts for 64b big-endian systems
                         (Mark Pizzolato)
    16-Feb-06    RMS     Added tape capacity checking
diff --git a/PDP11/pdp11_tu.c b/PDP11/pdp11_tu.c
index f924ebac..9175b996 100644
--- a/PDP11/pdp11_tu.c
+++ b/PDP11/pdp11_tu.c
@@ -27,7 +27,7 @@
 
    18-Apr-11    MP      Fixed t_addr printouts for 64b big-endian systems
    17-May-07    RMS     CS1 DVA resides in device, not MBA
-   29-Apr-07    RMS     Fixed bug in setting FCE on TMK (Naoki Hamada)
+   29-Apr-07    RMS     Fixed bug in setting FCE on TMK Naoki Hamada)
    16-Feb-06    RMS     Added tape capacity checking
    12-Nov-05    RMS     Changed default formatter to TM03 (for VMS)
    31-Oct-05    RMS     Fixed address width for large files
diff --git a/PDP11/pdp11_xq.c b/PDP11/pdp11_xq.c
index 842babce..45884790 100644
--- a/PDP11/pdp11_xq.c
+++ b/PDP11/pdp11_xq.c
@@ -606,7 +606,7 @@ void xq_make_checksum(CTLR* xq)
   /* checksum calculation routine detailed in vaxboot.zip/xqbtdrivr.mar */
   uint32  checksum = 0;
   const uint32 wmask = 0xFFFF;
-  int i;
+  size_t i;
 
   for (i = 0; i < sizeof(ETH_MAC); i += 2) {
     checksum <<= 1;
@@ -685,7 +685,7 @@ t_stat xq_show_filters (FILE* st, UNIT* uptr, int32 val, void* desc)
 {
   CTLR* xq = xq_unit2ctlr(uptr);
   char  buffer[20];
-  int i;
+  size_t i;
 
   if (xq->var->mode == XQ_T_DELQA_PLUS) {
     eth_mac_fmt(&xq->var->init.phys, buffer);
@@ -2137,12 +2137,12 @@ void xq_start_receiver(CTLR* xq)
 
   /* start the read service timer or enable asynch reading as appropriate */
   if (xq->var->must_poll)
-    sim_activate(xq->unit, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
+    sim_activate(xq->unit, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
   else
     if ((xq->var->poll == 0) || (xq->var->mode == XQ_T_DELQA_PLUS))
       eth_set_async(xq->var->etherface, xq->var->coalesce_latency_ticks);
     else
-      sim_activate(xq->unit, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
+      sim_activate(xq->unit, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
 }
 
 void xq_stop_receiver(CTLR* xq)
@@ -2517,7 +2517,7 @@ t_stat xq_svc(UNIT* uptr)
 
   /* resubmit service timer */
   if ((xq->var->must_poll) || (xq->var->poll && (xq->var->mode != XQ_T_DELQA_PLUS)))
-    sim_activate(uptr, (sim_idle_enab ? tmxr_poll : (tmr_poll*clk_tps)/xq->var->poll));
+    sim_activate(uptr, (sim_idle_enab ? clk_cosched(tmxr_poll) : (tmr_poll*clk_tps)/xq->var->poll));
 
   return SCPE_OK;
 }
@@ -2803,7 +2803,7 @@ void xq_debug_setup(CTLR* xq)
 
 void xq_debug_turbo_setup(CTLR* xq)
 {
-  int i;
+  size_t i;
   char  buffer[64] = "";
 
   if (!(sim_deb && (xq->dev->dctrl & DBG_SET)))
diff --git a/PDP11/pdp11_xu.c b/PDP11/pdp11_xu.c
index 83920b7d..bf43cd84 100644
--- a/PDP11/pdp11_xu.c
+++ b/PDP11/pdp11_xu.c
@@ -105,6 +105,7 @@ extern FILE *sim_log;
 t_stat xu_rd(int32* data, int32 PA, int32 access);
 t_stat xu_wr(int32  data, int32 PA, int32 access);
 t_stat xu_svc(UNIT * uptr);
+t_stat xu_tmrsvc(UNIT * uptr);
 t_stat xu_reset (DEVICE * dptr);
 t_stat xu_attach (UNIT * uptr, char * cptr);
 t_stat xu_detach (UNIT * uptr);
@@ -132,7 +133,8 @@ DIB xua_dib = { IOBA_XU, IOLN_XU, &xu_rd, &xu_wr,
 1, IVCL (XU), VEC_XU, {&xu_int} };
 
 UNIT xua_unit[] = {
- { UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) }      /* receive timer */
+ { UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) },     /* receive timer */
+ { UDATA (&xu_tmrsvc, UNIT_IDLE|UNIT_DIS, 0) }
 };
 
 struct xu_device    xua = {
@@ -185,7 +187,7 @@ DEBTAB xu_debug[] = {
 
 DEVICE xu_dev = {
 	"XU", xua_unit, xua_reg, xu_mod,
-	1, XU_RDX, 8, 1, XU_RDX, 8,
+	2, XU_RDX, 8, 1, XU_RDX, 8,
 	&xu_ex, &xu_dep, &xu_reset,
 	NULL, &xu_attach, &xu_detach,
 	&xua_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_DEBUG,
@@ -554,8 +556,6 @@ t_stat xu_svc(UNIT* uptr)
 {
   int queue_size;
   CTLR* xu = xu_unit2ctlr(uptr);
-  const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00};
-  const int one_second = clk_tps * tmr_poll;
 
   /* First pump any queued packets into the system */
   if ((xu->var->ReadQ.count > 0) && ((xu->var->pcsr1 & PCSR1_STATE) == STATE_RUNNING))
@@ -574,30 +574,39 @@ t_stat xu_svc(UNIT* uptr)
   if ((xu->var->ReadQ.count > 0) && ((xu->var->pcsr1 & PCSR1_STATE) == STATE_RUNNING))
     xu_process_receive(xu);
 
-  /* send identity packet when timer expires */
-  if (--xu->var->idtmr <= 0) {
-    if ((xu->var->mode & MODE_DMNT) == 0)           /* if maint msg is not disabled */
-      xu_system_id(xu, mop_multicast, 0);           /*   then send ID packet */
-    xu->var->idtmr = XU_ID_TIMER_VAL * one_second;  /* reset timer */
-  }
-
-  /* has one second timer expired? if so, update stats and reset timer */
-  if (++xu->var->sectmr >= XU_SERVICE_INTERVAL) {
-    upd_stat16 (&xu->var->stats.secs, 1);
-    xu->var->sectmr = 0;
-  }
-
   /* resubmit service timer if controller not halted */
   switch (xu->var->pcsr1 & PCSR1_STATE) {
     case STATE_READY:
     case STATE_RUNNING:
-      sim_activate(&xu->unit[0], tmxr_poll);
+      sim_activate(&xu->unit[0], clk_cosched(tmxr_poll));
       break;
   };
 
   return SCPE_OK;
 }
 
+t_stat xu_tmrsvc(UNIT* uptr)
+{
+  CTLR* xu = xu_unit2ctlr(uptr);
+  const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00};
+  const int one_second = clk_tps * tmr_poll;
+
+  /* send identity packet when timer expires */
+  if (--xu->var->idtmr <= 0) {
+    if ((xu->var->mode & MODE_DMNT) == 0)           /* if maint msg is not disabled */
+      xu_system_id(xu, mop_multicast, 0);           /*   then send ID packet */
+    xu->var->idtmr = XU_ID_TIMER_VAL;               /* reset timer */
+  }
+
+  /* update stats */
+  upd_stat16 (&xu->var->stats.secs, 1);
+
+  /* resubmit service timer */
+  sim_activate(uptr, one_second);
+
+  return SCPE_OK;
+}
+
 void xu_write_callback (CTLR* xu, int status)
 {
   xu->var->write_buffer.status = status;
@@ -673,6 +682,10 @@ t_stat xu_sw_reset (CTLR* xu)
   /* activate device if not disabled */
   if ((xu->dev->flags & DEV_DIS) == 0) {
     sim_activate_abs(&xu->unit[0], clk_cosched (tmxr_poll));
+
+    /* start service timer */
+    if (xu->var->etherface)
+      sim_activate_abs(&xu->unit[1], tmr_poll * clk_tps);
   }
 
   /* clear load_server address */
diff --git a/PDP18B/pdp18b_defs.h b/PDP18B/pdp18b_defs.h
index eef82cf6..9a997886 100644
--- a/PDP18B/pdp18b_defs.h
+++ b/PDP18B/pdp18b_defs.h
@@ -1,6 +1,6 @@
 /* pdp18b_defs.h: 18b PDP simulator definitions
 
-   Copyright (c) 1993-2010, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   18-Apr-12    RMS     Added clk_cosched prototype
    22-May-10    RMS     Added check for 64b definitions
    30-Oct-06    RMS     Added infinite loop stop
    14-Jan-04    RMS     Revised IO device call interface
@@ -495,4 +496,6 @@ typedef struct {
 t_stat set_devno (UNIT *uptr, int32 val, char *cptr, void *desc);
 t_stat show_devno (FILE *st, UNIT *uptr, int32 val, void *desc);
 
+int32 clk_cosched (int32 wait);
+
 #endif
diff --git a/PDP18B/pdp18b_stddev.c b/PDP18B/pdp18b_stddev.c
index c2e5c827..966b6dd1 100644
--- a/PDP18B/pdp18b_stddev.c
+++ b/PDP18B/pdp18b_stddev.c
@@ -1,6 +1,6 @@
 /* pdp18b_stddev.c: 18b PDP's standard devices
 
-   Copyright (c) 1993-2008, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,8 @@
    tto          teleprinter
    clk          clock
 
+   18-Apr-12    RMS     Added clk_cosched routine
+                        Revised clk and tti scheduling
    18-Jun-07    RMS     Added UNIT_IDLE to console input, clock
    18-Oct-06    RMS     Added PDP-15 programmable duplex control
                         Fixed handling of non-printable characters in KSR mode
@@ -477,6 +479,16 @@ int32 clk_iors (void)
 return (TST_INT (CLK)? IOS_CLK: 0);
 }
 
+/* Clock coscheduling routine */
+
+int32 clk_cosched (int32 wait)
+{
+int32 t;
+
+t = sim_is_active (&clk_unit);
+return (t? t - 1: wait);
+}
+
 /* Reset routine */
 
 t_stat clk_reset (DEVICE *dptr)
@@ -1002,7 +1014,8 @@ t_stat tti_svc (UNIT *uptr)
 #if defined (KSR28)                                     /* Baudot... */
 int32 in, c, out;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmxr_poll));  /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
+                                                        /* continue poll */
 if (tti_2nd) {                                          /* char waiting? */
     uptr->buf = tti_2nd;                                /* return char */
     tti_2nd = 0;                                        /* not waiting */
@@ -1037,7 +1050,8 @@ else {
 #else                                                   /* ASCII... */
 int32 c, out;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmxr_poll));  /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
+                                                        /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
 out = c & 0177;                                         /* mask echo to 7b */
@@ -1068,12 +1082,14 @@ return (TST_INT (TTI)? IOS_TTI: 0);
 
 t_stat tti_reset (DEVICE *dptr)
 {
-tti_unit.buf = 0;                                       /* clear buffer */
-tti_2nd = 0;
-tty_shift = 0;                                          /* clear state */
-tti_fdpx = 0;                                           /* clear dpx mode */
 CLR_INT (TTI);                                          /* clear flag */
-sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmxr_poll));
+if (!sim_is_running) {                                  /* RESET (not CAF)? */
+    tti_unit.buf = 0;                                   /* clear buffer */
+    tti_2nd = 0;
+    tty_shift = 0;                                      /* clear state */
+    tti_fdpx = 0;                                       /* clear dpx mode */
+    }
+sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmxr_poll));
 return SCPE_OK;
 }
 
diff --git a/PDP18B/pdp18b_tt1.c b/PDP18B/pdp18b_tt1.c
index 300830d5..fdc5ac22 100644
--- a/PDP18B/pdp18b_tt1.c
+++ b/PDP18B/pdp18b_tt1.c
@@ -1,6 +1,6 @@
 /* pdp18b_ttx.c: PDP-9/15 additional terminals simulator
 
-   Copyright (c) 1993-2008, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    ttix,ttox    LT15/LT19 terminal input/output
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    19-Nov-08    RMS     Revised for common TMXR show routines
    18-Jun-07    RMS     Added UNIT_IDLE flag
    30-Sep-06    RMS     Fixed handling of non-printable characters in KSR mode
@@ -214,7 +215,7 @@ int32 ln, c, temp;
 
 if ((uptr->flags & UNIT_ATT) == 0)                      /* attached? */
     return SCPE_OK;
-sim_activate (uptr, tmxr_poll);                         /* continue poll */
+sim_activate (uptr, clk_cosched (tmxr_poll));           /* continue poll */
 ln = tmxr_poll_conn (&ttx_desc);                        /* look for connect */
 if (ln >= 0)                                            /* got one? rcv enab */
     ttx_ldsc[ln].rcve = 1;
diff --git a/PDP8/pdp8_clk.c b/PDP8/pdp8_clk.c
index f19d982d..968ac229 100644
--- a/PDP8/pdp8_clk.c
+++ b/PDP8/pdp8_clk.c
@@ -1,6 +1,6 @@
 /* pdp8_clk.c: PDP-8 real-time clock simulator
 
-   Copyright (c) 1993-2011, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    clk          real time clock
 
+   18-Apr-12    RMS     Added clock coscheduling
    18-Jun-07    RMS     Added UNIT_IDLE flag
    01-Mar-03    RMS     Aded SET/SHOW CLK FREQ support
    04-Oct-02    RMS     Added DIB, device number support
@@ -43,6 +44,8 @@ extern int32 int_req, int_enable, dev_done, stop_inst;
 int32 clk_tps = 60;                                     /* ticks/second */
 int32 tmxr_poll = 16000;                                /* term mux poll */
 
+extern int32 sim_is_running;
+
 int32 clk (int32 IR, int32 AC);
 t_stat clk_svc (UNIT *uptr);
 t_stat clk_reset (DEVICE *dptr);
@@ -150,6 +153,16 @@ tmxr_poll = t;                                          /* set mux poll */
 return SCPE_OK;
 }
 
+/* Clock coscheduling routine */
+
+int32 clk_cosched (int32 wait)
+{
+int32 t;
+
+t = sim_is_active (&clk_unit);
+return (t? t - 1: wait);
+}
+
 /* Reset routine */
 
 t_stat clk_reset (DEVICE *dptr)
@@ -159,9 +172,11 @@ int32 t;
 dev_done = dev_done & ~INT_CLK;                         /* clear done, int */
 int_req = int_req & ~INT_CLK;
 int_enable = int_enable & ~INT_CLK;                     /* clear enable */
-t = sim_rtcn_init (clk_unit.wait, TMR_CLK);
-sim_activate_abs (&clk_unit, t);                        /* activate unit */
-tmxr_poll = t;
+if (!sim_is_running) {                                  /* RESET (not CAF)? */
+    t = sim_rtcn_init (clk_unit.wait, TMR_CLK);
+    sim_activate (&clk_unit, t);                        /* activate unit */
+    tmxr_poll = t;
+    }
 return SCPE_OK;
 }
 
diff --git a/PDP8/pdp8_defs.h b/PDP8/pdp8_defs.h
index 1cebab76..5d2ee547 100644
--- a/PDP8/pdp8_defs.h
+++ b/PDP8/pdp8_defs.h
@@ -1,6 +1,6 @@
 /* pdp8_defs.h: PDP-8 simulator definitions
 
-   Copyright (c) 1993-2010, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,8 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   18-Apr-12    RMS     Removed separate timer for additional terminals;
+                        added clock_cosched prototype
    22-May-10    RMS     Added check for 64b definitions
    21-Aug-07    RMS     Added FPP8 support
    13-Dec-06    RMS     Added TA8E support
@@ -78,7 +80,6 @@
 /* Timers */
 
 #define TMR_CLK         0                               /* timer 0 = clock */
-#define TMR_TTX         1                               /* timer 1 = TTx */
 
 /* Device information block */
 
@@ -209,4 +210,6 @@ typedef struct {
 t_stat set_dev (UNIT *uptr, int32 val, char *cptr, void *desc);
 t_stat show_dev (FILE *st, UNIT *uptr, int32 val, void *desc);
 
+int32 clk_cosched (int32 wait);
+
 #endif
diff --git a/PDP8/pdp8_tt.c b/PDP8/pdp8_tt.c
index 8ae9b168..9f39b5d1 100644
--- a/PDP8/pdp8_tt.c
+++ b/PDP8/pdp8_tt.c
@@ -1,6 +1,6 @@
 /* pdp8_tt.c: PDP-8 console terminal simulator
 
-   Copyright (c) 1993-2011, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    tti,tto      KL8E terminal input/output
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input
    18-Oct-06    RMS     Synced keyboard to clock
    30-Sep-06    RMS     Fixed handling of non-printable characters in KSR mode
@@ -44,7 +45,7 @@
 #include <ctype.h>
 
 extern int32 int_req, int_enable, dev_done, stop_inst;
-extern int32 tmxr_poll;
+extern int32 tmxr_poll, sim_is_running;
 
 int32 tti (int32 IR, int32 AC);
 int32 tto (int32 IR, int32 AC);
@@ -175,7 +176,8 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 c;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmxr_poll));  /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
+                                                        /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
 if (c & SCPE_BREAK)                                     /* break? */
@@ -195,7 +197,8 @@ tti_unit.buf = 0;
 dev_done = dev_done & ~INT_TTI;                         /* clear done, int */
 int_req = int_req & ~INT_TTI;
 int_enable = int_enable | INT_TTI;                      /* set enable */
-sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmxr_poll));
+if (!sim_is_running)                                    /* RESET (not CAF)? */
+    sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmxr_poll));
 return SCPE_OK;
 }
 
diff --git a/PDP8/pdp8_ttx.c b/PDP8/pdp8_ttx.c
index 8c0ca6ed..0956178c 100644
--- a/PDP8/pdp8_ttx.c
+++ b/PDP8/pdp8_ttx.c
@@ -1,6 +1,6 @@
 /* pdp8_ttx.c: PDP-8 additional terminals simulator
 
-   Copyright (c) 1993-2011, Robert M Supnik
+   Copyright (c) 1993-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    ttix,ttox    PT08/KL8JA terminal input/output
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    19-Nov-08    RMS     Revised for common TMXR show routines
    07-Jun-06    RMS     Added UNIT_IDLE flag
    06-Jul-06    RMS     Fixed bug in DETACH routine
@@ -60,6 +61,7 @@
 #define TTX_GETLN(x)    (((x) >> 4) & TTX_MASK)
 
 extern int32 int_req, int_enable, dev_done, stop_inst;
+extern int32 tmxr_poll, sim_is_running;
 
 uint8 ttix_buf[TTX_LINES] = { 0 };                      /* input buffers */
 uint8 ttox_buf[TTX_LINES] = { 0 };                      /* output buffers */
@@ -224,8 +226,7 @@ int32 ln, c, temp;
 
 if ((uptr->flags & UNIT_ATT) == 0)                      /* attached? */
     return SCPE_OK;
-temp = sim_rtcn_calb (ttx_tps, TMR_TTX);                /* calibrate */
-sim_activate (uptr, temp);                              /* continue poll */
+sim_activate (uptr, clk_cosched (tmxr_poll));           /* continue poll */
 ln = tmxr_poll_conn (&ttx_desc);                        /* look for connect */
 if (ln >= 0)                                            /* got one? rcv enb*/
     ttx_ldsc[ln].rcve = 1;
@@ -249,15 +250,11 @@ return SCPE_OK;
 
 t_stat ttix_reset (DEVICE *dptr)
 {
-int32 t, ln, itto;
+int32 ln, itto;
 
 ttx_enbdis (dptr->flags & DEV_DIS);                     /* sync enables */
-if (ttix_unit.flags & UNIT_ATT) {                       /* if attached, */
-    if (!sim_is_active (&ttix_unit)) {
-        t = sim_rtcn_init (ttix_unit.wait, TMR_TTX);
-        sim_activate (&ttix_unit, t);                   /* activate */
-        }
-    }
+if (ttix_unit.flags & UNIT_ATT)                         /* if attached, */
+    sim_activate (&ttix_unit, tmxr_poll);               /* activate */
 else sim_cancel (&ttix_unit);                           /* else stop */
 for (ln = 0; ln < TTX_LINES; ln++) {                    /* for all lines */
     ttix_buf[ln] = 0;                                   /* clear buf, */
@@ -358,14 +355,12 @@ return SCPE_OK;
 
 t_stat ttx_attach (UNIT *uptr, char *cptr)
 {
-int32 t;
 t_stat r;
 
 r = tmxr_attach (&ttx_desc, uptr, cptr);                /* attach */
 if (r != SCPE_OK)                                       /* error */
     return r;
-t = sim_rtcn_init (ttix_unit.wait, TMR_TTX);            /* init calib */
-sim_activate (uptr, t);                                 /* start poll */
+sim_activate (uptr, tmxr_poll);                         /* start poll */
 return SCPE_OK;
 }
 
diff --git a/VAX/vax780_stddev.c b/VAX/vax780_stddev.c
index 84245806..ec576050 100644
--- a/VAX/vax780_stddev.c
+++ b/VAX/vax780_stddev.c
@@ -1,6 +1,6 @@
 /* vax780_stddev.c: VAX 11/780 standard I/O devices
 
-   Copyright (c) 1998-2011, Robert M Supnik
+   Copyright (c) 1998-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,7 @@
    todr         TODR clock
    tmr          interval timer
 
+   18-Apr-12    RMS     Revised to use clock coscheduling
    28-Sep-11    MP      Generalized setting TODR for all OSes.  
                         Unbound the TODR value from the 100hz clock tick 
                         interrupt.  TODR now behaves like the original 
@@ -461,7 +462,8 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 c;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll));   /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmr_poll)));
+                                                        /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
 if (c & SCPE_BREAK)                                     /* break? */
@@ -481,7 +483,7 @@ t_stat tti_reset (DEVICE *dptr)
 tti_buf = 0;
 tti_csr = 0;
 tti_int = 0;
-sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
+sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
 return SCPE_OK;
 }
 
@@ -679,7 +681,7 @@ return (t? t - 1: wait);
 t_stat clk_reset (DEVICE *dptr)
 {
 tmr_poll = sim_rtcn_init (clk_unit.wait, TMR_CLK);      /* init 100Hz timer */
-sim_activate_abs (&clk_unit, tmr_poll);                 /* activate 100Hz unit */
+sim_activate (&clk_unit, tmr_poll);                     /* activate 100Hz unit */
 tmxr_poll = tmr_poll * TMXR_MULT;                       /* set mux poll */
 if (clk_unit.filebuf == NULL) {                         /* make sure the TODR is initialized */
     clk_unit.filebuf = calloc(sizeof(TOY), 1);
diff --git a/VAX/vax780_uba.c b/VAX/vax780_uba.c
index 245e8a22..bb6105fe 100644
--- a/VAX/vax780_uba.c
+++ b/VAX/vax780_uba.c
@@ -1,6 +1,6 @@
 /* vax780_uba.c: VAX 11/780 Unibus adapter
 
-   Copyright (c) 2004-2008, Robert M Supnik
+   Copyright (c) 2004-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    uba                  DW780 Unibus adapter
 
+   25-Mar-12    RMS     Added parameter to int_ack prototype (Mark Pizzolata)
    19-Nov-08    RMS     Moved I/O support routines to I/O library
    28-May-08    RMS     Inlined physical memory routines
    25-Jan-08    RMS     Fixed declarations (Mark Pizzolato)
diff --git a/VAX/vax_cpu.c b/VAX/vax_cpu.c
index dcf712f5..7614cd00 100644
--- a/VAX/vax_cpu.c
+++ b/VAX/vax_cpu.c
@@ -1,6 +1,6 @@
 /* vax_cpu.c: VAX CPU
 
-   Copyright (c) 1998-2011, Robert M Supnik
+   Copyright (c) 1998-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
diff --git a/VAX/vax_cpu1.c b/VAX/vax_cpu1.c
index cb91fa54..d4e3ea32 100644
--- a/VAX/vax_cpu1.c
+++ b/VAX/vax_cpu1.c
@@ -1521,6 +1521,7 @@ switch (prn) {                                          /* case on reg # */
     case MT_IPL:                                        /* IPL */
         PSL = (PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL);
         if ((VAX_IDLE_BSDNEW & cpu_idle_mask) &&        /* New NetBSD and OpenBSD */
+            (0 != (PC & 0x80000000)) &&                 /* System Space (Not BOOT ROM) */
             (val == 1))                                 /* IPL 1 */
             cpu_idle();                                 /* idle loop */
         break;
diff --git a/VAX/vax_fpa.c b/VAX/vax_fpa.c
index 7b789cb5..1b15c179 100644
--- a/VAX/vax_fpa.c
+++ b/VAX/vax_fpa.c
@@ -1,6 +1,6 @@
 /* vax_fpa.c - VAX f_, d_, g_floating instructions
 
-   Copyright (c) 1998-2011, Robert M Supnik
+   Copyright (c) 1998-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
diff --git a/VAX/vax_io.c b/VAX/vax_io.c
index 48a2da35..8d6baab0 100644
--- a/VAX/vax_io.c
+++ b/VAX/vax_io.c
@@ -1,6 +1,6 @@
 /* vax_io.c: VAX 3900 Qbus IO simulator
 
-   Copyright (c) 1998-2008, Robert M Supnik
+   Copyright (c) 1998-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    qba          Qbus adapter
 
+   25-Mar-12    RMS     Added parameter to int_ack prototype (Mark Pizzolata)
    28-May-08    RMS     Inlined physical memory routines
    25-Jan-08    RMS     Fixed declarations (Mark Pizzolato)
    03-Dec-05    RMS     Added SHOW QBA VIRT and ex/dep via map
diff --git a/VAX/vax_mmu.c b/VAX/vax_mmu.c
index 177b61e8..79175c41 100644
--- a/VAX/vax_mmu.c
+++ b/VAX/vax_mmu.c
@@ -536,7 +536,7 @@ return;
 
 void zap_tb (int stb)
 {
-int32 i;
+size_t i;
 
 for (i = 0; i < VA_TBSIZE; i++) {
     ptlb[i].tag = ptlb[i].pte = -1;
@@ -577,7 +577,7 @@ return FALSE;
 t_stat tlb_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
 {
 int32 tlbn = uptr - tlb_unit;
-int32 idx = (uint32) addr >> 1;
+uint32 idx = (uint32) addr >> 1;
 
 if (idx >= VA_TBSIZE)
     return SCPE_NXM;
@@ -592,7 +592,7 @@ return SCPE_OK;
 t_stat tlb_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
 {
 int32 tlbn = uptr - tlb_unit;
-int32 idx = (uint32) addr >> 1;
+uint32 idx = (uint32) addr >> 1;
 
 if (idx >= VA_TBSIZE)
     return SCPE_NXM;
@@ -611,7 +611,7 @@ return SCPE_OK;
 
 t_stat tlb_reset (DEVICE *dptr)
 {
-int32 i;
+size_t i;
 
 for (i = 0; i < VA_TBSIZE; i++)
     stlb[i].tag = ptlb[i].tag = stlb[i].pte = ptlb[i].pte = -1;
diff --git a/VAX/vax_stddev.c b/VAX/vax_stddev.c
index 204be3fe..2d98e3f7 100644
--- a/VAX/vax_stddev.c
+++ b/VAX/vax_stddev.c
@@ -1,6 +1,6 @@
 /* vax_stddev.c: VAX 3900 standard I/O devices
 
-   Copyright (c) 1998-2008, Robert M Supnik
+   Copyright (c) 1998-2012, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -27,6 +27,8 @@
    tto          terminal output
    clk          100Hz and TODR clock
 
+   18-Apr-12    RMS     Revised TTI to use clock coscheduling and
+                        remove IORESET bug
    13-Jan-12    MP      Normalized the saved format of the TODR persistent 
                         file so that it may be moved around from one platform
                         to another along with other simulator state files 
@@ -92,7 +94,7 @@
 
 extern int32 int_req[IPL_HLVL];
 extern int32 hlt_pin;
-extern int32 sim_switches;
+extern int32 sim_switches, sim_is_running;
 
 int32 tti_csr = 0;                                      /* control/status */
 int32 tto_csr = 0;                                      /* control/status */
@@ -319,7 +321,8 @@ t_stat tti_svc (UNIT *uptr)
 {
 int32 c;
 
-sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll));   /* continue poll */
+sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmr_poll)));
+                                                        /* continue poll */
 if ((c = sim_poll_kbd ()) < SCPE_KFLAG)                 /* no char or error? */
     return c;
 if (c & SCPE_BREAK) {                                   /* break? */
@@ -340,7 +343,7 @@ t_stat tti_reset (DEVICE *dptr)
 tti_unit.buf = 0;
 tti_csr = 0;
 CLR_INT (TTI);
-sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
+sim_activate (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
 return SCPE_OK;
 }
 
@@ -496,10 +499,12 @@ int32 t;
 
 clk_csr = 0;
 CLR_INT (CLK);
-t = sim_rtcn_init (clk_unit.wait, TMR_CLK);             /* init timer */
-sim_activate_abs (&clk_unit, t);                        /* activate unit */
-tmr_poll = t;                                           /* set tmr poll */
-tmxr_poll = t * TMXR_MULT;                              /* set mux poll */
+if (!sim_is_running) {                                  /* RESET (not IORESET)? */
+    t = sim_rtcn_init (clk_unit.wait, TMR_CLK);         /* init timer */
+    sim_activate (&clk_unit, t);                        /* activate unit */
+    tmr_poll = t;                                       /* set tmr poll */
+    tmxr_poll = t * TMXR_MULT;                          /* set mux poll */
+    }
 if (clk_unit.filebuf == NULL) {                         /* make sure the TODR is initialized */
     clk_unit.filebuf = calloc(sizeof(TOY), 1);
     if (clk_unit.filebuf == NULL)
diff --git a/VAX/vax_sys.c b/VAX/vax_sys.c
index 149f67d9..f33b2edd 100644
--- a/VAX/vax_sys.c
+++ b/VAX/vax_sys.c
@@ -115,518 +115,518 @@ const char *sim_stop_messages[] = {
  */
 
 const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
-0,      0,      0,      0,      0,      0,      0,              /* HALT */
-0,      0,      0,      0,      0,      0,      0,              /* NOP */
-0,      0,      0,      0,      0,      0,      0,              /* REI */
-0,      0,      0,      0,      0,      0,      0,              /* BPT */
-0,      0,      0,      0,      0,      0,      0,              /* RET */
-0,      0,      0,      0,      0,      0,      0,              /* RSB */
-0,      0,      0,      0,      0,      0,      0,              /* LDPCTX */
-0,      0,      0,      0,      0,      0,      0,              /* SVPCTX */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* CVTPS */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* CVTSP */
-6,      RL,     RL,     RL,     RL,     RL,     WL,             /* INDEX */
-4+DR_F, AB,     RL,     RW,     AB,     0,      0,              /* CRC */
-3,      RB,     RW,     AB,     0,      0,      0,              /* PROBER */
-3,      RB,     RW,     AB,     0,      0,      0,              /* PROBEW */
-2,      AB,     AB,     0,      0,      0,      0,              /* INSQUE */
-2,      AB,     WL,     0,      0,      0,      0,              /* REMQUE */
-1,      BB,     0,      0,      0,      0,      0,              /* BSBB */
-1,      BB,     0,      0,      0,      0,      0,              /* BRB */
-1,      BB,     0,      0,      0,      0,      0,              /* BNEQ */
-1,      BB,     0,      0,      0,      0,      0,              /* BEQL */
-1,      BB,     0,      0,      0,      0,      0,              /* BGTR */
-1,      BB,     0,      0,      0,      0,      0,              /* BLEQ */
-1,      AB,     0,      0,      0,      0,      0,              /* JSB */
-1,      AB,     0,      0,      0,      0,      0,              /* JMP */
-1,      BB,     0,      0,      0,      0,      0,              /* BGEQ */
-1,      BB,     0,      0,      0,      0,      0,              /* BLSS */
-1,      BB,     0,      0,      0,      0,      0,              /* BGTRU */
-1,      BB,     0,      0,      0,      0,      0,              /* BLEQU */
-1,      BB,     0,      0,      0,      0,      0,              /* BVC */
-1,      BB,     0,      0,      0,      0,      0,              /* BVS */
-1,      BB,     0,      0,      0,      0,      0,              /* BCC */
-1,      BB,     0,      0,      0,      0,      0,              /* BCS */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* ADDP4 */
-6+DR_F, RW,     AB,     RW,     AB,     RW,     AB,             /* ADDP6 */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* SUBP4 */
-6+DR_F, RW,     AB,     RW,     AB,     RW,     AB,             /* SUBP6 */
-5+DR_F, RW,     AB,     AB,     RW,     AB,     0,              /* CVTPT */
-6+DR_F, RW,     AB,     RW,     AB,     RW,     AB,             /* MULP6 */
-5+DR_F, RW,     AB,     AB,     RW,     AB,     0,              /* CVTTP */
-6+DR_F, RW,     AB,     RW,     AB,     RW,     AB,             /* DIVP6 */
-3+DR_F, RW,     AB,     AB,     0,      0,      0,              /* MOVC3 */
-3+DR_F, RW,     AB,     AB,     0,      0,      0,              /* CMPC3 */
-4+DR_F, RW,     AB,     AB,     RB,     0,      0,              /* SCANC */
-4+DR_F, RW,     AB,     AB,     RB,     0,      0,              /* SPANC */
-5+DR_F, RW,     AB,     RB,     RW,     AB,     0,              /* MOVC5 */
-5+DR_F, RW,     AB,     RB,     RW,     AB,     0,              /* CMPC5 */
-6+DR_F, RW,     AB,     RB,     AB,     RW,     AB,             /* MOVTC */
-6+DR_F, RW,     AB,     RB,     AB,     RW,     AB,             /* MOVTUC */
-1,      BW,     0,      0,      0,      0,      0,              /* BSBW */
-1,      BW,     0,      0,      0,      0,      0,              /* BRW */
-2,      RW,     WL,     0,      0,      0,      0,              /* CVTWL */
-2,      RW,     WB,     0,      0,      0,      0,              /* CVTWB */
-3+DR_F, RW,     AB,     AB,     0,      0,      0,              /* MOVP */
-3+DR_F, RW,     AB,     AB,     0,      0,      0,              /* CMPP3 */
-3+DR_F, RW,     AB,     WL,     0,      0,      0,              /* CVTPL */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* CMPP4 */
-4+DR_F, RW,     AB,     AB,     AB,     0,      0,              /* EDITPC */
-4+DR_F, RW,     AB,     RW,     AB,     0,      0,              /* MATCHC */
-3+DR_F, RB,     RW,     AB,     0,      0,      0,              /* LOCC */
-3+DR_F, RB,     RW,     AB,     0,      0,      0,              /* SKPC */
-2,      RW,     WL,     0,      0,      0,      0,              /* MOVZWL */
-4,      RW,     RW,     MW,     BW,     0,      0,              /* ACBW */
-2,      AW,     WL,     0,      0,      0,      0,              /* MOVAW */
-1,      AW,     0,      0,      0,      0,      0,              /* PUSHAW */
-2,      RF,     ML,     0,      0,      0,      0,              /* ADDF2 */
-3,      RF,     RF,     WL,     0,      0,      0,              /* ADDF3 */
-2,      RF,     ML,     0,      0,      0,      0,              /* SUBF2 */
-3,      RF,     RF,     WL,     0,      0,      0,              /* SUBF3 */
-2,      RF,     ML,     0,      0,      0,      0,              /* MULF2 */
-3,      RF,     RF,     WL,     0,      0,      0,              /* MULF3 */
-2,      RF,     ML,     0,      0,      0,      0,              /* DIVF2 */
-3,      RF,     RF,     WL,     0,      0,      0,              /* DIVF3 */
-2,      RF,     WB,     0,      0,      0,      0,              /* CVTFB */
-2,      RF,     WW,     0,      0,      0,      0,              /* CVTFW */
-2,      RF,     WL,     0,      0,      0,      0,              /* CVTFL */
-2,      RF,     WL,     0,      0,      0,      0,              /* CVTRFL */
-2,      RB,     WL,     0,      0,      0,      0,              /* CVTBF */
-2,      RW,     WL,     0,      0,      0,      0,              /* CVTWF */
-2,      RL,     WL,     0,      0,      0,      0,              /* CVTLF */
-4,      RF,     RF,     ML,     BW,     0,      0,              /* ACBF */
-2,      RF,     WL,     0,      0,      0,      0,              /* MOVF */
-2,      RF,     RF,     0,      0,      0,      0,              /* CMPF */
-2,      RF,     WL,     0,      0,      0,      0,              /* MNEGF */
-1,      RF,     0,      0,      0,      0,      0,              /* TSTF */
-5,      RF,     RB,     RF,     WL,     WL,     0,              /* EMODF */
-3,      RF,     RW,     AB,     0,      0,      0,              /* POLYF */
-2,      RF,     WQ,     0,      0,      0,      0,              /* CVTFD */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-2,      RW,     WW,     0,      0,      0,      0,              /* ADAWI */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-2,      AB,     AQ,     0,      0,      0,      0,              /* INSQHI */
-2,      AB,     AQ,     0,      0,      0,      0,              /* INSQTI */
-2,      AQ,     WL,     0,      0,      0,      0,              /* REMQHI */
-2,      AQ,     WL,     0,      0,      0,      0,              /* REMQTI */
-2,      RD,     MQ,     0,      0,      0,      0,              /* ADDD2 */
-3,      RD,     RD,     WQ,     0,      0,      0,              /* ADDD3 */
-2,      RD,     MQ,     0,      0,      0,      0,              /* SUBD2 */
-3,      RD,     RD,     WQ,     0,      0,      0,              /* SUBD3 */
-2,      RD,     MQ,     0,      0,      0,      0,              /* MULD2 */
-3,      RD,     RD,     WQ,     0,      0,      0,              /* MULD3 */
-2,      RD,     MQ,     0,      0,      0,      0,              /* DIVD2 */
-3,      RD,     RD,     WQ,     0,      0,      0,              /* DIVD3 */
-2,      RD,     WB,     0,      0,      0,      0,              /* CVTDB */
-2,      RD,     WW,     0,      0,      0,      0,              /* CVTDW */
-2,      RD,     WL,     0,      0,      0,      0,              /* CVTDL */
-2,      RD,     WL,     0,      0,      0,      0,              /* CVTRDL */
-2,      RB,     WQ,     0,      0,      0,      0,              /* CVTBD */
-2,      RW,     WQ,     0,      0,      0,      0,              /* CVTWD */
-2,      RL,     WQ,     0,      0,      0,      0,              /* CVTLD */
-4,      RD,     RD,     MQ,     BW,     0,      0,              /* ACBD */
-2,      RD,     WQ,     0,      0,      0,      0,              /* MOVD */
-2,      RD,     RD,     0,      0,      0,      0,              /* CMPD */
-2,      RD,     WQ,     0,      0,      0,      0,              /* MNEGD */
-1,      RD,     0,      0,      0,      0,      0,              /* TSTD */
-5,      RD,     RB,     RD,     WL,     WQ,     0,              /* EMODD */
-3,      RD,     RW,     AB,     0,      0,      0,              /* POLYD */
-2,      RD,     WL,     0,      0,      0,      0,              /* CVTDF */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-3,      RB,     RL,     WL,     0,      0,      0,              /* ASHL */
-3,      RB,     RQ,     WQ,     0,      0,      0,              /* ASHQ */
-4,      RL,     RL,     RL,     WQ,     0,      0,              /* EMUL */
-4,      RL,     RQ,     WL,     WL,     0,      0,              /* EDIV */
-1,      WQ,     0,      0,      0,      0,      0,              /* CLRQ */
-2,      RQ,     WQ,     0,      0,      0,      0,              /* MOVQ */
-2,      AQ,     WL,     0,      0,      0,      0,              /* MOVAQ */
-1,      AQ,     0,      0,      0,      0,      0,              /* PUSHAQ */
-2,      RB,     MB,     0,      0,      0,      0,              /* ADDB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* ADDB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* SUBB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* SUBB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* MULB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* MULB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* DIVB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* DIVB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* BISB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* BISB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* BICB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* BICB3 */
-2,      RB,     MB,     0,      0,      0,      0,              /* XORB2 */
-3,      RB,     RB,     WB,     0,      0,      0,              /* XORB3 */
-2,      RB,     WB,     0,      0,      0,      0,              /* MNEGB */
-3,      RB,     RB,     RB,     0,      0,      0,              /* CASEB */
-2,      RB,     WB,     0,      0,      0,      0,              /* MOVB */
-2,      RB,     RB,     0,      0,      0,      0,              /* CMPB */
-2,      RB,     WB,     0,      0,      0,      0,              /* MCOMB */
-2,      RB,     RB,     0,      0,      0,      0,              /* BITB */
-1,      WB,     0,      0,      0,      0,      0,              /* CLRB */
-1,      RB,     0,      0,      0,      0,      0,              /* TSTB */
-1,      MB,     0,      0,      0,      0,      0,              /* INCB */
-1,      MB,     0,      0,      0,      0,      0,              /* DECB */
-2,      RB,     WL,     0,      0,      0,      0,              /* CVTBL */
-2,      RB,     WW,     0,      0,      0,      0,              /* CVTBW */
-2,      RB,     WL,     0,      0,      0,      0,              /* MOVZBL */
-2,      RB,     WW,     0,      0,      0,      0,              /* MOVZBW */
-3,      RB,     RL,     WL,     0,      0,      0,              /* ROTL */
-4,      RB,     RB,     MB,     BW,     0,      0,              /* ACBB */
-2,      AB,     WL,     0,      0,      0,      0,              /* MOVAB */
-1,      AB,     0,      0,      0,      0,      0,              /* PUSHAB */
-2,      RW,     MW,     0,      0,      0,      0,              /* ADDW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* ADDW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* SUBW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* SUBW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* MULW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* MULW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* DIVW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* DIVW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* BISW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* BISW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* BICW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* BICW3 */
-2,      RW,     MW,     0,      0,      0,      0,              /* XORW2 */
-3,      RW,     RW,     WW,     0,      0,      0,              /* XORW3 */
-2,      RW,     WW,     0,      0,      0,      0,              /* MNEGW */
-3,      RW,     RW,     RW,     0,      0,      0,              /* CASEW */
-2,      RW,     WW,     0,      0,      0,      0,              /* MOVW */
-2,      RW,     RW,     0,      0,      0,      0,              /* CMPW */
-2,      RW,     WW,     0,      0,      0,      0,              /* MCOMW */
-2,      RW,     RW,     0,      0,      0,      0,              /* BITW */
-1,      WW,     0,      0,      0,      0,      0,              /* CLRW */
-1,      RW,     0,      0,      0,      0,      0,              /* TSTW */
-1,      MW,     0,      0,      0,      0,      0,              /* INCW */
-1,      MW,     0,      0,      0,      0,      0,              /* DECW */
-1,      RW,     0,      0,      0,      0,      0,              /* BISPSW */
-1,      RW,     0,      0,      0,      0,      0,              /* BICPSW */
-1,      RW,     0,      0,      0,      0,      0,              /* POPR */
-1,      RW,     0,      0,      0,      0,      0,              /* PUSHR */
-1,      RW,     0,      0,      0,      0,      0,              /* CHMK */
-1,      RW,     0,      0,      0,      0,      0,              /* CHME */
-1,      RW,     0,      0,      0,      0,      0,              /* CHMS */
-1,      RW,     0,      0,      0,      0,      0,              /* CHMU */
-2,      RL,     ML,     0,      0,      0,      0,              /* ADDL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* ADDL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* SUBL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* SUBL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* MULL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* MULL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* DIVL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* DIVL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* BISL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* BISL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* BICL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* BICL3 */
-2,      RL,     ML,     0,      0,      0,      0,              /* XORL2 */
-3,      RL,     RL,     WL,     0,      0,      0,              /* XORL3 */
-2,      RL,     WL,     0,      0,      0,      0,              /* MNEGL */
-3,      RL,     RL,     RL,     0,      0,      0,              /* CASEL */
-2,      RL,     WL,     0,      0,      0,      0,              /* MOVL */
-2,      RL,     RL,     0,      0,      0,      0,              /* CMPL */
-2,      RL,     WL,     0,      0,      0,      0,              /* MCOML */
-2,      RL,     RL,     0,      0,      0,      0,              /* BITL */
-1,      WL,     0,      0,      0,      0,      0,              /* CLRL */
-1,      RL,     0,      0,      0,      0,      0,              /* TSTL */
-1,      ML,     0,      0,      0,      0,      0,              /* INCL */
-1,      ML,     0,      0,      0,      0,      0,              /* DECL */
-2,      RL,     ML,     0,      0,      0,      0,              /* ADWC */
-2,      RL,     ML,     0,      0,      0,      0,              /* SBWC */
-2,      RL,     RL,     0,      0,      0,      0,              /* MTPR */
-2,      RL,     WL,     0,      0,      0,      0,              /* MFPR */
-1,      WL,     0,      0,      0,      0,      0,              /* MOVPSL */
-1,      RL,     0,      0,      0,      0,      0,              /* PUSHL */
-2,      AL,     WL,     0,      0,      0,      0,              /* MOVAL */
-1,      AL,     0,      0,      0,      0,      0,              /* PUSHAL */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBS */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBC */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBSS */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBCS */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBSC */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBCC */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBSSI */
-3,      RL,     VB,     BB,     0,      0,      0,              /* BBCCI */
-2,      RL,     BB,     0,      0,      0,      0,              /* BLBS */
-2,      RL,     BB,     0,      0,      0,      0,              /* BLBC */
-4,      RL,     RB,     VB,     WL,     0,      0,              /* FFS */
-4,      RL,     RB,     VB,     WL,     0,      0,              /* FFC */
-4,      RL,     RB,     VB,     RL,     0,      0,              /* CMPV */
-4,      RL,     RB,     VB,     RL,     0,      0,              /* CMPZV */
-4,      RL,     RB,     VB,     WL,     0,      0,              /* EXTV */
-4,      RL,     RB,     VB,     WL,     0,      0,              /* EXTZV */
-4,      RL,     RL,     RB,     VB,     0,      0,              /* INSV */
-4,      RL,     RL,     ML,     BW,     0,      0,              /* ACBL */
-3,      RL,     ML,     BB,     0,      0,      0,              /* AOBLSS */
-3,      RL,     ML,     BB,     0,      0,      0,              /* AOBLEQ */
-2,      ML,     BB,     0,      0,      0,      0,              /* SOBGEQ */
-2,      ML,     BB,     0,      0,      0,      0,              /* SOBGTR */
-2,      RL,     WB,     0,      0,      0,      0,              /* CVTLB */
-2,      RL,     WW,     0,      0,      0,      0,              /* CVTLW */
-6+DR_F, RB,     RW,     AB,     RB,     RW,     AB,             /* ASHP */
-3+DR_F, RL,     RW,     AB,     0,      0,      0,              /* CVTLP */
-2,      AB,     AB,     0,      0,      0,      0,              /* CALLG */
-2,      RL,     AB,     0,      0,      0,      0,              /* CALLS */
-0,      0,      0,      0,      0,      0,      0,              /* XFC */
-0,      0,      0,      0,      0,      0,      0,              /* 0FD */
-0,      0,      0,      0,      0,      0,      0,              /* 0FE */
-0,      0,      0,      0,      0,      0,      0,              /* 0FF */
-0,      0,      0,      0,      0,      0,      0,              /* 100-10F */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 110-11F */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 120-12F */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 130-13F */
-0,      0,      0,      0,      0,      0,      0,
-ODC(2), RD,     WO,     0,      0,      0,      0,              /* CVTDH */
-2,      RG,     WL,     0,      0,      0,      0,              /* CVTGF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-2,      RG,     MQ,     0,      0,      0,      0,              /* ADDG2 */
-3,      RG,     RG,     WQ,     0,      0,      0,              /* ADDG3 */
-2,      RG,     MQ,     0,      0,      0,      0,              /* SUBG2 */
-3,      RG,     RG,     WQ,     0,      0,      0,              /* SUBG3 */
-2,      RG,     MQ,     0,      0,      0,      0,              /* MULG2 */
-3,      RG,     RG,     WQ,     0,      0,      0,              /* MULG3 */
-2,      RG,     MQ,     0,      0,      0,      0,              /* DIVG2 */
-3,      RG,     RG,     WQ,     0,      0,      0,              /* DIVG3 */
-2,      RG,     WB,     0,      0,      0,      0,              /* CVTGB */
-2,      RG,     WW,     0,      0,      0,      0,              /* CVTGW */
-2,      RG,     WL,     0,      0,      0,      0,              /* CVTGL */
-2,      RG,     WL,     0,      0,      0,      0,              /* CVTRGL */
-2,      RB,     WQ,     0,      0,      0,      0,              /* CVTBG */
-2,      RW,     WQ,     0,      0,      0,      0,              /* CVTWG */
-2,      RL,     WQ,     0,      0,      0,      0,              /* CVTLG */
-4,      RG,     RG,     MQ,     BW,     0,      0,              /* ACBG */
-2,      RG,     WQ,     0,      0,      0,      0,              /* MOVG */
-2,      RG,     RG,     0,      0,      0,      0,              /* CMPG */
-2,      RG,     WQ,     0,      0,      0,      0,              /* MNEGG */
-1,      RG,     0,      0,      0,      0,      0,              /* TSTG */
-5,      RG,     RW,     RG,     WL,     WQ,     0,              /* EMODG */
-3,      RG,     RW,     AB,     0,      0,      0,              /* POLYG */
-ODC(2), RG,     WO,     0,      0,      0,      0,              /* CVTGH */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-ODC(2), RH,     MO,     0,      0,      0,      0,              /* ADDH2 */
-ODC(3), RH,     RH,     WO,     0,      0,      0,              /* ADDH3 */
-ODC(2), RH,     MO,     0,      0,      0,      0,              /* SUBH2 */
-ODC(3), RH,     RH,     WO,     0,      0,      0,              /* SUBH3 */
-ODC(2), RH,     MO,     0,      0,      0,      0,              /* MULH2 */
-ODC(3), RH,     RH,     WO,     0,      0,      0,              /* MULH3 */
-ODC(2), RH,     MO,     0,      0,      0,      0,              /* DIVH2 */
-ODC(3), RH,     RH,     WO,     0,      0,      0,              /* DIVH3 */
-ODC(2), RH,     WB,     0,      0,      0,      0,              /* CVTHB */
-ODC(2), RH,     WW,     0,      0,      0,      0,              /* CVTHW */
-ODC(2), RH,     WL,     0,      0,      0,      0,              /* CVTHL */
-ODC(2), RH,     WL,     0,      0,      0,      0,              /* CVTRHL */
-ODC(2), RB,     WO,     0,      0,      0,      0,              /* CVTBH */
-ODC(2), RW,     WO,     0,      0,      0,      0,              /* CVTWH */
-ODC(2), RL,     WO,     0,      0,      0,      0,              /* CVTLH */
-ODC(4), RH,     RH,     MO,     BW,     0,      0,              /* ACBH */
-ODC(2), RH,     RO,     0,      0,      0,      0,              /* MOVH */
-ODC(2), RH,     RH,     0,      0,      0,      0,              /* CMPH */
-ODC(2), RH,     WO,     0,      0,      0,      0,              /* MNEGH */
-ODC(1), RH,     0,      0,      0,      0,      0,              /* TSTH */
-ODC(5), RH,     RW,     RH,     WL,     WO,     0,              /* EMODH */
-ODC(3), RH,     RW,     AB,     0,      0,      0,              /* POLYH */
-ODC(2), RH,     WQ,     0,      0,      0,      0,              /* CVTHG */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-0,      0,      0,      0,      0,      0,      0,              /* reserved */
-ODC(1), WO,     0,      0,      0,      0,      0,              /* CLRO */
-ODC(2), RO,     RO,     0,      0,      0,      0,              /* MOVO */
-ODC(2), AO,     WL,     0,      0,      0,      0,              /* MOVAO*/
-ODC(1), AO,     0,      0,      0,      0,      0,              /* PUSHAO*/
-0,      0,      0,      0,      0,      0,      0,              /* 180-18F */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 190-19F */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-ODC(2), RF,     WO,     0,      0,      0,      0,              /* CVTFH */
-2,      RF,     WQ,     0,      0,      0,      0,              /* CVTFG */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1A0-1AF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1B0-1BF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1C0-1CF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1D0-1DF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1E0-1EF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,              /* 1F0-1FF */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-ODC(2), RH,     WL,     0,      0,      0,      0,              /* CVTHF */
-ODC(2), RH,     WQ,     0,      0,      0,      0,              /* CVTHD */
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0,
-0,      0,      0,      0,      0,      0,      0
+{0,      0,      0,      0,      0,      0,      0},              /* HALT */
+{0,      0,      0,      0,      0,      0,      0},              /* NOP */
+{0,      0,      0,      0,      0,      0,      0},              /* REI */
+{0,      0,      0,      0,      0,      0,      0},              /* BPT */
+{0,      0,      0,      0,      0,      0,      0},              /* RET */
+{0,      0,      0,      0,      0,      0,      0},              /* RSB */
+{0,      0,      0,      0,      0,      0,      0},              /* LDPCTX */
+{0,      0,      0,      0,      0,      0,      0},              /* SVPCTX */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* CVTPS */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* CVTSP */
+{6,      RL,     RL,     RL,     RL,     RL,     WL},             /* INDEX */
+{4+DR_F, AB,     RL,     RW,     AB,     0,      0},              /* CRC */
+{3,      RB,     RW,     AB,     0,      0,      0},              /* PROBER */
+{3,      RB,     RW,     AB,     0,      0,      0},              /* PROBEW */
+{2,      AB,     AB,     0,      0,      0,      0},              /* INSQUE */
+{2,      AB,     WL,     0,      0,      0,      0},              /* REMQUE */
+{1,      BB,     0,      0,      0,      0,      0},              /* BSBB */
+{1,      BB,     0,      0,      0,      0,      0},              /* BRB */
+{1,      BB,     0,      0,      0,      0,      0},              /* BNEQ */
+{1,      BB,     0,      0,      0,      0,      0},              /* BEQL */
+{1,      BB,     0,      0,      0,      0,      0},              /* BGTR */
+{1,      BB,     0,      0,      0,      0,      0},              /* BLEQ */
+{1,      AB,     0,      0,      0,      0,      0},              /* JSB */
+{1,      AB,     0,      0,      0,      0,      0},              /* JMP */
+{1,      BB,     0,      0,      0,      0,      0},              /* BGEQ */
+{1,      BB,     0,      0,      0,      0,      0},              /* BLSS */
+{1,      BB,     0,      0,      0,      0,      0},              /* BGTRU */
+{1,      BB,     0,      0,      0,      0,      0},              /* BLEQU */
+{1,      BB,     0,      0,      0,      0,      0},              /* BVC */
+{1,      BB,     0,      0,      0,      0,      0},              /* BVS */
+{1,      BB,     0,      0,      0,      0,      0},              /* BCC */
+{1,      BB,     0,      0,      0,      0,      0},              /* BCS */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* ADDP4 */
+{6+DR_F, RW,     AB,     RW,     AB,     RW,     AB},             /* ADDP6 */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* SUBP4 */
+{6+DR_F, RW,     AB,     RW,     AB,     RW,     AB},             /* SUBP6 */
+{5+DR_F, RW,     AB,     AB,     RW,     AB,     0},              /* CVTPT */
+{6+DR_F, RW,     AB,     RW,     AB,     RW,     AB},             /* MULP6 */
+{5+DR_F, RW,     AB,     AB,     RW,     AB,     0},              /* CVTTP */
+{6+DR_F, RW,     AB,     RW,     AB,     RW,     AB},             /* DIVP6 */
+{3+DR_F, RW,     AB,     AB,     0,      0,      0},              /* MOVC3 */
+{3+DR_F, RW,     AB,     AB,     0,      0,      0},              /* CMPC3 */
+{4+DR_F, RW,     AB,     AB,     RB,     0,      0},              /* SCANC */
+{4+DR_F, RW,     AB,     AB,     RB,     0,      0},              /* SPANC */
+{5+DR_F, RW,     AB,     RB,     RW,     AB,     0},              /* MOVC5 */
+{5+DR_F, RW,     AB,     RB,     RW,     AB,     0},              /* CMPC5 */
+{6+DR_F, RW,     AB,     RB,     AB,     RW,     AB},             /* MOVTC */
+{6+DR_F, RW,     AB,     RB,     AB,     RW,     AB},             /* MOVTUC */
+{1,      BW,     0,      0,      0,      0,      0},              /* BSBW */
+{1,      BW,     0,      0,      0,      0,      0},              /* BRW */
+{2,      RW,     WL,     0,      0,      0,      0},              /* CVTWL */
+{2,      RW,     WB,     0,      0,      0,      0},              /* CVTWB */
+{3+DR_F, RW,     AB,     AB,     0,      0,      0},              /* MOVP */
+{3+DR_F, RW,     AB,     AB,     0,      0,      0},              /* CMPP3 */
+{3+DR_F, RW,     AB,     WL,     0,      0,      0},              /* CVTPL */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* CMPP4 */
+{4+DR_F, RW,     AB,     AB,     AB,     0,      0},              /* EDITPC */
+{4+DR_F, RW,     AB,     RW,     AB,     0,      0},              /* MATCHC */
+{3+DR_F, RB,     RW,     AB,     0,      0,      0},              /* LOCC */
+{3+DR_F, RB,     RW,     AB,     0,      0,      0},              /* SKPC */
+{2,      RW,     WL,     0,      0,      0,      0},              /* MOVZWL */
+{4,      RW,     RW,     MW,     BW,     0,      0},              /* ACBW */
+{2,      AW,     WL,     0,      0,      0,      0},              /* MOVAW */
+{1,      AW,     0,      0,      0,      0,      0},              /* PUSHAW */
+{2,      RF,     ML,     0,      0,      0,      0},              /* ADDF2 */
+{3,      RF,     RF,     WL,     0,      0,      0},              /* ADDF3 */
+{2,      RF,     ML,     0,      0,      0,      0},              /* SUBF2 */
+{3,      RF,     RF,     WL,     0,      0,      0},              /* SUBF3 */
+{2,      RF,     ML,     0,      0,      0,      0},              /* MULF2 */
+{3,      RF,     RF,     WL,     0,      0,      0},              /* MULF3 */
+{2,      RF,     ML,     0,      0,      0,      0},              /* DIVF2 */
+{3,      RF,     RF,     WL,     0,      0,      0},              /* DIVF3 */
+{2,      RF,     WB,     0,      0,      0,      0},              /* CVTFB */
+{2,      RF,     WW,     0,      0,      0,      0},              /* CVTFW */
+{2,      RF,     WL,     0,      0,      0,      0},              /* CVTFL */
+{2,      RF,     WL,     0,      0,      0,      0},              /* CVTRFL */
+{2,      RB,     WL,     0,      0,      0,      0},              /* CVTBF */
+{2,      RW,     WL,     0,      0,      0,      0},              /* CVTWF */
+{2,      RL,     WL,     0,      0,      0,      0},              /* CVTLF */
+{4,      RF,     RF,     ML,     BW,     0,      0},              /* ACBF */
+{2,      RF,     WL,     0,      0,      0,      0},              /* MOVF */
+{2,      RF,     RF,     0,      0,      0,      0},              /* CMPF */
+{2,      RF,     WL,     0,      0,      0,      0},              /* MNEGF */
+{1,      RF,     0,      0,      0,      0,      0},              /* TSTF */
+{5,      RF,     RB,     RF,     WL,     WL,     0},              /* EMODF */
+{3,      RF,     RW,     AB,     0,      0,      0},              /* POLYF */
+{2,      RF,     WQ,     0,      0,      0,      0},              /* CVTFD */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{2,      RW,     WW,     0,      0,      0,      0},              /* ADAWI */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{2,      AB,     AQ,     0,      0,      0,      0},              /* INSQHI */
+{2,      AB,     AQ,     0,      0,      0,      0},              /* INSQTI */
+{2,      AQ,     WL,     0,      0,      0,      0},              /* REMQHI */
+{2,      AQ,     WL,     0,      0,      0,      0},              /* REMQTI */
+{2,      RD,     MQ,     0,      0,      0,      0},              /* ADDD2 */
+{3,      RD,     RD,     WQ,     0,      0,      0},              /* ADDD3 */
+{2,      RD,     MQ,     0,      0,      0,      0},              /* SUBD2 */
+{3,      RD,     RD,     WQ,     0,      0,      0},              /* SUBD3 */
+{2,      RD,     MQ,     0,      0,      0,      0},              /* MULD2 */
+{3,      RD,     RD,     WQ,     0,      0,      0},              /* MULD3 */
+{2,      RD,     MQ,     0,      0,      0,      0},              /* DIVD2 */
+{3,      RD,     RD,     WQ,     0,      0,      0},              /* DIVD3 */
+{2,      RD,     WB,     0,      0,      0,      0},              /* CVTDB */
+{2,      RD,     WW,     0,      0,      0,      0},              /* CVTDW */
+{2,      RD,     WL,     0,      0,      0,      0},              /* CVTDL */
+{2,      RD,     WL,     0,      0,      0,      0},              /* CVTRDL */
+{2,      RB,     WQ,     0,      0,      0,      0},              /* CVTBD */
+{2,      RW,     WQ,     0,      0,      0,      0},              /* CVTWD */
+{2,      RL,     WQ,     0,      0,      0,      0},              /* CVTLD */
+{4,      RD,     RD,     MQ,     BW,     0,      0},              /* ACBD */
+{2,      RD,     WQ,     0,      0,      0,      0},              /* MOVD */
+{2,      RD,     RD,     0,      0,      0,      0},              /* CMPD */
+{2,      RD,     WQ,     0,      0,      0,      0},              /* MNEGD */
+{1,      RD,     0,      0,      0,      0,      0},              /* TSTD */
+{5,      RD,     RB,     RD,     WL,     WQ,     0},              /* EMODD */
+{3,      RD,     RW,     AB,     0,      0,      0},              /* POLYD */
+{2,      RD,     WL,     0,      0,      0,      0},              /* CVTDF */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{3,      RB,     RL,     WL,     0,      0,      0},              /* ASHL */
+{3,      RB,     RQ,     WQ,     0,      0,      0},              /* ASHQ */
+{4,      RL,     RL,     RL,     WQ,     0,      0},              /* EMUL */
+{4,      RL,     RQ,     WL,     WL,     0,      0},              /* EDIV */
+{1,      WQ,     0,      0,      0,      0,      0},              /* CLRQ */
+{2,      RQ,     WQ,     0,      0,      0,      0},              /* MOVQ */
+{2,      AQ,     WL,     0,      0,      0,      0},              /* MOVAQ */
+{1,      AQ,     0,      0,      0,      0,      0},              /* PUSHAQ */
+{2,      RB,     MB,     0,      0,      0,      0},              /* ADDB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* ADDB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* SUBB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* SUBB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* MULB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* MULB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* DIVB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* DIVB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* BISB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* BISB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* BICB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* BICB3 */
+{2,      RB,     MB,     0,      0,      0,      0},              /* XORB2 */
+{3,      RB,     RB,     WB,     0,      0,      0},              /* XORB3 */
+{2,      RB,     WB,     0,      0,      0,      0},              /* MNEGB */
+{3,      RB,     RB,     RB,     0,      0,      0},              /* CASEB */
+{2,      RB,     WB,     0,      0,      0,      0},              /* MOVB */
+{2,      RB,     RB,     0,      0,      0,      0},              /* CMPB */
+{2,      RB,     WB,     0,      0,      0,      0},              /* MCOMB */
+{2,      RB,     RB,     0,      0,      0,      0},              /* BITB */
+{1,      WB,     0,      0,      0,      0,      0},              /* CLRB */
+{1,      RB,     0,      0,      0,      0,      0},              /* TSTB */
+{1,      MB,     0,      0,      0,      0,      0},              /* INCB */
+{1,      MB,     0,      0,      0,      0,      0},              /* DECB */
+{2,      RB,     WL,     0,      0,      0,      0},              /* CVTBL */
+{2,      RB,     WW,     0,      0,      0,      0},              /* CVTBW */
+{2,      RB,     WL,     0,      0,      0,      0},              /* MOVZBL */
+{2,      RB,     WW,     0,      0,      0,      0},              /* MOVZBW */
+{3,      RB,     RL,     WL,     0,      0,      0},              /* ROTL */
+{4,      RB,     RB,     MB,     BW,     0,      0},              /* ACBB */
+{2,      AB,     WL,     0,      0,      0,      0},              /* MOVAB */
+{1,      AB,     0,      0,      0,      0,      0},              /* PUSHAB */
+{2,      RW,     MW,     0,      0,      0,      0},              /* ADDW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* ADDW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* SUBW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* SUBW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* MULW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* MULW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* DIVW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* DIVW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* BISW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* BISW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* BICW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* BICW3 */
+{2,      RW,     MW,     0,      0,      0,      0},              /* XORW2 */
+{3,      RW,     RW,     WW,     0,      0,      0},              /* XORW3 */
+{2,      RW,     WW,     0,      0,      0,      0},              /* MNEGW */
+{3,      RW,     RW,     RW,     0,      0,      0},              /* CASEW */
+{2,      RW,     WW,     0,      0,      0,      0},              /* MOVW */
+{2,      RW,     RW,     0,      0,      0,      0},              /* CMPW */
+{2,      RW,     WW,     0,      0,      0,      0},              /* MCOMW */
+{2,      RW,     RW,     0,      0,      0,      0},              /* BITW */
+{1,      WW,     0,      0,      0,      0,      0},              /* CLRW */
+{1,      RW,     0,      0,      0,      0,      0},              /* TSTW */
+{1,      MW,     0,      0,      0,      0,      0},              /* INCW */
+{1,      MW,     0,      0,      0,      0,      0},              /* DECW */
+{1,      RW,     0,      0,      0,      0,      0},              /* BISPSW */
+{1,      RW,     0,      0,      0,      0,      0},              /* BICPSW */
+{1,      RW,     0,      0,      0,      0,      0},              /* POPR */
+{1,      RW,     0,      0,      0,      0,      0},              /* PUSHR */
+{1,      RW,     0,      0,      0,      0,      0},              /* CHMK */
+{1,      RW,     0,      0,      0,      0,      0},              /* CHME */
+{1,      RW,     0,      0,      0,      0,      0},              /* CHMS */
+{1,      RW,     0,      0,      0,      0,      0},              /* CHMU */
+{2,      RL,     ML,     0,      0,      0,      0},              /* ADDL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* ADDL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* SUBL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* SUBL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* MULL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* MULL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* DIVL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* DIVL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* BISL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* BISL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* BICL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* BICL3 */
+{2,      RL,     ML,     0,      0,      0,      0},              /* XORL2 */
+{3,      RL,     RL,     WL,     0,      0,      0},              /* XORL3 */
+{2,      RL,     WL,     0,      0,      0,      0},              /* MNEGL */
+{3,      RL,     RL,     RL,     0,      0,      0},              /* CASEL */
+{2,      RL,     WL,     0,      0,      0,      0},              /* MOVL */
+{2,      RL,     RL,     0,      0,      0,      0},              /* CMPL */
+{2,      RL,     WL,     0,      0,      0,      0},              /* MCOML */
+{2,      RL,     RL,     0,      0,      0,      0},              /* BITL */
+{1,      WL,     0,      0,      0,      0,      0},              /* CLRL */
+{1,      RL,     0,      0,      0,      0,      0},              /* TSTL */
+{1,      ML,     0,      0,      0,      0,      0},              /* INCL */
+{1,      ML,     0,      0,      0,      0,      0},              /* DECL */
+{2,      RL,     ML,     0,      0,      0,      0},              /* ADWC */
+{2,      RL,     ML,     0,      0,      0,      0},              /* SBWC */
+{2,      RL,     RL,     0,      0,      0,      0},              /* MTPR */
+{2,      RL,     WL,     0,      0,      0,      0},              /* MFPR */
+{1,      WL,     0,      0,      0,      0,      0},              /* MOVPSL */
+{1,      RL,     0,      0,      0,      0,      0},              /* PUSHL */
+{2,      AL,     WL,     0,      0,      0,      0},              /* MOVAL */
+{1,      AL,     0,      0,      0,      0,      0},              /* PUSHAL */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBS */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBC */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBSS */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBCS */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBSC */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBCC */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBSSI */
+{3,      RL,     VB,     BB,     0,      0,      0},              /* BBCCI */
+{2,      RL,     BB,     0,      0,      0,      0},              /* BLBS */
+{2,      RL,     BB,     0,      0,      0,      0},              /* BLBC */
+{4,      RL,     RB,     VB,     WL,     0,      0},              /* FFS */
+{4,      RL,     RB,     VB,     WL,     0,      0},              /* FFC */
+{4,      RL,     RB,     VB,     RL,     0,      0},              /* CMPV */
+{4,      RL,     RB,     VB,     RL,     0,      0},              /* CMPZV */
+{4,      RL,     RB,     VB,     WL,     0,      0},              /* EXTV */
+{4,      RL,     RB,     VB,     WL,     0,      0},              /* EXTZV */
+{4,      RL,     RL,     RB,     VB,     0,      0},              /* INSV */
+{4,      RL,     RL,     ML,     BW,     0,      0},              /* ACBL */
+{3,      RL,     ML,     BB,     0,      0,      0},              /* AOBLSS */
+{3,      RL,     ML,     BB,     0,      0,      0},              /* AOBLEQ */
+{2,      ML,     BB,     0,      0,      0,      0},              /* SOBGEQ */
+{2,      ML,     BB,     0,      0,      0,      0},              /* SOBGTR */
+{2,      RL,     WB,     0,      0,      0,      0},              /* CVTLB */
+{2,      RL,     WW,     0,      0,      0,      0},              /* CVTLW */
+{6+DR_F, RB,     RW,     AB,     RB,     RW,     AB},             /* ASHP */
+{3+DR_F, RL,     RW,     AB,     0,      0,      0},              /* CVTLP */
+{2,      AB,     AB,     0,      0,      0,      0},              /* CALLG */
+{2,      RL,     AB,     0,      0,      0,      0},              /* CALLS */
+{0,      0,      0,      0,      0,      0,      0},              /* XFC */
+{0,      0,      0,      0,      0,      0,      0},              /* 0FD */
+{0,      0,      0,      0,      0,      0,      0},              /* 0FE */
+{0,      0,      0,      0,      0,      0,      0},              /* 0FF */
+{0,      0,      0,      0,      0,      0,      0},              /* 100-10F */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 110-11F */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 120-12F */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 130-13F */
+{0,      0,      0,      0,      0,      0,      0},
+{ODC(2), RD,     WO,     0,      0,      0,      0},              /* CVTDH */
+{2,      RG,     WL,     0,      0,      0,      0},              /* CVTGF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{2,      RG,     MQ,     0,      0,      0,      0},              /* ADDG2 */
+{3,      RG,     RG,     WQ,     0,      0,      0},              /* ADDG3 */
+{2,      RG,     MQ,     0,      0,      0,      0},              /* SUBG2 */
+{3,      RG,     RG,     WQ,     0,      0,      0},              /* SUBG3 */
+{2,      RG,     MQ,     0,      0,      0,      0},              /* MULG2 */
+{3,      RG,     RG,     WQ,     0,      0,      0},              /* MULG3 */
+{2,      RG,     MQ,     0,      0,      0,      0},              /* DIVG2 */
+{3,      RG,     RG,     WQ,     0,      0,      0},              /* DIVG3 */
+{2,      RG,     WB,     0,      0,      0,      0},              /* CVTGB */
+{2,      RG,     WW,     0,      0,      0,      0},              /* CVTGW */
+{2,      RG,     WL,     0,      0,      0,      0},              /* CVTGL */
+{2,      RG,     WL,     0,      0,      0,      0},              /* CVTRGL */
+{2,      RB,     WQ,     0,      0,      0,      0},              /* CVTBG */
+{2,      RW,     WQ,     0,      0,      0,      0},              /* CVTWG */
+{2,      RL,     WQ,     0,      0,      0,      0},              /* CVTLG */
+{4,      RG,     RG,     MQ,     BW,     0,      0},              /* ACBG */
+{2,      RG,     WQ,     0,      0,      0,      0},              /* MOVG */
+{2,      RG,     RG,     0,      0,      0,      0},              /* CMPG */
+{2,      RG,     WQ,     0,      0,      0,      0},              /* MNEGG */
+{1,      RG,     0,      0,      0,      0,      0},              /* TSTG */
+{5,      RG,     RW,     RG,     WL,     WQ,     0},              /* EMODG */
+{3,      RG,     RW,     AB,     0,      0,      0},              /* POLYG */
+{ODC(2), RG,     WO,     0,      0,      0,      0},              /* CVTGH */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{ODC(2), RH,     MO,     0,      0,      0,      0},              /* ADDH2 */
+{ODC(3), RH,     RH,     WO,     0,      0,      0},              /* ADDH3 */
+{ODC(2), RH,     MO,     0,      0,      0,      0},              /* SUBH2 */
+{ODC(3), RH,     RH,     WO,     0,      0,      0},              /* SUBH3 */
+{ODC(2), RH,     MO,     0,      0,      0,      0},              /* MULH2 */
+{ODC(3), RH,     RH,     WO,     0,      0,      0},              /* MULH3 */
+{ODC(2), RH,     MO,     0,      0,      0,      0},              /* DIVH2 */
+{ODC(3), RH,     RH,     WO,     0,      0,      0},              /* DIVH3 */
+{ODC(2), RH,     WB,     0,      0,      0,      0},              /* CVTHB */
+{ODC(2), RH,     WW,     0,      0,      0,      0},              /* CVTHW */
+{ODC(2), RH,     WL,     0,      0,      0,      0},              /* CVTHL */
+{ODC(2), RH,     WL,     0,      0,      0,      0},              /* CVTRHL */
+{ODC(2), RB,     WO,     0,      0,      0,      0},              /* CVTBH */
+{ODC(2), RW,     WO,     0,      0,      0,      0},              /* CVTWH */
+{ODC(2), RL,     WO,     0,      0,      0,      0},              /* CVTLH */
+{ODC(4), RH,     RH,     MO,     BW,     0,      0},              /* ACBH */
+{ODC(2), RH,     RO,     0,      0,      0,      0},              /* MOVH */
+{ODC(2), RH,     RH,     0,      0,      0,      0},              /* CMPH */
+{ODC(2), RH,     WO,     0,      0,      0,      0},              /* MNEGH */
+{ODC(1), RH,     0,      0,      0,      0,      0},              /* TSTH */
+{ODC(5), RH,     RW,     RH,     WL,     WO,     0},              /* EMODH */
+{ODC(3), RH,     RW,     AB,     0,      0,      0},              /* POLYH */
+{ODC(2), RH,     WQ,     0,      0,      0,      0},              /* CVTHG */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{0,      0,      0,      0,      0,      0,      0},              /* reserved */
+{ODC(1), WO,     0,      0,      0,      0,      0},              /* CLRO */
+{ODC(2), RO,     RO,     0,      0,      0,      0},              /* MOVO */
+{ODC(2), AO,     WL,     0,      0,      0,      0},              /* MOVAO*/
+{ODC(1), AO,     0,      0,      0,      0,      0},              /* PUSHAO*/
+{0,      0,      0,      0,      0,      0,      0},              /* 180-18F */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 190-19F */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{ODC(2), RF,     WO,     0,      0,      0,      0},              /* CVTFH */
+{2,      RF,     WQ,     0,      0,      0,      0},              /* CVTFG */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1A0-1AF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1B0-1BF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1C0-1CF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1D0-1DF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1E0-1EF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},              /* 1F0-1FF */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{ODC(2), RH,     WL,     0,      0,      0,      0},              /* CVTHF */
+{ODC(2), RH,     WQ,     0,      0,      0,      0},              /* CVTHD */
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0},
+{0,      0,      0,      0,      0,      0,      0}
 };
 
 /* Opcode mnemonics table */
@@ -1425,6 +1425,7 @@ int32 i, lnt;
 t_value regnum;
 char *tptr;
 
+*rn = 0;
 for (i = 15; i >= 0; i--) {                             /* chk named reg */
     lnt = strlen (regname[i]);
     if (strncmp (cptr, regname[i], lnt) == 0) {
diff --git a/VAX/vax_sysdev.c b/VAX/vax_sysdev.c
index 27eae37c..885e64b8 100644
--- a/VAX/vax_sysdev.c
+++ b/VAX/vax_sysdev.c
@@ -409,8 +409,8 @@ DEVICE cso_dev = {
 */
 
 DIB sysd_dib[] = {
-    0, 0, NULL, NULL,
-    2, IVCL (TMR0), 0, { &tmr0_inta, &tmr1_inta }
+    {0, 0, NULL, NULL,
+     2, IVCL (TMR0), 0, { &tmr0_inta, &tmr1_inta } }
     };
 
 UNIT sysd_unit[] = {
diff --git a/Visual Studio Projects/Simh.sln b/Visual Studio Projects/Simh.sln
index 9eb34c1c..af35fd58 100644
--- a/Visual Studio Projects/Simh.sln	
+++ b/Visual Studio Projects/Simh.sln	
@@ -59,7 +59,9 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "lgp", "lgp.vcproj", "{927C3
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "I7094", "I7094.vcproj", "{927C3BD9-BD0C-4A23-99F9-DEAD402BEEF9}"
 EndProject
-Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "SWTP", "SWTP.vcproj", "{0ABAF350-853E-4A8F-8435-B583E29FB78C}"
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "swtp6800mp-a", "swtp6800mp-a.vcproj", "{0ABAF350-853E-4A8F-8435-B583E29FB78C}"
+EndProject
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "swtp6800mp-a2", "swtp6800mp-a2.vcproj", "{A0BAF350-853E-4A8F-8435-B583E29FFACE}"
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "BuildROMs", "BuildROMs.vcproj", "{D40F3AF1-EEE7-4432-9807-2AD287B490F8}"
 EndProject
@@ -177,6 +179,10 @@ Global
 		{0ABAF350-853E-4A8F-8435-B583E29FB78C}.Debug|Win32.Build.0 = Debug|Win32
 		{0ABAF350-853E-4A8F-8435-B583E29FB78C}.Release|Win32.ActiveCfg = Release|Win32
 		{0ABAF350-853E-4A8F-8435-B583E29FB78C}.Release|Win32.Build.0 = Release|Win32
+		{A0BAF350-853E-4A8F-8435-B583E29FFACE}.Debug|Win32.ActiveCfg = Debug|Win32
+		{A0BAF350-853E-4A8F-8435-B583E29FFACE}.Debug|Win32.Build.0 = Debug|Win32
+		{A0BAF350-853E-4A8F-8435-B583E29FFACE}.Release|Win32.ActiveCfg = Release|Win32
+		{A0BAF350-853E-4A8F-8435-B583E29FFACE}.Release|Win32.Build.0 = Release|Win32
 		{D40F3AF1-EEE7-4432-9807-2AD287B490F8}.Debug|Win32.ActiveCfg = Debug|Win32
 		{D40F3AF1-EEE7-4432-9807-2AD287B490F8}.Debug|Win32.Build.0 = Debug|Win32
 		{D40F3AF1-EEE7-4432-9807-2AD287B490F8}.Release|Win32.ActiveCfg = Release|Win32
diff --git a/Visual Studio Projects/SWTP.vcproj b/Visual Studio Projects/swtp6800mp-a.vcproj
similarity index 78%
rename from Visual Studio Projects/SWTP.vcproj
rename to Visual Studio Projects/swtp6800mp-a.vcproj
index e573d26e..bf86be0d 100644
--- a/Visual Studio Projects/SWTP.vcproj	
+++ b/Visual Studio Projects/swtp6800mp-a.vcproj	
@@ -2,9 +2,9 @@
 <VisualStudioProject
 	ProjectType="Visual C++"
 	Version="9.00"
-	Name="SWTP"
+	Name="swtp6800mp-a"
 	ProjectGUID="{0ABAF350-853E-4A8F-8435-B583E29FB78C}"
-	RootNamespace="SWTP"
+	RootNamespace="swtp6800mp-a"
 	Keyword="Win32Proj"
 	TargetFrameworkVersion="131072"
 	>
@@ -19,7 +19,7 @@
 		<Configuration
 			Name="Debug|Win32"
 			OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
-			IntermediateDirectory="..\BIN\NT\Project\simh\SWTP\$(PlatformName)-$(ConfigurationName)"
+			IntermediateDirectory="..\BIN\NT\Project\simh\swtp6800mp-a\$(PlatformName)-$(ConfigurationName)"
 			ConfigurationType="1"
 			InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
 			CharacterSet="0"
@@ -42,7 +42,7 @@
 			<Tool
 				Name="VCCLCompilerTool"
 				Optimization="0"
-				AdditionalIncludeDirectories="./;../"
+				AdditionalIncludeDirectories="./;../;../swtp6800/swtp6800"
 				PreprocessorDefinitions="_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS"
 				MinimalRebuild="true"
 				BasicRuntimeChecks="3"
@@ -64,10 +64,10 @@
 			<Tool
 				Name="VCLinkerTool"
 				AdditionalDependencies="wsock32.lib winmm.lib"
-				OutputFile="$(OutDir)\SWTP.exe"
+				OutputFile="$(OutDir)\swtp6800mp-a.exe"
 				LinkIncremental="2"
 				GenerateDebugInformation="true"
-				ProgramDatabaseFile="$(OutDir)\SWTP.pdb"
+				ProgramDatabaseFile="$(OutDir)\swtp6800mp-a.pdb"
 				SubSystem="1"
 				RandomizedBaseAddress="1"
 				DataExecutionPrevention="0"
@@ -98,7 +98,7 @@
 		<Configuration
 			Name="Release|Win32"
 			OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
-			IntermediateDirectory="..\BIN\NT\Project\simh\SWTP\$(PlatformName)-$(ConfigurationName)"
+			IntermediateDirectory="..\BIN\NT\Project\simh\swtp6800mp-a\$(PlatformName)-$(ConfigurationName)"
 			ConfigurationType="1"
 			InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
 			CharacterSet="0"
@@ -123,7 +123,7 @@
 				Optimization="2"
 				InlineFunctionExpansion="1"
 				OmitFramePointers="true"
-				AdditionalIncludeDirectories="./;../"
+				AdditionalIncludeDirectories="./;../;../swtp6800/swtp6800"
 				PreprocessorDefinitions="_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS"
 				StringPooling="true"
 				RuntimeLibrary="0"
@@ -145,7 +145,7 @@
 			<Tool
 				Name="VCLinkerTool"
 				AdditionalDependencies="wsock32.lib winmm.lib"
-				OutputFile="$(OutDir)\SWTP.exe"
+				OutputFile="$(OutDir)\swtp6800mp-a.exe"
 				LinkIncremental="1"
 				GenerateDebugInformation="true"
 				SubSystem="1"
@@ -185,6 +185,42 @@
 			Name="Source Files"
 			Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
 			>
+			<File
+				RelativePath="..\swtp6800\common\bootrom.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\dc-4.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\m6800.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\m6810.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-8m.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-a.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\swtp6800\mp-a_sys.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-b2.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-s.c"
+				>
+			</File>
 			<File
 				RelativePath="..\scp.c"
 				>
@@ -217,22 +253,6 @@
 				RelativePath="..\sim_tmxr.c"
 				>
 			</File>
-			<File
-				RelativePath="..\swtp\swtp_cpu.c"
-				>
-			</File>
-			<File
-				RelativePath="..\swtp\swtp_dsk.c"
-				>
-			</File>
-			<File
-				RelativePath="..\swtp\swtp_sio.c"
-				>
-			</File>
-			<File
-				RelativePath="..\swtp\swtp_sys.c"
-				>
-			</File>
 		</Filter>
 		<Filter
 			Name="Header Files"
@@ -279,7 +299,7 @@
 				>
 			</File>
 			<File
-				RelativePath="..\swtp\swtp_defs.h"
+				RelativePath="..\swtp6800\swtp6800\swtp_defs.h"
 				>
 			</File>
 		</Filter>
diff --git a/Visual Studio Projects/swtp6800mp-a2.vcproj b/Visual Studio Projects/swtp6800mp-a2.vcproj
new file mode 100644
index 00000000..b3230803
--- /dev/null
+++ b/Visual Studio Projects/swtp6800mp-a2.vcproj	
@@ -0,0 +1,318 @@
+<?xml version="1.0" encoding="Windows-1252"?>
+<VisualStudioProject
+	ProjectType="Visual C++"
+	Version="9.00"
+	Name="swtp6800mp-a2"
+	ProjectGUID="{A0BAF350-853E-4A8F-8435-B583E29FFACE}"
+	RootNamespace="swtp6800mp-a2"
+	Keyword="Win32Proj"
+	TargetFrameworkVersion="131072"
+	>
+	<Platforms>
+		<Platform
+			Name="Win32"
+		/>
+	</Platforms>
+	<ToolFiles>
+	</ToolFiles>
+	<Configurations>
+		<Configuration
+			Name="Debug|Win32"
+			OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
+			IntermediateDirectory="..\BIN\NT\Project\simh\swtp6800mp-a2\$(PlatformName)-$(ConfigurationName)"
+			ConfigurationType="1"
+			InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
+			CharacterSet="0"
+			>
+			<Tool
+				Name="VCPreBuildEventTool"
+			/>
+			<Tool
+				Name="VCCustomBuildTool"
+			/>
+			<Tool
+				Name="VCXMLDataGeneratorTool"
+			/>
+			<Tool
+				Name="VCWebServiceProxyGeneratorTool"
+			/>
+			<Tool
+				Name="VCMIDLTool"
+			/>
+			<Tool
+				Name="VCCLCompilerTool"
+				Optimization="0"
+				AdditionalIncludeDirectories="./;../;../swtp6800/swtp6800"
+				PreprocessorDefinitions="_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS"
+				MinimalRebuild="true"
+				BasicRuntimeChecks="3"
+				RuntimeLibrary="1"
+				UsePrecompiledHeader="0"
+				WarningLevel="3"
+				Detect64BitPortabilityProblems="false"
+				DebugInformationFormat="4"
+			/>
+			<Tool
+				Name="VCManagedResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCPreLinkEventTool"
+			/>
+			<Tool
+				Name="VCLinkerTool"
+				AdditionalDependencies="wsock32.lib winmm.lib"
+				OutputFile="$(OutDir)\swtp6800mp-a2.exe"
+				LinkIncremental="2"
+				GenerateDebugInformation="true"
+				ProgramDatabaseFile="$(OutDir)\swtp6800mp-a2.pdb"
+				SubSystem="1"
+				RandomizedBaseAddress="1"
+				DataExecutionPrevention="0"
+				TargetMachine="1"
+			/>
+			<Tool
+				Name="VCALinkTool"
+			/>
+			<Tool
+				Name="VCManifestTool"
+			/>
+			<Tool
+				Name="VCXDCMakeTool"
+			/>
+			<Tool
+				Name="VCBscMakeTool"
+			/>
+			<Tool
+				Name="VCFxCopTool"
+			/>
+			<Tool
+				Name="VCAppVerifierTool"
+			/>
+			<Tool
+				Name="VCPostBuildEventTool"
+			/>
+		</Configuration>
+		<Configuration
+			Name="Release|Win32"
+			OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
+			IntermediateDirectory="..\BIN\NT\Project\simh\swtp6800mp-a2\$(PlatformName)-$(ConfigurationName)"
+			ConfigurationType="1"
+			InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
+			CharacterSet="0"
+			>
+			<Tool
+				Name="VCPreBuildEventTool"
+			/>
+			<Tool
+				Name="VCCustomBuildTool"
+			/>
+			<Tool
+				Name="VCXMLDataGeneratorTool"
+			/>
+			<Tool
+				Name="VCWebServiceProxyGeneratorTool"
+			/>
+			<Tool
+				Name="VCMIDLTool"
+			/>
+			<Tool
+				Name="VCCLCompilerTool"
+				Optimization="2"
+				InlineFunctionExpansion="1"
+				OmitFramePointers="true"
+				AdditionalIncludeDirectories="./;../;../swtp6800/swtp6800"
+				PreprocessorDefinitions="_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS"
+				StringPooling="true"
+				RuntimeLibrary="0"
+				EnableFunctionLevelLinking="true"
+				UsePrecompiledHeader="0"
+				WarningLevel="3"
+				Detect64BitPortabilityProblems="false"
+				DebugInformationFormat="3"
+			/>
+			<Tool
+				Name="VCManagedResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCResourceCompilerTool"
+			/>
+			<Tool
+				Name="VCPreLinkEventTool"
+			/>
+			<Tool
+				Name="VCLinkerTool"
+				AdditionalDependencies="wsock32.lib winmm.lib"
+				OutputFile="$(OutDir)\swtp6800mp-a2.exe"
+				LinkIncremental="1"
+				GenerateDebugInformation="true"
+				SubSystem="1"
+				OptimizeReferences="2"
+				EnableCOMDATFolding="2"
+				RandomizedBaseAddress="1"
+				DataExecutionPrevention="0"
+				TargetMachine="1"
+			/>
+			<Tool
+				Name="VCALinkTool"
+			/>
+			<Tool
+				Name="VCManifestTool"
+			/>
+			<Tool
+				Name="VCXDCMakeTool"
+			/>
+			<Tool
+				Name="VCBscMakeTool"
+			/>
+			<Tool
+				Name="VCFxCopTool"
+			/>
+			<Tool
+				Name="VCAppVerifierTool"
+			/>
+			<Tool
+				Name="VCPostBuildEventTool"
+			/>
+		</Configuration>
+	</Configurations>
+	<References>
+	</References>
+	<Files>
+		<Filter
+			Name="Source Files"
+			Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
+			>
+			<File
+				RelativePath="..\swtp6800\common\bootrom.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\dc-4.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\i2716.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\m6800.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\m6810.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-8m.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-a2.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\swtp6800\mp-a2_sys.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-b2.c"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\common\mp-s.c"
+				>
+			</File>
+			<File
+				RelativePath="..\scp.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_console.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_ether.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_fio.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_sock.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_tape.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_timer.c"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_tmxr.c"
+				>
+			</File>
+		</Filter>
+		<Filter
+			Name="Header Files"
+			Filter="h;hpp;hxx;hm;inl;inc"
+			>
+			<File
+				RelativePath="..\scp.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_console.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_defs.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_ether.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_fio.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_rev.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_sock.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_tape.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_timer.h"
+				>
+			</File>
+			<File
+				RelativePath="..\sim_tmxr.h"
+				>
+			</File>
+			<File
+				RelativePath="..\swtp6800\swtp6800\swtp_defs.h"
+				>
+			</File>
+		</Filter>
+		<Filter
+			Name="Resource Files"
+			Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
+			>
+		</Filter>
+	</Files>
+	<Globals>
+	</Globals>
+</VisualStudioProject>
diff --git a/descrip.mms b/descrip.mms
index e02bd0e3..9a5414b1 100644
--- a/descrip.mms
+++ b/descrip.mms
@@ -38,7 +38,8 @@
 #            PDP15           Just Build The DEC PDP-15.
 #            S3              Just Build The IBM System 3.
 #            SDS             Just Build The SDS 940.
-#            SWTP            Just Build The SWTP.
+#            SWTP6800MP-A    Just Build The SWTP6800MP-A.
+#            SWTP6800MP-A2   Just Build The SWTP6800MP-A2.
 #            VAX             Just Build The DEC VAX.
 #            VAX780          Just Build The DEC VAX780.
 #            CLEAN           Will Clean Files Back To Base Kit.
@@ -573,13 +574,28 @@ SDS_SOURCE = $(SDS_DIR)SDS_CPU.C,$(SDS_DIR)SDS_DRM.C,$(SDS_DIR)SDS_DSK.C,\
 SDS_OPTIONS = /INCL=($(SIMH_DIR),$(SDS_DIR))/DEF=($(CC_DEFS))
 
 #
-# SWTP 6800
+# SWTP 6800MP A
 #
-SWTP_DIR = SYS$DISK:[.SWTP]
-SWTP_LIB = $(LIB_DIR)SWTP-$(ARCH).OLB
-SWTP_SOURCE = $(SWTP_DIR)SWTP_CPU.C,$(SWTP_DIR)SWTP_DSK.C,$(SWTP_DIR)SWTP_SIO.C,\ 
-             $(SWTP_DIR)SWTP_SYS.C
-SWTP_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP_DIR))/DEF=($(CC_DEFS))
+SWTP6800MP_A_DIR = SYS$DISK:[.SWTP6800.SWTP6800]
+SWTP6800MP_A_COMMON = SYS$DISK:[.SWTP6800.COMMON]
+SWTP6800MP_A_LIB = $(LIB_DIR)SWTP6800MP-A-$(ARCH).OLB
+SWTP6800MP_A_SOURCE = $(SWTP6800MP_A_COMMON)mp-a.c,$(SWTP6800MP_A_COMMON)m6800.c,\
+	$(SWTP6800MP_A_COMMON)m6810.c,$(SWTP6800MP_A_COMMON)bootrom.c,$(SWTP6800MP_A_COMMON)dc-4.c,\
+	$(SWTP6800MP_A_COMMON)mp-s.c,$(SWTP6800MP_A_DIR)mp-a_sys.c,$(SWTP6800MP_A_COMMON)mp-b2.c,\
+	$(SWTP6800MP_A_COMMON)mp-8m.c
+SWTP6800MP_A_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP6800MP_A_DIR))/DEF=($(CC_DEFS))
+
+#
+# SWTP 6800MP A2
+#
+SWTP6800MP_A2_DIR = SYS$DISK:[.SWTP6800.SWTP6800]
+SWTP6800MP_A2_COMMON = SYS$DISK:[.SWTP6800.COMMON]
+SWTP6800MP_A2_LIB = $(LIB_DIR)SWTP6800MP-A2-$(ARCH).OLB
+SWTP6800MP_A2_SOURCE = $(SWTP6800MP_A2_COMMON)mp-a2.c,$(SWTP6800MP_A2_COMMON)m6800.c,\
+	$(SWTP6800MP_A2_COMMON)m6810.c,$(SWTP6800MP_A2_COMMON)bootrom.c,$(SWTP6800MP_A2_COMMON)dc-4.c,\
+	$(SWTP6800MP_A2_COMMON)mp-s.c,$(SWTP6800MP_A2_DIR)mp-a2_sys.c,$(SWTP6800MP_A2_COMMON)mp-b2.c,\
+	$(SWTP6800MP_A2_COMMON)mp-8m.c,$(SWTP6800MP_A2_COMMON)i2716.c
+SWTP6800MP_A2_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP6800MP_A2_DIR))/DEF=($(CC_DEFS))
 
 #
 # Digital Equipment VAX Simulator Definitions.
@@ -657,14 +673,15 @@ I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS))
 .IFDEF ALPHA_OR_IA64
 ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
       ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 VAX VAX780 SDS \
-      I7094 SWTP
+      I7094 SWTP6800MP-A SWTP6800MP-A2
         $! No further actions necessary
 .ELSE
 #
 # Else We Are On VAX And Build Everything EXCEPT the 64b simulators
 #
 ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \
-      NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS SWTP
+      NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS SWTP6800MP-A \
+      SWTP6800MP-A2
         $! No further actions necessary
 .ENDIF
 
@@ -1036,11 +1053,22 @@ $(SDS_LIB) : $(SDS_SOURCE)
         $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
         $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
 
-$(SWTP_LIB) : $(SWTP_SOURCE)
+$(SWTP6800MP_A_LIB) : $(SWTP6800MP_A_SOURCE)
         $!
         $! Building The $(SWTP_LIB) Library.
         $!
-        $ $(CC)$(SWTP_OPTIONS) -
+        $ $(CC)$(SWTP6800MP_A_OPTIONS) -
+               /OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
+        $ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
+             LIBRARY/CREATE $(MMS$TARGET)
+        $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
+        $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
+
+$(SWTP6800MP_A2_LIB) : $(SWTP6800MP_A2_SOURCE)
+        $!
+        $! Building The $(SWTP_LIB) Library.
+        $!
+        $ $(CC)$(SWTP6800MP_A2_OPTIONS) -
                /OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
         $ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
              LIBRARY/CREATE $(MMS$TARGET)
@@ -1435,16 +1463,28 @@ $(BIN_DIR)SDS-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SDS_LIB)
                  $(BLD_DIR)SCP.OBJ,$(SDS_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
         $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
 
-SWTP : $(BIN_DIR)SWTP-$(ARCH).EXE
-        $! SWTP done
+SWTP6800MP-A : $(BIN_DIR)SWTP6800MP-A-$(ARCH).EXE
+        $! SWTP6800MP-A done
 
-$(BIN_DIR)SWTP-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SWTP_LIB)
+$(BIN_DIR)SWTP6800MP-A-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SWTP6800MP_A_LIB)
         $!
-        $! Building The $(BIN_DIR)SWTP-$(ARCH).EXE Simulator.
+        $! Building The $(BIN_DIR)SWTP6800MP-A-$(ARCH).EXE Simulator.
         $!
         $ $(CC)$(SWTP_OPTIONS)/OBJ=$(BLD_DIR) SCP.C
-        $ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)SWTP-$(ARCH).EXE -
-               $(BLD_DIR)SCP.OBJ,$(SWTP_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
+        $ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)SWTP6800MP-A-$(ARCH).EXE -
+               $(BLD_DIR)SCP.OBJ,$(SWTP6800MP_A_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
+        $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
+
+SWTP6800MP-A2 : $(BIN_DIR)SWTP6800MP-A2-$(ARCH).EXE
+        $! SWTP6800MP-A2 done
+
+$(BIN_DIR)SWTP6800MP-A2-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SWTP6800MP_A2_LIB)
+        $!
+        $! Building The $(BIN_DIR)SWTP6800MP-A2-$(ARCH).EXE Simulator.
+        $!
+        $ $(CC)$(SWTP_OPTIONS)/OBJ=$(BLD_DIR) SCP.C
+        $ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)SWTP6800MP-A2-$(ARCH).EXE -
+               $(BLD_DIR)SCP.OBJ,$(SWTP6800MP_A2_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
         $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
 
 VAX : $(BIN_DIR)VAX-$(ARCH).EXE
diff --git a/doc/simh_doc.doc b/doc/simh_doc.doc
index aaa7d367..2d69a511 100644
Binary files a/doc/simh_doc.doc and b/doc/simh_doc.doc differ
diff --git a/doc/simh_faq.doc b/doc/simh_faq.doc
index f20deb35..09e08c9f 100644
Binary files a/doc/simh_faq.doc and b/doc/simh_faq.doc differ
diff --git a/makefile b/makefile
index e10f058a..cd253954 100644
--- a/makefile
+++ b/makefile
@@ -29,6 +29,10 @@
 # Asynchronous I/O support can be disabled if GNU make is invoked with
 # NOASYNCH=1 on the command line.
 #
+# For linting (or other code analyzers) make may be invoked similar to:
+#
+#   make GCC=cppcheck CC_OUTSPEC= LDFLAGS= CFLAGS_G="--enable=all --template=gcc" CC_STD=--std=c99
+#
 # CC Command (and platform available options).  (Poor man's autoconf)
 #
 # building the pdp11, or any vax simulator could use networking support
@@ -80,6 +84,10 @@ ifeq ($(WIN32),)  #*nix Environments (&& cygwin)
     ifeq (Darwin,$(OSTYPE))
       OSNAME = OSX
       LIBEXT = dylib
+      # OSX's XCode gcc doesn't support LTO, but gcc built to explicitly enable it will work
+      ifeq (,$(shell $(GCC) -v /dev/null 2>&1 | grep '\-\-enable-lto'))
+        LTO_EXCLUDE_VERSIONS += $(GCC_VERSION)
+      endif
     else
       ifeq (Linux,$(OSTYPE))
         LIBPATH := $(sort $(foreach lib,$(shell /sbin/ldconfig -p | grep ' => /' | sed 's/^.* => //'),$(dir $(lib))))
@@ -361,7 +369,9 @@ ifneq ($(DONT_USE_READER_THREAD),)
   NETWORK_OPT += -DDONT_USE_READER_THREAD
 endif
 
-CC = $(GCC) -std=c99 -U__STRICT_ANSI__ $(CFLAGS_G) $(CFLAGS_O) -I . $(OS_CCDEFS) $(ROMS_OPT)
+CC_STD = -std=c99
+CC_OUTSPEC = -o $@
+CC = $(GCC) $(CC_STD) -U__STRICT_ANSI__ $(CFLAGS_G) $(CFLAGS_O) -I . $(OS_CCDEFS) $(ROMS_OPT)
 LDFLAGS = $(OS_LDFLAGS) $(NETWORK_LDFLAGS) $(LDFLAGS_O)
 
 #
@@ -588,10 +598,15 @@ SDS = ${SDSD}/sds_cpu.c ${SDSD}/sds_drm.c ${SDSD}/sds_dsk.c ${SDSD}/sds_io.c \
 	${SDSD}/sds_stddev.c ${SDSD}/sds_sys.c
 SDS_OPT = -I ${SDSD}
 
-SWTPD = swtp
-SWTP = ${SWTPD}/swtp_cpu.c ${SWTPD}/swtp_dsk.c ${SWTPD}/swtp_sio.c \
-	${SWTPD}/swtp_sys.c
-SWTP_OPT = -I ${SWTPD}
+SWTP6800D = swtp6800/swtp6800
+SWTP6800C = swtp6800/common
+SWTP6800MP-A = ${SWTP6800C}/mp-a.c ${SWTP6800C}/m6800.c ${SWTP6800C}/m6810.c \
+	${SWTP6800C}/bootrom.c ${SWTP6800C}/dc-4.c ${SWTP6800C}/mp-s.c ${SWTP6800D}/mp-a_sys.c \
+	${SWTP6800C}/mp-b2.c ${SWTP6800C}/mp-8m.c
+SWTP6800MP-A2 = ${SWTP6800C}/mp-a2.c ${SWTP6800C}/m6800.c ${SWTP6800C}/m6810.c \
+	${SWTP6800C}/bootrom.c ${SWTP6800C}/dc-4.c ${SWTP6800C}/mp-s.c ${SWTP6800D}/mp-a2_sys.c \
+	${SWTP6800C}/mp-b2.c ${SWTP6800C}/mp-8m.c ${SWTP6800C}/i2716.c
+SWTP6800_OPT = -I ${SWTP6800D}
 
 
 #
@@ -600,7 +615,7 @@ SWTP_OPT = -I ${SWTPD}
 ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \
 	vax vax780 nova eclipse hp2100 i1401 i1620 s3 \
 	altair altairz80 gri i7094 ibm1130 id16 \
-	id32 sds lgp h316 swtp
+	id32 sds lgp h316 swtp6800mp-a swtp6800mp-a2
 
 all : ${ALL}
 
@@ -615,9 +630,9 @@ endif
 ${BIN}BuildROMs${EXE} :
 	${MKDIRBIN}
 ifeq (agcc,$(findstring agcc,$(firstword $(CC))))
-	gcc $(wordlist 2,1000,${CC}) sim_BuildROMs.c -o $@
+	gcc $(wordlist 2,1000,${CC}) sim_BuildROMs.c $(CC_OUTSPEC)
 else
-	${CC} sim_BuildROMs.c -o $@
+	${CC} sim_BuildROMs.c $(CC_OUTSPEC)
 endif
 ifeq ($(WIN32),)
 	$@
@@ -637,160 +652,166 @@ pdp1 : ${BIN}pdp1${EXE}
 
 ${BIN}pdp1${EXE} : ${PDP1} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP1} ${SIM} ${PDP1_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP1} ${SIM} ${PDP1_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp4 : ${BIN}pdp4${EXE}
 
 ${BIN}pdp4${EXE} : ${PDP18B} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP18B} ${SIM} ${PDP4_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP18B} ${SIM} ${PDP4_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp7 : ${BIN}pdp7${EXE}
 
 ${BIN}pdp7${EXE} : ${PDP18B} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP18B} ${SIM} ${PDP7_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP18B} ${SIM} ${PDP7_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp8 : ${BIN}pdp8${EXE}
 
 ${BIN}pdp8${EXE} : ${PDP8} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP8} ${SIM} ${PDP8_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP8} ${SIM} ${PDP8_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp9 : ${BIN}pdp9${EXE}
 
 ${BIN}pdp9${EXE} : ${PDP18B} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP18B} ${SIM} ${PDP9_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP18B} ${SIM} ${PDP9_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp15 : ${BIN}pdp15${EXE}
 
 ${BIN}pdp15${EXE} : ${PDP18B} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP18B} ${SIM} ${PDP15_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP18B} ${SIM} ${PDP15_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp10 : ${BIN}pdp10${EXE}
 
 ${BIN}pdp10${EXE} : ${PDP10} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP10} ${SIM} ${PDP10_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP10} ${SIM} ${PDP10_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 pdp11 : ${BIN}pdp11${EXE}
 
 ${BIN}pdp11${EXE} : ${PDP11} ${SIM}
 	${MKDIRBIN}
-	${CC} ${PDP11} ${SIM} ${PDP11_OPT} -o $@ ${LDFLAGS}
+	${CC} ${PDP11} ${SIM} ${PDP11_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 vax : ${BIN}vax${EXE}
 
 ${BIN}vax${EXE} : ${VAX} ${SIM} ${BUILD_ROMS}
 	${MKDIRBIN}
-	${CC} ${VAX} ${SIM} ${VAX_OPT} -o $@ ${LDFLAGS}
+	${CC} ${VAX} ${SIM} ${VAX_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 vax780 : ${BIN}vax780${EXE}
 
 ${BIN}vax780${EXE} : ${VAX780} ${SIM} ${BUILD_ROMS}
 	${MKDIRBIN}
-	${CC} ${VAX780} ${SIM} ${VAX780_OPT} -o $@ ${LDFLAGS}
+	${CC} ${VAX780} ${SIM} ${VAX780_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 nova : ${BIN}nova${EXE}
 
 ${BIN}nova${EXE} : ${NOVA} ${SIM}
 	${MKDIRBIN}
-	${CC} ${NOVA} ${SIM} ${NOVA_OPT} -o $@ ${LDFLAGS}
+	${CC} ${NOVA} ${SIM} ${NOVA_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 eclipse : ${BIN}eclipse${EXE}
 
 ${BIN}eclipse${EXE} : ${ECLIPSE} ${SIM}
 	${MKDIRBIN}
-	${CC} ${ECLIPSE} ${SIM} ${ECLIPSE_OPT} -o $@ ${LDFLAGS}
+	${CC} ${ECLIPSE} ${SIM} ${ECLIPSE_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 h316 : ${BIN}h316${EXE}
 
 ${BIN}h316${EXE} : ${H316} ${SIM}
 	${MKDIRBIN}
-	${CC} ${H316} ${SIM} ${H316_OPT} -o $@ ${LDFLAGS}
+	${CC} ${H316} ${SIM} ${H316_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 hp2100 : ${BIN}hp2100${EXE}
 
 ${BIN}hp2100${EXE} : ${HP2100} ${SIM}
 	${MKDIRBIN}
-	${CC} ${HP2100} ${SIM} ${HP2100_OPT} -o $@ ${LDFLAGS}
+	${CC} ${HP2100} ${SIM} ${HP2100_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 i1401 : ${BIN}i1401${EXE}
 
 ${BIN}i1401${EXE} : ${I1401} ${SIM}
 	${MKDIRBIN}
-	${CC} ${I1401} ${SIM} ${I1401_OPT} -o $@ ${LDFLAGS}
+	${CC} ${I1401} ${SIM} ${I1401_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 i1620 : ${BIN}i1620${EXE}
 
 ${BIN}i1620${EXE} : ${I1620} ${SIM}
 	${MKDIRBIN}
-	${CC} ${I1620} ${SIM} ${I1620_OPT} -o $@ ${LDFLAGS}
+	${CC} ${I1620} ${SIM} ${I1620_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 i7094 : ${BIN}i7094${EXE}
 
 ${BIN}i7094${EXE} : ${I7094} ${SIM}
 	${MKDIRBIN}
-	${CC} ${I7094} ${SIM} ${I7094_OPT} -o $@ ${LDFLAGS}
+	${CC} ${I7094} ${SIM} ${I7094_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 ibm1130 : ${BIN}ibm1130${EXE}
 
 ${BIN}ibm1130${EXE} : ${IBM1130}
 	${MKDIRBIN}
-	${CC} ${IBM1130} ${SIM} ${IBM1130_OPT} -o $@ ${LDFLAGS}
+	${CC} ${IBM1130} ${SIM} ${IBM1130_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 s3 : ${BIN}s3${EXE}
 
 ${BIN}s3${EXE} : ${S3} ${SIM}
 	${MKDIRBIN}
-	${CC} ${S3} ${SIM} ${S3_OPT} -o $@ ${LDFLAGS}
+	${CC} ${S3} ${SIM} ${S3_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 altair : ${BIN}altair${EXE}
 
 ${BIN}altair${EXE} : ${ALTAIR} ${SIM}
 	${MKDIRBIN}
-	${CC} ${ALTAIR} ${SIM} ${ALTAIR_OPT} -o $@ ${LDFLAGS}
+	${CC} ${ALTAIR} ${SIM} ${ALTAIR_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 altairz80 : ${BIN}altairz80${EXE}
 
 ${BIN}altairz80${EXE} : ${ALTAIRZ80} ${SIM}
 	${MKDIRBIN}
-	${CC} ${ALTAIRZ80} ${SIM} ${ALTAIRZ80_OPT} -o $@ ${LDFLAGS}
+	${CC} ${ALTAIRZ80} ${SIM} ${ALTAIRZ80_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 gri : ${BIN}gri${EXE}
 
 ${BIN}gri${EXE} : ${GRI} ${SIM}
 	${MKDIRBIN}
-	${CC} ${GRI} ${SIM} ${GRI_OPT} -o $@ ${LDFLAGS}
+	${CC} ${GRI} ${SIM} ${GRI_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 lgp : ${BIN}lgp${EXE}
 
 ${BIN}lgp${EXE} : ${LGP} ${SIM}
 	${MKDIRBIN}
-	${CC} ${LGP} ${SIM} ${LGP_OPT} -o $@ ${LDFLAGS}
+	${CC} ${LGP} ${SIM} ${LGP_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 id16 : ${BIN}id16${EXE}
 
 ${BIN}id16${EXE} : ${ID16} ${SIM}
 	${MKDIRBIN}
-	${CC} ${ID16} ${SIM} ${ID16_OPT} -o $@ ${LDFLAGS}
+	${CC} ${ID16} ${SIM} ${ID16_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 id32 : ${BIN}id32${EXE}
 
 ${BIN}id32${EXE} : ${ID32} ${SIM}
 	${MKDIRBIN}
-	${CC} ${ID32} ${SIM} ${ID32_OPT} -o $@ ${LDFLAGS}
+	${CC} ${ID32} ${SIM} ${ID32_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
 sds : ${BIN}sds${EXE}
 
 ${BIN}sds${EXE} : ${SDS} ${SIM}
 	${MKDIRBIN}
-	${CC} ${SDS} ${SIM} ${SDS_OPT} -o $@ ${LDFLAGS}
+	${CC} ${SDS} ${SIM} ${SDS_OPT} $(CC_OUTSPEC) ${LDFLAGS}
 
-swtp : ${BIN}swtp${EXE}
+swtp6800mp-a : ${BIN}swtp6800mp-a${EXE}
 
-${BIN}swtp${EXE} : ${SWTP} ${SIM}
+${BIN}swtp6800mp-a${EXE} : ${SWTP6800MP-A} ${SIM}
 	${MKDIRBIN}
-	${CC} ${SWTP} ${SIM} ${SWTP_OPT} -o $@ ${LDFLAGS}
+	${CC} ${SWTP6800MP-A} ${SIM} ${SWTP6800_OPT} $(CC_OUTSPEC) ${LDFLAGS}
+
+swtp6800mp-a2 : ${BIN}swtp6800mp-a2${EXE}
+
+${BIN}swtp6800mp-a2${EXE} : ${SWTP6800MP-A2} ${SIM}
+	${MKDIRBIN}
+	${CC} ${SWTP6800MP-A2} ${SIM} ${SWTP6800_OPT} $(CC_OUTSPEC) ${LDFLAGS}
diff --git a/scp.c b/scp.c
index 37180e5a..d21d188c 100644
--- a/scp.c
+++ b/scp.c
@@ -415,8 +415,10 @@ t_stat shift_args (char *do_arg[], size_t arg_count);
 t_stat set_on (int32 flag, char *cptr);
 t_stat set_verify (int32 flag, char *cptr);
 t_stat set_message (int32 flag, char *cptr);
+t_stat set_quiet (int32 flag, char *cptr);
 t_stat set_asynch (int32 flag, char *cptr);
 t_stat do_cmd_label (int32 flag, char *cptr, char *label);
+void int_handler (int signal);
 
 
 /* Global data */
@@ -453,7 +455,7 @@ FILEREF *sim_log_ref = NULL;                            /* log file file referen
 FILE *sim_deb = NULL;                                   /* debug file */
 FILEREF *sim_deb_ref = NULL;                            /* debug file file reference */
 static FILE *sim_gotofile;                              /* the currently open do file */
-static int32 sim_goto_line;                             /* the current line number in the currently open do file */
+static int32 sim_goto_line[MAX_DO_NEST_LVL+1];          /* the current line number in the currently open do file */
 static int32 sim_do_echo = 0;                           /* the echo status of the currently open do file */
 static int32 sim_show_message = 1;                      /* the message display status of the currently open do file */
 static int32 sim_on_inherit = 0;                        /* the inherit status of on state and conditions when executing do files */
@@ -462,6 +464,7 @@ int32 sim_do_depth = 0;
 static int32 sim_on_check[MAX_DO_NEST_LVL+1];
 static char *sim_on_actions[MAX_DO_NEST_LVL+1][SCPE_MAX_ERR+1];
 static char sim_do_filename[MAX_DO_NEST_LVL+1][CBUFSIZE];
+static char *sim_do_label[MAX_DO_NEST_LVL+1];
 
 static t_stat sim_last_cmd_stat;                        /* Command Status */
 
@@ -674,9 +677,13 @@ static CTAB cmd_table[] = {
       "set on inherit           enables inheritance of ON state and actions into do command files\n"
       "set on noinherit         disables inheritance of ON state and actions into do command files\n"
       "set verify               re-enables display of command file processed commands\n"
+      "set verbose              re-enables display of command file processed commands\n"
       "set noverify             disables display of command file processed commands\n"
+      "set noverbose            disables display of command file processed commands\n"
       "set message              re-enables display of command file error messages\n"
       "set nomessage            disables display of command file error messages\n"
+      "set quiet                disables suppression of some output and messages\n"
+      "set noquiet              re-enables suppression of some output and messages\n"
       "set <dev> OCT|DEC|HEX    set device display radix\n"
       "set <dev> ENABLED        enable device\n"
       "set <dev> DISABLED       disable device\n"
@@ -709,7 +716,7 @@ static CTAB cmd_table[] = {
       "sh{ow} <unit> {arg,...}  show unit parameters\n"
       "sh{ow} on                show on condition actions\n"  },
     { "DO", &do_cmd, 1,
-      "do {-V} {-O} {-E} <file> {arg,arg...}\b"
+      "do {-V} {-O} {-E} {-Q} <file> {arg,arg...}\b"
       "                         process command file\n" },
     { "GOTO", &goto_cmd, 1,
       "goto <label>             goto label in command file\n" },
@@ -761,6 +768,7 @@ int setenv(const char *envname, const char *envval, int overwrite)
 int main (int argc, char *argv[])
 {
 char cbuf[CBUFSIZE], gbuf[CBUFSIZE], *cptr;
+char nbuf[PATH_MAX + 7];
 int32 i, sw;
 t_bool lookswitch;
 t_stat stat, stat_nomessage;
@@ -838,11 +846,19 @@ if (!sim_quiet) {
 if (sim_dflt_dev == NULL)                               /* if no default */
     sim_dflt_dev = sim_devices[0];
 
-stat = do_cmd (-1, "simh.rc");                          /* simh.rc proc cmd file */
+cptr = getenv("HOME");
+if (cptr == NULL)
+    cptr = getenv("HOMEPATH");
+if (cptr && sizeof (nbuf) > strlen (cptr) + strlen ("/simh.ini") + 1) {
+    sprintf(nbuf, "%s%ssimh.ini", cptr, strchr (cptr, '/') ? "/" : "\\");
+    stat = do_cmd (-1, nbuf) & ~SCPE_NOMESSAGE;         /* simh.ini proc cmd file */
+    }
+if (stat == SCPE_OPENERR)
+    stat = do_cmd (-1, "simh.ini");                     /* simh.ini proc cmd file */
 if (*cbuf)                                              /* cmd file arg? */
     stat = do_cmd (0, cbuf);                            /* proc cmd file */
 else if (*argv[0]) {                                    /* sim name arg? */
-    char nbuf[PATH_MAX + 7], *np;                       /* "path.ini" */
+    char *np;                                           /* "path.ini" */
     nbuf[0] = '"';                                      /* starting " */
     strncpy (nbuf + 1, argv[0], PATH_MAX + 1);          /* copy sim name */
     if (np = match_ext (nbuf, "EXE"))                   /* remove .exe */
@@ -851,6 +867,8 @@ else if (*argv[0]) {                                    /* sim name arg? */
     stat = do_cmd (-1, nbuf);                           /* proc cmd file */
     }
 
+stat = SCPE_BARE_STATUS(stat);                          /* remove possible flag */
+
 while (stat != SCPE_EXIT) {                             /* in case exit */
     if (cptr = sim_brk_getact (cbuf, CBUFSIZE))         /* pending action? */
         printf ("sim> %s\n", cptr);                     /* echo */
@@ -864,7 +882,7 @@ while (stat != SCPE_EXIT) {                             /* in case exit */
         else break;                                     /* otherwise exit */
     if (*cptr == 0)                                     /* ignore blank */
         continue;
-    sub_args (cbuf, gbuf, CBUFSIZE, argv);
+    sub_args (cbuf, gbuf, sizeof(gbuf), argv);
     if (sim_log)                                        /* log cmd */
         fprintf (sim_log, "sim> %s\n", cptr);
     cptr = get_glyph (cptr, gbuf, 0);                   /* get command glyph */
@@ -874,7 +892,7 @@ while (stat != SCPE_EXIT) {                             /* in case exit */
     else stat = SCPE_UNK;
     stat_nomessage = stat & SCPE_NOMESSAGE;             /* extract possible message supression flag */
     stat_nomessage = stat_nomessage || (!sim_show_message);/* Apply global suppression */
-    stat = stat & ~SCPE_NOMESSAGE;                      /* remove possible flag */
+    stat = SCPE_BARE_STATUS(stat);                      /* remove possible flag */
     sim_last_cmd_stat = stat;                           /* save command error status */
     if ((stat >= SCPE_BASE) && (!stat_nomessage)) {     /* error? */
         printf ("%s\n", sim_error_text (stat));
@@ -1021,25 +1039,35 @@ t_stat do_cmd (int32 flag, char *fcptr)
 return do_cmd_label (flag, fcptr, NULL);
 }
 
+static char *do_position(void)
+{
+static char cbuf[CBUFSIZE];
+
+sprintf (cbuf, "%s%s%s-%d", sim_do_filename[sim_do_depth], sim_do_label[sim_do_depth] ? "::" : "", sim_do_label[sim_do_depth] ? sim_do_label[sim_do_depth] : "", sim_goto_line[sim_do_depth]);
+return cbuf;
+}
+
 t_stat do_cmd_label (int32 flag, char *fcptr, char *label)
 {
 char *cptr, cbuf[CBUFSIZE], gbuf[CBUFSIZE], *c, quote, *do_arg[10];
 FILE *fpin;
-CTAB *cmdp;
+CTAB *cmdp = NULL;
 int32 echo, nargs, errabort, i;
 int32 saved_sim_do_echo = sim_do_echo, 
       saved_sim_show_message = sim_show_message,
-      saved_sim_on_inherit = sim_on_inherit;
-t_bool interactive, isdo, staying;
+      saved_sim_on_inherit = sim_on_inherit,
+      saved_sim_quiet = sim_quiet;
+t_bool staying;
 t_stat stat, stat_nomessage;
 char *ocptr;
 
 stat = SCPE_OK;
 staying = TRUE;
-interactive = (flag > 0);                               /* issued interactively? */
-if (interactive)                                        /* get switches */
-    GET_SWITCHES (fcptr);
-echo = sim_switches & SWMASK ('V');                     /* -v means echo */
+if (flag > 0)                                           /* need switches? */
+    GET_SWITCHES (fcptr);                               /* get switches */
+echo = (sim_switches & SWMASK ('V')) || sim_do_echo;    /* -v means echo */
+sim_quiet = (sim_switches & SWMASK ('Q')) || sim_quiet; /* -q means quiet */
+sim_on_inherit =(sim_switches & SWMASK ('O')) || sim_on_inherit; /* -o means inherit ON condition actions */
 
 errabort = sim_switches & SWMASK ('E');                 /* -e means abort on error */
 
@@ -1066,38 +1094,37 @@ if (do_arg [0] == NULL)                                 /* need at least 1 */
 if ((fpin = fopen (do_arg[0], "r")) == NULL) {          /* file failed to open? */
     strcat (strcpy (cbuf, do_arg[0]), ".sim");          /* try again with .sim extension */
     if ((fpin = fopen (cbuf, "r")) == NULL) {           /* failed a second time? */
-        if (flag == 0)                                      /* cmd line file? */
+        if (flag == 0)                                  /* cmd line file? */
              fprintf (stderr, "Can't open file %s\n", do_arg[0]);
-        if (flag > 1)
-            return SCPE_OPENERR | SCPE_NOMESSAGE;       /* return failure with flag */
-        else
-            return SCPE_OPENERR;                        /* return failure */
+        return SCPE_OPENERR;                            /* return failure */
         }
     }
-if (flag < 1)                                           /* start at level 1 */
-    flag = 1;
-++sim_do_depth;
-sim_on_check[sim_do_depth] = sim_on_check[sim_do_depth-1]; /* inherit On mode */
-if ((sim_switches & SWMASK ('O')) || sim_on_inherit) {  /* -o means inherit ON condition actions */
-    for (i=0; i<SCPE_MAX_ERR; i++) {                    /* replicate any on commands */
-        if (sim_on_actions[sim_do_depth-1][i]) {
-            sim_on_actions[sim_do_depth][i] = malloc(1+strlen(sim_on_actions[sim_do_depth-1][i]));
-            if (NULL == sim_on_actions[sim_do_depth][i]) {
-                while (--i >= 0) {
-                    free(sim_on_actions[sim_do_depth][i]);
-                    sim_on_actions[sim_do_depth][i] = NULL;
+if (flag >= 0) {                                        /* Only bump nesting from command or nested */
+    ++sim_do_depth;
+    if (sim_on_inherit) {                               /* inherit ON condition actions? */
+        sim_on_check[sim_do_depth] = sim_on_check[sim_do_depth-1]; /* inherit On mode */
+        for (i=0; i<SCPE_MAX_ERR; i++) {                /* replicate any on commands */
+            if (sim_on_actions[sim_do_depth-1][i]) {
+                sim_on_actions[sim_do_depth][i] = malloc(1+strlen(sim_on_actions[sim_do_depth-1][i]));
+                if (NULL == sim_on_actions[sim_do_depth][i]) {
+                    while (--i >= 0) {
+                        free(sim_on_actions[sim_do_depth][i]);
+                        sim_on_actions[sim_do_depth][i] = NULL;
+                        }
+                    sim_on_check[sim_do_depth] = 0;
+                    sim_brk_clract ();                  /* defang breakpoint actions */
+                    --sim_do_depth;                     /* unwind nesting */
+                    return SCPE_MEM;
                     }
-                sim_on_check[sim_do_depth] = 0;
-                sim_brk_clract ();                      /* defang breakpoint actions */
-                --sim_do_depth;                         /* unwind nesting */
-                return SCPE_MEM;
+                strcpy(sim_on_actions[sim_do_depth][i], sim_on_actions[sim_do_depth-1][i]);
                 }
-            strcpy(sim_on_actions[sim_do_depth][i], sim_on_actions[sim_do_depth-1][i]);
             }
         }
     }
 
 strcpy( sim_do_filename[sim_do_depth], do_arg[0]);      /* stash away do file name for possible use by 'call' command */
+sim_do_label[sim_do_depth] = label;                     /* stash away do label for possible use in messages */
+sim_goto_line[sim_do_depth] = 0;
 if (label) {
     sim_gotofile = fpin;
     sim_do_echo = echo;
@@ -1116,9 +1143,9 @@ do {
     ocptr = cptr = sim_brk_getact (cbuf, CBUFSIZE);     /* get bkpt action */
     if (!ocptr) {                                       /* no pending action? */
         ocptr = cptr = read_line (cbuf, CBUFSIZE, fpin); /* get cmd line */
-        sim_goto_line += 1;
+        sim_goto_line[sim_do_depth] += 1;
         }
-    sub_args (cbuf, gbuf, CBUFSIZE, do_arg);            /* substitute args */
+    sub_args (cbuf, gbuf, sizeof(gbuf), do_arg);        /* substitute args */
     if (cptr == NULL) {                                 /* EOF? */
         stat = SCPE_OK;                                 /* set good return */
         break;
@@ -1126,26 +1153,24 @@ do {
     if (*cptr == 0)                                     /* ignore blank */
         continue;
     if (echo) {                                         /* echo if -v */
-        printf("do> %s\n", cptr);
+        printf("%s> %s\n", do_position(), cptr);
         if (sim_log)
-            fprintf (sim_log, "do> %s\n", cptr);
+            fprintf (sim_log, "%s> %s\n", do_position(), cptr);
         }
     if (*cptr == ':')                                   /* ignore label */
         continue;
     cptr = get_glyph (cptr, gbuf, 0);                   /* get command glyph */
     sim_switches = 0;                                   /* init switches */
-    isdo = FALSE;
     sim_gotofile = fpin;
     sim_do_echo = echo;
     if (cmdp = find_cmd (gbuf)) {                       /* lookup command */
         if (cmdp->action == &return_cmd)                /* RETURN command? */
             break;                                      /*    done! */
-        isdo = (cmdp->action == &do_cmd);
-        if (isdo) {                                     /* DO command? */
-            if (flag >= MAX_DO_NEST_LVL)                /* nest too deep? */
+        if (cmdp->action == &do_cmd) {                  /* DO command? */
+            if (sim_do_depth >= MAX_DO_NEST_LVL)        /* nest too deep? */
                 stat = SCPE_NEST;
             else
-                stat = do_cmd (flag + 1, cptr);         /* exec DO cmd */
+                stat = do_cmd (sim_do_depth+1, cptr);   /* exec DO cmd */
             }
         else
             if (cmdp->action == &shift_cmd)             /* SHIFT command */
@@ -1156,22 +1181,13 @@ do {
     else stat = SCPE_UNK;                               /* bad cmd given */
     stat_nomessage = stat & SCPE_NOMESSAGE;             /* extract possible message supression flag */
     stat_nomessage = stat_nomessage || (!sim_show_message);/* Apply global suppression */
-    stat = stat & ~SCPE_NOMESSAGE;                      /* remove possible flag */
+    stat = SCPE_BARE_STATUS(stat);                      /* remove possible flag */
     if ((stat != SCPE_OK) ||
         ((cmdp->action != &return_cmd) &&
          (cmdp->action != &goto_cmd) &&
          (cmdp->action != &on_cmd) &&
          (cmdp->action != &echo_cmd)))
         sim_last_cmd_stat = stat;                       /* save command error status */
-    if ((stat >= SCPE_BASE) && (stat != SCPE_EXIT) &&   /* error from cmd? */
-        (stat != SCPE_STEP)) {
-        if (!echo && !sim_quiet &&                      /* report if not echoing */
-            (!isdo || stat_nomessage)) {                /* and not suppressing messages */
-                printf("%s%s%s-%d> %s\n", do_arg[0], sim_goto_line, label ? "::" : "", label ? label : "", sim_goto_line, ocptr);
-            if (sim_log)
-                fprintf (sim_log, "%s%s%s-%d> %s\n", do_arg[0], label ? "::" : "", label ? label : "", sim_goto_line, ocptr);
-            }
-        }
     switch (stat) {
         case SCPE_AFAIL:
             staying = (sim_on_check[sim_do_depth] &&        /* if trap action defined */
@@ -1186,8 +1202,17 @@ do {
         default:
             break;
         }
-    if ((staying || !interactive) &&                   /* report error if staying */
-        (stat >= SCPE_BASE) && !stat_nomessage) {      /* or in cmdline file */
+    if ((stat >= SCPE_BASE) && (stat != SCPE_EXIT) &&   /* error from cmd? */
+        (stat != SCPE_STEP)) {
+        if (!echo && !sim_quiet &&                      /* report if not echoing */
+            !stat_nomessage) {                          /* and not suppressing messages */
+            printf("%s> %s\n", do_position(), ocptr);
+            if (sim_log)
+                fprintf (sim_log, "%s> %s\n", do_position(), ocptr);
+            }
+        }
+    if ((flag <= 0) &&                                  /* report error if in cmdline/init file */
+        (stat >= SCPE_BASE) && !stat_nomessage) {
         printf ("%s\n", sim_error_text (stat));
         if (sim_log)
             fprintf (sim_log, "%s\n", sim_error_text (stat));
@@ -1206,28 +1231,30 @@ do {
 Cleanup_Return:
 fclose (fpin);                                          /* close file */
 sim_gotofile = NULL;
-sim_do_echo = saved_sim_do_echo;                        /* restore echo state we entered with */
 if (flag >= 0) {
+    sim_do_echo = saved_sim_do_echo;                    /* restore echo state we entered with */
     sim_show_message = saved_sim_show_message;          /* restore message display state we entered with */
     sim_on_inherit = saved_sim_on_inherit;              /* restore ON inheritance state we entered with */
     }
-for (i=0; i<SCPE_MAX_ERR; i++) {                        /* release any on commands */
-    free (sim_on_actions[sim_do_depth][i]);
-    sim_on_actions[sim_do_depth][i] = NULL;
+sim_quiet = saved_sim_quiet;                            /* restore quiet mode we entered with */
+if ((flag >= 0) || (!sim_on_inherit)) {
+    for (i=0; i<SCPE_MAX_ERR; i++) {                    /* release any on commands */
+        free (sim_on_actions[sim_do_depth][i]);
+        sim_on_actions[sim_do_depth][i] = NULL;
+        }
+    sim_on_check[sim_do_depth] = 0;                     /* clear on mode */
     }
-sim_on_check[sim_do_depth] = 0;                         /* clear on mode */
+if (flag >= 0)
+    --sim_do_depth;                                     /* unwind nesting */
 sim_brk_clract ();                                      /* defang breakpoint actions */
---sim_do_depth;                                         /* unwind nesting */
-if (cmdp && (cmdp->action == &return_cmd)) {            /* return command? */
-    if (0 == *cptr)                                     /* No Argument? */
-        return stat | SCPE_NOMESSAGE;                   /* return last command status (suppressing message)*/
+if (cmdp && (cmdp->action == &return_cmd) && (0 != *cptr)) { /* return command with argument? */
     sim_string_to_stat (cptr, &stat);
     sim_last_cmd_stat = stat;                           /* save explicit status as command error status */
     if (sim_switches & SWMASK ('Q'))
         stat |= SCPE_NOMESSAGE;                         /* suppress error message display (in caller) if requested */
     return stat;                                        /* return with explicit return status */
     }
-return (stat == SCPE_EXIT) ? SCPE_EXIT : SCPE_OK;
+return stat | SCPE_NOMESSAGE;                           /* suppress message since we've already done that here */
 }
 
 /* Substitute_args - replace %n tokens in 'instr' with the do command's arguments
@@ -1256,7 +1283,9 @@ return (stat == SCPE_EXIT) ? SCPE_EXIT : SCPE_OK;
           %CTIME%             Www Mmm dd hh:mm:ss yyyy
           %STATUS%            Status value from the last command executed
           %TSTATUS%           The text form of the last status value
-          %SIM_VERIFY%        The Verify mode of the current Do command file
+          %SIM_VERIFY%        The Verify/Verbose mode of the current Do command file
+          %SIM_VERBOSE%       The Verify/Verbose mode of the current Do command file
+          %SIM_QUIET%         The Quiet mode of the current Do command file
    Environment variable lookups are done first with the precise name between 
    the % characters and if that fails, then the name between the % characters
    is upcased and a lookup of that valus is attempted.
@@ -1307,7 +1336,7 @@ for (; *ip && (op < oend); ) {
                                 char quote = '"';
                                 if (strchr(do_arg[i], quote))
                                     quote = '\'';
-                                sprintf(&rbuf[strlen(rbuf)], "%s%s\"", (i != 1) ? " " : "", quote, do_arg[i], quote);
+                                sprintf(&rbuf[strlen(rbuf)], "%s%c%s%c\"", (i != 1) ? " " : "", quote, do_arg[i], quote);
                                 }
                             else
                                 sprintf(&rbuf[strlen(rbuf)], "%s%s", (i != 1) ? " " : "", do_arg[i]);
@@ -1356,6 +1385,14 @@ for (; *ip && (op < oend); ) {
                         sprintf (rbuf, "%s", sim_do_echo ? "-V" : "");
                         ap = rbuf;
                         }
+                    else if (!strcmp ("SIM_VERBOSE", gbuf)) {
+                        sprintf (rbuf, "%s", sim_do_echo ? "-V" : "");
+                        ap = rbuf;
+                        }
+                    else if (!strcmp ("SIM_QUIET", gbuf)) {
+                        sprintf (rbuf, "%s", sim_quiet ? "-Q" : "");
+                        ap = rbuf;
+                        }
                     else if (!strcmp ("SIM_MESSAGE", gbuf)) {
                         sprintf (rbuf, "%s", sim_show_message ? "" : "-Q");
                         ap = rbuf;
@@ -1457,19 +1494,19 @@ t_stat goto_cmd (int32 flag, char *fcptr)
 char *cptr, cbuf[CBUFSIZE], gbuf[CBUFSIZE], gbuf1[CBUFSIZE];
 long fpos;
 int32 saved_do_echo = sim_do_echo;
-int32 saved_goto_line = sim_goto_line;
+int32 saved_goto_line = sim_goto_line[sim_do_depth];
 
 if (NULL == sim_gotofile) return SCPE_UNK;              /* only valid inside of do_cmd */
 get_glyph (fcptr, gbuf1, 0);
 if ('\0' == gbuf1[0]) return SCPE_ARG;                  /* unspecified goto target */
 fpos = ftell(sim_gotofile);                             /* Save start position */
 rewind(sim_gotofile);                                   /* start search for label */
-sim_goto_line = 0;                                      /* reset line number */
+sim_goto_line[sim_do_depth] = 0;                        /* reset line number */
 sim_do_echo = 0;                                        /* Don't echo while searching for label */
 while (1) {
     cptr = read_line (cbuf, CBUFSIZE, sim_gotofile);    /* get cmd line */
     if (cptr == NULL) break;                            /* exit on eof */
-    sim_goto_line += 1;                                 /* record line number */
+    sim_goto_line[sim_do_depth] += 1;                   /* record line number */
     if (*cptr == 0) continue;                           /* ignore blank */
     if (*cptr != ':') continue;                         /* ignore non-labels */
     ++cptr;                                             /* skip : */
@@ -1479,15 +1516,15 @@ while (1) {
         sim_brk_clract ();                              /* goto defangs current actions */
         sim_do_echo = saved_do_echo;                    /* restore echo mode */
         if (sim_do_echo)                                /* echo if -v */
-            printf("do> %s\n", cbuf);
+            printf("%s> %s\n", do_position(), cbuf);
         if (sim_do_echo && sim_log)
-            fprintf (sim_log, "do> %s\n", cbuf);
+            fprintf (sim_log, "%s> %s\n", do_position(), cbuf);
         return SCPE_OK;
         }
     }
 sim_do_echo = saved_do_echo;                            /* restore echo mode */
 fseek(sim_gotofile, fpos, SEEK_SET);                    /* resture start position */
-sim_goto_line = saved_goto_line;                        /* restore start line number */
+sim_goto_line[sim_do_depth] = saved_goto_line;          /* restore start line number */
 return SCPE_ARG;
 }
 
@@ -1571,7 +1608,7 @@ return SCPE_OK;                                         /* we're happy doing not
 
 t_stat set_on (int32 flag, char *cptr)
 {
-if ((flag) && (cptr)) {                                 /* Set ON with arg */
+if ((flag) && (cptr) && (*cptr)) {                      /* Set ON with arg */
     char gbuf[CBUFSIZE];
 
     cptr = get_glyph (cptr, gbuf, 0);                   /* get command glyph */
@@ -1579,9 +1616,9 @@ if ((flag) && (cptr)) {                                 /* Set ON with arg */
          (MATCH_CMD(gbuf,"NOINHERIT"))) ||
         (*cptr))
         return SCPE_2MARG;
-    if (0 == MATCH_CMD(gbuf,"INHERIT"))
+    if ((gbuf[0]) && (0 == MATCH_CMD(gbuf,"INHERIT")))
         sim_on_inherit = 1;
-    if (0 == MATCH_CMD(gbuf,"NOINHERIT"))
+    if ((gbuf[0]) && (0 == MATCH_CMD(gbuf,"NOINHERIT")))
         sim_on_inherit = 0;
     return SCPE_OK;
     }
@@ -1627,6 +1664,18 @@ sim_show_message = flag;
 return SCPE_OK;
 }
 
+/* Set quiet/noquiet routine */
+
+t_stat set_quiet (int32 flag, char *cptr)
+{
+if (cptr && (*cptr != 0))                               /* now eol? */
+    return SCPE_2MARG;
+if (flag == sim_quiet)                                  /* already set correctly? */
+    return SCPE_OK;
+sim_quiet = flag;
+return SCPE_OK;
+}
+
 /* Set asynch/noasynch routine */
 
 t_stat sim_set_asynch (int32 flag, char *cptr)
@@ -1726,9 +1775,13 @@ static CTAB set_glob_tab[] = {
     { "ON", &set_on, 1 },
     { "NOON", &set_on, 0 },
     { "VERIFY", &set_verify, 1 },
+    { "VEBOSE", &set_verify, 1 },
     { "NOVERIFY", &set_verify, 0 },
+    { "NOVEBOSE", &set_verify, 0 },
     { "MESSAGE", &set_message, 1 },
     { "NOMESSAGE", &set_message, 0 },
+    { "QUIET", &set_quiet, 1 },
+    { "NOQUIET", &set_quiet, 0 },
     { NULL, NULL, 0 }
     };
 
@@ -2883,7 +2936,7 @@ if (!(uptr->flags & UNIT_ATT))                          /* not attached? */
     if (sim_switches & SIM_SW_REST)                     /* restoring? */
         return SCPE_OK;                                 /* allow detach */
     else
-        return SCPE_UNATT;                              /* complain */
+        return SCPE_NOATT;                               /* complain */
 if ((dptr = find_dev_from_unit (uptr)) == NULL)
     return SCPE_OK;
 if (uptr->flags & UNIT_BUF) {
@@ -3419,7 +3472,6 @@ t_value pcv;
 t_stat r;
 DEVICE *dptr;
 UNIT *uptr;
-void int_handler (int signal);
 
 GET_SWITCHES (cptr);                                    /* get switches */
 sim_step = 0;
@@ -4335,9 +4387,9 @@ while (isspace (*cptr))                                 /* trim leading spc */
     cptr++;
 if (*cptr == ';') {                                     /* ignore comment */
     if (sim_do_echo)                                    /* echo comments if -v */
-        printf("do> %s\n", cptr);
+        printf("%s> %s\n", do_position(), cptr);
     if (sim_do_echo && sim_log)
-        fprintf (sim_log, "do> %s\n", cptr);
+        fprintf (sim_log, "%s> %s\n", do_position(), cptr);
     *cptr = 0;
     }
 
diff --git a/scp.h b/scp.h
index 03d23e8e..3ee43b97 100644
--- a/scp.h
+++ b/scp.h
@@ -135,7 +135,7 @@ void sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...);
 #else
 void _sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...);
 extern FILE *sim_deb;                                   /* debug file */
-#define sim_debug(dbits, dptr, ...) if (sim_deb && ((dptr)->dctrl & dbits)) _sim_debug (dbits, dptr, __VA_ARGS__); else 0
+#define sim_debug(dbits, dptr, ...) if (sim_deb && ((dptr)->dctrl & dbits)) _sim_debug (dbits, dptr, __VA_ARGS__); else (void)0
 #endif
 void fprint_stopped_gen (FILE *st, t_stat v, REG *pc, DEVICE *dptr);
 
diff --git a/sim_BuildROMs.c b/sim_BuildROMs.c
index 030ee370..8a3e6982 100644
--- a/sim_BuildROMs.c
+++ b/sim_BuildROMs.c
@@ -55,7 +55,7 @@
 
 int sim_make_ROM_include(const char *rom_filename,
                          int expected_size,
-                         int expected_checksum,
+                         unsigned int expected_checksum,
                          const char *include_filename, 
                          const char *rom_array_name)
 {
@@ -86,7 +86,7 @@ if (statb.st_size != expected_size) {
     return -1;
     }
 ROMData = malloc (statb.st_size);
-if (statb.st_size != fread (ROMData, sizeof(*ROMData), statb.st_size, rFile)) {
+if ((size_t)(statb.st_size) != fread (ROMData, sizeof(*ROMData), statb.st_size, rFile)) {
     printf ("Error reading '%s': %s\n", rom_filename, strerror(errno));
     fclose (rFile);
     free (ROMData);
@@ -116,7 +116,7 @@ if (iFile = fopen (include_filename, "r")) {
     IncludeData = malloc (statb.st_size);
 
     while (fgets (line, sizeof(line), iFile)) {
-        int byte;
+        unsigned int byte;
         char *c;
 
         if (memcmp ("0x",line,2))
diff --git a/sim_defs.h b/sim_defs.h
index 31c9a3db..47235e33 100644
--- a/sim_defs.h
+++ b/sim_defs.h
@@ -257,6 +257,7 @@ typedef uint32          t_addr;
 #define SCPE_KFLAG      0x1000                          /* tti data flag */
 #define SCPE_BREAK      0x2000                          /* tti break flag */
 #define SCPE_NOMESSAGE  0x10000000                      /* message display supression flag */
+#define SCPE_BARE_STATUS(stat) ((stat) & ~(SCPE_NOMESSAGE|SCPE_KFLAG|SCPE_BREAK))
 
 /* Print value format codes */
 
@@ -638,7 +639,7 @@ extern int32 sim_asynch_inst_latency;
         if (uptr->a_check_completion)                                            \
           uptr->a_check_completion (uptr);                                       \
       }                                                                          \
-    } else 0
+    } else (void)0
 #define AIO_ACTIVATE(caller, uptr, event_time)                                   \
     if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) {           \
       if (uptr->a_next) {                                                        \
@@ -663,7 +664,7 @@ extern int32 sim_asynch_inst_latency;
       if (sim_idle_wait)                                                         \
         pthread_cond_signal (&sim_asynch_wake);                                  \
       return SCPE_OK;                                                            \
-    } else 0
+    } else (void)0
 #else /* !USE_AIO_INTRINSICS */
 /* This approach uses a pthread mutex to manage access to the link list     */
 /* head sim_asynch_queue.  It will always work, but may be slower than the  */
@@ -692,7 +693,7 @@ extern int32 sim_asynch_inst_latency;
           }                                                                      \
       }                                                                          \
       pthread_mutex_unlock (&sim_asynch_lock);                                   \
-    } else 0
+    } else (void)0
 #define AIO_ACTIVATE(caller, uptr, event_time)                         \
     if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
       pthread_mutex_lock (&sim_asynch_lock);                           \
@@ -708,20 +709,20 @@ extern int32 sim_asynch_inst_latency;
         pthread_cond_signal (&sim_asynch_wake);                        \
       pthread_mutex_unlock (&sim_asynch_lock);                         \
       return SCPE_OK;                                                  \
-    } else 0
+    } else (void)0
 #endif /* USE_AIO_INTRINSICS */
 #define AIO_VALIDATE if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) abort()
 #define AIO_CHECK_EVENT                                                \
     if (0 > --sim_asynch_check) {                                      \
       AIO_UPDATE_QUEUE;                                                \
       sim_asynch_check = sim_asynch_inst_latency;                      \
-    } else 0
+    } else (void)0
 #define AIO_SET_INTERRUPT_LATENCY(instpersec)                                                   \
     if (1) {                                                                                    \
       sim_asynch_inst_latency = (int32)((((double)(instpersec))*sim_asynch_latency)/1000000000);\
       if (sim_asynch_inst_latency == 0)                                                         \
         sim_asynch_inst_latency = 1;                                                            \
-    } else 0
+    } else (void)0
 #else /* !SIM_ASYNCH_IO */
 #define AIO_UPDATE_QUEUE
 #define AIO_ACTIVATE(caller, uptr, event_time)
diff --git a/sim_disk.c b/sim_disk.c
index ee85441c..01613e53 100644
--- a/sim_disk.c
+++ b/sim_disk.c
@@ -301,7 +301,8 @@ return SCPE_ARG;
 
 t_stat sim_disk_show_fmt (FILE *st, UNIT *uptr, int32 val, void *desc)
 {
-int32 i, f = DK_GET_FMT (uptr);
+int32 f = DK_GET_FMT (uptr);
+size_t i;
 
 for (i = 0; i < DKUF_N_FMT; i++)
     if (fmts[i].fmtval == f) {
@@ -1025,13 +1026,14 @@ return SCPE_OK;
 
 t_stat sim_disk_detach (UNIT *uptr)
 {
-struct disk_context *ctx = (struct disk_context *)uptr->disk_ctx;
+struct disk_context *ctx;
 int (*close_function)(FILE *f);
 FILE *fileref;
 t_bool auto_format;
 
 if (uptr == NULL)
     return SCPE_IERR;
+ctx = (struct disk_context *)uptr->disk_ctx;
 fileref = uptr->fileref;
 switch (DK_GET_FMT (uptr)) {                            /* case on format */
     case DKUF_F_STD:                                    /* Simh */
@@ -1043,6 +1045,8 @@ switch (DK_GET_FMT (uptr)) {                            /* case on format */
     case DKUF_F_RAW:                                    /* Physical */
         close_function = sim_os_disk_close_raw;
         break;
+    default:
+        return SCPE_IERR;
         }
 if (!(uptr->flags & UNIT_ATTABLE))                      /* attachable? */
     return SCPE_NOATT;
@@ -1651,6 +1655,9 @@ else
 #ifdef O_LARGEFILE
 mode |= O_LARGEFILE;
 #endif
+#ifdef O_DSYNC
+mode |= O_DSYNC;
+#endif
 return (FILE *)((long)open (rawdevicename, mode, 0));
 }
 
@@ -2178,6 +2185,8 @@ static t_stat ReadFilePosition(FILE *File, void *buf, size_t bufsize, size_t *by
 uint32 err = sim_fseek (File, (t_addr)position, SEEK_SET);
 size_t i;
 
+if (bytesread)
+    *bytesread = 0;
 if (!err) {
     i = fread (buf, 1, bufsize, File);
     err = ferror (File);
@@ -2192,6 +2201,8 @@ static t_stat WriteFilePosition(FILE *File, void *buf, size_t bufsize, size_t *b
 uint32 err = sim_fseek (File, (t_addr)position, SEEK_SET);
 size_t i;
 
+if (byteswritten)
+    *byteswritten = 0;
 if (!err) {
     i = fwrite (buf, 1, bufsize, File);
     err = ferror (File);
@@ -2631,9 +2642,9 @@ RPC_STATUS
 (RPC_ENTRY *UuidCreate_c) (void *);
 
 if (!UuidCreate_c) {
-    HINSTANCE hDll;
+    HMODULE hDll;
     hDll = LoadLibraryA("rpcrt4.dll");
-    UuidCreate_c = (void *)GetProcAddress(hDll, "UuidCreate");
+    UuidCreate_c = (RPC_STATUS (RPC_ENTRY *) (void *))GetProcAddress(hDll, "UuidCreate");
     }
 if (UuidCreate_c)
     UuidCreate_c(uuidaddr);
diff --git a/sim_ether.c b/sim_ether.c
index c8278cfc..d6d556ef 100644
--- a/sim_ether.c
+++ b/sim_ether.c
@@ -375,7 +375,7 @@ extern FILE *sim_log;
 
 t_stat eth_mac_scan (ETH_MAC* mac, char* strmac)
 {
-  int a0, a1, a2, a3, a4, a5;
+  unsigned int a0, a1, a2, a3, a4, a5;
   const ETH_MAC zeros = {0,0,0,0,0,0};
   const ETH_MAC ones  = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
   ETH_MAC newmac;
@@ -881,11 +881,13 @@ static int     (*p_pcap_setfilter) (pcap_t *, struct bpf_program *);
 static char*   (*p_pcap_lib_version) (void);
 
 /* load function pointer from DLL */
-void load_function(char* function, void** func_ptr) {
+typedef int (*_func)();
+
+void load_function(char* function, _func* func_ptr) {
 #ifdef _WIN32
-    *func_ptr = GetProcAddress(hLib, function);
+    *func_ptr = (_func)GetProcAddress(hLib, function);
 #else
-    *func_ptr = dlsym(hLib, function);
+    *func_ptr = (_func)dlsym(hLib, function);
 #endif
     if (*func_ptr == 0) {
     char* msg = "Eth: Failed to find function '%s' in %s\r\n";
@@ -930,28 +932,28 @@ int load_pcap(void) {
       }
 
       /* load required functions; sets dll_load=3 on error */
-      load_function("pcap_close",        (void**) &p_pcap_close);
-      load_function("pcap_compile",      (void**) &p_pcap_compile);
-      load_function("pcap_datalink",     (void**) &p_pcap_datalink);
-      load_function("pcap_dispatch",     (void**) &p_pcap_dispatch);
-      load_function("pcap_findalldevs",  (void**) &p_pcap_findalldevs);
-      load_function("pcap_freealldevs",  (void**) &p_pcap_freealldevs);
-      load_function("pcap_freecode",     (void**) &p_pcap_freecode);
-      load_function("pcap_geterr",       (void**) &p_pcap_geterr);
-      load_function("pcap_lookupnet",    (void**) &p_pcap_lookupnet);
-      load_function("pcap_open_live",    (void**) &p_pcap_open_live);
+      load_function("pcap_close",        (_func *) &p_pcap_close);
+      load_function("pcap_compile",      (_func *) &p_pcap_compile);
+      load_function("pcap_datalink",     (_func *) &p_pcap_datalink);
+      load_function("pcap_dispatch",     (_func *) &p_pcap_dispatch);
+      load_function("pcap_findalldevs",  (_func *) &p_pcap_findalldevs);
+      load_function("pcap_freealldevs",  (_func *) &p_pcap_freealldevs);
+      load_function("pcap_freecode",     (_func *) &p_pcap_freecode);
+      load_function("pcap_geterr",       (_func *) &p_pcap_geterr);
+      load_function("pcap_lookupnet",    (_func *) &p_pcap_lookupnet);
+      load_function("pcap_open_live",    (_func *) &p_pcap_open_live);
 #ifdef _WIN32
-      load_function("pcap_setmintocopy", (void**) &p_pcap_setmintocopy);
-      load_function("pcap_getevent",     (void**) &p_pcap_getevent);
+      load_function("pcap_setmintocopy", (_func *) &p_pcap_setmintocopy);
+      load_function("pcap_getevent",     (_func *) &p_pcap_getevent);
 #else
 #ifdef MUST_DO_SELECT
-      load_function("pcap_get_selectable_fd",     (void**) &p_pcap_get_selectable_fd);
+      load_function("pcap_get_selectable_fd",     (_func *) &p_pcap_get_selectable_fd);
 #endif
-      load_function("pcap_fileno",       (void**) &p_pcap_fileno);
+      load_function("pcap_fileno",       (_func *) &p_pcap_fileno);
 #endif
-      load_function("pcap_sendpacket",   (void**) &p_pcap_sendpacket);
-      load_function("pcap_setfilter",    (void**) &p_pcap_setfilter);
-      load_function("pcap_lib_version",  (void**) &p_pcap_lib_version);
+      load_function("pcap_sendpacket",   (_func *) &p_pcap_sendpacket);
+      load_function("pcap_setfilter",    (_func *) &p_pcap_setfilter);
+      load_function("pcap_lib_version",  (_func *) &p_pcap_lib_version);
 
       if (lib_loaded == 1) {
         /* log successful load */
@@ -1147,7 +1149,7 @@ static int pcap_mac_if_win32(char *AdapterName, unsigned char MACAddress[6])
   int               Status;
   int               ReturnValue;
 #ifdef _WIN32
-  HINSTANCE         hDll;         /* handle to DLL */
+  HMODULE           hDll;         /* handle to DLL */
 #else
   static void       *hDll = NULL; /* handle to Library */
   typedef int BOOLEAN;
@@ -1158,14 +1160,14 @@ static int pcap_mac_if_win32(char *AdapterName, unsigned char MACAddress[6])
 
 #ifdef _WIN32
   hDll = LoadLibraryA("packet.dll");
-  p_PacketOpenAdapter = (void *)GetProcAddress(hDll, "PacketOpenAdapter");
-  p_PacketCloseAdapter = (void *)GetProcAddress(hDll, "PacketCloseAdapter");
-  p_PacketRequest = (void *)GetProcAddress(hDll, "PacketRequest");
+  p_PacketOpenAdapter = (LPADAPTER (*)(char *AdapterName))GetProcAddress(hDll, "PacketOpenAdapter");
+  p_PacketCloseAdapter = (void (*)(LPADAPTER lpAdapter))GetProcAddress(hDll, "PacketCloseAdapter");
+  p_PacketRequest = (int (*)(LPADAPTER  AdapterObject,BOOLEAN Set,PPACKET_OID_DATA  OidData))GetProcAddress(hDll, "PacketRequest");
 #else
   hDll = dlopen("packet.dll", RTLD_NOW);
-  p_PacketOpenAdapter = (void *)dlsym(hDll, "PacketOpenAdapter");
-  p_PacketCloseAdapter = (void *)dlsym(hDll, "PacketCloseAdapter");
-  p_PacketRequest = (void *)dlsym(hDll, "PacketRequest");
+  p_PacketOpenAdapter = (LPADAPTER (*)(char *AdapterName))dlsym(hDll, "PacketOpenAdapter");
+  p_PacketCloseAdapter = (void (*)(LPADAPTER lpAdapter))dlsym(hDll, "PacketCloseAdapter");
+  p_PacketRequest = (int (*)(LPADAPTER  AdapterObject,BOOLEAN Set,PPACKET_OID_DATA  OidData))dlsym(hDll, "PacketRequest");
 #endif
   
   /* Open the selected adapter */
@@ -1382,7 +1384,7 @@ static void *
 _eth_reader(void *arg)
 {
 ETH_DEV* volatile dev = (ETH_DEV*)arg;
-int status;
+int status = 0;
 int sched_policy;
 struct sched_param sched_priority;
 #if defined (_WIN32)
@@ -2270,11 +2272,12 @@ while (size > 1) {
   size -= sizeof(*buffer);
 }
 if (size) {
-  uint8 endbytes[2];
+  uint16 endword;
+  uint8 *endbytes = (uint8 *)&endword;
 
   endbytes[0] = *((uint8 *)buffer);
   endbytes[1] = 0;
-  cksum += *((uint16 *)endbytes);
+  cksum += endword;
   }
 
 /* Do a little shuffling  */
@@ -2609,6 +2612,10 @@ switch (dev->eth_api) {
     if ((dev->hash_filter) && (!to_me) && (data[0] & 0x01))
       to_me = _eth_hash_lookup(dev->hash, data);
     break;
+  default:
+    bpf_used = to_me = 0;                           /* Should NEVER happen */
+    abort();
+    break;
   }
 
 /* detect reception of loopback packet to our physical address */
@@ -3024,7 +3031,7 @@ for (i=0; i<used; ++i) {
 /* replace device description with user-defined adapter name (if defined) */
 for (i=0; i<used; i++) {
   char regkey[2048];
-  char regval[2048];
+  unsigned char regval[2048];
   LONG status;
   DWORD reglen, regtype;
   HKEY reghnd;
@@ -3037,7 +3044,7 @@ for (i=0; i<used; i++) {
      registry key, rather than hardcoding the string as we do here. */
   if (list[i].name[strlen( "\\Device\\NPF_" )] == '{') {
     sprintf( regkey, "SYSTEM\\CurrentControlSet\\Control\\Network\\"
-             "{4D36E972-E325-11CE-BFC1-08002BE10318}\\%hs\\Connection", list[i].name+
+             "{4D36E972-E325-11CE-BFC1-08002BE10318}\\%s\\Connection", list[i].name+
              strlen( "\\Device\\NPF_" ) );
     if ((status = RegOpenKeyExA (HKEY_LOCAL_MACHINE, regkey, 0, KEY_QUERY_VALUE, &reghnd)) != ERROR_SUCCESS)
       continue;
diff --git a/sim_ether.h b/sim_ether.h
index 571b75a8..4e549d98 100644
--- a/sim_ether.h
+++ b/sim_ether.h
@@ -173,10 +173,10 @@
 
 struct eth_packet {
   uint8   msg[ETH_FRAME_SIZE];                          /* ethernet frame (message) */
-  int     len;                                          /* packet length without CRC */
-  int     used;                                         /* bytes processed (used in packet chaining) */
+  uint32  len;                                          /* packet length without CRC */
+  uint32  used;                                         /* bytes processed (used in packet chaining) */
   int     status;                                       /* transmit/receive status */
-  int     crc_len;                                      /* packet length with CRC */
+  uint32  crc_len;                                      /* packet length with CRC */
 };
 
 struct eth_item {
diff --git a/sim_rev.h b/sim_rev.h
index 615b7e11..9000a49a 100644
--- a/sim_rev.h
+++ b/sim_rev.h
@@ -36,7 +36,7 @@
 
 patch   date            module(s) and fix(es)
 
-  0     xx-yyy-1       scp.c:
+  0     01-May-2012     scp.c:
                         - added *nix READLINE support (Mark Pizzolato)
                         - fixed handling of DO with no arguments (Dave Bryan)
                         - fixed "SHOW DEVICE" with only one enabled unit (Dave Bryan)
@@ -49,9 +49,14 @@ patch   date            module(s) and fix(es)
 
                         sim_ether.c
                         - major revision (Dave Hittner and Mark Pizzolato)
+                        - fixed array overrun which caused SEGFAULT on hosts with many
+                          devices which libpcap can access.
+                        - fixed duplicate MAC address detection to work reliably on switch
+                          connected LANs
 
                         sim_tmxr.c:
-                        - made option negotiation more reliable (Mark Pizzolato)
+                        - made telnet option negotiation more reliable, VAX simulator now 
+                          works with PuTTY as console (Mark Pizzolato)
 
                         h316_cpu.c:
                         - fixed bugs in MPY, DIV introduced in 3.8-1 (from Theo Engel)
@@ -96,7 +101,7 @@ patch   date            module(s) and fix(es)
                         hp2100_cpu7.c (Dave Bryan):
                         - Corrected "opsize" parameter type in vis_abs
 
-                         hp2100_defs.h (Dave Bryan):
+                        hp2100_defs.h (Dave Bryan):
                         - Added hp_setsc, hp_showsc functions to support SC modifier
                         - DMA channels renamed from 0,1 to 1,2 to match documentation
                         - Revised I/O signal enum values for concurrent signals
@@ -112,7 +117,7 @@ patch   date            module(s) and fix(es)
                         hp2100_dp.c (Dave Bryan):
                         - Added CNTLR_TYPE cast to dp_settype
  
-                         hp2100_ds.c (Dave Bryan):
+                        hp2100_ds.c (Dave Bryan):
                         - Rewritten to use the MAC/ICD disc controller library
                         - ioIOO now notifies controller service of parameter output
                         - Corrected SRQ generation and FIFO under/overrun detection
@@ -137,13 +142,14 @@ patch   date            module(s) and fix(es)
                         - Revised for new multi-card paradigm
 
                         hp2100_lps.c (Dave Bryan):
-                         - Revised detection of CLC at last DMA cycle
+                        - Revised detection of CLC at last DMA cycle
                         - Corrected 12566B (DIAG mode) jumper settings
 
                         hp2100_ms.c (Dave Bryan):
                         - Added CNTLR_TYPE cast to ms_settype
  
                         hp2100_mt.c (Dave Bryan):
+                        - Removed redundant MTAB_VUN from "format" MTAB entry
                         - Fixed command scanning error in mtcio ioIOO handler
 
                         hp2100_stddev.c (Dave Bryan):
@@ -165,6 +171,13 @@ patch   date            module(s) and fix(es)
 
                         id_pas.c:
                         - fixed TT_GET_MODE test to use TTUF_MODE_x (Michael Bloom)
+                        - revised to use clock coscheduling
+
+                        id_tt.c, id_ttc.p:
+                        - revised to use clock coscheduling
+
+                        id_uvc.c:
+                        - added clock coscheduling routine
 
                         1401_cpu.c:
                         - reverted multiple tape indicator implementation
@@ -184,6 +197,9 @@ patch   date            module(s) and fix(es)
                         pdp1_stddev.c:
                         - fixed unitialized variable in tty output service (Michael Bloom)
 
+                        pdp10_fe.c:
+                        - revised to use clock coscheduling
+
                         pdp11_defs.h:
                         - fixed priority of PIRQ vs IO; added INT_INTERNALn
 
@@ -217,9 +233,82 @@ patch   date            module(s) and fix(es)
                         pdp11_ts.c:
                         - fixed t_addr printouts for 64b big-endian systems (Mark Pizzolato)
 
+                        pdp11_tu.c:
+                        - fixed t_addr printouts for 64b big-endian systems (Mark Pizzolato)
+
+                        pdp11_vh.c: (Mark Pizzolato)
+                        - fixed SET VH LINES=n to correctly adjust the number
+                          of lines available to be 8, 16, 24, or 32.
+                        - fixed performance issue avoiding redundant polling
+
+                        pdp11_xq.c: (Mark Pizzolato)
+                        - Fixed missing information from save/restore which
+                          caused operations to not complete correctly after 
+                          a restore until the OS reset the controller.
+                        - Added address conflict check during attach.
+                        - Fixed loopback processing to correctly handle forward packets.
+                        - Fixed interrupt dispatch issue which caused delivered packets 
+                          (in and out) to sometimes not interrupt the CPU after processing.
+                        - Fixed the SCP visibile SA registers to always display the 
+                          ROM mac address, even after it is changed by SET XQ MAC=.
+                        - Added changes so that the Console DELQA diagnostic (>>>TEST 82) 
+                          will succeed.
+                        - Added DELQA-T (aka DELQA Plus) device emulation support.
+                        - Added dropped frame statistics to record when the receiver discards
+                          received packets due to the receiver being disabled, or due to the
+                          XQ device's packet receive queue being full.
+                        - Fixed bug in receive processing when we're not polling.  This could
+                          cause receive processing to never be activated again if we don't 
+                          read all available packets via eth_read each time we get the 
+                          opportunity.
+                        - Added the ability to Coalesce received packet interrupts.  This
+                          is enabled by SET XQ POLL=DELAY=nnn where nnn is a number of 
+                          microseconds to delay the triggering of an interrupt when a packet
+                          is received.
+                        - Added SET XQ POLL=DISABLE (aka SET XQ POLL=0) to operate without 
+                          polling for packet read completion.
+                        - Changed the sanity and id timer mechanisms to use a separate timer
+                          unit so that transmit and recieve activities can be dealt with
+                          by the normal xq_svc routine.
+                          Dynamically determine the timer polling rate based on the 
+                          calibrated tmr_poll and clk_tps values of the simulator.
+                        - Enabled the SET XQ POLL to be meaningful if the simulator currently
+                          doesn't support idling.
+                        - Changed xq_debug_setup to use sim_debug instead of printf so that
+                          all debug output goes to the same place.
+                        - Restored the call to xq_svc after all successful calls to eth_write
+                          to allow receive processing to happen before the next event
+                          service time.  This must have been inadvertently commented out 
+                          while other things were being tested.
+
+                        pdp11_xu.c: (Mark Pizzolato)
+                        - Added SHOW XU FILTERS modifier (Dave Hittner)
+                        - Corrected SELFTEST command, enabling use by VMS 3.7, VMS 4.7, and Ultrix 1.1 (Dave Hittner)
+                        - Added address conflict check during attach.
+                        - Added loopback processing support
+                        - Fixed the fact that no broadcast packets were received by the DEUNA
+                        - Fixed transmitted packets to have the correct source MAC address.
+                        - Fixed incorrect address filter setting calling eth_filter().
+
+                        pdp18b_stddev.c:
+                        - added clock coscheduling
+                        - revised TTI to use clock coscheduling and to fix perpetual CAF bug
+                        
+                        pdp18b_ttx.c:
+                        - revised to use clock coscheduling
+
+                        pdp8_clk.c:
+                        - added clock coscheduling
+
                         pdp8_fpp.c: (Rick Murphy)
                         - many bug fixes; now functional
 
+                        pdp8_tt.c:
+                        - revised to use clock coscheduling and to fix perpetual CAF bug
+
+                        pdp8_ttx.c:
+                        - revised to use clock cosheduling
+
                         pdp8_sys.c:
                         - added link to FPP
 
@@ -247,6 +336,9 @@ patch   date            module(s) and fix(es)
                         - fixed integer overflow bug in EMODH
                         - fixed POLYH normalizing before add mask bug
 
+                        vax_stddev.c:
+                        - revised to use clock coscheduling
+
                         vax_syscm.c:
                         - fixed t_addr printouts for 64b big-endian systems (Mark Pizzolato)
 
@@ -258,6 +350,7 @@ patch   date            module(s) and fix(es)
 
                         vax780_stddev.c
                         - added REBOOT support (Mark Pizzolato)
+                        - revised to use clock coscheduling
 
                         vaxmod_def.h
                         - moved all Qbus devices to BR4; deleted RP definitions
diff --git a/sim_timer.c b/sim_timer.c
index 4822a7b8..963c090c 100644
--- a/sim_timer.c
+++ b/sim_timer.c
@@ -689,7 +689,7 @@ return SCPE_OK;
 t_stat sim_set_throt (int32 arg, char *cptr)
 {
 char *tptr, c;
-t_value val, val2;
+t_value val, val2 = 0;
 
 if (arg == 0) {
     if ((cptr != 0) && (*cptr != 0))
diff --git a/swtp/6800boot.dsk b/swtp/6800boot.dsk
deleted file mode 100644
index 132cd569..00000000
Binary files a/swtp/6800boot.dsk and /dev/null differ
diff --git a/swtp/6800work.dsk b/swtp/6800work.dsk
deleted file mode 100644
index 34a1da5e..00000000
Binary files a/swtp/6800work.dsk and /dev/null differ
diff --git a/swtp/swtp b/swtp/swtp
deleted file mode 100644
index 67ffe076..00000000
Binary files a/swtp/swtp and /dev/null differ
diff --git a/swtp/swtp.txt b/swtp/swtp.txt
deleted file mode 100644
index 4d16f9fb..00000000
--- a/swtp/swtp.txt
+++ /dev/null
@@ -1,100 +0,0 @@
-SWTP 6800 Emulator
-=====================
-
-1. Background.
-
-	The Southwest Technical Products (SWTP) SWTP 6800 was announced 1n the 1976 SWTP Catalog, which boasted you could buy and build this powerful computer kit for only $395.  The kit consisted at that time of only the parts to build a case, power supply, mother board, CPU card, serial card with RS-232 or 20 ma loop interface, and memory card with 2048 *bytes* of static memory.  
-
-2. Hardware
-
-	We are simulating a fairly "loaded" SWTP 6800 from about 1978, with the following configuration:
-
-	device		simulates
-	name(s)
-
-	CPU		SWTP MP-A with Motorola 6080 CPU board, 62KB of RAM, 2K of EPROM with start boot ROM.
-	SIO		SWTP MP-S Dual Serial Interface Board. Port 1 is assumed to be connected to a serial "glass TTY" that is your terminal running the Simulator.
-	PTR		Second serial port of SIO is assumed to be connected to the paper tap reader/punch.
-	PTP		Second serial port of SIO is assumed to be connected to the paper tap reader/punch.
-	DSK		SWTP DC-4 Floppy Disk controller with up to four drives.
-
-2.1 The CPU Card (MP-A)
-
-	We allow you to select memory sizes, but be aware that some sample software requires the full 32K (i.e. FLEX).  We emulate the SWTP SWTBUG boot rom.
-
-	SET CPU ITRAP	Causes the simulator to halt if an invalid 8080 Opcode is detected.
-	SET CPU NOITRAP	Does not stop on an invalid Opcode.  This is how the real 6800 operates.
-	SET CPU MTRAP	Causes the simulator to halt if an invalid address is accessed.
-	SET CPU NOMTRAP	Does not stop on invalid address access.  This is how a real 6800 operates.
-	SET CPU 4K
-	SET CPU 8K
-	SET CPU 12K
-	SET CPU 16K
-	  ......
-	SET CPU 32K	All these set various CPU memory configurations.
-			The 2K EPROM at the high end of memory is always present and will always boot.
-	SET CPU MA000	Enable 8 K bytes of memory at $A000-$BFFF.  Otherwise, only 128 bytes re available at $A000.
-	SET CPU NOMA000	Enable only 128 bytes of memory at $A000.
-
-The SWTBUG EPROM maps to both addresses $E000-E3FF and $FC00-FFFF.  
-
-The real 6800, on receiving a HLT (Halt) instruction, freezes the processor and only an interrupt or CPU hardware reset will restore it.  The simulator is a lot nicer, it will halt but send you back to the simulator command line.
-
-CPU Registers include the following:
-
-	name	size	comments
-	
-	PC	16	Program Counter
-	A	8	Accumulator A
-	B	8	Accumulator B
-	IX	16	Index Register
-	C	1	Carry flag
-	Z	1	Zero Flag
-	H	1	Half-Carry flag
-	I	1	Interrupt flag
-	N	1	Negative flag
-	V	1	Overflao Flag
-
-
-2.2 The Serial I/O Card (MP-S)
-
-	This simple programmed I/O device provides 2 serial ports to the outside world, which could be hardware jumpered to support RS-232 plugs or a TTY current loop interface.  The standard I/O addresses assigned by SWTP was $8004-8005 for the first port, and $8006-8007 for the second. We follow this standard in the Simulator.
-
-	The simulator directs I/O to/from the first port to the screen. The second port reads from an attachable "tape reader" file on input, and writes to an attachable "punch file" on output.  These files are considered a simple stream of 8-bit bytes.  
-
-2.3 The Floppy Disk controller (DC4)
-
-	The SWTP DC4 is a simple programmed I/O interface to the SWTP MF-68 5-inch dual floppy drive, which was basically a pair of Shugart SA-400s with a power supply and buffer board builtin.  The controller supports neither interrupts nor DMA, so floppy access required the sustained attention of the CPU. The standard I/O addresses were $8018-801B, and we follow the standard.  Details on controlling this hardware are in the swtp_dsk.c source file.
-
-
-3. Sample Software
-
-	Running an SWTP 6800 in 1978 you would be running the FLEX Version 2.0 Operating System from Technical Systems Consultants, Inc.  
-
-3.1 CP/M Version 2.2
-
-	This version is a port of the standard FLEX Version 2.0 to the SWTP 6800.  
-
-	To boot FLEX:
-
-	sim> set cpu hex
-	sim> set cpu itrap
-	sim> set cpu mtrap
-	sim> att dsk 6800boot.dsk
-	sim> att dsk1 6800work.dsk
-	sim> set cpu MA000
-	sim> set dsk1 rw
-	sim> go 
-
-	$D		; Capital D causes SWTBUG to boot Flex
-	FLEX 2.0
-
-	DATE (MM,DD,YY)? 03,09,99  ; Must enter a date from last century!
-
-	+++		;Flex prompt!
-
-
-
-
-
-
diff --git a/swtp/swtp6800 b/swtp/swtp6800
deleted file mode 100644
index 0c8c2d1d..00000000
--- a/swtp/swtp6800
+++ /dev/null
@@ -1,9 +0,0 @@
-reset
-set cpu hex
-set cpu itrap
-set cpu mtrap
-att dsk 6800boot.dsk
-att dsk1 6800work.dsk
-set cpu MA000
-set dsk1 rw
-g
diff --git a/swtp/swtp_cpu.c b/swtp/swtp_cpu.c
deleted file mode 100644
index e93797f9..00000000
--- a/swtp/swtp_cpu.c
+++ /dev/null
@@ -1,2293 +0,0 @@
-/* swtp_6800_cpu.c: SWTP 6800 Motorola 6800 CPU simulator
-
-   Copyright (c) 2005, 2007, William Beech
-
-   Permission is hereby granted, free of charge, to any person obtaining a
-   copy of this software and associated documentation files (the "Software"),
-   to deal in the Software without restriction, including without limitation
-   the rights to use, copy, modify, merge, publish, distribute, sublicense,
-   and/or sell copies of the Software, and to permit persons to whom the
-   Software is furnished to do so, subject to the following conditions:
-
-   The above copyright notice and this permission notice shall be included in
-   all copies or substantial portions of the Software.
-
-   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-   WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-   Except as contained in this notice, the name of William A. Beech shall not
-   be used in advertising or otherwise to promote the sale, use or other dealings
-   in this Software without prior written authorization from William A. Beech.
-   
-   Based on work by Charles E Owen (c) 1997 and Peter Schorn (c) 2002-2005
-
-   cpu		6800 CPU
-
-   The register state for the 6800 CPU is:
-
-   A<0:7>		Accumulator A
-   B<0:7>		Accumulator B
-   IX<0:15>		Index Register
-   H			half-carry flag
-   I			interrupt flag
-   N			negative flag
-   Z			zero flag
-   V			overflow flag
-   C			carry flag
-   PC<0:15>		program counter
-   SP<0:15>		Stack Pointer
-
-   The 6800 is an 8-bit CPU, which uses 16-bit registers to address
-   up to 64KB of memory.
-
-   The 72 basic instructions come in 1, 2, and 3-byte flavors.
-
-   This routine is the instruction decode routine for the 6800.
-   It is called from the simulator control program to execute
-   instructions in simulated memory, starting at the simulated PC.
-   It runs until 'reason' is set non-zero.
-
-   General notes:
-
-   1. Reasons to stop.  The simulator can be stopped by:
-
-	WAI instruction
-	I/O error in I/O simulator
-	Invalid OP code (if ITRAP is set on CPU)
-	Invalid mamory address (if MTRAP is set on CPU)
-
-   2. Interrupts.
-      There are 4 types of interrupt, and in effect they do a 
-      hardware CALL instruction to one of 4 possible high memory addresses.
-
-   3. Non-existent memory.  On the SWTP 6800, reads to non-existent memory
-      return 0FFH, and writes are ignored.  In the simulator, the
-      largest possible memory is instantiated and initialized to zero.
-      Thus, only writes need be checked against actual memory size.
-
-   4. Adding I/O devices.  These modules must be modified:
-
-	swtp_6800_cpu.c	add I/O service routines to dev_table
-	swtp_sys.c	add pointer to data structures in sim_devices
-*/
-
-#include <stdio.h>
-
-#include "swtp_defs.h"
-
-//#include <windows.h>
-//#include <mmsystem.h>
-
-#define UNIT_V_OPSTOP	(UNIT_V_UF)			/* Stop on Invalid OP? */
-#define UNIT_OPSTOP	(1 << UNIT_V_OPSTOP)
-#define UNIT_V_MSTOP	(UNIT_V_UF+1)		/* Stop on Invalid memory? */
-#define UNIT_MSTOP	(1 << UNIT_V_MSTOP)
-#define UNIT_V_MSIZE	(UNIT_V_UF+2)		/* Memory Size */
-#define UNIT_MSIZE	(1 << UNIT_V_MSIZE)
-#define UNIT_V_MA000	(UNIT_V_UF+2)		/* 128B or 8kB at 0xA000 */
-#define UNIT_MA000	(1 << UNIT_V_MA000)
-
-uint8 M[MAXMEMSIZE];				/* Memory */
-int32 A = 0;						/* Accumulator A */
-int32 B = 0;						/* Accumulator B */
-int32 IX = 0;						/* Index register */
-int32 SP = 0;						/* Stack pointer */
-int32 H = 0;						/* Half-carry flag */
-int32 I = 1;						/* Interrupt flag */
-int32 N = 0;						/* Negative flag */
-int32 Z = 0;						/* Zero flag */
-int32 V = 0;						/* Overflow flag */
-int32 C = 0;						/* Carry flag */
-int32 saved_PC = 0;					/* Program counter */
-int32 INTE = 0;						/* Interrupt Enable */
-int32 int_req = 0;					/* Interrupt request */
-
-int32 mem_fault = 0;				/* memory fault flag */
-
-extern int32 sim_int_char;
-extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ;/* breakpoint info */
-
-/* function prototypes */
-
-t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
-t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
-t_stat cpu_reset (DEVICE *dptr);
-t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
-void dump_regs();
-void go_rel(int32 cond);
-int32 get_rel_addr();
-int32 get_dir_val();
-int32 get_dir_addr();
-int32 get_indir_val();
-int32 get_indir_addr();
-int32 get_ext_val();
-int32 get_ext_addr();
-int32 get_psw();
-void set_psw(int32 psw);
-void condevalH(int32 res);
-void condevalN(int32 res);
-void condevalZ(int32 res);
-void condevalC(int32 res);
-void condevalVa(int32 op1, int32 op2);
-void condevalVs(int32 op1, int32 op2);
-void mem_put_byte(int32 addr, int32 val);
-void mem_put_word(int32 addr, int32 val);
-int32 mem_get_byte(int32 addr);
-int32 mem_get_word(int32 addr);
-int32 nulldev(int32 io, int32 data);
-
-/* external routines */
-
-extern int32 sio0s(int32 io, int32 data);
-extern int32 sio0d(int32 io, int32 data);
-extern int32 sio1s(int32 io, int32 data);
-extern int32 sio1d(int32 io, int32 data);
-extern int32 fdcdrv(int32 io, int32 data);
-extern int32 fdccmd(int32 io, int32 data);
-extern int32 fdctrk(int32 io, int32 data);
-extern int32 fdcsec(int32 io, int32 data);
-extern int32 fdcdata(int32 io, int32 data);
-extern int32 fprint_sym (FILE *of, int32 addr, uint32 *val,
-	UNIT *uptr, int32 sw);
-
-
-/* This is the I/O configuration table.  There are 32 possible
-device addresses, if a device is plugged into a port it's routine
-address is here, 'nulldev' means no device is available
-*/
-
-struct idev {
-	int32 (*routine)(int32, int32);
-};
-
-struct idev dev_table[32] = {
-	{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev},	/*Port 0 8000-8003*/
-	{&sio0s},   {&sio0d},   {&sio1s},   {&sio1d},	/*Port 1 8004-8007*/
-/* sio1x routines just return the last value read on the matching
-   sio0x routine.  SWTBUG tests for the MP-C with most port reads! */
-	{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev},	/*Port 2 8008-800B*/
-	{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev},	/*Port 3 800C-800F*/
-	{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev},	/*Port 4 8010-8013*/
-	{&fdcdrv},  {&nulldev}, {&nulldev}, {&nulldev},	/*Port 5 8014-8017*/
-	{&fdccmd},  {&fdctrk},  {&fdcsec},  {&fdcdata},	/*Port 6 8018-801B*/
-	{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}	/*Port 7 801C-801F*/
-};
-
-/*	SWTP 6800 SWTBUG BOOT EPROM, fits at 0E000-0E3FFH and replicated
-	at 0FC000-0FFFF for the interrupt vectors */
-
-#define BOOTLEN	1024
-
-int32 bootrom[BOOTLEN] = {
-0xFE,0xA0,0x00,0x6E,0x00,0x8D,0x40,0x6E,
-0x00,0x10,0x16,0x04,0xBD,0xE3,0x34,0x8D,
-0x67,0x81,0x53,0x26,0xFA,0x8D,0x61,0x81,
-0x39,0x27,0x29,0x81,0x31,0x26,0xF0,0x7F,
-0xA0,0x0F,0x8D,0x31,0x80,0x02,0xB7,0xA0,
-0x47,0x8D,0x1C,0x8D,0x28,0x7A,0xA0,0x47,
-0x27,0x09,0xA7,0x00,0xA1,0x00,0x26,0x08,
-0x08,0x20,0xF0,0x7C,0xA0,0x0F,0x27,0xCF,   
-0x86,0x3F,0x8D,0x31,0x7E,0xE2,0xD4,0x8D,
-0x0C,0xB7,0xA0,0x0D,0x8D,0x07,0xB7,0xA0,
-0x0E,0xFE,0xA0,0x0D,0x39,0x8D,0x53,0x48,
-0x48,0x48,0x48,0x16,0x8D,0x4C,0x1B,0x16,
-0xFB,0xA0,0x0F,0xF7,0xA0,0x0F,0x39,0x44,
-0x44,0x44,0x44,0x84,0x0F,0x8B,0x30,0x81,
-0x39,0x23,0x02,0x8B,0x07,0x7E,0xE1,0xD1,
-0x7E,0xE1,0xAC,0x8D,0xF8,0x08,0xA6,0x00,
-0x81,0x04,0x26,0xF7,0x39,0x7E,0xE1,0x4A,
-0x8D,0xBD,0xCE,0xE1,0x9D,0x8D,0xEF,0xCE,
-0xA0,0x0D,0x8D,0x34,0xFE,0xA0,0x0D,0x8D,
-0x31,0x8D,0x31,0x8D,0xDB,0x81,0x20,0x27,
-0xFA,0x81,0x0D,0x27,0xE0,0x81,0x5E,0x20,
-0x2C,0x01,0x8D,0xCC,0x80,0x30,0x2B,0x4C,
-0x81,0x09,0x2F,0x0A,0x81,0x11,0x2B,0x44,
-0x81,0x16,0x2E,0x40,0x80,0x07,0x39,0xA6,
-0x00,0x8D,0xA4,0xA6,0x00,0x08,0x20,0xA3,
-0x8D,0xF5,0x8D,0xF3,0x86,0x20,0x20,0xA5,
-0x8E,0xA0,0x42,0x20,0x2C,0x26,0x07,0x09,
-0x09,0xFF,0xA0,0x0D,0x20,0xAC,0xFF,0xA0,
-0x0D,0x20,0x02,0x20,0x6D,0x81,0x30,0x25,
-0xA1,0x81,0x46,0x22,0x9D,0x8D,0xBD,0xBD,
-0xE0,0x57,0x09,0xA7,0x00,0xA1,0x00,0x27,
-0x91,0x7E,0xE0,0x40,0xBE,0xA0,0x08,0x20,
-0x49,0xBF,0xA0,0x08,0x86,0xFF,0xBD,0xE3,
-0x08,0xCE,0x80,0x04,0xBD,0xE2,0x84,0xA6,
-0x00,0xA1,0x02,0x20,0x02,0x20,0x19,0x26,
-0x39,0x86,0x03,0xA7,0x00,0x86,0x11,0xA7,
-0x00,0x20,0x2F,0x01,0xBF,0xA0,0x08,0x30,
-0x6D,0x06,0x26,0x02,0x6A,0x05,0x6A,0x06,
-0xCE,0xE1,0x9D,0xBD,0xE0,0x7E,0xFE,0xA0,
-0x08,0x08,0x8D,0x8E,0x8D,0x8C,0x8D,0x8A,
-0x8D,0x86,0x8D,0x84,0xCE,0xA0,0x08,0xBD,
-0xE0,0xC8,0xFE,0xA0,0x12,0x8C,0xE1,0x23,
-0x27,0x19,0x8E,0xA0,0x42,0xCE,0x80,0x04,
-0xFF,0xA0,0x0A,0x7F,0xA0,0x0C,0x8D,0x73,
-0x27,0x03,0xBD,0xE2,0x7D,0xBD,0xE3,0x53,
-0xBD,0xE3,0x47,0xCE,0xE1,0x9C,0xBD,0xE0,
-0x7E,0x8D,0x39,0xCE,0xE3,0xD1,0xA1,0x00,
-0x26,0x07,0xBD,0xE0,0xCC,0xEE,0x01,0x6E,
-0x00,0x08,0x08,0x08,0x8C,0xE3,0xF8,0x26,
-0xED,0x20,0xBF,0xFE,0xA0,0x12,0x6E,0x00,
-0x53,0x39,0x04,0x0D,0x0A,0x15,0x00,0x00,
-0x00,0x53,0x31,0x04,0x13,0x0D,0x0A,0x15,
-0x00,0x00,0x00,0x24,0x04,0x20,0x4C,0xFE,
-0xA0,0x06,0x6E,0x00,0x20,0x40,0xBD,0xE0,
-0x47,0xFF,0xA0,0x04,0xBD,0xE0,0x47,0xBD,
-0xE0,0x55,0x16,0xA6,0x00,0xFF,0xA0,0x0D,
-0x11,0x27,0x02,0x20,0x21,0xCE,0xE1,0x9D,
-0xBD,0xE0,0x7E,0xCE,0xA0,0x0D,0x20,0x10,
-0x3B,0x20,0x3A,0xFF,0xA0,0x10,0xFE,0xA0,
-0x0A,0x37,0xE6,0x01,0xE1,0x03,0x33,0x39,
-0xBD,0xE0,0xC8,0xFE,0xA0,0x0D,0xBC,0xA0,
-0x04,0x27,0x9E,0x08,0x20,0xCD,0x8D,0x06,
-0x84,0x7F,0x39,0x31,0x31,0x31,0x37,0x8D,
-0xDA,0x26,0x28,0x86,0x15,0xA7,0x00,0xA6,
-0x00,0x47,0x24,0xFB,0xA6,0x01,0xF6,0xA0,
-0x0C,0x27,0x07,0x20,0x11,0x37,0x8D,0xC3,
-0x26,0x2E,0xC6,0x11,0xE7,0x00,0xE6,0x00,
-0x57,0x57,0x24,0xFA,0xA7,0x01,0x33,0xFE,
-0xA0,0x10,0x39,0xA6,0x00,0x2B,0xFC,0x8D,
-0x3A,0xC6,0x04,0xE7,0x02,0x58,0x8D,0x2A,
-0x0D,0x69,0x00,0x46,0x5A,0x26,0xF7,0x8D,
-0x21,0xF6,0xA0,0x0C,0x27,0x13,0x20,0xDE,
-0x8D,0x23,0xC6,0x0A,0x6A,0x00,0x8D,0x16,
-0x8D,0x10,0xA7,0x00,0x0D,0x46,0x5A,0x26,
-0xF7,0xE6,0x02,0x58,0x2A,0xC8,0x8D,0x02,
-0x20,0xC4,0x6D,0x02,0x2A,0xFC,0x6C,0x02,
-0x6A,0x02,0x39,0x6F,0x02,0x8D,0xF7,0x20,
-0xF1,0x8D,0x83,0x16,0x7F,0xA0,0x0B,0xFE,
-0xA0,0x0A,0x8D,0x10,0x8D,0x07,0xCE,0xE3,
-0xEF,0x17,0x7E,0xE1,0x76,0x86,0x34,0xA7,
-0x03,0xA7,0x02,0x39,0x6C,0x00,0x86,0x07,
-0xA7,0x01,0x6C,0x00,0xA7,0x02,0x39,0x7F,
-0x80,0x14,0x8D,0x2E,0xC6,0x0B,0x8D,0x25,
-0xE6,0x04,0xC5,0x01,0x26,0xFA,0x6F,0x06,
-0x8D,0x1D,0xC6,0x9C,0x8D,0x17,0xCE,0x24,
-0x00,0xC5,0x02,0x27,0x06,0xB6,0x80,0x1B,
-0xA7,0x00,0x08,0xF6,0x80,0x18,0xC5,0x01,
-0x26,0xEF,0x7E,0x24,0x00,0xE7,0x04,0x8D,
-0x00,0x39,0xCE,0xFF,0xFF,0x09,0x8C,0x80,
-0x14,0x26,0xFA,0x39,0xCE,0xE0,0x09,0xBD,
-0xE0,0x7E,0x8D,0xF1,0xBD,0xE3,0x47,0x20,
-0x58,0xCE,0xE1,0x23,0xBC,0xA0,0x12,0x27,
-0x1A,0x08,0x8D,0x32,0xBD,0xE0,0x47,0xFF,
-0xA0,0x14,0xA6,0x00,0xB7,0xA0,0x16,0x86,
-0x3F,0xA7,0x00,0xCE,0xE1,0x23,0x8D,0x1E,
-0x7E,0xE1,0x6B,0xFE,0xA0,0x14,0xB6,0xA0,
-0x16,0xA7,0x00,0xCE,0xE1,0x24,0x20,0xDA,
-0xB7,0xA0,0x43,0xFE,0xA0,0x12,0x8C,0xE1,
-0x23,0x27,0x06,0xCE,0xE1,0x24,0xFF,0xA0,
-0x12,0x39,0x8D,0x5A,0x20,0x0F,0xCE,0xA0,
-0x49,0xFF,0xA0,0x04,0x09,0x8D,0x52,0xCE,
-0xE1,0x90,0xBD,0xE0,0x7E,0x8D,0x24,0x8D,
-0x91,0x7E,0xE1,0x52,0x73,0xA0,0x0C,0x86,
-0x11,0xC6,0x20,0x8D,0x1A,0xBD,0xE1,0xD9,
-0x27,0x04,0x86,0x3C,0xA7,0x03,0x39,0x86,
-0x13,0xC6,0x10,0x20,0x0A,0x86,0x12,0xC6,
-0x04,0x20,0x04,0x86,0x14,0xC6,0x08,0xBD,
-0xE0,0x75,0xBD,0xE1,0xD6,0x27,0x16,0x86,
-0x02,0xCA,0x01,0x8D,0x0C,0x8D,0x08,0x86,
-0x02,0xC6,0x01,0xE7,0x00,0x8D,0x02,0x86,
-0x06,0xA7,0x01,0xE7,0x00,0x39,0xFE,0xA0,
-0x02,0xFF,0xA0,0x44,0x8D,0xCF,0xB6,0xA0,
-0x05,0xB0,0xA0,0x45,0xF6,0xA0,0x04,0xF2,
-0xA0,0x44,0x26,0x04,0x81,0x10,0x25,0x02,
-0x86,0x0F,0x8B,0x04,0xB7,0xA0,0x47,0x80,
-0x03,0xB7,0xA0,0x46,0xCE,0xE1,0x93,0xBD,
-0xE0,0x7E,0x5F,0xCE,0xA0,0x47,0x8D,0x24,
-0xCE,0xA0,0x44,0x8D,0x1F,0x8D,0x1D,0xFE,
-0xA0,0x44,0x8D,0x18,0x7A,0xA0,0x46,0x26,
-0xF9,0xFF,0xA0,0x44,0x53,0x37,0x30,0x8D,
-0x0B,0x33,0xFE,0xA0,0x44,0x09,0xBC,0xA0,
-0x04,0x26,0xB3,0x39,0xEB,0x00,0x7E,0xE0,
-0xBF,0x47,0xE1,0xD0,0x5A,0xC0,0x00,0x4D,
-0xE0,0x88,0x46,0xE1,0xAE,0x52,0xE1,0x30,
-0x4A,0xE0,0x05,0x43,0xE2,0xCC,0x44,0xE2,
-0x8F,0x42,0xE2,0xD9,0x4F,0xE2,0x69,0x50,
-0xE3,0x1A,0x4C,0xE0,0x0C,0x45,0xE3,0x1E,
-0xE0,0x00,0xE1,0x8B,0xE1,0xA7,0xE0,0xD0
-};
-
-/* CPU data structures
-
-   cpu_dev	CPU device descriptor
-   cpu_unit	CPU unit descriptor
-   cpu_reg	CPU register list
-   cpu_mod	CPU modifiers list */
-
-UNIT cpu_unit = { UDATA (NULL, UNIT_FIX + UNIT_BINK,
-		32768) };
-
-REG cpu_reg[] = {
-	{ HRDATA (PC, saved_PC, 16) },
-	{ HRDATA (A, A, 8) },
-	{ HRDATA (B, B, 8) },
-	{ HRDATA (IX, IX, 16) },
-	{ HRDATA (SP, SP, 16) },
-	{ FLDATA (H, H, 16) },
-	{ FLDATA (I, I, 16) },
-	{ FLDATA (N, N, 16) },
-	{ FLDATA (Z, Z, 16) },
-	{ FLDATA (V, V, 16) },
-	{ FLDATA (C, C, 16) },
-	{ FLDATA (INTE, INTE, 16) },
-	{ ORDATA (WRU, sim_int_char, 8) },
-	{ NULL }  };
-
-MTAB cpu_mod[] = {
-	{ UNIT_OPSTOP, UNIT_OPSTOP, "ITRAP", "ITRAP", NULL },
-	{ UNIT_OPSTOP, 0, "NOITRAP", "NOITRAP", NULL },
-	{ UNIT_MSTOP, UNIT_MSTOP, "MTRAP", "MTRAP", NULL },
-	{ UNIT_MSTOP, 0, "NOMTRAP", "NOMTRAP", NULL },
-	{ UNIT_MSIZE, 4096, NULL, "4K", &cpu_set_size },
-	{ UNIT_MSIZE, 8192, NULL, "8K", &cpu_set_size },
-	{ UNIT_MSIZE, 12288, NULL, "12K", &cpu_set_size },
-	{ UNIT_MSIZE, 16384, NULL, "16K", &cpu_set_size },
-	{ UNIT_MSIZE, 20480, NULL, "20K", &cpu_set_size },
-	{ UNIT_MSIZE, 24576, NULL, "24K", &cpu_set_size },
-	{ UNIT_MSIZE, 28672, NULL, "28K", &cpu_set_size },
-	{ UNIT_MSIZE, 32768, NULL, "32K", &cpu_set_size },
-	{ UNIT_MA000, UNIT_MA000, "MA000", "MA000", NULL },
-	{ UNIT_MA000, 0, "NOMA000", "NOMA000", NULL },
-	{ 0 }  };
-
-DEVICE cpu_dev = {
-	"CPU", &cpu_unit, cpu_reg, cpu_mod,
-	1, 16, 16, 1, 16, 8,
-	&cpu_ex, &cpu_dep, &cpu_reset,
-	NULL, NULL, NULL };
-
-int32 PC;							/* global for the helper routines */
-
-int32 sim_instr (void)
-{
-	extern int32 sim_interval;
-	int32 IR, OP, DAR, reason, hi, lo, op1;
-//	uint32 val1[3];
-	
-	PC = saved_PC & ADDRMASK;		/* load local PC */
-	reason = 0;
-
-	/* Main instruction fetch/decode loop */
-
-	while (reason == 0) {			/* loop until halted */
-    	if (sim_interval <= 0) 		/* check clock queue */
-			if (reason = sim_process_event ()) 
-				break;
-		if (mem_fault) {			/* memory fault? */
-			mem_fault = 0;			/* reset fault flag */
-			reason = STOP_MEMORY;
-			break;
-		}
-    	if (int_req > 0) {			/* interrupt? */
-    /* 6800 interrupts not implemented yet.  None were used,
-       on a standard SWTP 6800. All I/O is programmed. */
-    	}							/* end interrupt */
-		if (sim_brk_summ &&
-		    sim_brk_test (PC, SWMASK ('E'))) {	/* breakpoint? */
-			reason = STOP_IBKPT;	/* stop simulation */
-			break;
-		}
-	/* transient routine area - trace */
-		/*
-		if (PC >= 0xa100 && PC < 0xa400) { 
-			dump_regs();
-			printf("\n\r%04X:	", PC);
-			val1[0] = M[PC];
-			val1[1] = M[PC+1];
-			val1[2] = M[PC+2];
-			fprint_sym(stdout, PC, val1, NULL, SWMASK ('M'));
-		}
-*/
-	  	IR = OP = mem_get_byte(PC);		/* fetch instruction */
-	   	PC = (PC + 1) & ADDRMASK;  		/* increment PC */
-	   	sim_interval--;
-
-    /* The Big Instruction Decode Switch */
-
-		switch (IR) {
-
-			case 0x01:				/* NOP */
-				break;
-			case 0x06:				/* TAP */
-				set_psw(A);
-				break;
-			case 0x07:				/* TPA */
-				A = get_psw();
-				break;
-			case 0x08:				/* INX */
-				IX = (IX + 1) & ADDRMASK;
-				condevalZ(IX);
-				break;
-			case 0x09:				/* DEX */
-				IX = (IX - 1) & ADDRMASK;
-				condevalZ(IX);
-				break;
-			case 0x0A:				/* CLV */
-				V = 0;
-				break;
-			case 0x0B:				/* SEV */
-				V = 0x10000;
-				break;
-			case 0x0C:				/* CLC */
-				C = 0;
-				break;
-			case 0x0D:				/* SEC */
-				C = 0x10000;
-				break;
-			case 0x0E:				/* CLI */
-				I = 0;
-				break;
-			case 0x0F:				/* SEI */
-				I = 0x10000;
-				break;
-			case 0x10:				/* SBA */
-				op1 = A;
-				A = A - B;
-				condevalN(A);
-				condevalZ(A);
-				condevalC(A);
-				condevalVs(B, op1);
-				A &= 0xFF;
-				break;
-			case 0x11:				/* CBA */
-				lo = A - B;
-				condevalN(lo);
-				condevalZ(lo);
-				condevalC(lo);
-				condevalVs(B, A);
-				break;
-			case 0x16:				/* TAB */
-				B = A;
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				break;
-			case 0x17:				/* TBA */
-				A = B;
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				break;
-			case 0x19:				/* DAA */
-    			DAR = A & 0x0F;
-				op1 = C;
-				if (DAR > 9 || C) {
-            		DAR += 6;
-					A &= 0xF0;
-            		A |= DAR & 0x0F;
-					C = 0;
-					if (DAR & 0x10)
-						C = 0x10000;
-				}
-				DAR = (A >> 4) & 0x0F;
-				if (DAR > 9 || C) {
-					DAR += 6;
-				  if (C) 
-					  DAR++;
-				  A &= 0x0F;
-				  A |= (DAR << 4);
-				}
-				C = op1;
-				if ((DAR << 4) & 0x100)
-					C = 0x10000;
-				condevalN(A);
-				condevalZ(A);
-				A &= 0xFF;
-				break;
-			case 0x1B:				/* ABA */
-				A += B;
-				condevalH(A);
-				condevalN(A);
-				condevalZ(A);
-				condevalC(A);
-				condevalVa(A, B);
-				A &= 0xFF;
-				break;
-			case 0x20:				/* BRA rel */
-				go_rel(1);
-				break;
-			case 0x22:				/* BHI rel */
-				go_rel(!(C | Z));
-				break;
-			case 0x23:				/* BLS rel */
-				go_rel(C | Z);
-				break;
-			case 0x24:				/* BCC rel */
-				go_rel(!C);
-				break;
-			case 0x25:				/* BCS rel */
-				go_rel(C);
-				break;
-			case 0x26:				/* BNE rel */
-				go_rel(!Z);
-				break;
-			case 0x27:				/* BEQ rel */
-				go_rel(Z);
-				break;
-			case 0x28:				/* BVC rel */
-				go_rel(!V);
-				break;
-			case 0x29:				/* BVS rel */
-				go_rel(V);
-				break;
-			case 0x2A:				/* BPL rel */
-				go_rel(!N);
-				break;
-			case 0x2B:				/* BMI rel */
-				go_rel(N);
-				break;
-			case 0x2C:				/* BGE rel */
-				go_rel(!(N ^ V));
-				break;
-			case 0x2D:				/* BLT rel */
-				go_rel(N ^ V);
-				break;
-			case 0x2E:				/* BGT rel */
-				go_rel(!(Z | (N ^ V)));
-				break;
-			case 0x2F:				/* BLE rel */
-				go_rel(Z | (N ^ V));
-				break;
-			case 0x30:				/* TSX */
-				IX = (SP + 1) & ADDRMASK;
-				break;
-			case 0x31:				/* INS */
-				SP = (SP + 1) & ADDRMASK;
-				break;
-			case 0x32:				/* PUL A */
-				SP = (SP + 1) & ADDRMASK;
-		     	A = mem_get_byte(SP);
-				break;
-			case 0x33:				/* PUL B */
-				SP = (SP + 1) & ADDRMASK;
-		     	B = mem_get_byte(SP);
-				break;
-			case 0x34:				/* DES */
-				SP = (SP - 1) & ADDRMASK;
-				break;
-			case 0x35:				/* TXS */
-				SP = (IX - 1) & ADDRMASK;
-				break;
-			case 0x36:				/* PSH A */
-		        mem_put_byte(SP, A);
-				SP = (SP - 1) & ADDRMASK;
-				break;
-			case 0x37:				/* PSH B */
-		        mem_put_byte(SP, B);
-				SP = (SP - 1) & ADDRMASK;
- 				break;
-			case 0x39:				/* RTS */
-				SP = (SP + 1) & ADDRMASK;
-				PC = mem_get_word(SP) & ADDRMASK;
-				SP = (SP + 1) & ADDRMASK;
-				break;
-			case 0x3B:				/* RTI */
-				SP = (SP + 1) & ADDRMASK;
-				set_psw(mem_get_byte(SP));
-				SP = (SP + 1) & ADDRMASK;
-				B = mem_get_byte(SP);
-				SP = (SP + 1) & ADDRMASK;
-				A = mem_get_byte(SP);
-				SP = (SP + 1) & ADDRMASK;
-				IX = mem_get_word(SP);
-				SP = (SP + 2) & ADDRMASK;
-				PC = mem_get_word(SP) & ADDRMASK;
-				SP = (SP + 1) & ADDRMASK;
-				break;
-			case 0x3E:				/* WAI */
-				SP = (SP - 1) & ADDRMASK;
-				mem_put_word(SP, PC);
-				SP = (SP - 2) & ADDRMASK;
-				mem_put_word(SP, IX);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, A);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, B);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, get_psw());
-				SP = (SP - 1) & ADDRMASK;
-				if (I) {
-	   				reason = STOP_HALT;
-	       			continue;
-				} else {
-					I = 0x10000;
-					PC = mem_get_word(0xFFFE) & ADDRMASK;
-				}
-				break;
-			case 0x3F:				/* SWI */
-				SP = (SP - 1) & ADDRMASK;
-				mem_put_word(SP, PC);
-				SP = (SP - 2) & ADDRMASK;
-				mem_put_word(SP, IX);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, A);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, B);
-				SP = (SP - 1) & ADDRMASK;
-		        mem_put_byte(SP, get_psw());
-				SP = (SP - 1) & ADDRMASK;
-				I = 0x10000;
-				PC = mem_get_word(0xFFFB) & ADDRMASK;
-				break;
-			case 0x40:				/* NEG A */
-				A = (0 - A) & 0xFF;
-				V = 0;
-				if (A & 0x80)
-					V = 0x10000;
-				C = 0;
-				if (A)
-					C = 0x10000;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x43:				/* COM A */
-				A = ~A & 0xFF;
-				V = 0;
-				C = 0x10000;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x44:				/* LSR A */
-				C = 0;
-				if (A & 0x01)
-					C = 0x10000;
-				A = (A >> 1) & 0xFF;
-				N = 0;
-				condevalZ(A);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x46:				/* ROR A */
-				hi = C;
-				C = 0;
-				if (A & 0x01)
-					C = 0x10000;
-				A = (A >> 1) & 0xFF;
-				if (hi)
-					A |= 0x80;
-				condevalN(A);
-				condevalZ(A);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x47:				/* ASR A */
-				C = 0;
-				if (A & 0x01)
-					C = 0x10000;
-				lo = A & 0x8000;
-				A = (A >> 1) & 0xFF;
-				A |= lo; 
-				condevalN(A);
-				condevalZ(A);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x48:				/* ASL A */
-				C = 0;
-				if (A & 0x80)
-					C = 0x10000;
-				A = (A << 1) & 0xFF;
-				condevalN(A);
-				condevalZ(A);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x49:				/* ROL A */
-				hi = C;
-				C = 0;
-				if (A & 0x80)
-					C = 0x10000;
-				A = (A << 1) & 0xFF;
-				if (hi)
-					A |= 0x01;
-				condevalN(A);
-				condevalZ(A);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x4A:				/* DEC A */
-				V = 0;
-				if (A == 0x80)
-					V = 0x10000;
-				A = (A - 1) & 0xFF;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x4C:				/* INC A */
-				V = 0;
-				if (A == 0x7F)
-					V = 0x10000;
-				A = (A + 1) & 0xFF;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x4D:				/* TST A */
-				lo = (A - 0) & 0xFF;
-				V = 0;
-				C = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x4F:				/* CLR A */
-				A = 0;
-				N = V = C = 0;
-				Z = 0x10000;
-				break;
-			case 0x50:				/* NEG B */
-				B = (0 - V) & 0xFF;
-				V = 0;
-				if (B & 0x8000)
-					V = 0x10000;
-				C = 0;
-				if (B)
-					C = 0x10000;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0x53:				/* COM B */
-				B = ~B & 0xFF;
-				V = 0;
-				C = 0x10000;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0x54:				/* LSR B */
-				C = 0;
-				if (B & 0x01)
-					C = 0x10000;
-				B = (B >> 1) & 0xFF;
-				N = 0;
-				condevalZ(B);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x56:				/* ROR B */
-				hi = C;
-				C = 0;
-				if (B & 0x01)
-					C = 0x10000;
-				B = (B >> 1) & 0xFF;
-				if (hi)
-					B |= 0x80;
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x57:				/* ASR B */
-				C = 0;
-				if (B & 0x01)
-					C = 0x10000;
-				lo = B & 0x8000;
-				B = (B >> 1) & 0xFF;
-				B |= lo; 
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x58:				/* ASL B */
-				C = 0;
-				if (B & 0x80)
-					C = 0x10000;
-				B = (B << 1) & 0xFF;
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x59:				/* ROL B */
-				hi = C;
-				C = 0;
-				if (B & 0x80)
-					C = 0x10000;
-				B = (B << 1) & 0xFF;
-				if (hi)
-					B |= 0x01;
-				condevalN(B);
-				condevalZ(B);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x5A:				/* DEC B */
-				V = 0;
-				if (B == 0x80)
-					V = 0x10000;
-				B = (B - 1) & 0xFF;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0x5C:				/* INC B */
-				V = 0;
-				if (B == 0x7F)
-					V = 0x10000;
-				B = (B + 1) & 0xFF;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0x5D:				/* TST B */
-				lo = (B - 0) & 0xFF;
-				V = 0;
-				C = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x5F:				/* CLR B */
-				B = 0;
-				N = V = C = 0;
-				Z = 0x10000;
-				break;
-			case 0x60:				/* NEG ind */
-				DAR = get_indir_addr();
-				lo = (0 - mem_get_byte(DAR)) & 0xFF;
-				mem_put_byte(DAR, lo);
-				V = 0;
-				if (lo & 0x80)
-					V = 0x10000;
-				C = 0;
-				if (lo)
-					C = 0x10000;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x63:				/* COM ind */
-				DAR = get_indir_addr();
-				lo = ~mem_get_byte(DAR) & 0xFF;
-				mem_put_byte(DAR, lo);
-				V = 0;
-				C = 0x10000;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x64:				/* LSR ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				lo >>= 1;
-				mem_put_byte(DAR, lo);
-				N = 0;
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x66:				/* ROR ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				hi = C;
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				lo >>= 1;
-				if (hi)
-					lo |= 0x80;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x67:				/* ASR ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				lo = (lo & 0x80) | (lo >> 1);
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x68:				/* ASL ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x80)
-					C = 0x10000;
-				lo <<= 1;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x69:				/* ROL ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				hi = C;
-				C = 0;
-				if (lo & 0x80)
-					C = 0x10000;
-				lo <<= 1;
-				if (hi)
-					lo |= 0x01;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x6A:				/* DEC ind */
-				DAR = get_indir_addr();
-				lo = mem_get_byte(DAR);
-				V = 0;
-				if (lo == 0x80)
-					V = 0x10000;
-				lo = (lo - 1) & 0xFF;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x6C:				/* INC ind */
-				DAR= get_indir_addr();
-				lo = mem_get_byte(DAR);
-				V = 0;
-				if (lo == 0x7F)
-					V = 0x10000;
-				lo = (lo + 1) & 0xFF;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x6D:				/* TST ind */
-				lo = (get_indir_val() - 0) & 0xFF;
-				V = 0;
-				C = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x6E:				/* JMP ind */
-				PC = get_indir_addr();
-				break;
-			case 0x6F:				/* CLR ind */
-				mem_put_byte(get_indir_addr(), 0);
-				N = V = C = 0;
-				Z = 0x10000;
-				break;
-			case 0x70:				/* NEG ext */
-				DAR = get_ext_addr(PC);
-				lo = (0 - mem_get_byte(DAR)) & 0xFF;
-				mem_put_byte(DAR, lo);
-				V = 0;
-				if (lo & 0x80)
-					V = 0x10000;
-				C = 0;
-				if (lo)
-					C = 0x10000;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x73:				/* COM ext */
-				DAR = get_ext_addr();
-				lo = ~mem_get_byte(DAR) & 0xFF;
-				mem_put_byte(DAR, lo);
-				V = 0;
-				C = 0x10000;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x74:				/* LSR ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				lo >>= 1;
-				mem_put_byte(DAR, lo);
-				N = 0;
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x76:				/* ROR ext */
-				DAR = get_ext_addr();
-				hi = C;
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				lo >>= 1;
-				if (hi)
-					lo |= 0x80;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x77:				/* ASR ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x01)
-					C = 0x10000;
-				hi = lo & 0x80;
-				lo >>= 1;
-				lo |= hi;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x78:				/* ASL ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				C = 0;
-				if (lo & 0x80)
-					C = 0x10000;
-				lo <<= 1;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x79:				/* ROL ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				hi = C;
-				C = 0;
-				if (lo & 0x80)
-					C = 0x10000;
-				lo <<= 1;
-				if (hi)
-					lo |= 0x01;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				V = 0;
-				if (N ^ C)
-					V = 0x10000;
-				break;
-			case 0x7A:				/* DEC ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				V = 0;
-				if (lo == 0x80)
-					V = 0x10000;
-				lo = (lo - 1) & 0xFF;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x7C:				/* INC ext */
-				DAR = get_ext_addr();
-				lo = mem_get_byte(DAR);
-				V = 0;
-				if (lo == 0x7F)
-					V = 0x10000;
-				lo = (lo + 1) & 0xFF;
-				mem_put_byte(DAR, lo);
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x7D:				/* TST ext */
-				lo = mem_get_byte(get_ext_addr()) - 0;
-				V = 0;
-				C = 0;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				break;
-			case 0x7E:				/* JMP ext */
-				PC = get_ext_addr() & ADDRMASK;
-				break;
-			case 0x7F:				/* CLR ext */
-				mem_put_byte(get_ext_addr(), 0);
-				N = V = C = 0;
-				Z = 0x10000;
-				break;
-			case 0x80:				/* SUB A imm */
-				op1 = get_dir_addr();
-				A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x81:				/* CMP A imm */
-				op1 = get_dir_addr();
-				lo = A - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(lo, op1);
-				break;
-			case 0x82:				/* SBC A imm */
-				op1 = get_dir_addr();
-				if (C)
-					A = A - op1 - 1;
-				else
-					A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x84:				/* AND A imm */
-				A = (A & get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x85:				/* BIT A imm */
-				lo = (A & get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x86:				/* LDA A imm */
-				A = get_dir_addr();
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x88:				/* EOR A imm */
-				A = (A ^ get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x89:				/* ADC A imm */
-				op1 = get_dir_addr();
-				if (C)
-					A = A + op1 + 1;
-				else
-					A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x8A:				/* ORA A imm */
-				A = (A | get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x8B:				/* ADD A imm */
-				op1 = get_dir_addr();
-				A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x8C:				/* CPX imm */
-				op1 = IX - get_ext_addr();
-				condevalZ(op1);
-				condevalN(op1 >> 8);
-				V = op1 & 0x10000;
-				break;
-			case 0x8D:				/* BSR rel */
-				lo = get_rel_addr();
-				SP = (SP - 1) & ADDRMASK;
-				mem_put_word(SP, PC);
-				SP = (SP - 1) & ADDRMASK;
-				PC = PC + lo;
-				PC &= ADDRMASK;
-				break;
-			case 0x8E:				/* LDS imm */
-				SP = get_ext_addr();
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0x90:				/* SUB A dir */
-				op1 = get_dir_val();
-				A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x91:				/* CMP A dir */
-				op1 = get_dir_val();
-				lo = A - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xff);
-				condevalC(lo);
-				condevalVs(A, op1);
-				break;
-			case 0x92:				/* SBC A dir */
-				op1 = get_dir_val();
-				if (C)
-					A = A - op1 - 1;
-				else
-					A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x94:				/* AND A dir */
-				A = (A & get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x95:				/* BIT A dir */
-				lo = (A & get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0x96:				/* LDA A dir */
-				A = get_dir_val();
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x97:				/* STA A dir */
-				mem_put_byte(get_dir_addr(), A);
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x98:				/* EOR A dir */
-				A = (A ^ get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x99:				/* ADC A dir */
-				op1 = get_dir_val();
-				if (C)
-					A = A + op1 + 1;
-				else
-					A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x9A:				/* ORA A dir */
-				A = (A | get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0x9B:				/* ADD A dir */
-				op1 = get_dir_val();
-				A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0x9C:				/* CPX dir */
-				op1 = IX - mem_get_word(get_dir_addr());
-				condevalZ(op1);
-				condevalN(op1 >> 8);
-				V = op1 & 0x10000;
-				break;
-			case 0x9E:				/* LDS dir */
-				SP = mem_get_word(get_dir_addr());
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0x9F:				/* STS dir */
-				mem_put_word(get_dir_addr(), SP);
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0xA0:				/* SUB A ind */
-				op1 = get_indir_val();
-				A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xA1:				/* CMP A ind */
-				op1 = get_indir_val();
-				lo = A - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(A, op1);
-				break;
-			case 0xA2:				/* SBC A ind */
-				op1 = get_indir_val();
-				if (C)
-					A = A - op1 - 1;
-				else
-					A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xA4:				/* AND A ind */
-				A = (A & get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xA5:				/* BIT A ind */
-				lo = (A & get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xA6:				/* LDA A ind */
-				A = get_indir_val();
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xA7:				/* STA A ind */
-				mem_put_byte(get_indir_addr(), A);		
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xA8:				/* EOR A ind */
-				A = (A ^ get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xA9:				/* ADC A ind */
-				op1 = get_indir_val();
-				if (C)
-					A = A + op1 + 1;
-				else
-					A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xAA:				/* ORA A ind */
-				A = (A | get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xAB:				/* ADD A ind */
-				op1 = get_indir_val();
-				A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xAC:				/* CPX ind */
-				op1 = (IX - get_indir_addr()) & ADDRMASK;
-				condevalZ(op1);
-				condevalN(op1 >> 8);
-				V = op1 & 0x10000;
-				break;
-			case 0xAD:				/* JSR ind */
-				DAR = get_indir_addr();
-				SP = (SP - 1) & ADDRMASK;
-				mem_put_word(SP, PC);
-				SP = (SP - 1) & ADDRMASK;
-				PC = DAR;
-				break;
-			case 0xAE:				/* LDS ind */
-				SP = mem_get_word(get_indir_addr());
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0xAF:				/* STS ind */
-				mem_put_word(get_indir_addr(), SP);
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0xB0:				/* SUB A ext */
-				op1 = get_ext_val();
-				A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xB1:				/* CMP A ext */
-				op1 = get_ext_val();
-				lo = A - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(A, op1);
-				break;
-			case 0xB2:				/* SBC A ext */
-				op1 = get_ext_val();
-				if (C)
-					A = A - op1 - 1;
-				else
-					A = A - op1;
-				condevalN(A);
-				condevalC(A);
-				condevalVs(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xB4:				/* AND A ext */
-				A = (A & get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xB5:				/* BIT A ext */
-				lo = (A & get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xB6:				/* LDA A ext */
-				A = get_ext_val();
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xB7:				/* STA A ext */
-				mem_put_byte(get_ext_addr(), A);		
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xB8:				/* EOR A ext */
-				A = (A ^ get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xB9:				/* ADC A ext */
-				op1 = get_ext_val();
-				if (C)
-					A = A + op1 + 1;
-				else
-					A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xBA:				/* ORA A ext */
-				A = (A | get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(A);
-				condevalZ(A);
-				break;
-			case 0xBB:				/* ADD A ext */
-				op1 = get_ext_val();
-				A = A + op1;
-				condevalH(A);
-				condevalN(A);
-				condevalC(A);
-				condevalVa(A, op1);
-				A &= 0xFF;
-				condevalZ(A);
-				break;
-			case 0xBC:				/* CPX ext */
-				op1 = (IX - mem_get_word(get_ext_addr())) & ADDRMASK;
-				condevalZ(op1);
-				condevalN(op1 >> 8);
-				V = op1 & 0x10000;
-				break;
-			case 0xBD:				/* JSR ext */
-				DAR = get_ext_addr();
-				SP = (SP - 1) & ADDRMASK;
-				mem_put_word(SP, PC);
-				SP = (SP - 1) & ADDRMASK;
-				PC = DAR;
-				break;
-			case 0xBE:				/* LDS ext */
-				SP = mem_get_word(get_ext_addr());
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0xBF:				/* STS ext */
-				mem_put_word(get_ext_addr(), SP);
-				condevalN(SP >> 8);
-				condevalZ(SP);
-				V = 0;
-				break;
-			case 0xC0:				/* SUB B imm */
-				op1 = get_dir_addr();
-				B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xC1:				/* CMP B imm */
-				op1 = get_dir_addr();
-				lo = B - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(B, op1);
-				break;
-			case 0xC2:				/* SBC B imm */
-				op1 = get_dir_addr();
-				if (C)
-					B = B - op1 - 1;
-				else
-					B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xC4:				/* AND B imm */
-				B = (B & get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xC5:				/* BIT B imm */
-				lo = (B & get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xC6:				/* LDA B imm */
-				B = get_dir_addr();
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xC8:				/* EOR B imm */
-				B = (B ^ get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xC9:				/* ADC B imm */
-				op1 = get_dir_addr();
-				if (C)
-					B = B + op1 + 1;
-				else
-					B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xCA:				/* ORA B imm */
-				B = (B | get_dir_addr()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xCB:				/* ADD B imm */
-				op1 = get_dir_addr();
-				B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xCE:				/* LDX imm */
-				IX = get_ext_addr();
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xD0:				/* SUB B dir */
-				op1 = get_dir_val();
-				B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xD1:				/* CMP B dir */
-				op1 = get_dir_val();
-				lo = B - op1;
-				condevalN(lo);
-				condevalZ(lo);
-				condevalC(lo);
-				condevalVs(B, op1);
-				break;
-			case 0xD2:				/* SBC B dir */
-				op1 = get_dir_val();
-				if (C)
-					B = B - op1 - 1;
-				else
-					B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xD4:				/* AND B dir */
-				B = (B & get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xD5:				/* BIT B dir */
-				lo = (B & get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xD6:				/* LDA B dir */
-				B = get_dir_val();
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xD7:				/* STA B dir */
-				mem_put_byte(get_dir_addr(), B);
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xD8:				/* EOR B dir */
-				B = (B ^ get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xD9:				/* ADC B dir */
-				op1 = get_dir_val();
-				if (C)
-					B = B + op1 + 1;
-				else
-					B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xDA:				/* ORA B dir */
-				B = (B | get_dir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xDB:				/* ADD B dir */
-				op1 = get_dir_val();
-				B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xDE:				/* LDX dir */
-				IX = mem_get_word(get_dir_addr());
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xDF:				/* STX dir */
-				mem_put_word(get_dir_addr(), IX);
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xE0:				/* SUB B ind */
-				op1 = get_indir_val();
-				B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xE1:				/* CMP B ind */
-				op1 = get_indir_val();
-				lo = B - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(B, op1);
-				break;
-			case 0xE2:				/* SBC B ind */
-				op1 = get_indir_val();
-				if (C)
-					B = B - op1 - 1;
-				else
-					B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xE4:				/* AND B ind */
-				B = (B & get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xE5:				/* BIT B ind */
-				lo = (B & get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xE6:				/* LDA B ind */
-				B = get_indir_val();
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xE7:				/* STA B ind */
-				mem_put_byte(get_indir_addr(), B);
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xE8:				/* EOR B ind */
-				B = (B ^ get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xE9:				/* ADC B ind */
-				op1 = get_indir_val();
-				if (C)
-					B = B + op1 + 1;
-				else
-					B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xEA:				/* ORA B ind */
-				B = (B | get_indir_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xEB:				/* ADD B ind */
-				op1 = get_indir_val();
-				B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xEE:				/* LDX ind */
-				IX = mem_get_word(get_indir_addr());
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xEF:				/* STX ind */
-				mem_put_word(get_indir_addr(), IX);
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xF0:				/* SUB B ext */
-				op1 = get_ext_val();
-				B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xF1:				/* CMP B ext */
-				op1 = get_ext_val();
-				lo = B - op1;
-				condevalN(lo);
-				condevalZ(lo & 0xFF);
-				condevalC(lo);
-				condevalVs(B, op1);
-				break;
-			case 0xF2:				/* SBC B ext */
-				op1 = get_ext_val();
-				if (C)
-					B = B - op1 - 1;
-				else
-					B = B - op1;
-				condevalN(B);
-				condevalC(B);
-				condevalVs(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xF4:				/* AND B ext */
-				B = (B & get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xF5:				/* BIT B ext */
-				lo = (B & get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(lo);
-				condevalZ(lo);
-				break;
-			case 0xF6:				/* LDA B ext */
-				B = get_ext_val();
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xF7:				/* STA B ext */
-				mem_put_byte(get_ext_addr(), B);
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xF8:				/* EOR B ext */
-				B = (B ^ get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xF9:				/* ADC B ext */
-				op1 = get_ext_val();
-				if (C)
-					B = B + op1 + 1;
-				else
-					B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xFA:				/* ORA B ext */
-				B = (B | get_ext_val()) & 0xFF;
-				V = 0;
-				condevalN(B);
-				condevalZ(B);
-				break;
-			case 0xFB:				/* ADD B ext */
-				op1 = get_ext_val();
-				B = B + op1;
-				condevalH(B);
-				condevalN(B);
-				condevalC(B);
-				condevalVa(B, op1);
-				B &= 0xFF;
-				condevalZ(B);
-				break;
-			case 0xFE:				/* LDX ext */
-				IX = mem_get_word(get_ext_addr());
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-			case 0xFF:				/* STX ext */
-				mem_put_word(get_ext_addr(), IX);
-				condevalN(IX >> 8);
-				condevalZ(IX);
-				V = 0;
-				break;
-
-	    	default: {				/* Unassigned */
-	        	if (cpu_unit.flags & UNIT_OPSTOP) {
-		    		reason = STOP_OPCODE;
-		            PC--;
-				}
-    			break;
-	    	}
-	    }
-	}
-	/* Simulation halted - lets dump all the registers! */
-	dump_regs();
-	saved_PC = PC;
-	return reason;
-}
-
-/* dump the working registers */
-
-void dump_regs()
-{
-	printf("\r\nPC=%04X SP=%04X IX=%04X ", PC, SP, IX);
-	printf("A=%02X B=%02X PSW=%02X", A, B, get_psw());
-}
-
-/*	this routine does the jump to relative offset if the condition is
-	met.  Otherwise, execution continues at the current PC. */
-
-void go_rel(int32 cond)
-{
-	int32 temp;
-
-	temp = get_rel_addr();
-	if (cond)
-		PC += temp;
-	PC &= ADDRMASK;
-}
-
-/* returns the relative offset sign-extended */
-
-int32 get_rel_addr()
-{
-	int32 temp;
-
-	temp = mem_get_byte(PC++);
-	if (temp & 0x80)
-		temp |= 0xFF00;
-	return temp & ADDRMASK;
-}
-
-/* returns the value at the direct address pointed to by PC */
-
-int32 get_dir_val()
-{
-	return mem_get_byte(get_dir_addr());
-}
-
-/* returns the direct address pointed to by PC */
-
-int32 get_dir_addr()
-{
-	int32 temp;
-
-	temp = mem_get_byte(PC);
-	PC = (PC + 1) & ADDRMASK;
-	return temp & 0xFF;
-}
-
-/* returns the value at the indirect address pointed to by PC */
-
-int32 get_indir_val()
-{
-	return mem_get_byte(get_indir_addr());
-}
-
-/* returns the indirect address pointed to by PC or immediate byte */
-
-int32 get_indir_addr()
-{
-	int32 temp;
-	
-	temp = (mem_get_byte(PC++) + IX) & ADDRMASK;
-	PC &= ADDRMASK;
-	return temp;
-}
-
-/* returns the value at the extended address pointed to by PC */
-
-int32 get_ext_val()
-{
-	return mem_get_byte(get_ext_addr());
-}
-
-/* returns the extended address pointed to by PC or immediate word */
-
-int32 get_ext_addr()
-{
-	int32 temp;
-
-	temp = (mem_get_byte(PC) << 8) | mem_get_byte(PC+1);
-	PC = (PC +2) & ADDRMASK;
-	return temp;
-}
-
-/* return a PSW from the current flags */
-
-int32 get_psw()
-{
-	int32 psw;
-
-	psw = 0xC0;
-	if (H)
-		psw |= 0x20;
-	if (I)
-		psw |= 0x10;
-	if (N)
-		psw |= 0x08;
-	if (Z)
-		psw |= 0x04;
-	if (V)
-		psw |= 0x02;
-	if (C)
-		psw |= 0x01;
-	return psw;
-}
-
-/* set the current flags from a PSW */
-
-void set_psw(int32 psw)
-{
-	H = 0;
-	if (psw & 0x20)
-		H = 0x10000;
-	I = 0;
-	if (psw & 0x10)
-		I = 0x10000;
-	N = 0;
-	if (psw & 0x08)
-		N = 0x10000;
-	Z = 0;
-	if (psw & 0x04)
-		Z = 0x10000;
-	V = 0;
-	if (psw & 0x02)
-		V = 0x10000;
-	C = 0;
-	if (psw & 0x01)
-		C = 0x10000;
-}
-
-/* test and set H */
-
-void condevalH(int32 res)
-{
-	H = (res & 0x10) << 12;
-}
-
-/* test and set N */
-
-void condevalN(int32 res)
-{
-	N = 0;
-	if (res & 0x80)
-		N = 0x10000;
-}
-
-/* test and set Z */
-
-void condevalZ(int32 res)
-{
-	Z = 0;
-	if (res == 0)
-		Z = 0x10000;
-}
-
-/* test and set V for addition */
-
-void condevalVa(int32 op1, int32 op2)
-{
-	if (C) {
-		V = 0;
-		if (((op1 & 0x80) && (op2 & 0x80)) ||
-			(((op1 & 0x80) == 0) && ((op2 & 0x80) == 0)))
-			V = 0x10000;
-	}
-}
-
-/* test and set V for subtraction */
-
-void condevalVs(int32 op1, int32 op2)
-{
-	if (C) {
-		V = 0;
-		if (((op1 & 0x80) && ((op2 & 0x80) == 0)) ||
-			(((op1 & 0x80) == 0) && (op2 & 0x80)))
-			V = 0x10000;
-	}
-}
-
-/* test and set C */
-
-void condevalC(int32 res)
-{
-	C = (res & 0x100) << 8;
-}
-
-/* memory write operations */
-
-/* put word */
-
-void mem_put_word(int32 addr, int32 val)
-{
-	mem_put_byte(addr,val >> 8);
-	mem_put_byte(addr + 1, val);
-}
-
-/* put byte */
-
-void mem_put_byte(int32 addr, int32 val)
-{
-	if (addr >= 0x0000 && addr < (int32) MEMSIZE)  	/* memory cards */
-		M[addr] = val & 0xFF;
-	else if (addr >= 0x8000 && addr < 0x8020) 		/* memory mapped I/O */
-		dev_table[addr - 0x8000].routine(1, val);
-	else  if (addr >= 0xA000 && addr < 0xA080)  	/* CPU memory */
-		M[addr] = val & 0xFF;
-	else  if ((addr >= 0xA080 && addr < 0xC000) &&	/* extended CPU memory */
-		cpu_unit.flags & UNIT_MA000)		
-		M[addr] = val & 0xFF;
-	else {
-		if (cpu_unit.flags & UNIT_MSTOP)
-			mem_fault = 1;
-		printf("Invalid write to %04X\n\r", addr);
-	}
-}
-
-/* memory read operations */
-
-/* get word */
-
-int32 mem_get_word(int32 addr)
-{
-	int32 temp;
-
-	temp = (mem_get_byte(addr) << 8) | mem_get_byte(addr+1);
-	return temp;
-}
-
-/* get byte */
-
-int32 mem_get_byte(int32 addr)
-{
-	int32 val;
-
-	if (addr >= 0x0000 && addr < (int32) MEMSIZE)  	/* memory cards */
-		val = M[addr];
-	else if (addr >= 0x8000 && addr < 0x8020) 		/* memory mapped I/O */
-		val = dev_table[addr - 0x8000].routine(0, 0);
-	else  if (addr >= 0xA000 && addr < 0xA080)  	/* CPU memory */
-		val = M[addr];
-	else  if ((addr >= 0xA080 && addr < 0xC000) &&	/* extended CPU memory */
-		cpu_unit.flags & UNIT_MA000)		
-		val = M[addr];
-	else  if (addr >= 0xE000 && addr < 0x10000)  	/* ROM memory */
-		val = M[addr];
-	else {
-		if (cpu_unit.flags & UNIT_MSTOP)
-			mem_fault = 1;
-		val = 0xFF;				/* default for no memory at address */
-		printf("Invalid read of %04X\n\r", addr);
-	}
-	return val & 0xFF;
-}
-
-/* calls from the simulator */
-
-/* Reset routine */
-
-t_stat cpu_reset (DEVICE *dptr)
-{
-	int i;
-
-	I = 0x10000;
-	saved_PC = (M[0xFFFE] << 8) | M[0xFFFF];
-	int_req = 0;
-	sim_brk_types = sim_brk_dflt = SWMASK ('E');
-	/* copy in rom image at E000 */
-	for (i = 0; i < BOOTLEN; i++) {
-	     M[i + 0xE000] = bootrom[i] & 0xFF;
-	}
-	/* copy in rom image at FC00 for vectors! */
-	for (i = 0; i < BOOTLEN; i++) {
-	     M[i + 0xFC00] = bootrom[i] & 0xFF;
-	}
-	return SCPE_OK;
-}
-
-/* Memory examine */
-
-t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
-{
-	if (addr >= MAXMEMSIZE)
-		return SCPE_NXM;
-	if (vptr != NULL)
-		*vptr = mem_get_byte(addr);
-	return SCPE_OK;
-}
-
-/* Memory deposit */
-
-t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
-{
-	if (addr >= MAXMEMSIZE)
-		return SCPE_NXM;
-    mem_put_byte(addr, val);
-//	printf("Deposit to %04X of %02X\n\r", addr, val);
-	return SCPE_OK;
-}
-
-/* adjust the memory size for the emulator 4k to 32k in 4k steps */
-
-t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
-{
-	int32 mc = 0;
-	uint32 i;
-
-	if ((val <= 0) || (val > MAXMEMSIZE) || ((val & 0x0FFF) != 0))
-		return SCPE_ARG;
-	for (i = val; i < MEMSIZE; i++)
-		mc = mc | M[i];
-	if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE)))
-		return SCPE_OK;
-	MEMSIZE = val;
-	return SCPE_OK;
-}
-
-/* dummy i/o device */
-
-int32 nulldev(int32 io, int32 data)
-{
-	if (io == 0)
-		return (0xFF);
-	return 0;
-}
-
diff --git a/swtp/swtp_dsk.c b/swtp/swtp_dsk.c
deleted file mode 100644
index 9c8c7d38..00000000
--- a/swtp/swtp_dsk.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/* swtp_dc4_dsk.c: SWTP DC-4 DISK Simulator
-
-   Copyright (c) 2005, William A. Beech
-
-   Permission is hereby granted, free of charge, to any person obtaining a
-   copy of this software and associated documentation files (the "Software"),
-   to deal in the Software without restriction, including without limitation
-   the rights to use, copy, modify, merge, publish, distribute, sublicense,
-   and/or sell copies of the Software, and to permit persons to whom the
-   Software is furnished to do so, subject to the following conditions:
-
-   The above copyright notice and this permission notice shall be included in
-   all copies or substantial portions of the Software.
-
-   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-   ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-   Except as contained in this notice, the name of William A. Beech shall not
-   be used in advertising or otherwise to promote the sale, use or other dealings
-   in this Software without prior written authorization from William A. Beech.
-   
-   Based on work by Charles E Owen (c) 1997 and Peter Schorn (c) 2002-2005
-
-
-	The DC-4 is a 5-inch floppy controller which can control up
-    to 4 daisy-chained 5-inch floppy drives.  The controller is based on
-	the Western Digital 1797 Floppy Disk Controller (FDC) chip. This
-	file only emulates the minimum DC-4 functionality to interface with
-	the virtual disk file.
-
-    The floppy controller  is interfaced to the CPU by use of 5 memory 
-	addreses.  These are device numbers 5 and 6 (0x8014-0x801B).
-
-    Address 	Mode	Function
-    -------		----	--------
-
-	0x8014		Read	Returns FDC interrupt status
-	0x8014		Write	Selects the drive/head/motor control
-    0x8018		Read	Returns status of FDC
-    0x8018		Write	FDC command register
-	0x8019		Read	Returns FDC track register
-	0x8019		Write	Set FDC track register
-    0x801A		Read	Returns FDC sector register
-	0x801A		Write	Set FDC sector register
-    0x801B		Read	Read data
-    0x801B		Write	Write data
-
-    Drive Select Read (0x8014):
-
-    +---+---+---+---+---+---+---+---+
-    | I | D | X | X | X | X | X | X |
-    +---+---+---+---+---+---+---+---+
-
-	I = Set indicates an interrupt request from the FDC pending.
-	D = DRQ pending - same as bit 1 of FDC status register.
-
-    Drive Select Write (0x8014):
-
-    +---+---+---+---+---+---+---+---+
-    | M | S | X | X | X | X | Device|
-    +---+---+---+---+---+---+---+---+
-
-    M = If this bit is 1, the one-shot is triggered/retriggered to 
-		start/keep the motors on.
-	S = Side select. If set, side one is selected otherwise side zero
-		is selected.
-    X = not used
-    Device = value 0 thru 3, selects drive 0-3 to be controlled.
-
-    Drive Status Read (0x8018):
-
-    +---+---+---+---+---+---+---+---+
-    | R | P | H | S | C | L | D | B |
-    +---+---+---+---+---+---+---+---+
-
-    B - When 1, the controller is busy.
-    D - When 1, index mark detected (type I) or data request - read data 
-		ready/write data empty (type II or III).
-    H - When 1, track 0 (type I) or lost data (type II or III).
-    C - When 1, crc error detected.
-    S - When 1, seek (type I) or RNF (type II or III) error.
-    H - When 1, head is currently loaded (type I) or record type/
-		write fault (type II or III).
-    P - When 1, indicates that diskette is write-protected.
-	R - When 1, drive is not ready.
-
-    Drive Control Write (0x8018) for type I commands:
-
-    +---+---+---+---+---+---+---+---+
-    | 0 | S2| S1| S0| H | V | R1| R0|
-    +---+---+---+---+---+---+---+---+
-
-    R0/R1 - Selects the step rate.
-	V - When 1, verify on destination track.
-    H - When 1, loads head to drive surface.
-	S0/S1/S2 = 000 - home.
-			   001 - seek track in data register.
-			   010 - step without updating track register.
-			   011 - step and update track register.
-			   100 - step in without updating track register.
-			   101 - step in and update track register.
-			   110 - step out without updating track register.
-			   111 - step out and update track register.
-
-    Drive Control Write (0x8018) for type II commands:
-
-    +---+---+---+---+---+---+---+---+
-    | 1 | 0 | T | M | S | E | B | A |
-    +---+---+---+---+---+---+---+---+
-
-    A - Zero for read, 1 on write deleted data mark else data mark.
-	B - When 1, shifts sector length field definitions one place.
-	E - When, delay operation 15 ms, 0 no delay.
-	S - When 1, select side 1, 0 select side 0.
-	M - When 1, multiple records, 0 for single record.
-    T - When 1, write command, 0 for read.
-
-    Drive Control Write (0x8018) for type III commands:
-
-    +---+---+---+---+---+---+---+---+
-    | 1 | 1 | T0| T1| 0 | E | 0 | 0 |
-    +---+---+---+---+---+---+---+---+
-
-	E - When, delay operation 15 ms, 0 no delay.
-    T0/T1 - 00 - read address command.
-			10 - read track command.
-			11 - write track command.
-
-	Tracks are numbered from 0 up to one minus the last track in the 1797!
-
-    Track Register Read (0x8019):
-
-    +---+---+---+---+---+---+---+---+
-    |          Track Number         |
-    +---+---+---+---+---+---+---+---+
-
-    Reads the current 8-bit value from the track position.
-
-    Track Register Write (0x8019):
-
-    +---+---+---+---+---+---+---+---+
-    |          Track Number         |
-    +---+---+---+---+---+---+---+---+
-
-    Writes the 8-bit value to the track register.
-
-	Sectors are numbers from 1 up to the last sector in the 1797!
-
-	Sector Register Read (0x801A):
-
-    +---+---+---+---+---+---+---+---+
-    |         Sector Number         |
-    +---+---+---+---+---+---+---+---+
-
-    Reads the current 8-bit value from the sector position.
-
-    Sector Register Write (0x801A):
-
-    +---+---+---+---+---+---+---+---+
-    |         Sector Number         |
-    +---+---+---+---+---+---+---+---+
-
-    Writes the 8-bit value to the sector register.
-
-	Data Register Read (0x801B):
-
-    +---+---+---+---+---+---+---+---+
-    |             Data              |
-    +---+---+---+---+---+---+---+---+
-
-    Reads the current 8-bit value from the data register.
-
-    Data Register Write (0x801B):
-
-    +---+---+---+---+---+---+---+---+
-    |             Data              |
-    +---+---+---+---+---+---+---+---+
-
-    Writes the 8-bit value to the data register.
-
-	A FLEX disk is defined as follows:
-
-	Track	Sector	Use
-	0		1		Boot sector
-	0		2		Boot sector (cont)
-	0		3		Unused
-	0		4		System Identity Record (explained below)
-	0		5		Unused
-	0		6-last	Directory - 10 entries/sector (explained below)
-	1		1		First available data sector
-	last-1	last	Last available data sector
-
-	System Identity Record
-
-	Byte	Use
-	0x10	Volume ID (8 bytes)
-	0x18	???
-	0x19	???
-	0x1A	???
-	0x1B	Volume number (2 bytes)
-	0x1D	First free sector (2 bytes)
-	0x1F	Last track minus one (byte)
-	0x20	Last sector (byte)
-	0x21	Total sectors on disk (2 bytes)
-	0x23	Month (byte
-	0x24	Day (byte)
-	0x25	Year (byte)
-	0x26	Last track minus one (byte)
-	0x27	Last sector (byte)	
-
-*/
-
-#include <stdio.h>
-
-#include "swtp_defs.h"
-
-#define	UNIT_V_ENABLE	(UNIT_V_UF + 0)	/* Write Enable */
-#define UNIT_ENABLE	(1 << UNIT_V_ENABLE)
-
-/* emulate a SS FLEX disk with 72 sectors and 80 tracks */
-
-#define	NUM_DISK		4			/* standard 1797 maximum */
-#define SECT_SIZE		256			/* standard FLEX sector */
-#define NUM_SECT		72			/* sectors/track */
-#define TRAK_SIZE		(SECT_SIZE * NUM_SECT)
-#define HEADS			1			/* handle as SS with twice the sectors */
-#define NUM_CYL			80			/* maximum tracks */				
-#define DSK_SIZE		(NUM_SECT * HEADS * NUM_CYL * SECT_SIZE)
-
-/* 1797 status bits */
-
-#define	BUSY			0x01
-#define	DRQ				0x02
-#define	WRPROT			0x40
-#define	NOTRDY			0x80
-
-/* debug prints */
-
-#define	DEBUG	0
-
-
-/* prototypes */
-
-t_stat dsk_svc (UNIT *uptr);
-t_stat dsk_reset (DEVICE *dptr);
-int32 fdcdrv(int32 io, int32 data);
-int32 fdccmd(int32 io, int32 data);
-int32 fdctrk(int32 io, int32 data);
-int32 fdcsec(int32 io, int32 data);
-int32 fdcdata(int32 io, int32 data);
-
-/* Global data on status */
-
-int32 cur_dsk = NUM_DISK;			/* Currently selected drive */
-int32 cur_trk[NUM_DISK] = {0, 0, 0, 0};
-int32 cur_sec[NUM_DISK] = {0, 0, 0, 0};
-int32 cur_byt[NUM_DISK] = {0, 0, 0, 0};
-int32 cur_flg[NUM_DISK] = {NOTRDY, NOTRDY, NOTRDY, NOTRDY};
-
-/* Variables */
-
-uint8 dskbuf[SECT_SIZE];			/* Data Buffer */
-UNIT *dptr = NULL;					/* fileref to write dirty buffer to */
-int32 fdcbyte;
-int32 intrq = 0;					/* interrupt request flag */
-
-/* DC-4 Simh Device Data Structures */
-
-UNIT dsk_unit[] = {
-	{ UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
-	{ UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
-	{ UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
-	{ UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  } };
-
-REG dsk_reg[] = {
-	{ HRDATA (DISK, cur_dsk, 4) },
-	{ NULL } };
-
-MTAB dsk_mod[] = {
-	{ UNIT_ENABLE, UNIT_ENABLE, "RW", "RW", NULL },
-	{ UNIT_ENABLE, 0, "RO", "RO", NULL },
-	{ 0 } };
-
-DEVICE dsk_dev = {
-	"DSK", dsk_unit, dsk_reg, dsk_mod,
-	NUM_DISK, 16, 16, 1, 16, 8,
-	NULL, NULL, &dsk_reset,
-	NULL, NULL, NULL };
-
-/* service routines to handle simlulator functions */
-
-/* service routine - actually gets char & places in buffer */
-
-t_stat dsk_svc (UNIT *uptr)
-{
-return SCPE_OK;
-}
-
-/* Reset routine */
-
-t_stat dsk_reset (DEVICE *dptr)
-{
-cur_dsk = 0;
-return SCPE_OK;
-}
-
-/* I/O instruction handlers, called from the CPU module when an
-   memory read or write to the proper addresses is issued.
-
-   Each function is passed an 'io' flag, where 0 means a read from
-   the port, and 1 means a write to the port.  On input, the actual
-   input is passed as the return value, on output, 'data' is written
-   to the device.
-*/
-
-/* DC-4 drive select register routine - this register is not part of the 1797
-*/
-
-int32 fdcdrv(int32 io, int32 data)
-{
-/* **** probably need to grab the parameters from the SIR and set the limits */
-	if (io) {							/* write to DC-4 drive register */
-		cur_dsk = data & 0x03;			/* only 2 drive select bits */
-#if DEBUG > 0
-		printf("Drive set to %d\n\r", cur_dsk);
-#endif
-		if ((dsk_unit[cur_dsk].flags & UNIT_ENABLE) == 0)	
-			cur_flg[cur_dsk] |= WRPROT;	/* set WPROT */
-		return 0;
-	} else {							/* read from DC-4 drive register */
-#if DEBUG > 0
-		printf("Drive read as %02X\n\r", intrq);
-#endif
-		return intrq;
-	}
-}
-
-/* WD 1797 FDC command register routine */
-
-int32 fdccmd(int32 io, int32 data)
-{
-	static int32 val = 0, val1 = NOTRDY, i;
-    static long pos;
-    UNIT *uptr;
- 
-	if ((dsk_unit[cur_dsk].flags & UNIT_ATT) == 0) { /* not attached */
-		cur_flg[cur_dsk] |= NOTRDY;		/* set not ready flag */
-		printf("Drive %d is not attached\n\r", cur_dsk);
-		return 0;
-	} else {
-		cur_flg[cur_dsk] &= ~NOTRDY;	/* clear not ready flag */
-	}	
-	uptr = dsk_dev.units + cur_dsk;		/* get virtual drive address */
-	if (io) {							/* write command to fdc */
-		switch(data) {
-			case 0x8C:					/* read command */
-			case 0x9C:
-#if DEBUG > 0
-				printf("Read of disk %d, track %d, sector %d\n\r", 
-					cur_dsk, cur_trk[cur_dsk], cur_sec[cur_dsk]);
-#endif
-				pos = TRAK_SIZE * cur_trk[cur_dsk]; /* calculate file offset */
-				pos += SECT_SIZE * (cur_sec[cur_dsk] - 1);
-#if DEBUG > 0
-				printf("Read pos = %ld ($%04X)\n\r", pos, pos);
-#endif
-				sim_fseek(uptr -> fileref, pos, 0); /* seek to offset */
-				sim_fread(dskbuf, 256, 1, uptr -> fileref); /* read in buffer */
-				cur_flg[cur_dsk] |= BUSY | DRQ;	/* set DRQ & BUSY */
-				i = cur_byt[cur_dsk] = 0;	/* clear counter */
-				break;
-			case 0xAC:					/* write command */
-#if DEBUG > 0
-				printf("Write of disk %d, track %d, sector %d\n\r", 
-					cur_dsk, cur_trk[cur_dsk], cur_sec[cur_dsk]);
-#endif
-				if (cur_flg[cur_dsk] & WRPROT) {		
-					printf("Drive %d is write-protected\n\r", cur_dsk);
-				} else {
-					pos = TRAK_SIZE * cur_trk[cur_dsk]; /* calculate file offset */
-					pos += SECT_SIZE * (cur_sec[cur_dsk] - 1);
-#if DEBUG > 1
-					printf("Write pos = %ld ($%04X)\n\r", pos, pos);
-#endif
-					sim_fseek(uptr -> fileref, pos, 0); /* seek to offset */
-					dptr = uptr;			/* save pointer for actual write */
-					cur_flg[cur_dsk] |= BUSY | DRQ;/* set DRQ & BUSY */
-					i = cur_byt[cur_dsk] = 0;	/* clear counter */
-				}
-				break;
-			case 0x18:					/* seek command */
-			case 0x1B:
-				cur_trk[cur_dsk] = fdcbyte;	/* set track */
-				cur_flg[cur_dsk] &= ~(BUSY | DRQ);	/* clear flags */
-#if DEBUG > 0
-				printf("Seek of disk %d, track %d\n\r", cur_dsk, fdcbyte);
-#endif
-				break;
-			case 0x0B:					/* restore command */
-				cur_trk[cur_dsk] = 0;	/* home the drive */
-				cur_flg[cur_dsk] &= ~(BUSY | DRQ);	/* clear flags */
-#if DEBUG > 0
-				printf("Drive %d homed\n\r", cur_dsk);
-#endif
-				break;
-			default:
-				printf("Unknown FDC command %02XH\n\r", data);
-		}
-	} else {							/* read status from fdc */
-		val = cur_flg[cur_dsk];			/* set return value */
-		if (val1 == 0 && val == 0x03)	/* delay BUSY going high */
-			val = 0x02;					/* set DRQ first */
-		if (val != val1) {				/* now allow BUSY after on read */
-			val1 = val;
-#if DEBUG > 0
-			printf("Drive %d status=%02X\n\r", cur_dsk, cur_flg[cur_dsk]);
-#endif
-		}
-    }
-	return val;
-}
-
-/* WD 1797 FDC track register routine */
-
-int32 fdctrk(int32 io, int32 data)
-{
-	if (io) {
-		cur_trk[cur_dsk] = data & 0xFF;
-#if DEBUG > 1
-		printf("Drive %d track set to %d\n\r", cur_dsk, data);
-#endif
-	} else
-		;
-#if DEBUG > 1
-		printf("Drive %d track read as %d\n\r", cur_dsk, cur_trk[cur_dsk]);
-#endif
-	return cur_trk[cur_dsk];
-}
-
-/* WD 1797 FDC sector register routine */
-
-int32 fdcsec(int32 io, int32 data)
-{
-	if (io) {
-		cur_sec[cur_dsk] = data & 0xFF;
-		if (cur_sec[cur_dsk] == 0)	/* fix for swtp boot! */
-			cur_sec[cur_dsk] = 1;
-#if DEBUG > 1
-		printf("Drive %d sector set to %d\n\r", cur_dsk, data);
-#endif
-	} else
-		;
-#if DEBUG > 1
-		printf("Drive %d sector read as %d\n\r", cur_dsk, cur_sec[cur_dsk]);
-#endif
-	return cur_sec[cur_dsk];
-}
-
-/* WD 1797 FDC data register routine */
-
-int32 fdcdata(int32 io, int32 data)
-{
-	int32 i;
-
-	if (io) {							/* write byte to fdc */
-		fdcbyte = data;					/* save for seek */
-        if ((i = cur_byt[cur_dsk]) < SECT_SIZE) { /* copy bytes to buffer */
-#if DEBUG > 3
-			printf("Writing byte %d of %02X\n\r", cur_byt[cur_dsk], data);
-#endif
-        	cur_byt[cur_dsk]++;			/* step counter */
-			dskbuf[i] = data;			/* byte into buffer */
-			if (cur_byt[cur_dsk] == SECT_SIZE) {
-				cur_flg[cur_dsk] &= ~(BUSY | DRQ);
-				if (dptr) {				/* if initiated by FDC write command */
-					sim_fwrite(dskbuf, 256, 1, dptr -> fileref); /* write it */
-					dptr = NULL;
-				}
-#if DEBUG > 0
-				printf("Sector write complete\n\r");
-#endif
-			}
-		}
-		return 0;
-	} else {							/* read byte from fdc */
-        if ((i = cur_byt[cur_dsk]) < SECT_SIZE) { /* copy bytes from buffer */
-#if DEBUG > 1
-			printf("Reading byte %d\n\r", cur_byt[cur_dsk]);
-#endif
-        	cur_byt[cur_dsk]++;			/* step counter */
-			if (cur_byt[cur_dsk] == SECT_SIZE) { /* done? */
-				cur_flg[cur_dsk] &= ~(BUSY | DRQ); /* clear flags */
-#if DEBUG > 0
-				printf("Sector read complete\n\r");
-#endif
-			}
-       		return (dskbuf[i] & 0xFF);
-		} else
-			return 0;
-	}
-}
-
diff --git a/swtp/swtp_sio.c b/swtp/swtp_sio.c
deleted file mode 100644
index 1f6f8a77..00000000
--- a/swtp/swtp_sio.c
+++ /dev/null
@@ -1,312 +0,0 @@
-/* swtp_sio: SWTP serial I/O card
-
-Copyright (c) 2005, William Beech
-
-	Permission is hereby granted, free of charge, to any person obtaining a
-	copy of this software and associated documentation files (the "Software"),
-	to deal in the Software without restriction, including without limitation
-	the rights to use, copy, modify, merge, publish, distribute, sublicense,
-	and/or sell copies of the Software, and to permit persons to whom the
-	Software is furnished to do so, subject to the following conditions:
-
-	The above copyright notice and this permission notice shall be included in
-	all copies or substantial portions of the Software.
-
-	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-	FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-	Willaim Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-	IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-	CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-	Except as contained in this notice, the name of William A. Beech shall not
-	be used in advertising or otherwise to promote the sale, use or other dealings
-	in this Software without prior written authorization from William A. Beech.
-   
-	Based on work by Charles E Owen (c) 1997 and Peter Schorn (c) 2002-2005
-
-    These functions support a simulated SWTP MP-S interface card.
-    The card had two physical I/O ports which could be connected
-    to any serial I/O device that would connect to a current loop
-    or RS232 interface.  Available baud rates were jumper selectable
-    for each port from 110 to 9600.  The ports appear at all 4 addresses.
-	This fact is used by SWTBUG to determine the presence of the MP-S vice
-	MP-C serial card.
-
-    All I/O is via either programmed I/O or interrupt controlled I/O.
-    It has a status port and a data port.  A write to the status port
-    can select some options for the device (0x03 will reset the port).
-    A read of the status port gets the port status:
-
-    +---+---+---+---+---+---+---+---+
-    | I | P | O | F |CTS|DCD|TXE|RXF|
-    +---+---+---+---+---+---+---+---+
-
-	RXF - A 1 in this bit position means a character has been received
-    	  on the data port and is ready to be read.
-    TXE - A 1 in this bit means the port is ready to receive a character
-    	  on the data port and transmit it out over the serial line.
- 
-    A read to the data port gets the buffered character, a write
-    to the data port writes the character to the device.
-*/
-
-#include	<stdio.h>
-#include	<ctype.h>
-
-#include "swtp_defs.h"
-
-#define	UNIT_V_ANSI	(UNIT_V_UF + 0)		// ANSI mode
-#define UNIT_ANSI	(1 << UNIT_V_ANSI)
-
-t_stat sio_svc (UNIT *uptr);
-t_stat sio_reset (DEVICE *dptr);
-t_stat ptr_svc (UNIT *uptr);
-t_stat ptr_reset (DEVICE *dptr);
-t_stat ptp_svc (UNIT *uptr);
-t_stat ptp_reset (DEVICE *dptr);
-
-int32 ptr_stopioe = 0, ptp_stopioe = 0;	// stop on error
-
-// MP-S Standard I/O Data Structures
-
-UNIT sio_unit = { UDATA (&sio_svc, 0, 0),
-			 KBD_POLL_WAIT };
-
-REG sio_reg[] = {
-	{ ORDATA (DATA, sio_unit.buf, 8) },
-	{ ORDATA (STAT, sio_unit.u3, 8) },
-	{ NULL }  };
-
-MTAB sio_mod[] = {
-	{ UNIT_ANSI, 0, "TTY", "TTY", NULL },
-	{ 0 }  };
-
-DEVICE sio_dev = {
-	"MP-S", &sio_unit, sio_reg, sio_mod,
-	1, 10, 31, 1, 8, 8,
-	NULL, NULL, &sio_reset,
-	NULL, NULL, NULL };
-
-UNIT ptr_unit = { UDATA (&ptr_svc, UNIT_SEQ + UNIT_ATTABLE, 0),
-			 KBD_POLL_WAIT };
-DEVICE ptr_dev = {
-	"PTR", &ptr_unit, NULL, NULL,
-	1, 10, 31, 1, 8, 8,
-	NULL, NULL, &ptr_reset,
-	NULL, NULL, NULL };
-
-UNIT ptp_unit = { UDATA (&ptp_svc, UNIT_SEQ + UNIT_ATTABLE, 0),
-			 KBD_POLL_WAIT };
-DEVICE ptp_dev = {
-	"PTP", &ptp_unit, NULL, NULL,
-	1, 10, 31, 1, 8, 8,
-	NULL, NULL, &ptp_reset,
-	NULL, NULL, NULL };
-
-/*  Service routines to handle simulator functions */
-
-/* service routine - actually gets char & places in buffer */
-
-int32 ptp_rdr(int32 io, int32 data);
-
-int32	ptp_flag = 0, ptr_flag = 0;
-
-/* console input service routine */
-
-t_stat sio_svc (UNIT *uptr)
-{
-	int32 temp;
-
-	sim_activate (&sio_unit, sio_unit.wait); // continue poll
-	if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
-		return temp;				// no char or error?
-	sio_unit.buf = temp & 0xFF;		// Save char
-	sio_unit.u3 |= 0x01;            // Set RXF flag
-
-	/* Do any special character handling here */
-
-	sio_unit.pos++;					// step character count
-	return SCPE_OK;
-}
-
-/* paper tape reader input service routine */
-
-t_stat ptr_svc (UNIT *uptr)
-{
-    return SCPE_OK;
-}
-
-/* paper tape punch output service routine */
-
-t_stat ptp_svc (UNIT *uptr)
-{
-	return SCPE_OK;
-}
-
-/* Reset console */
-
-t_stat sio_reset (DEVICE *dptr)
-{
-	sio_unit.buf = 0;				// Data buffer
-	sio_unit.u3 = 0x02;				// Status buffer
-	sim_activate (&sio_unit, sio_unit.wait); // activate unit
-	return SCPE_OK;
-}
-
-/* Reset paper tape reader */
-
-t_stat ptr_reset (DEVICE *dptr)
-{
-	ptr_unit.buf = 0;
-	ptr_unit.u3 = 0x02;
-	sim_cancel (&ptr_unit);			// deactivate unit
-	return SCPE_OK;
-}
-
-/* Reset paper tape punch */
-
-t_stat ptp_reset (DEVICE *dptr)
-{
-	ptp_unit.buf = 0;
-	ptp_unit.u3 = 0x02;
-	sim_cancel (&ptp_unit);			// deactivate unit
-	return SCPE_OK;
-}
-
-/* 	I/O instruction handlers, called from the CPU module when a
-   	read or write occur to addresses 0x8000-0x801F.
-
-   	Each function is passed an 'io' flag, where 0 means a read from
-   	the port, and 1 means a write to the port.  On input, the actual
-	input is passed as the return value, on output, 'data' is written
-	to the device.
-
-	This code emulates a SWTP MP-S Serial Card with a Model 33 Teletype
-	attached.  The Model 33 uses DC1-DC4 codes to enable or disable the
-	paper tape reader and punch.  Those devices are defined in this module,
-	and the code built to emulate those functions if the PTP and/or PTR
-	are attached in the simulator.
-*/
-
-/* Port 1 (0x8004-0x8007) controls the Model 33 Teletype */
-
-int32 ptr_flg1 = 0;
-int32 odata, status;
-
-
-int32 sio0s(int32 io, int32 data)
-{
-	UNIT *uptr;
-
-	if (io == 0) {					// control register read
-		if (ptr_flag) {				// reader enabled?
-			if ((ptr_unit.flags & UNIT_ATT) == 0)	// attached?
-				ptr_unit.u3 &= 0xFE; // no, clear RXF flag 
-			else {
-				uptr = ptr_dev.units;// not EOF?
-				if (feof(uptr -> fileref))
-					ptr_unit.u3 &= 0xFE;
-				else
-					ptr_unit.u3 |= 0x01;
-			}
-			return (status = ptr_unit.u3);	// no - done
-		} else {
-			return (status = sio_unit.u3);	// return console status
-		}
-	} else {						// control register write
-    	if (data == 0x03) {			// reset port!
-            sio_unit.u3 = 0x02;		// reset console
-            sio_unit.buf = 0;
-            sio_unit.pos = 0;
-        	ptr_unit.u3 = 0x02;		// reset reader
-            ptr_unit.buf = 0;
-            ptr_unit.pos = 0;
-        	ptp_unit.u3 = 0x02;		// reset punch
-            ptp_unit.buf = 0;
-            ptp_unit.pos = 0;
-        }
-   	return (status = 0);						// invalid io
-    }
-}
-
-int32 sio0d(int32 io, int32 data)
-{
-    UNIT *uptr;
-
-	if (io == 0) {					// data register read
-		if (ptr_flag) {				// RDR enabled?
-			if ((ptr_unit.flags & UNIT_ATT) == 0)	// attached?
-				return 0;			// no, done
-//			printf("ptr_unit.u3=%02X\n", ptr_unit.u3);
-			if ((ptr_unit.u3 & 0x01) == 0) {	// yes, more data?
-//				printf("Returning old %02X\n", odata);  // no, return previous byte
-			 	return (odata & 0xFF);
-			}
-			uptr = ptr_dev.units;	// get data byte
-			if ((odata = getc(uptr -> fileref)) == EOF) { // end of file?
-//				printf("Got EOF\n");
-			    ptr_unit.u3 &= 0xFE; // clear RXF flag	
-			    return (odata = 0);			// no data
-			}
-//			printf("Returning new %02X\n", odata);
-			ptr_unit.pos++;			// step character count
-			ptr_unit.u3 &= 0xFE;	// clear RXF flag	
-			return (odata & 0xFF);	// return character
-		} else {
-			sio_unit.u3 &= 0xFE;	// clear RXF flag
-			return (odata = sio_unit.buf);	// return next char
-		}
-    } else {						// data register write
-		if (isprint(data) || data == '\r' || data == '\n') { // printable?
-    		sim_putchar(data);		// print character on console
-			if (ptp_flag && ptp_unit.flags & UNIT_ATT) { // PTP enabled & attached?
-    			uptr = ptp_dev.units; // punch character to file
-    			putc(data, uptr -> fileref);
-				ptp_unit.pos++;		// step character counter
-			}
-		} else {					// DC1-DC4 control Reader/Punch
-			switch (data) {
-				case 0x11:			// RDR on
-					ptr_flag = 1;
-					ptr_flg1 = 0;
-					ptr_unit.u3 |= 0x01;
-//					printf("Reader on\r\n");
-					break;
-				case 0x12:			// PTP on
-					ptp_flag = 1;
-					ptp_unit.u3 |= 0x02;
-//					printf("Punch on\r\n");
-					break;
-				case 0x13:			// RDR off
-					ptr_flag = 0;
-//					printf("Reader off-%d bytes read\r\n", ptr_unit.pos);
-					break;
-				case 0x14:			// PTP off
-					ptp_flag = 0;
-//					printf("Punch off-%d bytes written\r\n", ptp_unit.pos);
-					break;
-				default:			// ignore all other characters
-					break;
-			}
-		}
-    }
-    return (odata = 0);
-}
-
-/*	because each port appears at 2 addresses and this fact is used
-	to determine if it is a MP-C or MP-S repeatedly in the SWTBUG
-	monitor, this code assures that reads of the high ports return
-	the same data as was read the last time on the low ports.
-*/
-
-int32 sio1s(int32 io, int32 data)
-{
-        return status;
-}
-
-int32 sio1d(int32 io, int32 data)
-{
-    return odata;
-}
-
diff --git a/swtp/swtp_sys.c b/swtp/swtp_sys.c
deleted file mode 100644
index 391065cd..00000000
--- a/swtp/swtp_sys.c
+++ /dev/null
@@ -1,425 +0,0 @@
-/* swtp_sys.c: SWTP 6800 system interface
-
-   Copyright (c) 2005, William Beech
-
-   Permission is hereby granted, free of charge, to any person obtaining a
-   copy of this software and associated documentation files (the "Software"),
-   to deal in the Software without restriction, including without limitation
-   the rights to use, copy, modify, merge, publish, distribute, sublicense,
-   and/or sell copies of the Software, and to permit persons to whom the
-   Software is furnished to do so, subject to the following conditions:
-
-   The above copyright notice and this permission notice shall be included in
-   all copies or substantial portions of the Software.
-
-   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-   WILLIAM A BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-   Except as contained in this notice, the name of William A. Beech shall not
-   be used in advertising or otherwise to promote the sale, use or other dealings
-   in this Software without prior written authorization from William A. Beech.
-
-   Based on work by Charles E Owen (c) 1997 and Peter Schorn (c) 2002-2005
-
-*/
-
-#include <ctype.h>
-#include <string.h>
-#include "swtp_defs.h"
-
-/* externals */
-
-extern DEVICE cpu_dev;
-extern DEVICE dsk_dev;
-extern UNIT cpu_unit;
-extern REG cpu_reg[];
-extern DEVICE sio_dev;
-extern DEVICE ptr_dev;
-extern DEVICE ptp_dev;
-extern DEVICE lpt_dev;
-extern unsigned char M[];
-extern int32 saved_PC;
-extern int32 sim_switches;
-//extern int32 (*sim_vm_fprint_addr)(FILE*, DEVICE*,t_addr);
-
-/* prototypes */
-
-int32 sim_load (FILE *fileref, char *cptr, char *fnam, int flag);
-int32 fprint_sym (FILE *of, int32 addr, uint32 *val,
-	UNIT *uptr, int32 sw);
-t_addr fprint_addr(FILE *stream, DEVICE *dptr, t_addr addr);
-int32 parse_sym (char *cptr, int32 addr, UNIT *uptr, uint32 *val, int32 sw);
-void sim_special_init (void);
-
-/* links into scp */
-
-void (*sim_vm_init)(void) = &sim_special_init;
-
-/* SCP data structures
-
-   sim_name		simulator name string
-   sim_PC		pointer to saved PC register descriptor
-   sim_emax		number of words needed for examine
-   sim_devices		array of pointers to simulated devices
-   sim_stop_messages	array of pointers to stop messages
-   sim_load		binary loader
-*/
-
-char sim_name[] = "SWTP 6800";
-
-REG *sim_PC = &cpu_reg[0];
-
-int32 sim_emax = 16;
-
-DEVICE *sim_devices[] = { &cpu_dev, &sio_dev, &ptp_dev, &ptr_dev, &dsk_dev, NULL };
-
-const char *sim_stop_messages[] = {
-	"Unknown error",
-    "Unknown I/O Instruction",
-	"HALT instruction",
-    "Breakpoint",
-    "Invalid Opcode",
-	"Invalid Memory" };
-
-static const char *opcode[] = {
-"???", "NOP", "???", "???",				//0x00
-"???", "???", "TAP", "TPA", 
-"INX", "DEX", "CLV", "SEV",
-"CLC", "SEC", "CLI", "SEI",
-"SBA", "CBA", "???", "???",				//0x10
-"???", "???", "TAB", "TBA",
-"???", "DAA", "???", "ABA",
-"???", "???", "???", "???",
-"BRA", "???", "BHI", "BLS",				//0x20
-"BCC", "BCS", "BNE", "BEQ",
-"BVC", "BVS", "BPL", "BMI",
-"BGE", "BLT", "BGT", "BLE", 
-"TSX", "INS", "PULA", "PULB",			//0x30
-"DES", "TXS", "PSHA", "PSHB",
-"???", "RTS", "???", "RTI",
-"???", "???", "WAI", "SWI",
-"NEGA", "???", "???", "COMA",			//0x40 
-"LSRA", "???", "RORA", "ASRA",
-"ASLA", "ROLA", "DECA", "???",
-"INCA", "TSTA", "???", "CLRA",
-"NEGB", "???", "???", "COMB",			//0x50
-"LSRB", "???", "RORB", "ASRB",
-"ASLB", "ROLB", "DECB", "???",
-"INCB", "TSTB", "???", "CLRB",
-"NEG", "???", "???", "COM",				//0x60
-"LSR", "???", "ROR", "ASR",
-"ASL", "ROL", "DEC", "???",
-"INC", "TST", "JMP", "CLR",
-"NEG", "???", "???", "COM",				//0x70
-"LSR", "???", "ROR", "ASR",
-"ASL", "ROL", "DEC", "???",
-"INC", "TST", "JMP", "CLR",
-"SUBA", "CMPA", "SBCA", "???",		//0x80
-"ANDA", "BITA", "LDAA", "???",
-"EORA", "ADCA", "ORAA", "ADDA",
-"CPX", "BSR", "LDS", "???",
-"SUBA", "CMPA", "SBCA", "???",		//0x90
-"ANDA", "BITA", "LDAA", "STAA",
-"EORA", "ADCA", "ORAA", "ADDA",
-"CPX", "???", "LDS", "STS",
-"SUBA", "CMPA", "SBCA", "???",		//0xA0
-"ANDA", "BITA", "LDAA", "STAA",
-"EORA", "ADCA", "ORAA", "ADDA",
-"CPX X", "JSR X", "LDS X", "STS X",
-"SUBA", "CMPA", "SBCA", "???",		//0xB0
-"ANDA", "BITA", "LDAA", "STAA",
-"EORA", "ADCA", "ORAA", "ADDA",
-"CPX", "JSR", "LDS", "STS",
-"SUBB", "CMPB", "SBCB", "???",		//0xC0
-"ANDB", "BITB", "LDAB", "???",
-"EORB", "ADCB", "ORAB", "ADDB",
-"???", "???", "LDX", "???",
-"SUBB", "CMPB", "SBCB", "???",		//0xD0
-"ANDB", "BITB", "LDAB", "STAB",
-"EORB", "ADCB", "ORAB", "ADDB",
-"???", "???", "LDX", "STX",
-"SUBB", "CMPB", "SBCB", "???",		//0xE0
-"ANDB", "BITB", "LDAB", "STAB",
-"EORB", "ADCB", "ORAB", "ADDB",
-"???", "???", "LDX", "STX",
-"SUBB", "CMPB", "SBCB", "???",		//0xF0
-"ANDB", "BITB", "LDAB", "STAB",
-"EORB", "ADCB", "ORAB", "ADDB",
-"???", "???", "LDX", "STX",
- };
-
-int32 oplen[256] = {
-0,1,0,0,0,0,1,1,1,1,1,1,1,1,1,1,		//0x00
-1,1,0,0,0,0,1,1,0,1,0,1,0,0,0,0,
-2,0,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-1,1,1,1,1,1,1,1,0,1,0,1,0,0,1,1,
-1,0,0,1,1,0,1,1,1,1,1,0,1,1,0,1,		//0x40
-1,0,0,1,1,0,1,1,1,1,1,0,1,1,0,1,
-2,0,0,2,2,0,2,2,2,2,2,0,2,2,2,2,
-3,0,0,3,3,0,3,3,3,3,3,0,3,3,3,3,
-2,2,2,0,2,2,2,0,2,2,2,2,3,2,3,0,		//0x80
-2,2,2,0,2,2,2,2,2,2,2,2,2,0,2,2,
-2,2,2,0,2,2,2,2,2,2,2,2,2,2,2,2,
-3,3,3,0,3,3,3,3,3,3,3,3,3,3,3,3,
-2,2,2,0,2,2,2,0,2,2,2,2,0,0,3,0,		//0xC0
-2,2,2,0,2,2,2,2,2,2,2,2,0,0,2,2,
-2,2,2,0,2,2,2,2,2,2,2,2,0,0,2,2,
-3,3,3,0,3,3,3,3,3,3,3,3,0,0,3,3 };
-
-/* This is the dumper/loader. This command uses the -h to signify a
-	hex dump/load vice a binary one.  If no address is given to load, it 
-	takes the address from the hex record or the current PC for binary.
-*/
-
-int32 sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
-{
-	int32 i, cnt = 0, addr = 0, start = 0x10000, end = 0, bytecnt, 
-		cksum1, cksum, bytes[250];
-	char buffer[256];
-
-	sscanf(cptr," %x-%x", &start, &end);
-	if (flag) {							// dump
-		if (start == 0x10000)			// no address parameter
-			return SCPE_2FARG;
-		if (sim_switches & 0x80) {		// hex dump
-			addr = start;
-			while (addr <= end) {		// more records to write
-				if ((addr + 16) <= end)	// how many bytes this record
-					bytecnt = 16 + 3;
-				else
-					bytecnt = end - addr + 4;
-				cksum = -1 - (bytecnt) - (addr >> 8) - (addr & 0xFF); //init cksum
-				fprintf(fileref, "S1%02X%02X%02X", bytecnt, addr>>8, addr&0xFF); //header
-				for (i=0; i<bytecnt-3; i++, addr++, cnt++) { // data
-					fprintf(fileref, "%02X", M[addr]);
-					cksum -= M[addr];
-				}
-				fprintf(fileref, "%02X\r\n", cksum & 0xff);	// eor
-			}
-			fprintf(fileref, "S9\r\n");	// eof
-		} else {						// binary dump
-			for (addr = start; addr <= end; addr++, cnt++) {
-				putc(M[addr], fileref);
-			}
-		}
-		printf ("%d Bytes dumped starting at %04X\n", cnt, start);
-	} else {							// load
-		if (sim_switches & 0x80) {		// hex load
-			while ((fgets(buffer, 255, fileref)) != NULL) {
-				if (buffer[0] != 'S')
-					printf("Not a Motorola hex format file\n");
-				else {
-					if (buffer[0] == '0') // name record
-						printf("Name record found and ignored\n");
-					else if (buffer[1] == '1') { // another record
-						sscanf(buffer+2,"%2x%4x", &bytecnt, &addr);
-						if (start == 0x10000)
-							start = addr;
-						for (i=0; i < bytecnt-3; i++)
-							sscanf(buffer+8+(2*i), "%2x", &bytes[i]);
-						sscanf(buffer+8+(2*i), "%2x", &cksum1);
-						cksum = -1 - (bytecnt) - (addr >> 8) - (addr & 0xFF); //init cksum
-						for (i=0; i < bytecnt-3; i++)
-							cksum -= bytes[i];
-						cksum &= 0xFF;
-						if (cksum != cksum1)
-							printf("Checksum error\n");
-						else {
-							for (i=0; i < bytecnt-3; i++) {
-								M[addr++] = bytes[i];
-								cnt++;
-							}
-						}
-					} else if (buffer[1] == '9')  // end of file
-						printf("End of file\n");
-				}
-			}
-		} else {						// binary load
-			if (start == 0x10000)		// no starting address
-				addr = saved_PC;
-			else
-				addr = start;
-			start = addr;
-			while ((i = getc (fileref)) != EOF) {
-				M[addr] = i;
-				addr++;
-				cnt++;
-			}
-		}
-		printf ("%d Bytes loaded starting at %04X\n", cnt, start);
-	}
-	return (SCPE_OK);
-}
-
-/* Symbolic output
-
-   Inputs:
-	*of   =	output stream
-	addr	=	current PC
-	*val	=	pointer to values
-	*uptr	=	pointer to unit
-	sw	=	switches
-   Outputs:
-	status	=	error code
-*/
-
-int32 fprint_sym (FILE *of, int32 addr, uint32 *val,
-	UNIT *uptr, int32 sw)
-{
-	int32 i, inst, inst1;
-
-	if (sw & SWMASK ('D')) {		// dump memory
-		for (i=0; i<16; i++)
-			fprintf(of, "%02X ", val[i]);
-		fprintf(of, "  ");
-		for (i=0; i<16; i++)
-			if (isprint(val[i]))
-				fprintf(of, "%c", val[i]);
-			else
-				fprintf(of, ".");
-		return -15;
-	} else if (sw & SWMASK ('M')) { 	// dump instruction mnemonic
-		inst = val[0];
-		if (!oplen[inst]) {				// invalid opcode
-			fprintf(of, "%02X", inst);
-			return 0;
-		}
-		inst1 = inst & 0xF0;
-		fprintf (of, "%s", opcode[inst]); // mnemonic
-		if (strlen(opcode[inst]) == 3)
-			fprintf(of, " ");
-		if (inst1 == 0x20 || inst == 0x8D) { // rel operand
-			inst1 = val[1];
-			if (val[1] & 0x80)
-				inst1 |= 0xFF00;
-			fprintf(of, " $%04X", (addr + inst1 + 2) & ADDRMASK);
-		} else if (inst1 == 0x80 || inst1 == 0xC0) { // imm operand
-			if ((inst & 0x0F) < 0x0C)
-				fprintf(of, " #$%02X", val[1]);
-			else
-				fprintf(of, " #$%02X%02X", val[1], val[2]);
-		} else if (inst1 == 0x60 || inst1 == 0xA0 || inst1 == 0xE0) // ind operand
-			fprintf(of, " %d,X", val[1]);
-		else if (inst1 == 0x70 || inst1 == 0xb0 || inst1 == 0xF0) // ext operand
-			fprintf(of, " $%02X%02X", val[1], val[2]);
-		return (-(oplen[inst] - 1));
-	} else 
-		return SCPE_ARG;
-}
-
-/* address output routine */
-
-t_addr fprint_addr(FILE *of, DEVICE *dptr, t_addr addr)
-{
-	fprintf(of, "%04X", addr);
-	return 0;
-}
-
-/* Symbolic input
-
-   Inputs:
-	*cptr	=	pointer to input string
-	addr	=	current PC
-	*uptr	=	pointer to unit
-	*val	=	pointer to output values
-	sw	=	switches
-   Outputs:
-	status	=	error status
-*/
-
-int32 parse_sym (char *cptr, int32 addr, UNIT *uptr, uint32 *val, int32 sw)
-{
-	int32 cflag, i = 0, j, r;
-	char gbuf[CBUFSIZE];
-
-	cflag = (uptr == NULL) || (uptr == &cpu_unit);
-	while (isspace (*cptr)) cptr++;				/* absorb spaces */
-	if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
-		if (cptr[0] == 0) 
-			return SCPE_ARG;		/* must have 1 char */
-		val[0] = (uint32) cptr[0];
-		return SCPE_OK;  
-	}
-	if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII string? */
-		if (cptr[0] == 0) 
-			return SCPE_ARG;		/* must have 1 char */
-		val[0] = ((uint32) cptr[0] << 8) + (uint32) cptr[1];
-	return SCPE_OK;
-	}
-
-/* An instruction: get opcode (all characters until null, comma,
-   or numeric (including spaces).
-*/
-
-	while (1) {
-		if (*cptr == ',' || *cptr == '\0' ||
-    		isdigit(*cptr))
-         		break;
-		gbuf[i] = toupper(*cptr);
-		cptr++;
-		i++;
-	}
-
-/* Allow for RST which has numeric as part of opcode */
-
-	if (toupper(gbuf[0]) == 'R' &&
-		toupper(gbuf[1]) == 'S' &&
-		toupper(gbuf[2]) == 'T') {
-		gbuf[i] = toupper(*cptr);
-		cptr++;
-		i++;
-	}
-
-/* Allow for 'MOV' which is only opcode that has comma in it. */
-
-	if (toupper(gbuf[0]) == 'M' &&
-		toupper(gbuf[1]) == 'O' &&
-		toupper(gbuf[2]) == 'V') {
-		gbuf[i] = toupper(*cptr);
-		cptr++;
-		i++;
-		gbuf[i] = toupper(*cptr);
-		cptr++;
-		i++;
-	}
-
-/* kill trailing spaces if any */
-	gbuf[i] = '\0';
-	for (j = i - 1; gbuf[j] == ' '; j--) {
-		gbuf[j] = '\0';
-	}
-
-/* find opcode in table */
-	for (j = 0; j < 256; j++) {
-		if (strcmp(gbuf, opcode[j]) == 0)
-    		break;
-	}
-	if (j > 255)        /* not found */
-		return SCPE_ARG;
-
-	val[0] = j;         /* store opcode */
-	if (oplen[j] < 2)   /* if 1-byter we are done */
-		return SCPE_OK;
-	if (*cptr == ',') cptr++;
-	cptr = get_glyph(cptr, gbuf, 0);	/* get address */
-	sscanf(gbuf, "%o", &r);
-	if (oplen[j] == 2) {
-		val[1] = r & 0xFF;
-	    return (-1);
-	}
-	val[1] = r & 0xFF;
-	val[2] = (r >> 8) & 0xFF;
-	return (-2);
-}
-
-/* initialize optional interfaces */
-
-void sim_special_init (void)
-{
-//	*sim_vm_fprint_addr = &fprint_addr;
-}
-
diff --git a/swtp6800/common/bootrom.c b/swtp6800/common/bootrom.c
new file mode 100644
index 00000000..c3ecc6e8
--- /dev/null
+++ b/swtp6800/common/bootrom.c
@@ -0,0 +1,231 @@
+/*  bootrom.c: Boot ROM simulator for Motorola processors
+
+    Copyright (c) 2010-2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not be
+    used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    These functions support a single simulated 2704 to 2764 EPROM device on 
+    an 8-bit computer system..  This device allows the the device buffer to 
+    be loaded from a binary file containing the emulated EPROM code.
+
+    These functions support a simulated 2704, 2708, 2716, 2732 or 2764 EPROM 
+    device on a CPU board.  The byte get and put routines use an offset into 
+    the boot EPROM image to locate the proper byte.  This allows another device 
+    to set the base address for the boot EPROM.  The device type is stored as
+    a binary number in the first three unit flag bits.
+
+    This device uses a dynamically allocated buffer to hold the EPROM image.  
+    A call to BOOTROM_config will free the current buffer.  A call to 
+    BOOTROM_reset will allocate a new buffer of BOOTROM_unit.capac bytes.  A
+    call to BOOTROM_attach will load the buffer with the EPROM image.
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define UNIT_V_MSIZE    (UNIT_V_UF)     /* ROM Size */
+#define UNIT_MSIZE      (0x7 << UNIT_V_MSIZE)
+#define UNIT_NONE       (0 << UNIT_V_MSIZE) /* No EPROM */
+#define UNIT_2704       (1 << UNIT_V_MSIZE) /* 2704 mode */
+#define UNIT_2708       (2 << UNIT_V_MSIZE) /* 2708 mode */
+#define UNIT_2716       (3 << UNIT_V_MSIZE) /* 2716 mode */
+#define UNIT_2732       (4 << UNIT_V_MSIZE) /* 2732 mode */
+#define UNIT_2764       (5 << UNIT_V_MSIZE) /* 2764 mode */
+
+/* function prototypes */
+
+t_stat BOOTROM_svc (UNIT *uptr);
+t_stat BOOTROM_config (UNIT *uptr, int32 val, char *cptr, void *desc);
+t_stat BOOTROM_attach (UNIT *uptr, char *cptr);
+t_stat BOOTROM_reset (DEVICE *dptr);
+int32 BOOTROM_get_mbyte(int32 offset);
+
+/* SIMH Standard I/O Data Structures */
+
+UNIT BOOTROM_unit = { UDATA (NULL, 
+                           UNIT_ATTABLE+UNIT_BINK+UNIT_ROABLE+UNIT_RO, 0),
+                    KBD_POLL_WAIT };
+
+MTAB BOOTROM_mod[] = {
+    { UNIT_MSIZE, UNIT_NONE, "None", "NONE", &BOOTROM_config },
+    { UNIT_MSIZE, UNIT_2704, "2704", "2704", &BOOTROM_config },
+    { UNIT_MSIZE, UNIT_2708, "2708", "2708", &BOOTROM_config },
+    { UNIT_MSIZE, UNIT_2716, "2716", "2716", &BOOTROM_config },
+    { UNIT_MSIZE, UNIT_2732, "2732", "2732", &BOOTROM_config },
+    { UNIT_MSIZE, UNIT_2764, "2764", "2764", &BOOTROM_config },
+    { 0 }
+};
+
+DEBTAB BOOTROM_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE BOOTROM_dev = {
+    "BOOTROM",                      /* name */
+    &BOOTROM_unit,                  /* units */
+    NULL,                           /* registers */
+    BOOTROM_mod,                    /* modifiers */
+    1,                              /* numunits */
+    16,                             /* aradix */
+    32,                             /* awidth */
+    1,                              /* aincr */
+    16,                             /* dradix */
+    8,                              /* dwidth */
+    NULL,                           /* examine */
+    NULL,                           /* deposit */
+    &BOOTROM_reset,                 /* reset */
+    NULL,                           /* boot */
+    &BOOTROM_attach,                /* attach */
+    NULL,                           /* detach */
+    NULL,                           /* ctxt */
+    DEV_DEBUG,                      /* flags */
+    0,                              /* dctrl */
+    BOOTROM_debug,                  /* debflags */
+    NULL,                           /* msize */
+    NULL                            /* lname */
+};
+
+/* global variables */
+
+/* BOOTROM_attach - attach file to EPROM unit */
+
+t_stat BOOTROM_attach (UNIT *uptr, char *cptr)
+{
+    t_stat r;
+
+    if (BOOTROM_dev.dctrl & DEBUG_flow)
+        printf("BOOTROM_attach: cptr=%s\n", cptr);
+    if ((r = attach_unit (uptr, cptr)) != SCPE_OK) {
+        if (BOOTROM_dev.dctrl & DEBUG_flow)
+            printf("BOOTROM_attach: Error\n");
+        return r;
+    }
+    if (BOOTROM_dev.dctrl & DEBUG_flow)
+        printf("BOOTROM_attach: Done\n");
+    return (BOOTROM_reset (NULL));
+}
+
+/* BOOTROM_config = None, 2704, 2708, 2716, 2732 or 2764 */
+
+t_stat BOOTROM_config (UNIT *uptr, int32 val, char *cptr, void *desc)
+{
+    if (BOOTROM_dev.dctrl & DEBUG_flow) /* entry message */
+        printf("BOOTROM_config: val=%d\n", val);
+    if ((val < UNIT_NONE) || (val > UNIT_2764)) { /* valid param? */
+        if (BOOTROM_dev.dctrl & DEBUG_flow) /* No */
+            printf("BOOTROM_config: Parameter error\n");
+        return SCPE_ARG;
+    }
+    if (val == UNIT_NONE)
+        BOOTROM_unit.capac = 0;         /* set EPROM size */
+    else
+        BOOTROM_unit.capac = 0x200 << ((val >> UNIT_V_MSIZE) - 1); /* set EPROM size */
+    if (BOOTROM_unit.filebuf) {         /* free buffer */
+        free (BOOTROM_unit.filebuf);
+        BOOTROM_unit.filebuf = NULL;
+    }
+    if (BOOTROM_dev.dctrl & DEBUG_flow) /* status message */
+        printf("BOOTROM_config: BOOTROM_unit.capac=%d\n",
+            BOOTROM_unit.capac);
+    if (BOOTROM_dev.dctrl & DEBUG_flow) /* exit message */
+        printf("BOOTROM_config: Done\n");
+    return SCPE_OK;
+}
+
+/* EPROM reset */
+
+t_stat BOOTROM_reset (DEVICE *dptr)
+{
+    t_addr j;
+    int c;
+    FILE *fp;
+
+    if (BOOTROM_dev.dctrl & DEBUG_flow)
+        printf("BOOTROM_reset: \n");
+    if ((BOOTROM_unit.flags & UNIT_MSIZE) == 0) { /* if none selected */
+//        printf("   EPROM: Defaulted to None\n");
+//        printf("      \"set eprom NONE | 2704 | 2708 | 2716 | 2732 | 2764\"\n");
+//        printf("      \"att eprom <filename>\"\n");
+        BOOTROM_unit.capac = 0;         /* set EPROM size to 0 */
+        if (BOOTROM_dev.dctrl & DEBUG_flow)
+            printf("BOOTROM_reset: Done1\n");
+        return SCPE_OK;
+        }                               /* if attached */
+//    printf("   EPROM: Initializing [%04X-%04XH]\n", 
+//        0xE000, 0xE000 + BOOTROM_unit.capac - 1);
+    if (BOOTROM_unit.filebuf == NULL) { /* no buffer allocated */
+        BOOTROM_unit.filebuf = malloc(BOOTROM_unit.capac); /* allocate EPROM buffer */
+        if (BOOTROM_unit.filebuf == NULL) {
+            if (BOOTROM_dev.dctrl & DEBUG_flow)
+                printf("BOOTROM_reset: Malloc error\n");
+            return SCPE_MEM;
+        }
+    }
+    fp = fopen(BOOTROM_unit.filename, "rb"); /* open EPROM file */
+    if (fp == NULL) {
+        printf("\tUnable to open ROM file %s\n",BOOTROM_unit.filename);
+        printf("\tNo ROM image loaded!!!\n");
+        return SCPE_OK;
+    }
+    j = 0;                              /* load EPROM file */
+    c = fgetc(fp);
+    while (c != EOF) {
+        *((uint8 *)(BOOTROM_unit.filebuf) + j++) = c & 0xFF;
+        c = fgetc(fp);
+        if (j > BOOTROM_unit.capac) {
+            printf("\tImage is too large - Load truncated!!!\n");
+            break;
+        }
+    }
+    fclose(fp);
+//    printf("\t%d bytes of ROM image %s loaded\n", j, BOOTROM_unit.filename);
+    if (BOOTROM_dev.dctrl & DEBUG_flow)
+        printf("BOOTROM_reset: Done2\n");
+    return SCPE_OK;
+}
+
+/*  get a byte from memory - byte offset of image */
+
+int32 BOOTROM_get_mbyte(int32 offset)
+{
+    int32 val;
+
+    if (BOOTROM_unit.filebuf == NULL) {
+        if (BOOTROM_dev.dctrl & DEBUG_read)
+            printf("BOOTROM_get_mbyte: EPROM not configured\n");
+        return 0xFF;
+    }
+    if (BOOTROM_dev.dctrl & DEBUG_read)
+        printf("BOOTROM_get_mbyte: offset=%04X\n", offset);
+    val = *((uint8 *)(BOOTROM_unit.filebuf) + offset) & 0xFF;
+    if (BOOTROM_dev.dctrl & DEBUG_read)
+        printf("BOOTROM_get_mbyte: Normal val=%02X\n", val);
+    return val;
+}
+
+/* end of bootrom.c */
diff --git a/swtp6800/common/dc-4.c b/swtp6800/common/dc-4.c
new file mode 100644
index 00000000..80cfd54d
--- /dev/null
+++ b/swtp6800/common/dc-4.c
@@ -0,0 +1,570 @@
+/*  dc4.c: SWTP DC-4 FDC Simulator
+
+    Copyright (c) 2005-2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    The DC-4 is a 5-inch floppy controller which can control up
+    to 4 daisy-chained 5-inch floppy drives.  The controller is based on
+    the Western Digital 1797 Floppy Disk Controller (FDC) chip. This
+    file only emulates the minimum DC-4 functionality to interface with
+    the virtual disk file.
+
+    The floppy controller is interfaced to the CPU by use of 5 memory 
+    addreses.  These are SS-30 slot numbers 5 and 6 (0x8014-0x801B).
+
+    Address 	Mode	Function
+    -------		----	--------
+
+    0x8014		Read	Returns FDC interrupt status
+    0x8014		Write	Selects the drive/head/motor control
+    0x8018		Read	Returns status of FDC
+    0x8018		Write	FDC command register
+    0x8019		Read	Returns FDC track register
+    0x8019		Write	Set FDC track register
+    0x801A		Read	Returns FDC sector register
+    0x801A		Write	Set FDC sector register
+    0x801B		Read	Read data
+    0x801B		Write	Write data
+
+    Drive Select Read (0x8014):
+
+    +---+---+---+---+---+---+---+---+
+    | I | D | X | X | X | X | X | X |
+    +---+---+---+---+---+---+---+---+
+
+    I = Set indicates an interrupt request from the FDC pending.
+    D = DRQ pending - same as bit 1 of FDC status register.
+
+    Drive Select Write (0x8014):
+
+    +---+---+---+---+---+---+---+---+
+    | M | S | X | X | X | X | Device|
+    +---+---+---+---+---+---+---+---+
+
+    M = If this bit is 1, the one-shot is triggered/retriggered to 
+        start/keep the motors on.
+    S = Side select. If set, side one is selected otherwise side zero
+        is selected.
+    X = not used
+    Device = value 0 thru 3, selects drive 0-3 to be controlled.
+
+    Drive Status Read (0x8018):
+
+    +---+---+---+---+---+---+---+---+
+    | R | P | H | S | C | L | D | B |
+    +---+---+---+---+---+---+---+---+
+
+    B - When 1, the controller is busy.
+    D - When 1, index mark detected (type I) or data request - read data 
+        ready/write data empty (type II or III).
+    H - When 1, track 0 (type I) or lost data (type II or III).
+    C - When 1, crc error detected.
+    S - When 1, seek (type I) or RNF (type II or III) error.
+    H - When 1, head is currently loaded (type I) or record type/
+        write fault (type II or III).
+    P - When 1, indicates that diskette is write-protected.
+    R - When 1, drive is not ready.
+
+    Drive Control Write (0x8018) for type I commands:
+
+    +---+---+---+---+---+---+---+---+
+    | 0 | S2| S1| S0| H | V | R1| R0|
+    +---+---+---+---+---+---+---+---+
+
+    R0/R1 - Selects the step rate.
+    V - When 1, verify on destination track.
+    H - When 1, loads head to drive surface.
+    S0/S1/S2 = 000 - home.
+       001 - seek track in data register.
+       010 - step without updating track register.
+       011 - step and update track register.
+       100 - step in without updating track register.
+       101 - step in and update track register.
+       110 - step out without updating track register.
+       111 - step out and update track register.
+
+    Drive Control Write (0x8018) for type II commands:
+
+    +---+---+---+---+---+---+---+---+
+    | 1 | 0 | T | M | S | E | B | A |
+    +---+---+---+---+---+---+---+---+
+
+    A - Zero for read, 1 on write deleted data mark else data mark.
+    B - When 1, shifts sector length field definitions one place.
+    E - When, delay operation 15 ms, 0 no delay.
+    S - When 1, select side 1, 0 select side 0.
+    M - When 1, multiple records, 0 for single record.
+    T - When 1, write command, 0 for read.
+
+    Drive Control Write (0x8018) for type III commands:
+
+    +---+---+---+---+---+---+---+---+
+    | 1 | 1 | T0| T1| 0 | E | 0 | 0 |
+    +---+---+---+---+---+---+---+---+
+
+    E - When, delay operation 15 ms, 0 no delay.
+    T0/T1 - 00 - read address command.
+            10 - read track command.
+            11 - write track command.
+
+    Tracks are numbered from 0 up to one minus the last track in the 1797!
+
+    Track Register Read (0x8019):
+
+    +---+---+---+---+---+---+---+---+
+    |          Track Number         |
+    +---+---+---+---+---+---+---+---+
+
+    Reads the current 8-bit value from the track position.
+
+    Track Register Write (0x8019):
+
+    +---+---+---+---+---+---+---+---+
+    |          Track Number         |
+    +---+---+---+---+---+---+---+---+
+
+    Writes the 8-bit value to the track register.
+
+    Sectors are numbers from 1 up to the last sector in the 1797!
+
+    Sector Register Read (0x801A):
+
+    +---+---+---+---+---+---+---+---+
+    |         Sector Number         |
+    +---+---+---+---+---+---+---+---+
+
+    Reads the current 8-bit value from the sector position.
+
+    Sector Register Write (0x801A):
+
+    +---+---+---+---+---+---+---+---+
+    |         Sector Number         |
+    +---+---+---+---+---+---+---+---+
+
+    Writes the 8-bit value to the sector register.
+
+    Data Register Read (0x801B):
+
+    +---+---+---+---+---+---+---+---+
+    |             Data              |
+    +---+---+---+---+---+---+---+---+
+
+    Reads the current 8-bit value from the data register.
+
+    Data Register Write (0x801B):
+
+    +---+---+---+---+---+---+---+---+
+    |             Data              |
+    +---+---+---+---+---+---+---+---+
+
+    Writes the 8-bit value to the data register.
+
+    A FLEX disk is defined as follows:
+
+    Track	Sector	Use
+    0		1	Boot sector
+    0		2	Boot sector (cont)
+    0		3	Unused
+    0		4	System Identity Record (explained below)
+    0		5	Unused
+    0		6-last	Directory - 10 entries/sector (explained below)
+    1		1	First available data sector
+    last-1	last	Last available data sector
+
+    System Identity Record
+
+    Byte	Use
+    0x00        Two bytes of zeroes (Clears forward link)
+    0x10	Volume name in ASCII(11 bytes)
+    0x1B	Volume number in binary (2 bytes)
+    0x1D	Address of first free data sector (Track-Sector) (2 bytes)
+    0x1F	Address of last free data sector (Track-Sector) (2 bytes)
+    0x21	Total number of data sectors in binary (2 bytes)
+    0x23	Current date (Month-Day-Year) in binary
+    0x26	Highest track number on disk in binary (byte)
+    0x27	Highest sector number on a track in binary (byte)
+
+    The following unit registers are used by this controller emulation:
+
+    dsk_unit[cur_drv].u3        unit current flags
+    dsk_unit[cur_drv].u4        unit current track
+    dsk_unit[cur_drv].u5        unit current sector
+    dsk_unit[cur_drv].pos       unit current sector byte index into buffer
+    dsk_unit[cur_drv].filebuf   unit current sector buffer
+    dsk_unit[cur_drv].fileref   unit current attached file reference
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define DEBUG   0
+
+#define UNIT_V_ENABLE   (UNIT_V_UF + 0) /* Write Enable */
+#define UNIT_ENABLE     (1 << UNIT_V_ENABLE)
+
+/* emulate a SS FLEX disk with 72 sectors and 80 tracks */
+
+#define	NUM_DISK        4               /* standard 1797 maximum */
+#define SECT_SIZE       256             /* standard FLEX sector */
+#define NUM_SECT        72              /* sectors/track */
+#define TRAK_SIZE       (SECT_SIZE * NUM_SECT) /* trk size (bytes) */
+#define HEADS           1               /* handle as SS with twice the sectors */
+#define NUM_CYL         80              /* maximum tracks */
+#define DSK_SIZE        (NUM_SECT * HEADS * NUM_CYL * SECT_SIZE) /* dsk size (bytes) */
+
+#define SECSIZ          256             /* standard FLEX sector */
+
+/* SIR offsets */
+#define MAXCYL          0x26            /* last cylinder # */
+#define MAXSEC          0x27            /* last sector # */
+
+/* 1797 status bits */
+
+#define	BUSY            0x01
+#define	DRQ             0x02
+#define	WRPROT          0x40
+#define	NOTRDY          0x80
+
+/* function prototypes */
+
+t_stat dsk_reset (DEVICE *dptr);
+
+/* SS-50 I/O address space functions */
+
+int32 fdcdrv(int32 io, int32 data);
+int32 fdccmd(int32 io, int32 data);
+int32 fdctrk(int32 io, int32 data);
+int32 fdcsec(int32 io, int32 data);
+int32 fdcdata(int32 io, int32 data);
+
+/* Local Variables */
+
+int32 fdcbyte;
+int32 intrq = 0;                        /* interrupt request flag */
+int32 cur_dsk;                          /* Currently selected drive */
+int32 wrt_flag = 0;                     /* FDC write flag */
+
+int32   spt;                            /* sectors/track */
+int32   trksiz;                         /* trk size (bytes) */
+int32   heds;                           /* number of heads */
+int32   cpd;                            /* cylinders/disk */
+int32   dsksiz;                         /* dsk size (bytes) */
+
+/* Floppy Disk Controller data structures
+
+       dsk_dev        Mother Board device descriptor
+       dsk_unit       Mother Board unit descriptor
+       dsk_reg        Mother Board register list
+       dsk_mod        Mother Board modifiers list
+*/
+
+UNIT dsk_unit[] = {
+        { UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0)  },
+        { UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0)  },
+        { UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0)  },
+        { UDATA (NULL, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, 0)  }
+};
+
+REG dsk_reg[] = {
+        { HRDATA (DISK, cur_dsk, 4) },
+        { NULL }
+};
+
+MTAB dsk_mod[] = {
+        { UNIT_ENABLE, UNIT_ENABLE, "RW", "RW", NULL },
+        { UNIT_ENABLE, 0, "RO", "RO", NULL },
+        { 0 }
+};
+
+DEBTAB dsk_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE dsk_dev = {
+    "DC-4",                             //name
+    dsk_unit,                           //units
+    dsk_reg,                            //registers
+    dsk_mod,                            //modifiers
+    4,                                  //numunits
+    16,                                 //aradix
+    16,                                 //awidth
+    1,                                  //aincr
+    16,                                 //dradix
+    8,                                  //dwidth
+    NULL,                               //examine
+    NULL,                               //deposit
+    &dsk_reset,                         //reset
+    NULL,                               //boot
+    NULL,                               //attach
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags
+    0,                                  //dctrl
+    dsk_debug,                          /* debflags */
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+/* Reset routine */
+
+t_stat dsk_reset (DEVICE *dptr)
+{
+    int i;
+
+    cur_dsk = 5;                        /* force initial SIR read */
+    for (i=0; i<NUM_DISK; i++) {
+        dsk_unit[i].u3 = 0;             /* clear current flags */
+        dsk_unit[i].u4 = 0;             /* clear current cylinder # */
+        dsk_unit[i].u5 = 0;             /* clear current sector # */
+        dsk_unit[i].pos = 0;            /* clear current byte ptr */
+        if (dsk_unit[i].filebuf == NULL) {
+            dsk_unit[i].filebuf = malloc(256); /* allocate buffer */
+            if (dsk_unit[i].filebuf == NULL) {
+                printf("dc-4_reset: Malloc error\n");
+                return SCPE_MEM;
+            }
+        }
+    }
+    spt = 0;
+    trksiz = 0;
+    heds = 0;
+    cpd = 0;
+    dsksiz = 0;
+    return SCPE_OK;
+}
+
+/*  I/O instruction handlers, called from the MP-B2 module when a
+   read or write occur to addresses 0x8004-0x8007. */
+
+/* DC-4 drive select register routine - this register is not part of the 1797
+*/
+
+int32 fdcdrv(int32 io, int32 data)
+{
+    static long pos;
+
+    if (io) {                           /* write to DC-4 drive register */
+        if (dsk_dev.dctrl & DEBUG_write)
+            printf("\nfdcdrv: Drive selected %d cur_dsk=%d", data & 0x03, cur_dsk);
+        if (cur_dsk == (data & 0x03)) 
+            return 0;                   /* already selected */
+        cur_dsk = data & 0x03;          /* only 2 drive select bits */
+        if (dsk_dev.dctrl & DEBUG_write)
+            printf("\nfdcdrv: Drive set to %d", cur_dsk);
+        if ((dsk_unit[cur_dsk].flags & UNIT_ENABLE) == 0) {
+            dsk_unit[cur_dsk].u3 |= WRPROT; /* set 1797 WPROT */
+            if (dsk_dev.dctrl & DEBUG_write)
+                printf("\nfdcdrv: Drive write protected");
+        } else {
+            dsk_unit[cur_dsk].u3 &= ~WRPROT; /* set 1797 not WPROT */
+            if (dsk_dev.dctrl & DEBUG_write)
+                printf("\nfdcdrv: Drive NOT write protected");
+        }
+        pos = 0x200;                    /* Read in SIR */
+        if (dsk_dev.dctrl & DEBUG_read)
+            printf("\nfdcdrv: Read pos = %ld ($%04X)", pos, (unsigned int) pos);
+        sim_fseek(dsk_unit[cur_dsk].fileref, pos, 0); /* seek to offset */
+        sim_fread(dsk_unit[cur_dsk].filebuf, SECSIZ, 1, dsk_unit[cur_dsk].fileref); /* read in buffer */
+        dsk_unit[cur_dsk].u3 |= BUSY | DRQ; /* set DRQ & BUSY */
+        dsk_unit[cur_dsk].pos = 0;      /* clear counter */
+        spt = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + MAXSEC) & 0xFF;
+        heds = 0;
+        cpd = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + MAXCYL) & 0xFF;
+        trksiz = spt * SECSIZ;
+        dsksiz = trksiz * cpd;
+        if (dsk_dev.dctrl & DEBUG_read)
+            printf("\nfdcdrv: spt=%d heds=%d cpd=%d trksiz=%d dsksiz=%d flags=%08X u3=%08X",
+                spt, heds, cpd, trksiz, dsksiz, dsk_unit[cur_dsk].flags, dsk_unit[cur_dsk].u3);
+        return 0;
+    } else {                            /* read from DC-4 drive register */
+        if (dsk_dev.dctrl & DEBUG_read)
+            printf("\nfdcdrv: Drive read as %02X", intrq);
+        return intrq;
+    }
+}
+
+/* WD 1797 FDC command register routine */
+
+int32 fdccmd(int32 io, int32 data)
+{
+    static int32 val = 0, val1 = NOTRDY;
+    static long pos;
+ 
+    if ((dsk_unit[cur_dsk].flags & UNIT_ATT) == 0) { /* not attached */
+        dsk_unit[cur_dsk].u3 |= NOTRDY; /* set not ready flag */
+        if (dsk_dev.dctrl & DEBUG_flow)
+            printf("\nfdccmd: Drive %d is not attached", cur_dsk);
+        return 0;
+    } else {
+        dsk_unit[cur_dsk].u3 &= ~NOTRDY; /* clear not ready flag */
+    }
+    if (io) {                           /* write command to fdc */
+        switch(data) {
+            case 0x8C:                  /* read command */
+            case 0x9C:
+                if (dsk_dev.dctrl & DEBUG_read)
+                    printf("\nfdccmd: Read of disk %d, track %d, sector %d", 
+                        cur_dsk, dsk_unit[cur_dsk].u4, dsk_unit[cur_dsk].u5);
+                pos = trksiz * dsk_unit[cur_dsk].u4; /* calculate file offset */
+                pos += SECSIZ * (dsk_unit[cur_dsk].u5 - 1);
+                if (dsk_dev.dctrl & DEBUG_read)
+                    printf("\nfdccmd: Read pos = %ld ($%08X)", pos, (unsigned int) pos);
+                sim_fseek(dsk_unit[cur_dsk].fileref, pos, 0); /* seek to offset */
+                sim_fread(dsk_unit[cur_dsk].filebuf, SECSIZ, 1, dsk_unit[cur_dsk].fileref); /* read in buffer */
+                dsk_unit[cur_dsk].u3 |= BUSY | DRQ; /* set DRQ & BUSY */
+                dsk_unit[cur_dsk].pos = 0; /* clear counter */
+                break;
+            case 0xAC:                  /* write command */
+                if (dsk_dev.dctrl & DEBUG_write)
+                    printf("\nfdccmd: Write of disk %d, track %d, sector %d",
+                        cur_dsk, dsk_unit[cur_dsk].u4, dsk_unit[cur_dsk].u5);
+                if (dsk_unit[cur_dsk].u3 & WRPROT) {	
+                    printf("\nfdccmd: Drive %d is write-protected", cur_dsk);
+                } else {
+                    pos = trksiz * dsk_unit[cur_dsk].u4; /* calculate file offset */
+                    pos += SECSIZ * (dsk_unit[cur_dsk].u5 - 1);
+                    if (dsk_dev.dctrl & DEBUG_write)
+                        printf("\nfdccmd: Write pos = %ld ($%08X)", pos, (unsigned int) pos);
+                    sim_fseek(dsk_unit[cur_dsk].fileref, pos, 0); /* seek to offset */
+                    wrt_flag = 1;           /* set write flag */
+                    dsk_unit[cur_dsk].u3 |= BUSY | DRQ;/* set DRQ & BUSY */
+                    dsk_unit[cur_dsk].pos = 0; /* clear counter */
+                }
+                break;
+            case 0x18:                  /* seek command */
+            case 0x1B:
+                dsk_unit[cur_dsk].u4 = fdcbyte; /* set track */
+                dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
+                if (dsk_dev.dctrl & DEBUG_flow)
+                    printf("\nfdccmd: Seek of disk %d, track %d", cur_dsk, fdcbyte);
+                break;
+            case 0x0B:                  /* restore command */
+                dsk_unit[cur_dsk].u4 = 0;   /* home the drive */
+                dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
+                if (dsk_dev.dctrl & DEBUG_flow)
+                    printf("\nfdccmd: Drive %d homed", cur_dsk);
+                break;
+            case 0xF0:                  /* write track command */
+                if (dsk_dev.dctrl & DEBUG_write)
+                    printf("\nfdccmd: Write track command for drive %d", cur_dsk);
+                break;
+            default:
+                printf("Unknown FDC command %02XH\n\r", data);
+        }
+    } else {                            /* read status from fdc */
+        val = dsk_unit[cur_dsk].u3;     /* set return value */
+        /* either print below will force the val to 0x43 forever.  timing problem in
+        the 6800 disk driver software? */
+//        if (dsk_dev.dctrl & DEBUG_flow)
+//            printf("\nfdccmd: Exit Drive %d status=%02X", cur_dsk, val);
+//            printf("\n%02X", val); //even this short fails it!
+        if (val1 == 0 && ((val & (BUSY + DRQ)) == (BUSY + DRQ)))   /* delay BUSY going high */
+            val &= ~BUSY;
+        if (val != val1)                /* now allow BUSY after one read */
+            val1 = val;
+        if (dsk_dev.dctrl & DEBUG_flow)
+            printf("\nfdccmd: Exit Drive %d status=%02X", cur_dsk, val);
+    }
+    return val;
+}
+
+/* WD 1797 FDC track register routine */
+
+int32 fdctrk(int32 io, int32 data)
+{
+    if (io) {
+        dsk_unit[cur_dsk].u4 = data & 0xFF;
+        if (dsk_dev.dctrl & DEBUG_read)
+            printf("\nfdctrk: Drive %d track set to %d", cur_dsk, dsk_unit[cur_dsk].u4);
+    } else
+        ;
+    if (dsk_dev.dctrl & DEBUG_write)
+        printf("\nfdctrk: Drive %d track read as %d", cur_dsk, dsk_unit[cur_dsk].u4);
+    return dsk_unit[cur_dsk].u4;
+}
+
+/* WD 1797 FDC sector register routine */
+
+int32 fdcsec(int32 io, int32 data)
+{
+    if (io) {
+        dsk_unit[cur_dsk].u5 = data & 0xFF;
+        if (dsk_unit[cur_dsk].u5 == 0)  /* fix for swtp boot! */
+            dsk_unit[cur_dsk].u5 = 1;
+        if (dsk_dev.dctrl & DEBUG_write)
+            printf("\nfdcsec: Drive %d sector set to %d", cur_dsk, dsk_unit[cur_dsk].u5);
+    } else
+            ;
+    if (dsk_dev.dctrl & DEBUG_read)
+        printf("\nfdcsec: Drive %d sector read as %d", cur_dsk, dsk_unit[cur_dsk].u5);
+    return dsk_unit[cur_dsk].u5;
+}
+
+/* WD 1797 FDC data register routine */
+
+int32 fdcdata(int32 io, int32 data)
+{
+    int32 val;
+
+    if (io) {                           /* write byte to fdc */
+        fdcbyte = data;                 /* save for seek */
+        if (dsk_unit[cur_dsk].pos < SECSIZ) { /* copy bytes to buffer */
+            if (dsk_dev.dctrl & DEBUG_write)
+                printf("\nfdcdata: Writing byte %d of %02X", dsk_unit[cur_dsk].pos, data);
+            *((uint8 *)(dsk_unit[cur_dsk].filebuf) + dsk_unit[cur_dsk].pos) = data; /* byte into buffer */
+            dsk_unit[cur_dsk].pos++;    /* step counter */
+            if (dsk_unit[cur_dsk].pos == SECSIZ) {
+                dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ);
+                if (wrt_flag) {         /* if initiated by FDC write command */
+                    sim_fwrite(dsk_unit[cur_dsk].filebuf, SECSIZ, 1, dsk_unit[cur_dsk].fileref); /* write it */
+                    wrt_flag = 0;       /* clear write flag */
+                }
+                if (dsk_dev.dctrl & DEBUG_write)
+                    printf("\nfdcdata: Sector write complete");
+            }
+        }
+        return 0;
+    } else {                            /* read byte from fdc */
+    if (dsk_unit[cur_dsk].pos < SECSIZ) { /* copy bytes from buffer */
+        if (dsk_dev.dctrl & DEBUG_read)
+            printf("\nfdcdata: Reading byte %d u3=%02X", dsk_unit[cur_dsk].pos, dsk_unit[cur_dsk].u3);
+        val = *((uint8 *)(dsk_unit[cur_dsk].filebuf) + dsk_unit[cur_dsk].pos) & 0xFF;
+        dsk_unit[cur_dsk].pos++;        /* step counter */
+        if (dsk_unit[cur_dsk].pos == SECSIZ) { /* done? */
+            dsk_unit[cur_dsk].u3 &= ~(BUSY | DRQ); /* clear flags */
+            if (dsk_dev.dctrl & DEBUG_write)
+                printf("\nfdcdata: Sector read complete");
+        }
+        return val;
+    } else
+        return 0;
+    }
+}
+
+/* end of dc-4.c */
diff --git a/swtp6800/common/i2716.c b/swtp6800/common/i2716.c
new file mode 100644
index 00000000..fe827008
--- /dev/null
+++ b/swtp6800/common/i2716.c
@@ -0,0 +1,221 @@
+/*  i2716.c: Intel 2716 EPROM simulator for 8-bit processors
+
+    Copyright (c) 2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not be
+    used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    These functions support a simulated 2704 to 2764 EPROMs device on an 8-bit 
+    computer system.  This device allows the attachment of the device to a binary file
+    containing the EPROM code.
+
+    These functions support emulation of 0 to 4 2716 EPROM  devices on a CPU board.
+    The byte get and put routines use an offset into the boot EPROM image to locate 
+    the proper byte.  This allows another device to set the base address for each 
+    EPROM.  
+
+    This device uses a dynamically allocated buffer to hold each EPROM image.  
+    A call to BOOTROM_config will free the current buffer.  A call to 
+    i2716_reset will allocate a new buffer of 2048 bytes.  A
+    call to BOOTROM_attach will load the buffer with the EPROM image.
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define I2716_NUM       4               /* number of 2716 EPROMS */
+
+extern  int32 get_base(void);
+
+/* function prototypes */
+
+t_stat i2716_attach (UNIT *uptr, char *cptr);
+t_stat i2716_reset (DEVICE *dptr);
+int32 i2716_get_mbyte(int32 offset);
+
+/* SIMH EPROM Standard I/O Data Structures */
+
+UNIT i2716_unit[] = { 
+    { UDATA (NULL,UNIT_ATTABLE+UNIT_ROABLE+UNIT_RO, 0), 0 },
+    { UDATA (NULL,UNIT_ATTABLE+UNIT_ROABLE+UNIT_RO, 0), 0 },
+    { UDATA (NULL,UNIT_ATTABLE+UNIT_ROABLE+UNIT_RO, 0), 0 },
+    { UDATA (NULL,UNIT_ATTABLE+UNIT_ROABLE+UNIT_RO, 0), 0 }
+};
+
+MTAB i2716_mod[] = {
+    { 0 }
+};
+
+DEBTAB i2716_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE i2716_dev = {
+    "I2716",                        /* name */
+    i2716_unit,                     /* units */
+    NULL,                           /* registers */
+    i2716_mod,                      /* modifiers */
+    I2716_NUM,                      /* numunits */
+    16,                             /* aradix */
+    32,                             /* awidth */
+    1,                              /* aincr */
+    16,                             /* dradix */
+    8,                              /* dwidth */
+    NULL,                           /* examine */
+    NULL,                           /* deposit */
+    &i2716_reset,                   /* reset */
+    NULL,                           /* boot */
+    &i2716_attach,                  /* attach */
+    NULL,                           /* detach */
+    NULL,                           /* ctxt */
+    DEV_DEBUG,                      /* flags */
+    0,                              /* dctrl */
+    i2716_debug,                    /* debflags */
+    NULL,                           /* msize */
+    NULL                            /* lname */
+};
+
+/* global variables */
+
+/* i2716_attach - attach file to EPROM unit 
+                  force EPROM reset at completion */
+
+t_stat i2716_attach (UNIT *uptr, char *cptr)
+{
+    int32 j, c;
+    t_stat r;
+    FILE *fp;
+
+    if (i2716_dev.dctrl & DEBUG_flow)
+        printf("i2716_attach: cptr=%s\n", cptr);
+    if ((r = attach_unit (uptr, cptr)) != SCPE_OK) {
+        if (i2716_dev.dctrl & DEBUG_flow)
+            printf("i2716_attach: Error\n");
+        return r;
+    }
+    if (i2716_dev.dctrl & DEBUG_read)
+        printf("\tOpen file\n");
+    fp = fopen(uptr->filename, "rb");   /* open EPROM file */
+    if (fp == NULL) {
+        printf("i2716%d: Unable to open ROM file %s\n", (int)(uptr - i2716_dev.units), uptr->filename);
+        printf("\tNo ROM image loaded!!!\n");
+        return SCPE_OK;
+    }
+    if (i2716_dev.dctrl & DEBUG_read)
+        printf("\tRead file\n");
+    j = 0;                              /* load EPROM file */
+    c = fgetc(fp);
+    while (c != EOF) {
+        *((uint8 *)(uptr->filebuf) + j++) = c & 0xFF;
+        c = fgetc(fp);
+        if (j > 2048) {
+            printf("\tImage is too large - Load truncated!!!\n");
+            break;
+        }
+    }
+    if (i2716_dev.dctrl & DEBUG_read)
+        printf("\tClose file\n");
+    fclose(fp);
+//    printf("i2716%d: %d bytes of ROM image %s loaded\n",uptr - i2716_dev.units, j, uptr->filename);
+    if (i2716_dev.dctrl & DEBUG_flow)
+        printf("i2716_attach: Done\n");
+    return SCPE_OK;
+}
+
+/* EPROM reset */
+
+t_stat i2716_reset (DEVICE *dptr)
+{
+    int32 i, base;
+    UNIT *uptr;
+
+    if (i2716_dev.dctrl & DEBUG_flow)
+        printf("i2716_reset: \n");
+    for (i = 0; i < I2716_NUM; i++) {   /* init all units */
+        uptr = i2716_dev.units + i;
+        if (i2716_dev.dctrl & DEBUG_flow)
+            printf("i2716 %d unit.flags=%08X\n", i, uptr->flags);
+        uptr->capac = 2048;
+        uptr->u3 = 2048 * i;
+        base = get_base();
+        if (uptr->filebuf == NULL) {    /* no buffer allocated */
+            uptr->filebuf = malloc(2048); /* allocate EPROM buffer */
+            if (uptr->filebuf == NULL) {
+                if (i2716_dev.dctrl & DEBUG_flow)
+                    printf("i2716_reset: Malloc error\n");
+                return SCPE_MEM;
+            }
+        }
+        if (base == 0) {
+//            printf("i2716%d: Not enabled on MP-A2\n", i);
+            continue;
+        }
+//        printf("i2716%d: Initializing [%04X-%04XH]\n", 
+//            i, base+uptr->u3, base+uptr->u3 + uptr->capac);
+//        if ((uptr->flags & UNIT_ATT) == 0) {
+//            printf("i2716%d: No file attached\n", i);
+//        }
+    }
+    if (i2716_dev.dctrl & DEBUG_flow)
+        printf("i2716_reset: Done\n");
+    return SCPE_OK;
+}
+
+/*  I/O instruction handlers, called from the CPU module when an
+    EPROM memory read or write is issued.
+*/
+
+/*  get a byte from memory */
+
+int32 i2716_get_mbyte(int32 offset)
+{
+    int32 i, val, org, len;
+    UNIT *uptr;
+
+    for (i = 0; i < I2716_NUM; i++) {   /* find addressed unit */
+        uptr = i2716_dev.units + i;
+        org = uptr->u3;
+        len = uptr->capac - 1;
+        if ((offset >= org) && (offset < (org + len))) {
+            if (uptr->filebuf == NULL) {
+                if (i2716_dev.dctrl & DEBUG_read)
+                    printf("i2716_get_mbyte: EPROM not configured\n");
+                return 0xFF;
+            } else {
+                val = *((uint8 *)(uptr->filebuf) + (offset - org));
+                if (i2716_dev.dctrl & DEBUG_read)
+                    printf(" val=%04X\n", val);
+                return (val & 0xFF);
+            }
+        }
+    }
+    if (i2716_dev.dctrl & DEBUG_read)
+        printf("i2716_get_mbyte: Out of range\n");
+    return 0xFF;
+}
+
+/* end of i2716.c */
diff --git a/swtp6800/common/m6800.c b/swtp6800/common/m6800.c
new file mode 100644
index 00000000..c7f8bf02
--- /dev/null
+++ b/swtp6800/common/m6800.c
@@ -0,0 +1,2018 @@
+/* m6800.c: SWTP 6800 CPU simulator
+
+   Copyright (c) 2005-2011, William Beech
+
+   Permission is hereby granted, free of charge, to any person obtaining a
+   copy of this software and associated documentation files (the "Software"),
+   to deal in the Software without restriction, including without limitation
+   the rights to use, copy, modify, merge, publish, distribute, sublicense,
+   and/or sell copies of the Software, and to permit persons to whom the
+   Software is furnished to do so, subject to the following conditions:
+
+   The above copyright notice and this permission notice shall be included in
+   all copies or substantial portions of the Software.
+
+   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+   WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+   IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+   Except as contained in this notice, the name of William A. Beech shall not
+   be used in advertising or otherwise to promote the sale, use or other dealings
+   in this Software without prior written authorization from William A. Beech.
+
+   cpu                  Motorola M6800 CPU
+
+   The register state for the M6800 CPU is:
+
+   A<0:7>               Accumulator A
+   B<0:7>               Accumulator B
+   IX<0:15>             Index Register
+   CCR<0:7>             Condition Code Register
+       HF                   half-carry flag
+       IF                   interrupt flag
+       NF                   negative flag
+       ZF                   zero flag
+       VF                   overflow flag
+       CF                   carry flag
+   PC<0:15>             program counter
+   SP<0:15>             Stack Pointer
+
+   The M6800 is an 8-bit CPU, which uses 16-bit registers to address
+   up to 64KB of memory.
+
+   The 72 basic instructions come in 1, 2, and 3-byte flavors.
+
+   This routine is the instruction decode routine for the M6800.
+   It is called from the CPU board simulator to execute
+   instructions in simulated memory, starting at the simulated PC.
+   It runs until 'reason' is set non-zero.
+
+   General notes:
+
+   1. Reasons to stop.  The simulator can be stopped by:
+
+        WAI instruction
+        I/O error in I/O simulator
+        Invalid OP code (if ITRAP is set on CPU)
+        Invalid mamory address (if MTRAP is set on CPU)
+
+   2. Interrupts.
+      There are 4 types of interrupt, and in effect they do a 
+      hardware CALL instruction to one of 4 possible high memory addresses.
+
+   3. Non-existent memory.  
+        On the SWTP 6800, reads to non-existent memory
+        return 0FFH, and writes are ignored.
+*/
+
+#include <stdio.h>
+
+#include "swtp_defs.h"
+
+#define UNIT_V_OPSTOP   (UNIT_V_UF)     /* Stop on Invalid OP? */
+#define UNIT_OPSTOP     (1 << UNIT_V_OPSTOP)
+#define UNIT_V_MSTOP    (UNIT_V_UF+1)   /* Stop on Invalid memory? */
+#define UNIT_MSTOP      (1 << UNIT_V_MSTOP)
+
+/* Flag values to set proper positions in CCR */
+#define HF      0x20
+#define IF      0x10
+#define NF      0x08
+#define ZF      0x04
+#define VF      0x02
+#define CF      0x01
+
+/* Macros to handle the flags in the CCR */
+#define CCR_ALWAYS_ON       (0xC0)        /* for 6800 */
+#define CCR_MSK (HF|IF|NF|ZF|VF|CF)
+#define TOGGLE_FLAG(FLAG)   (CCR ^= FLAG)
+#define SET_FLAG(FLAG)      (CCR |= FLAG)
+#define CLR_FLAG(FLAG)      (CCR &= ~FLAG)
+#define GET_FLAG(FLAG)      (CCR & FLAG)
+#define COND_SET_FLAG(COND,FLAG) \
+    if (COND) SET_FLAG(FLAG); else CLR_FLAG(FLAG)
+#define COND_SET_FLAG_N(VAR) \
+    if (VAR & 0x80) SET_FLAG(NF); else CLR_FLAG(NF)
+#define COND_SET_FLAG_Z(VAR) \
+    if (VAR == 0) SET_FLAG(ZF); else CLR_FLAG(ZF)
+#define COND_SET_FLAG_H(VAR) \
+    if (VAR & 0x10) SET_FLAG(HF); else CLR_FLAG(HF)
+#define COND_SET_FLAG_C(VAR) \
+    if (VAR & 0x100) SET_FLAG(CF); else CLR_FLAG(CF)
+#define COND_SET_FLAG_V(COND) \
+    if (COND) SET_FLAG(VF); else CLR_FLAG(VF)
+
+/* local global variables */
+
+int32 A = 0;                            /* Accumulator A */
+int32 B = 0;                            /* Accumulator B */
+int32 IX = 0;                           /* Index register */
+int32 SP = 0;                           /* Stack pointer */
+int32 CCR = CCR_ALWAYS_ON | IF;         /* Condition Code Register */
+int32 saved_PC = 0;                     /* Program counter */
+int32 PC;                                /* global for the helper routines */
+int32 INTE = 0;                         /* Interrupt Enable */
+int32 int_req = 0;                      /* Interrupt request */
+
+int32 mem_fault = 0;                    /* memory fault flag */
+
+extern int32 sim_int_char;
+extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
+
+/* function prototypes */
+
+t_stat m6800_reset (DEVICE *dptr);
+void dump_regs(void);
+void dump_regs1(void);
+int32 fetch_byte(int32 flag);
+int32 fetch_word(void);
+uint8 pop_byte(void);
+uint16 pop_word(void);
+void push_byte(uint8 val);
+void push_word(uint16 val);
+void go_rel(int32 cond);
+int32 get_rel_addr(void);
+int32 get_dir_val(void);
+int32 get_dir_addr(void);
+int32 get_indir_val(void);
+int32 get_indir_addr(void);
+int32 get_ext_val(void);
+int32 get_ext_addr(void);
+int32 get_flag(int32 flag);
+void condevalVa(int32 op1, int32 op2);
+void condevalVs(int32 op1, int32 op2);
+
+/* external routines */
+
+extern void CPU_BD_put_mbyte(int32 addr, int32 val);
+extern void CPU_BD_put_mword(int32 addr, int32 val);
+extern int32 CPU_BD_get_mbyte(int32 addr);
+extern int32 CPU_BD_get_mword(int32 addr);
+extern int32 sim_switches;
+
+/* CPU data structures
+
+   m6800_dev        CPU device descriptor
+   m6800_unit       CPU unit descriptor
+   m6800_reg        CPU register list
+   m6800_mod        CPU modifiers list */
+
+UNIT m6800_unit = { UDATA (NULL, 0, 0) };
+
+REG m6800_reg[] = {
+    { HRDATA (PC, saved_PC, 16) },
+    { HRDATA (A, A, 8) },
+    { HRDATA (B, B, 8) },
+    { HRDATA (IX, IX, 16) },
+    { HRDATA (SP, SP, 16) },
+    { HRDATA (CCR, CCR, 8) },
+    { FLDATA (INTE, INTE, 16) },
+    { ORDATA (WRU, sim_int_char, 8) },
+    { NULL }  };
+
+MTAB m6800_mod[] = {
+    { UNIT_OPSTOP, UNIT_OPSTOP, "ITRAP", "ITRAP", NULL },
+    { UNIT_OPSTOP, 0, "NOITRAP", "NOITRAP", NULL },
+    { UNIT_MSTOP, UNIT_MSTOP, "MTRAP", "MTRAP", NULL },
+    { UNIT_MSTOP, 0, "NOMTRAP", "NOMTRAP", NULL },
+    { 0 }  };
+
+DEBTAB m6800_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { "REG", DEBUG_reg },
+    { "ASM", DEBUG_asm },
+    { NULL }
+};
+
+DEVICE m6800_dev = {
+    "CPU",                              //name
+    &m6800_unit,                        //units
+    m6800_reg,                          //registers
+    m6800_mod,                          //modifiers
+    1,                                  //numunits
+    16,                                 //aradix
+    16,                                 //awidth
+    1,                                  //aincr
+    16,                                 //dradix
+    8,                                  //dwidth
+    NULL,                               //examine
+    NULL,                               //deposit
+    &m6800_reset,                       //reset
+    NULL,                               //boot
+    NULL,                               //attach
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags
+    0,                                  //dctrl
+    m6800_debug,                        //debflags
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+static const char *opcode[] = {
+"???", "NOP", "???", "???",             //0x00
+"???", "???", "TAP", "TPA",
+"INX", "DEX", "CLV", "SEV",
+"CLC", "SEC", "CLI", "SEI",
+"SBA", "CBA", "???", "???",             //0x10
+"???", "???", "TAB", "TBA",
+"???", "DAA", "???", "ABA",
+"???", "???", "???", "???",
+"BRA", "???", "BHI", "BLS",             //0x20
+"BCC", "BCS", "BNE", "BEQ",
+"BVC", "BVS", "BPL", "BMI",
+"BGE", "BLT", "BGT", "BLE",
+"TSX", "INS", "PULA", "PULB",           //0x30
+"DES", "TXS", "PSHA", "PSHB",
+"???", "RTS", "???", "RTI",
+"???", "???", "WAI", "SWI",
+"NEGA", "???", "???", "COMA",           //0x40
+"LSRA", "???", "RORA", "ASRA",
+"ASLA", "ROLA", "DECA", "???",
+"INCA", "TSTA", "???", "CLRA",
+"NEGB", "???", "???", "COMB",           //0x50
+"LSRB", "???", "RORB", "ASRB",
+"ASLB", "ROLB", "DECB", "???",
+"INCB", "TSTB", "???", "CLRB",
+"NEG", "???", "???", "COM",             //0x60
+"LSR", "???", "ROR", "ASR",
+"ASL", "ROL", "DEC", "???",
+"INC", "TST", "JMP", "CLR",
+"NEG", "???", "???", "COM",             //0x70
+"LSR", "???", "ROR", "ASR",
+"ASL", "ROL", "DEC", "???",
+"INC", "TST", "JMP", "CLR",
+"SUBA", "CMPA", "SBCA", "???",          //0x80
+"ANDA", "BITA", "LDAA", "???",
+"EORA", "ADCA", "ORAA", "ADDA",
+"CPX", "BSR", "LDS", "???",
+"SUBA", "CMPA", "SBCA", "???",          //0x90
+"ANDA", "BITA", "LDAA", "STAA",
+"EORA", "ADCA", "ORAA", "ADDA",
+"CPX", "???", "LDS", "STS",
+"SUBA", "CMPA", "SBCA", "???",          //0xA0
+"ANDA", "BITA", "LDAA", "STAA",
+"EORA", "ADCA", "ORAA", "ADDA",
+"CPX X", "JSR X", "LDS X", "STS X",
+"SUBA", "CMPA", "SBCA", "???",          //0xB0
+"ANDA", "BITA", "LDAA", "STAA",
+"EORA", "ADCA", "ORAA", "ADDA",
+"CPX", "JSR", "LDS", "STS",
+"SUBB", "CMPB", "SBCB", "???",          //0xC0
+"ANDB", "BITB", "LDAB", "???",
+"EORB", "ADCB", "ORAB", "ADDB",
+"???", "???", "LDX", "???",
+"SUBB", "CMPB", "SBCB", "???",          //0xD0
+"ANDB", "BITB", "LDAB", "STAB",
+"EORB", "ADCB", "ORAB", "ADDB",
+"???", "???", "LDX", "STX",
+"SUBB", "CMPB", "SBCB", "???",          //0xE0
+"ANDB", "BITB", "LDAB", "STAB",
+"EORB", "ADCB", "ORAB", "ADDB",
+"???", "???", "LDX", "STX",
+"SUBB", "CMPB", "SBCB", "???",          //0xF0
+"ANDB", "BITB", "LDAB", "STAB",
+"EORB", "ADCB", "ORAB", "ADDB",
+"???", "???", "LDX", "STX",
+};
+
+int32 oplen[256] = {
+0,1,0,0,0,0,1,1,1,1,1,1,1,1,1,1,        //0x00
+1,1,0,0,0,0,1,1,0,1,0,1,0,0,0,0,
+2,0,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
+1,1,1,1,1,1,1,1,0,1,0,1,0,0,1,1,
+1,0,0,1,1,0,1,1,1,1,1,0,1,1,0,1,        //0x40
+1,0,0,1,1,0,1,1,1,1,1,0,1,1,0,1,
+2,0,0,2,2,0,2,2,2,2,2,0,2,2,2,2,
+3,0,0,3,3,0,3,3,3,3,3,0,3,3,3,3,
+2,2,2,0,2,2,2,0,2,2,2,2,3,2,3,0,        //0x80
+2,2,2,0,2,2,2,2,2,2,2,2,2,0,2,2,
+2,2,2,0,2,2,2,2,2,2,2,2,2,2,2,2,
+3,3,3,0,3,3,3,3,3,3,3,3,3,3,3,3,
+2,2,2,0,2,2,2,0,2,2,2,2,0,0,3,0,        //0xC0
+2,2,2,0,2,2,2,2,2,2,2,2,0,0,2,2,
+2,2,2,0,2,2,2,2,2,2,2,2,0,0,2,2,
+3,3,3,0,3,3,3,3,3,3,3,3,0,0,3,3
+};
+
+int32 sim_instr (void)
+{
+    extern int32 sim_interval;
+    int32 IR, OP, DAR, reason, hi, lo, op1;
+
+    PC = saved_PC & ADDRMASK;           /* load local PC */
+    reason = 0;
+
+    /* Main instruction fetch/decode loop */
+
+    while (reason == 0) {               /* loop until halted */
+//    dump_regs1();
+        if (sim_interval <= 0)          /* check clock queue */
+            if (reason = sim_process_event ()) 
+                break;
+            if (mem_fault) {            /* memory fault? */
+                mem_fault = 0;          /* reset fault flag */
+                reason = STOP_MEMORY;
+                break;
+            }
+        if (int_req > 0) {              /* interrupt? */
+        /* 6800 interrupts not implemented yet.  None were used,
+           on a standard SWTP 6800. All I/O is programmed. */
+        }                               /* end interrupt */
+        if (sim_brk_summ &&
+            sim_brk_test (PC, SWMASK ('E'))) { /* breakpoint? */
+            reason = STOP_IBKPT;        /* stop simulation */
+            break;
+        }
+        IR = OP = fetch_byte(0);        /* fetch instruction */
+        sim_interval--;
+
+        /* The Big Instruction Decode Switch */
+
+        switch (IR) {
+
+            case 0x01:                  /* NOP */
+                break;
+            case 0x06:                  /* TAP */
+                CCR = A;
+                break;
+            case 0x07:                  /* TPA */
+                A = CCR;
+                break;
+            case 0x08:                  /* INX */
+                IX = (IX + 1) & ADDRMASK;
+                COND_SET_FLAG_Z(IX);
+                break;
+            case 0x09:                  /* DEX */
+                IX = (IX - 1) & ADDRMASK;
+                COND_SET_FLAG_Z(IX);
+                break;
+            case 0x0A:                  /* CLV */
+                CLR_FLAG(VF);
+                break;
+            case 0x0B:                  /* SEV */
+                SET_FLAG(VF);
+                break;
+            case 0x0C:                  /* CLC */
+                CLR_FLAG(CF);
+                break;
+            case 0x0D:                  /* SEC */
+                SET_FLAG(CF);
+                break;
+            case 0x0E:                  /* CLI */
+                CLR_FLAG(IF);
+                break;
+            case 0x0F:                  /* SEI */
+                SET_FLAG(IF);
+                break;
+            case 0x10:                  /* SBA */
+                op1 = A;
+                A = A - B;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(B, op1);
+                A &= 0xFF;
+                break;
+            case 0x11:                  /* CBA */
+                lo = A - B;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(B, A);
+                break;
+            case 0x16:                  /* TAB */
+                B = A;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                CLR_FLAG(VF);
+                break;
+            case 0x17:                  /* TBA */
+                A = B;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                CLR_FLAG(VF);
+                break;
+            case 0x19:                  /* DAA */
+                DAR = A & 0x0F;
+                op1 = get_flag(CF);
+                if (DAR > 9 || get_flag(CF)) {
+                    DAR += 6;
+                    A &= 0xF0;
+                    A |= (DAR & 0x0F);
+                        COND_SET_FLAG(DAR & 0x10,CF);
+                }
+                DAR = (A >> 4) & 0x0F;
+                if (DAR > 9 || get_flag(CF)) {
+                    DAR += 6;
+                    if (get_flag(CF)) 
+                        DAR++;
+                    A &= 0x0F;
+                    A |= (DAR << 4);
+                }
+                COND_SET_FLAG(op1,CF);
+                if ((DAR << 4) & 0x100)
+                    SET_FLAG(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                A &= 0xFF;
+                break;
+            case 0x1B:                  /* ABA */
+                A += B;
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, B);
+                A &= 0xFF;
+                break;
+            case 0x20:                  /* BRA rel */
+                go_rel(1);
+                break;
+            case 0x22:                  /* BHI rel */
+                go_rel(!(get_flag(CF) | get_flag(ZF)));
+                break;
+            case 0x23:                  /* BLS rel */
+                go_rel(get_flag(CF) | get_flag(ZF));
+                break;
+            case 0x24:                  /* BCC rel */
+                go_rel(!get_flag(CF));
+                break;
+            case 0x25:                  /* BCS rel */
+                go_rel(get_flag(CF));
+                break;
+            case 0x26:                  /* BNE rel */
+                go_rel(!get_flag(ZF));
+                break;
+            case 0x27:                  /* BEQ rel */
+                go_rel(get_flag(ZF));
+                break;
+            case 0x28:                  /* BVC rel */
+                go_rel(!get_flag(VF));
+                break;
+            case 0x29:                  /* BVS rel */
+                go_rel(get_flag(VF));
+                break;
+            case 0x2A:                  /* BPL rel */
+                go_rel(!get_flag(NF));
+                break;
+            case 0x2B:                  /* BMI rel */
+                go_rel(get_flag(NF));
+                break;
+            case 0x2C:                  /* BGE rel */
+                go_rel(!(get_flag(NF) ^ get_flag(VF)));
+                break;
+            case 0x2D:                  /* BLT rel */
+                go_rel(get_flag(NF) ^ get_flag(VF));
+                break;
+            case 0x2E:                  /* BGT rel */
+                go_rel(!(get_flag(ZF) | (get_flag(NF) ^ get_flag(VF))));
+                break;
+            case 0x2F:                  /* BLE rel */
+                go_rel(get_flag(ZF) | (get_flag(NF) ^ get_flag(VF)));
+                break;
+            case 0x30:                  /* TSX */
+                IX = (SP + 1) & ADDRMASK;
+                break;
+            case 0x31:                  /* INS */
+                SP = (SP + 1) & ADDRMASK;
+                break;
+            case 0x32:                  /* PUL A */
+                A = pop_byte();
+                break;
+            case 0x33:                  /* PUL B */
+                B = pop_byte();
+                break;
+            case 0x34:                  /* DES */
+                SP = (SP - 1) & ADDRMASK;
+                break;
+            case 0x35:                  /* TXS */
+                SP = (IX - 1) & ADDRMASK;
+                break;
+            case 0x36:                  /* PSH A */
+                push_byte(A);
+                break;
+            case 0x37:                  /* PSH B */
+                push_byte(B);
+                break;
+            case 0x39:                  /* RTS */
+                PC = pop_word();
+                break;
+            case 0x3B:                  /* RTI */
+                CCR = pop_byte();
+                B = pop_byte();
+                A = pop_byte();
+                IX = pop_word();
+                PC = pop_word();
+                break;
+            case 0x3E:                  /* WAI */
+                push_word(PC);
+                push_word(IX);
+                push_byte(A);
+                push_byte(B);
+                push_byte(CCR);
+                if (get_flag(IF)) {
+                    reason = STOP_HALT;
+                    continue;
+                } else {
+                    SET_FLAG(IF);
+                    PC = CPU_BD_get_mword(0xFFFE) & ADDRMASK;
+                }
+                break;
+            case 0x3F:                  /* SWI */
+                push_word(PC);
+                push_word(IX);
+                push_byte(A);
+                push_byte(B);
+                push_byte(CCR);
+                SET_FLAG(IF);
+                PC = CPU_BD_get_mword(0xFFFB) & ADDRMASK;
+                break;
+            case 0x40:                  /* NEG A */
+                A = (0 - A) & 0xFF;
+                COND_SET_FLAG_V(A & 0x80);
+                COND_SET_FLAG(A,CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x43:                  /* COM A */
+                A = ~A & 0xFF;
+                CLR_FLAG(VF);
+                SET_FLAG(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x44:                  /* LSR A */
+                COND_SET_FLAG(A & 0x01,CF);
+                A = (A >> 1) & 0xFF;
+                CLR_FLAG(NF);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x46:                  /* ROR A */
+                hi = get_flag(CF);
+                COND_SET_FLAG(A & 0x01,CF);
+                A = (A >> 1) & 0xFF;
+                if (hi)
+                    A |= 0x80;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x47:                  /* ASR A */
+                COND_SET_FLAG(A & 0x01,CF);
+                lo = A & 0x80;
+                A = (A >> 1) & 0xFF;
+                A |= lo; 
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x48:                  /* ASL A */
+                COND_SET_FLAG(A & 0x80,CF);
+                A = (A << 1) & 0xFF;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x49:                  /* ROL A */
+                hi = get_flag(CF);
+                COND_SET_FLAG(A & 0x80,CF);
+                A = (A << 1) & 0xFF;
+                if (hi)
+                    A |= 0x01;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x4A:                  /* DEC A */
+                COND_SET_FLAG_V(A == 0x80);
+                A = (A - 1) & 0xFF;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x4C:                  /* INC A */
+                COND_SET_FLAG_V(A == 0x7F);
+                A = (A + 1) & 0xFF;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x4D:                  /* TST A */
+                lo = (A - 0) & 0xFF;
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x4F:                  /* CLR A */
+                A = 0;
+                CLR_FLAG(NF);
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                SET_FLAG(ZF);
+                break;
+            case 0x50:                  /* NEG B */
+                B = (0 - B) & 0xFF;
+                COND_SET_FLAG_V(B & 0x80);
+                COND_SET_FLAG(B,CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0x53:                  /* COM B */
+                B = ~B;
+                B &= 0xFF;
+                CLR_FLAG(VF);
+                SET_FLAG(CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0x54:                  /* LSR B */
+                COND_SET_FLAG(B & 0x01,CF);
+                B = (B >> 1) & 0xFF;
+                CLR_FLAG(NF);
+                COND_SET_FLAG_Z(B);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x56:                  /* ROR B */
+                hi = get_flag(CF);
+                COND_SET_FLAG(B & 0x01,CF);
+                B = (B >> 1) & 0xFF;
+                if (hi)
+                    B |= 0x80;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x57:                  /* ASR B */
+                COND_SET_FLAG(B & 0x01,CF);
+                lo = B & 0x80;
+                B = (B >> 1) & 0xFF;
+                B |= lo; 
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x58:                  /* ASL B */
+                COND_SET_FLAG(B & 0x80,CF);
+                B = (B << 1) & 0xFF;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x59:                  /* ROL B */
+                hi = get_flag(CF);
+                COND_SET_FLAG(B & 0x80,CF);
+                B = (B << 1) & 0xFF;
+                if (hi)
+                    B |= 0x01;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x5A:                  /* DEC B */
+                COND_SET_FLAG_V(B == 0x80);
+                B = (B - 1) & 0xFF;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0x5C:                  /* INC B */
+                COND_SET_FLAG_V(B == 0x7F);
+                B = (B + 1) & 0xFF;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0x5D:                  /* TST B */
+                lo = (B - 0) & 0xFF;
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x5F:                  /* CLR B */
+                B = 0;
+                CLR_FLAG(NF);
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                SET_FLAG(ZF);
+                break;
+            case 0x60:                  /* NEG ind */
+                DAR = get_indir_addr();
+                lo = (0 - CPU_BD_get_mbyte(DAR)) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_V(lo & 0x80);
+                COND_SET_FLAG(lo,CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x63:                  /* COM ind */
+                DAR = get_indir_addr();
+                lo = ~CPU_BD_get_mbyte(DAR);
+                lo &= 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                CLR_FLAG(VF);
+                SET_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x64:                  /* LSR ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x01,CF);
+                lo >>= 1;
+                CPU_BD_put_mbyte(DAR, lo);
+                CLR_FLAG(NF);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x66:                  /* ROR ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                hi = get_flag(CF);
+                COND_SET_FLAG(lo & 0x01,CF);
+                lo >>= 1;
+                if (hi)
+                    lo |= 0x80;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x67:                  /* ASR ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x01,CF);
+                lo = (lo & 0x80) | (lo >> 1);
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x68:                  /* ASL ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x80,CF);
+                lo <<= 1;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x69:                  /* ROL ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                hi = get_flag(CF);
+                COND_SET_FLAG(lo & 0x80,CF);
+                lo <<= 1;
+                if (hi)
+                    lo |= 0x01;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x6A:                  /* DEC ind */
+                DAR = get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG_V(lo == 0x80);
+                lo = (lo - 1) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x6C:                  /* INC ind */
+                DAR= get_indir_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG_V(lo == 0x7F);
+                lo = (lo + 1) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x6D:                  /* TST ind */
+                lo = (get_indir_val() - 0) & 0xFF;
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x6E:                  /* JMP ind */
+                PC = get_indir_addr();
+                break;
+            case 0x6F:                  /* CLR ind */
+                CPU_BD_put_mbyte(get_indir_addr(), 0);
+                CLR_FLAG(NF);
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                SET_FLAG(ZF);
+                break;
+            case 0x70:                  /* NEG ext */
+                DAR = get_ext_addr();
+                lo = (0 - CPU_BD_get_mbyte(DAR)) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_V(lo & 0x80);
+                CLR_FLAG(CF);
+                if (lo)
+                    SET_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x73:                  /* COM ext */
+                DAR = get_ext_addr();
+                lo = ~CPU_BD_get_mbyte(DAR);
+                lo &= 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                CLR_FLAG(VF);
+                SET_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x74:                  /* LSR ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x01,CF);
+                lo >>= 1;
+                CPU_BD_put_mbyte(DAR, lo);
+                CLR_FLAG(NF);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x76:                  /* ROR ext */
+                DAR = get_ext_addr();
+                hi = get_flag(CF);
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x01,CF);
+                lo >>= 1;
+                if (hi)
+                    lo |= 0x80;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x77:                  /* ASR ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x01,CF);
+                hi = lo & 0x80;
+                lo >>= 1;
+                lo |= hi;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x78:                  /* ASL ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG(lo & 0x80,CF);
+                lo <<= 1;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x79:                  /* ROL ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                hi = get_flag(CF);
+                COND_SET_FLAG(lo & 0x80,CF);
+                lo <<= 1;
+                if (hi)
+                    lo |= 0x01;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_V(get_flag(NF) ^ get_flag(CF));
+                break;
+            case 0x7A:                  /* DEC ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG_V(lo == 0x80);
+                lo = (lo - 1) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x7C:                  /* INC ext */
+                DAR = get_ext_addr();
+                lo = CPU_BD_get_mbyte(DAR);
+                COND_SET_FLAG_V(lo == 0x7F);
+                lo = (lo + 1) & 0xFF;
+                CPU_BD_put_mbyte(DAR, lo);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x7D:                  /* TST ext */
+                lo = CPU_BD_get_mbyte(get_ext_addr()) - 0;
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                COND_SET_FLAG_N(lo);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x7E:                  /* JMP ext */
+                PC = get_ext_addr() & ADDRMASK;
+                break;
+            case 0x7F:                  /* CLR ext */
+                CPU_BD_put_mbyte(get_ext_addr(), 0);
+                CLR_FLAG(NF);
+                CLR_FLAG(VF);
+                CLR_FLAG(CF);
+                SET_FLAG(ZF);
+                break;
+            case 0x80:                  /* SUB A imm */
+                op1 = get_dir_addr();
+                A = A - op1;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x81:                  /* CMP A imm */
+                op1 = get_dir_addr();
+                lo = A - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(lo, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x82:                  /* SBC A imm */
+                op1 = get_dir_addr();
+                A = A - op1 - get_flag(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x84:                  /* AND A imm */
+                A = (A & get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x85:                  /* BIT A imm */
+                lo = (A & get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x86:                  /* LDA A imm */
+                A = get_dir_addr();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x88:                  /* EOR A imm */
+                A = (A ^ get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x89:                  /* ADC A imm */
+                op1 = get_dir_addr();
+                A = A + op1 + get_flag(CF);
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x8A:                  /* ORA A imm */
+                A = (A | get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x8B:                  /* ADD A imm */
+                op1 = get_dir_addr();
+                A = A + op1;
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x8C:                  /* CPX imm */
+                op1 = IX - get_ext_addr();
+                COND_SET_FLAG_Z(op1);
+                COND_SET_FLAG_N(op1 >> 8);
+                COND_SET_FLAG_V(op1 & 0x10000);
+                break;
+            case 0x8D:                  /* BSR rel */
+                lo = get_rel_addr();
+                push_word(PC);
+                PC = PC + lo;
+                PC &= ADDRMASK;
+                break;
+            case 0x8E:                  /* LDS imm */
+                SP = get_ext_addr();
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0x90:                  /* SUB A dir */
+                op1 = get_dir_val();
+                A = A - op1;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x91:                  /* CMP A dir */
+                op1 = get_dir_val();
+                lo = A - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(A, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x92:                  /* SBC A dir */
+                op1 = get_dir_val();
+                A = A - op1 - get_flag(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x94:                  /* AND A dir */
+                A = (A & get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x95:                  /* BIT A dir */
+                lo = (A & get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0x96:                  /* LDA A dir */
+                A = get_dir_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x97:                  /* STA A dir */
+                CPU_BD_put_mbyte(get_dir_addr(), A);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x98:                  /* EOR A dir */
+                A = (A ^ get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x99:                  /* ADC A dir */
+                op1 = get_dir_val();
+                A = A + op1 + get_flag(CF);
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x9A:                  /* ORA A dir */
+                A = (A | get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x9B:                  /* ADD A dir */
+                op1 = get_dir_val();
+                A = A + op1;
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0x9C:                  /* CPX dir */
+                op1 = IX - CPU_BD_get_mword(get_dir_addr());
+                COND_SET_FLAG_Z(op1);
+                COND_SET_FLAG_N(op1 >> 8);
+                COND_SET_FLAG_V(op1 & 0x10000);
+                break;
+            case 0x9E:                  /* LDS dir */
+                SP = CPU_BD_get_mword(get_dir_addr());
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0x9F:                  /* STS dir */
+                CPU_BD_put_mword(get_dir_addr(), SP);
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0xA0:                  /* SUB A ind */
+                op1 = get_indir_val();
+                A = A - op1;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA1:                  /* CMP A ind */
+                op1 = get_indir_val();
+                lo = A - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(A, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xA2:                  /* SBC A ind */
+                op1 = get_indir_val();
+                A = A - op1 - get_flag(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA4:                  /* AND A ind */
+                A = (A & get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA5:                  /* BIT A ind */
+                lo = (A & get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xA6:                  /* LDA A ind */
+                A = get_indir_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA7:                  /* STA A ind */
+                CPU_BD_put_mbyte(get_indir_addr(), A);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA8:                  /* EOR A ind */
+                A = (A ^ get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xA9:                  /* ADC A ind */
+                op1 = get_indir_val();
+                A = A + op1 + get_flag(CF);
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xAA:                  /* ORA A ind */
+                A = (A | get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xAB:                  /* ADD A ind */
+                op1 = get_indir_val();
+                A = A + op1;
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xAC:                  /* CPX ind */
+                op1 = (IX - get_indir_addr()) & ADDRMASK;
+                COND_SET_FLAG_Z(op1);
+                COND_SET_FLAG_N(op1 >> 8);
+                COND_SET_FLAG_V(op1 & 0x10000);
+                break;
+            case 0xAD:                  /* JSR ind */
+                DAR = get_indir_addr();
+                push_word(PC);
+                PC = DAR;
+                break;
+            case 0xAE:                  /* LDS ind */
+                SP = CPU_BD_get_mword(get_indir_addr());
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0xAF:                  /* STS ind */
+                CPU_BD_put_mword(get_indir_addr(), SP);
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0xB0:                  /* SUB A ext */
+                op1 = get_ext_val();
+                A = A - op1;
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB1:                  /* CMP A ext */
+                op1 = get_ext_val();
+                lo = A - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(A, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xB2:                  /* SBC A ext */
+                op1 = get_ext_val();
+                A = A - op1 - get_flag(CF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVs(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB4:                  /* AND A ext */
+                A = (A & get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB5:                  /* BIT A ext */
+                lo = (A & get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xB6:                  /* LDA A ext */
+                A = get_ext_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB7:                  /* STA A ext */
+                CPU_BD_put_mbyte(get_ext_addr(), A);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB8:                  /* EOR A ext */
+                A = (A ^ get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xB9:                  /* ADC A ext */
+                op1 = get_ext_val();
+                A = A + op1 + get_flag(CF);
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xBA:                  /* ORA A ext */
+                A = (A | get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xBB:                  /* ADD A ext */
+                op1 = get_ext_val();
+                A = A + op1;
+                COND_SET_FLAG_H(A);
+                COND_SET_FLAG_N(A);
+                COND_SET_FLAG_C(A);
+                condevalVa(A, op1);
+                A &= 0xFF;
+                COND_SET_FLAG_Z(A);
+                break;
+            case 0xBC:                  /* CPX ext */
+                op1 = (IX - CPU_BD_get_mword(get_ext_addr()));// & ADDRMASK;
+                COND_SET_FLAG_Z(op1);
+                COND_SET_FLAG_N(op1 >> 8);
+                COND_SET_FLAG_V(op1 & 0x10000);
+                break;
+            case 0xBD:                  /* JSR ext */
+                DAR = get_ext_addr();
+                push_word(PC);
+                PC = DAR;
+                break;
+            case 0xBE:                  /* LDS ext */
+                SP = CPU_BD_get_mword(get_ext_addr());
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0xBF:                  /* STS ext */
+                CPU_BD_put_mword(get_ext_addr(), SP);
+                COND_SET_FLAG_N(SP >> 8);
+                COND_SET_FLAG_Z(SP);
+                CLR_FLAG(VF);
+                break;
+            case 0xC0:                  /* SUB B imm */
+                op1 = get_dir_addr();
+                B = B - op1;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xC1:                  /* CMP B imm */
+                op1 = get_dir_addr();
+                lo = B - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(B, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xC2:                  /* SBC B imm */
+                op1 = get_dir_addr();
+                B = B - op1 - get_flag(CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xC4:                  /* AND B imm */
+                B = (B & get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xC5:                  /* BIT B imm */
+                lo = (B & get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xC6:                  /* LDA B imm */
+                B = get_dir_addr();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xC8:                  /* EOR B imm */
+                B = (B ^ get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xC9:                  /* ADC B imm */
+                op1 = get_dir_addr();
+                B = B + op1 + get_flag(CF);
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xCA:                  /* ORA B imm */
+                B = (B | get_dir_addr()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xCB:                  /* ADD B imm */
+                op1 = get_dir_addr();
+                B = B + op1;
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xCE:                  /* LDX imm */
+                IX = get_ext_addr();
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xD0:                  /* SUB B dir */
+                op1 = get_dir_val();
+                B = B - op1;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD1:                  /* CMP B dir */
+                op1 = get_dir_val();
+                lo = B - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(B, op1);
+                break;
+            case 0xD2:                  /* SBC B dir */
+                op1 = get_dir_val();
+                B = B - op1 - get_flag(CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD4:                  /* AND B dir */
+                B = (B & get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD5:                  /* BIT B dir */
+                lo = (B & get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xD6:                  /* LDA B dir */
+                B = get_dir_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD7:                  /* STA B dir */
+                CPU_BD_put_mbyte(get_dir_addr(), B);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD8:                  /* EOR B dir */
+                B = (B ^ get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xD9:                  /* ADC B dir */
+                op1 = get_dir_val();
+                B = B + op1 + get_flag(CF);
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xDA:                  /* ORA B dir */
+                B = (B | get_dir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xDB:                  /* ADD B dir */
+                op1 = get_dir_val();
+                B = B + op1;
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xDE:                  /* LDX dir */
+                IX = CPU_BD_get_mword(get_dir_addr());
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xDF:                  /* STX dir */
+                CPU_BD_put_mword(get_dir_addr(), IX);
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xE0:                  /* SUB B ind */
+                op1 = get_indir_val();
+                B = B - op1;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE1:                  /* CMP B ind */
+                op1 = get_indir_val();
+                lo = B - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(B, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xE2:                  /* SBC B ind */
+                op1 = get_indir_val();
+                B = B - op1 - get_flag(CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE4:                  /* AND B ind */
+                B = (B & get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE5:                  /* BIT B ind */
+                lo = (B & get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xE6:                  /* LDA B ind */
+                B = get_indir_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE7:                  /* STA B ind */
+                CPU_BD_put_mbyte(get_indir_addr(), B);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE8:                  /* EOR B ind */
+                B = (B ^ get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xE9:                  /* ADC B ind */
+                op1 = get_indir_val();
+                B = B + op1 + get_flag(CF);
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xEA:                  /* ORA B ind */
+                B = (B | get_indir_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xEB:                  /* ADD B ind */
+                op1 = get_indir_val();
+                B = B + op1;
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xEE:                  /* LDX ind */
+                IX = CPU_BD_get_mword(get_indir_addr());
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xEF:                  /* STX ind */
+                CPU_BD_put_mword(get_indir_addr(), IX);
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xF0:                  /* SUB B ext */
+                op1 = get_ext_val();
+                B = B - op1;
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF1:                  /* CMP B ext */
+                op1 = get_ext_val();
+                lo = B - op1;
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_C(lo);
+                condevalVs(B, op1);
+                lo &= 0xFF;
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xF2:                  /* SBC B ext */
+                op1 = get_ext_val();
+                B = B - op1 - get_flag(CF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVs(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF4:                  /* AND B ext */
+                B = (B & get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF5:                  /* BIT B ext */
+                lo = (B & get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(lo);
+                COND_SET_FLAG_Z(lo);
+                break;
+            case 0xF6:                  /* LDA B ext */
+                B = get_ext_val();
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF7:                  /* STA B ext */
+                CPU_BD_put_mbyte(get_ext_addr(), B);
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF8:                  /* EOR B ext */
+                B = (B ^ get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xF9:                  /* ADC B ext */
+                op1 = get_ext_val();
+                B = B + op1 + get_flag(CF);
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xFA:                  /* ORA B ext */
+                B = (B | get_ext_val()) & 0xFF;
+                CLR_FLAG(VF);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xFB:                  /* ADD B ext */
+                op1 = get_ext_val();
+                B = B + op1;
+                COND_SET_FLAG_H(B);
+                COND_SET_FLAG_N(B);
+                COND_SET_FLAG_C(B);
+                condevalVa(B, op1);
+                B &= 0xFF;
+                COND_SET_FLAG_Z(B);
+                break;
+            case 0xFE:                  /* LDX ext */
+                IX = CPU_BD_get_mword(get_ext_addr());
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+            case 0xFF:                  /* STX ext */
+                CPU_BD_put_mword(get_ext_addr(), IX);
+                COND_SET_FLAG_N(IX >> 8);
+                COND_SET_FLAG_Z(IX);
+                CLR_FLAG(VF);
+                break;
+
+            default: {                  /* Unassigned */
+                if (m6800_unit.flags & UNIT_OPSTOP) {
+                    reason = STOP_OPCODE;
+                    PC--;
+                }
+                break;
+            }
+        }
+    }
+    /* Simulation halted - lets dump all the registers! */
+    dump_regs();
+    saved_PC = PC;
+    return reason;
+}
+
+/* dump the working registers */
+
+void dump_regs(void)
+{
+    printf("\r\nPC=%04X SP=%04X IX=%04X ", PC, SP, IX);
+    printf("A=%02X B=%02X CCR=%02X", A, B, CCR);
+}
+
+void dump_regs1(void)
+{
+    printf("PC=%04X SP=%04X IX=%04X ", PC, SP, IX);
+    printf("A=%02X B=%02X CCR=%02X\n", A, B, CCR);
+}
+
+/* fetch an instruction or byte */
+int32 fetch_byte(int32 flag)
+{
+    uint8 val;
+
+    val = CPU_BD_get_mbyte(PC) & 0xFF;   /* fetch byte */
+    if (m6800_dev.dctrl & DEBUG_asm) {  /* display source code */
+        switch (flag) {
+            case 0:                     /* opcode fetch */
+                printf("\n%04X %s", PC, opcode[val]);
+                break;
+            case 1:                     /* byte operand fetch */
+                printf("0%02XH", val);
+                break;
+        }
+    }
+    PC = (PC + 1) & ADDRMASK;           /* increment PC */
+    return val;
+}
+
+/* fetch a word */
+int32 fetch_word(void)
+{
+    uint16 val;
+
+    val = CPU_BD_get_mbyte(PC) << 8;     /* fetch high byte */
+    val |= CPU_BD_get_mbyte(PC + 1) & 0xFF; /* fetch low byte */
+    if (m6800_dev.dctrl & DEBUG_asm)
+        printf("0%04XH", val);
+    PC = (PC + 2) & ADDRMASK;           /* increment PC */
+    return val;
+}
+
+/* push a byte to the stack */
+void push_byte(uint8 val)
+{
+    CPU_BD_put_mbyte(SP, val & 0xFF);
+    SP = (SP - 1) & ADDRMASK;
+}
+
+/* push a word to the stack */
+void push_word(uint16 val)
+{
+    push_byte(val & 0xFF);
+    push_byte(val >> 8);
+}
+
+/* pop a byte from the stack */
+uint8 pop_byte(void)
+{
+    register uint8 res;
+
+    SP = (SP + 1) & ADDRMASK;
+    res = CPU_BD_get_mbyte(SP);
+    return res;
+}
+
+/* pop a word from the stack */
+uint16 pop_word(void)
+{
+    register uint16 res;
+
+    res = pop_byte() << 8;
+    res |= pop_byte();
+    return res;
+}
+
+/*        this routine does the jump to relative offset if the condition is
+        met.  Otherwise, execution continues at the current PC. */
+
+void go_rel(int32 cond)
+{
+    int32 temp;
+
+    temp = get_rel_addr();
+    if (cond)
+        PC += temp;
+    PC &= ADDRMASK;
+}
+
+/* returns the relative offset sign-extended */
+
+int32 get_rel_addr(void)
+{
+    int32 temp;
+
+    temp = fetch_byte(1);
+    if (temp & 0x80)
+        temp |= 0xFF00;
+    return temp & ADDRMASK;
+}
+
+/* returns the value at the direct address pointed to by PC */
+
+int32 get_dir_val(void)
+{
+    return CPU_BD_get_mbyte(get_dir_addr());
+}
+
+/* returns the direct address pointed to by PC */
+
+int32 get_dir_addr(void)
+{
+    int32 temp;
+
+    temp = fetch_byte(1);
+    return temp & 0xFF;
+}
+
+/* returns the value at the indirect address pointed to by PC */
+
+int32 get_indir_val(void)
+{
+    return CPU_BD_get_mbyte(get_indir_addr());
+}
+
+/* returns the indirect address pointed to by PC or immediate byte */
+
+int32 get_indir_addr(void)
+{
+    int32 temp;
+    
+    temp = (fetch_byte(1) + IX) & ADDRMASK;
+    return temp;
+}
+
+/* returns the value at the extended address pointed to by PC */
+
+int32 get_ext_val(void)
+{
+    return CPU_BD_get_mbyte(get_ext_addr());
+}
+
+/* returns the extended address pointed to by PC or immediate word */
+
+int32 get_ext_addr(void)
+{
+    int32 temp;
+
+    temp = fetch_word();
+    return temp;
+}
+
+/* return 1 for flag set or 0 for flag clear */
+
+int32 get_flag(int32 flg)
+{
+    if (CCR & flg)
+        return 1;
+    else
+        return 0;
+}
+
+/* test and set V for addition */
+
+void condevalVa(int32 op1, int32 op2)
+{
+    if (get_flag(CF))
+        COND_SET_FLAG_V(((op1 & 0x80) && (op2 & 0x80)) || (
+            ((op1 & 0x80) == 0) && ((op2 & 0x80) == 0)));
+}
+
+/* test and set V for subtraction */
+
+void condevalVs(int32 op1, int32 op2)
+{
+    if (get_flag(CF))
+        COND_SET_FLAG_V(((op1 & 0x80) && ((op2 & 0x80) == 0)) || 
+            (((op1 & 0x80) == 0) && (op2 & 0x80)));
+}
+
+/* calls from the simulator */
+
+/* Reset routine */
+
+t_stat m6800_reset (DEVICE *dptr)
+{
+    CCR = CCR_ALWAYS_ON | IF;
+    int_req = 0;
+    sim_brk_types = sim_brk_dflt = SWMASK ('E');
+    saved_PC = CPU_BD_get_mword(0xFFFE);
+//    if (saved_PC == 0xFFFF)
+//        printf("No EPROM image found - M6800 reset incomplete!\n");
+//    else
+//        printf("EPROM vector=%04X\n", saved_PC);
+    return SCPE_OK;
+}
+
+
+/* This is the dumper/loader. This command uses the -h to signify a
+	hex dump/load vice a binary one.  If no address is given to load, it 
+	takes the address from the hex record or the current PC for binary.
+*/
+
+int32 sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
+{
+    int32 i, addr = 0, cnt = 0;
+
+    if ((*cptr != 0) || (flag != 0)) return SCPE_ARG;
+    addr = saved_PC;
+    while ((i = getc (fileref)) != EOF) {
+        CPU_BD_put_mbyte(addr, i);
+        addr++;
+        cnt++;
+    }                                   // end while 
+    printf ("%d Bytes loaded.\n", cnt);
+    return (SCPE_OK);
+}
+
+/* Symbolic output
+
+    Inputs:
+        *of     =   output stream
+        addr    =   current PC
+        *val    =   pointer to values
+        *uptr   =   pointer to unit
+        sw      =   switches
+    Outputs:
+        status  =   error code
+        for M6800
+*/
+
+int32 fprint_sym (FILE *of, int32 addr, uint32 *val, UNIT *uptr, int32 sw)
+{
+    int32 i, inst, inst1;
+
+    if (sw & SWMASK ('D')) {            // dump memory
+        for (i=0; i<16; i++)
+            fprintf(of, "%02X ", val[i]);
+        fprintf(of, "  ");
+        for (i=0; i<16; i++)
+            if (isprint(val[i]))
+                fprintf(of, "%c", val[i]);
+            else
+                fprintf(of, ".");
+        return -15;
+    } else if (sw & SWMASK ('M')) {     // dump instruction mnemonic
+        inst = val[0];
+        if (!oplen[inst]) {             // invalid opcode
+            fprintf(of, "%02X", inst);
+            return 0;
+        }
+        inst1 = inst & 0xF0;
+        fprintf (of, "%s", opcode[inst]); // mnemonic
+        if (strlen(opcode[inst]) == 3)
+            fprintf(of, " ");
+        if (inst1 == 0x20 || inst == 0x8D) { // rel operand
+            inst1 = val[1];
+            if (val[1] & 0x80)
+                inst1 |= 0xFF00;
+            fprintf(of, " $%04X", (addr + inst1 + 2) & ADDRMASK);
+        } else if (inst1 == 0x80 || inst1 == 0xC0) { // imm operand
+            if ((inst & 0x0F) < 0x0C)
+                fprintf(of, " #$%02X", val[1]);
+            else
+                fprintf(of, " #$%02X%02X", val[1], val[2]);
+        } else if (inst1 == 0x60 || inst1 == 0xA0 || inst1 == 0xE0) // ind operand
+            fprintf(of, " %d,X", val[1]);
+        else if (inst1 == 0x70 || inst1 == 0xb0 || inst1 == 0xF0) // ext operand
+            fprintf(of, " $%02X%02X", val[1], val[2]);
+        return (-(oplen[inst] - 1));
+    } else 
+        return SCPE_ARG;
+}
+
+/* Symbolic input
+
+    Inputs:
+        *cptr   =   pointer to input string
+        addr    =   current PC
+        *uptr   =   pointer to unit
+        *val    =   pointer to output values
+        sw      =   switches
+    Outputs:
+        status  =   error status
+*/
+
+int32 parse_sym (char *cptr, int32 addr, UNIT *uptr, uint32 *val, int32 sw)
+{
+    return (-2);
+}
+
+/* end of m6800.c */
diff --git a/swtp6800/common/m6810.c b/swtp6800/common/m6810.c
new file mode 100644
index 00000000..3bb5660a
--- /dev/null
+++ b/swtp6800/common/m6810.c
@@ -0,0 +1,146 @@
+/*  m6810.c: Motorola m6810 RAM emulator
+
+    Copyright (c) 2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not be
+    used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    These functions support a simulated m6810 RAM device on a CPU board.  The
+    byte get and put routines use an offset into the RAM image to locate the 
+    proper byte.  This allows another device to set the base address for the
+    M6810.
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+/* function prototypes */
+
+t_stat m6810_reset (DEVICE *dptr);
+int32 m6810_get_mbyte(int32 offset);
+void m6810_put_mbyte(int32 offset, int32 val);
+
+/* SIMH RAM Standard I/O Data Structures */
+
+UNIT m6810_unit = { UDATA (NULL, UNIT_BINK, 128),
+                    0 };
+
+MTAB m6810_mod[] = {
+    { 0 }
+};
+
+DEBTAB m6810_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE m6810_dev = {
+    "M6810",                        //name
+    &m6810_unit,                    //units
+    NULL,                           //registers
+    m6810_mod,                      //modifiers
+    1,                              //numunits
+    16,                             //aradix
+    32,                             //awidth
+    1,                              //aincr
+    16,                             //dradix
+    8,                              //dwidth
+    NULL,                           //examine
+    NULL,                           //deposit
+    &m6810_reset,                   //reset
+    NULL,                           //boot
+    NULL,                           //attach
+    NULL,                           //detach
+    NULL,                           //ctxt
+    DEV_DEBUG,                      //flags
+    0,                              //dctrl
+    m6810_debug,                    //debflags
+    NULL,                           //msize
+    NULL                            //lname
+};
+
+/* global variables */
+
+/* m6810_reset */
+
+t_stat m6810_reset (DEVICE *dptr)
+{
+    if (m6810_dev.dctrl & DEBUG_flow)
+        printf("m6810_reset: \n");
+    if (m6810_unit.filebuf == NULL) {
+        m6810_unit.filebuf = malloc(128);
+        if (m6810_unit.filebuf == NULL) {
+            printf("m6810_reset: Malloc error\n");
+            return SCPE_MEM;
+        }
+        m6810_unit.capac = 128;
+    }
+    if (m6810_dev.dctrl & DEBUG_flow)
+        printf("m6810_reset: Done\n");
+    return SCPE_OK;
+}
+
+/*  I/O instruction handlers, called from the CPU module when an
+    RAM memory read or write is issued.
+*/
+
+/*  get a byte from memory - from offset from start of RAM*/
+
+int32 m6810_get_mbyte(int32 offset)
+{
+    int32 val;
+
+    if (m6810_dev.dctrl & DEBUG_read)
+        printf("m6810_get_mbyte: offset=%04X\n", offset);
+    if (((t_addr)offset) < m6810_unit.capac) {
+        val = *((uint8 *)(m6810_unit.filebuf) + offset) & 0xFF;
+        if (m6810_dev.dctrl & DEBUG_read)
+            printf("val=%04X\n", val);
+        return val;
+    } else {
+        if (m6810_dev.dctrl & DEBUG_read)
+            printf("m6810_get_mbyte: out of range\n");
+        return 0xFF;
+    }
+}
+
+/*  put a byte to memory */
+
+void m6810_put_mbyte(int32 offset, int32 val)
+{
+    if (m6810_dev.dctrl & DEBUG_write)
+        printf("m6810_put_mbyte: offset=%04X, val=%02X\n", offset, val);
+    if ((t_addr)offset < m6810_unit.capac) {
+        *((uint8 *)(m6810_unit.filebuf) + offset) = val & 0xFF;
+        return;
+    } else {
+        if (m6810_dev.dctrl & DEBUG_write)
+            printf("m6810_put_mbyte: out of range\n");
+        return;
+    }
+}
+
+/* end of m6810.c */
diff --git a/swtp6800/common/mp-8m.c b/swtp6800/common/mp-8m.c
new file mode 100644
index 00000000..9126b05a
--- /dev/null
+++ b/swtp6800/common/mp-8m.c
@@ -0,0 +1,209 @@
+/* mp-8m.c: SWTP 8K Byte Memory Card emulator
+
+    Copyright (c) 2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not be
+    used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    These functions support 6 simulated MP-8M memory cards on an SS-50 system.
+
+    Each unit uses a dynamically allocated 8192 byte buffer to hold the data.
+    Each unit contains the base address in mp_8m_unit.u3.  The unit capacity is
+    held in mp_8m_unit.capac.  Each unit can be enabled or disabled to reconfigure
+    the RAM for the system.
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define MP_8M_NUM       6               /* number of MP-*m boards */
+
+/* prototypes */
+
+t_stat mp_8m_reset (DEVICE *dptr);
+int32 mp_8m_get_mbyte(int32 addr);
+int32 mp_8m_get_mword(int32 addr);
+void mp_8m_put_mbyte(int32 addr, int32 val);
+void mp_8m_put_mword(int32 addr, int32 val);
+
+/* isbc064 Standard I/O Data Structures */
+
+UNIT mp_8m_unit[] = { 
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 },
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 },
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 },
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 },
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 },
+    { UDATA (NULL, UNIT_FIX+UNIT_BINK+UNIT_DISABLE, 0),0 }
+};
+
+MTAB mp_8m_mod[] = { 
+    { 0 }
+};
+
+DEBTAB mp_8m_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE mp_8m_dev = {
+    "MP-8M",                            //name
+    mp_8m_unit,                         //units
+    NULL,                               //registers
+    mp_8m_mod,                          //modifiers
+    MP_8M_NUM,                          //numunits
+    16,                                 //aradix
+    8,                                  //awidth
+    1,                                  //aincr
+    16,                                 //dradix
+    8,                                  //dwidth
+    NULL,                               //examine
+    NULL,                               //deposite
+    &mp_8m_reset,                       //reset
+    NULL,                               //boot
+    NULL,                               //attach
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags
+    0,                                  //dctrl
+    mp_8m_debug,                        //debflags
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+/* Reset routine */
+
+t_stat mp_8m_reset (DEVICE *dptr)
+{
+    int32 i, j, val;
+    UNIT *uptr;
+
+    if (mp_8m_dev.dctrl & DEBUG_flow)
+        printf("mp_8m_reset: \n");
+    for (i = 0; i < MP_8M_NUM; i++) {   /* init all units */
+        uptr = mp_8m_dev.units + i;
+        if (mp_8m_dev.dctrl & DEBUG_flow)
+            printf("MP-8M %d unit.flags=%08X\n", i, uptr->flags);
+        uptr->capac = 0x2000;
+        if (i < 4)
+            uptr->u3 = 0x2000 * i;
+        else
+            uptr->u3 = 0x2000 * (i + 1);
+        if (uptr->filebuf == NULL) {
+            uptr->filebuf = malloc(0x2000);
+            if (uptr->filebuf == NULL) {
+                printf("mp_8m_reset: Malloc error\n");
+                return SCPE_MEM;
+            }
+            for (j=0; j<8192; j++) {    /* fill pattern for testing */
+                val = (0xA0 |  i);
+                *((uint8 *)(uptr->filebuf) + j) = val & 0xFF;
+            }
+        }
+        if (mp_8m_dev.dctrl & DEBUG_flow)
+            printf("MP-8M %d initialized at [%04X-%04XH]\n", i, uptr->u3,
+                uptr->u3 + uptr->capac - 1);
+    }
+    if (mp_8m_dev.dctrl & DEBUG_flow)
+        printf("mp_8m_reset: Done\n");
+    return SCPE_OK;
+}
+
+/*  I/O instruction handlers, called from the mp-b2 module when an
+    external memory read or write is issued.
+*/
+
+/*  get a byte from memory */
+
+int32 mp_8m_get_mbyte(int32 addr)
+{
+    int32 val, org, len;
+    int32 i;
+    UNIT *uptr;
+
+    if (mp_8m_dev.dctrl & DEBUG_read)
+        printf("mp_8m_get_mbyte: addr=%04X", addr);
+    for (i = 0; i < MP_8M_NUM; i++) { /* find addressed unit */
+        uptr = mp_8m_dev.units + i;
+        org = uptr->u3;
+        len = uptr->capac - 1;
+        if ((addr >= org) && (addr <= org + len)) {
+            val = *((uint8 *)(uptr->filebuf) + (addr - org));
+            if (mp_8m_dev.dctrl & DEBUG_read)
+                printf(" val=%04X\n", val);
+            return (val & 0xFF);
+        }
+    }
+    if (mp_8m_dev.dctrl & DEBUG_read)
+        printf("mp_8m_get_mbyte: Out of range\n");
+    return 0xFF;        /* multibus has active high pullups */
+}
+
+/*  get a word from memory */
+
+int32 mp_8m_get_mword(int32 addr)
+{
+    int32 val;
+
+    val = (mp_8m_get_mbyte(addr) << 8);
+    val |= mp_8m_get_mbyte(addr+1);
+    return val;
+}
+
+/*  put a byte into memory */
+
+void mp_8m_put_mbyte(int32 addr, int32 val)
+{
+    int32 org, len;
+    int32 i;
+    UNIT *uptr;
+
+    if (mp_8m_dev.dctrl & DEBUG_write)
+        printf("mp_8m_put_mbyte: addr=%04X, val=%02X", addr, val);
+    for (i = 0; i < MP_8M_NUM; i++) { /* find addressed unit */
+        uptr = mp_8m_dev.units + i;
+        org = uptr->u3;
+        len = uptr->capac - 1;
+        if ((addr >= org) && (addr < org + len)) {
+            *((uint8 *)(uptr->filebuf) + (addr - org)) = val & 0xFF;
+            if (mp_8m_dev.dctrl & DEBUG_write)
+                printf("\n");
+            return;
+        }
+    }
+    if (mp_8m_dev.dctrl & DEBUG_write)
+        printf("mp_8m_put_mbyte: Out of range\n");
+}
+
+/*  put a word into memory */
+
+void mp_8m_put_mword(int32 addr, int32 val)
+{
+    mp_8m_put_mbyte(addr, val >> 8);
+    mp_8m_put_mbyte(addr+1, val);
+}
+
+/* end of mp-8m.c */
diff --git a/swtp6800/common/mp-a.c b/swtp6800/common/mp-a.c
new file mode 100644
index 00000000..6dd77509
--- /dev/null
+++ b/swtp6800/common/mp-a.c
@@ -0,0 +1,211 @@
+/*  mp-a.c: SWTP MP-A M6800 CPU simulator
+
+    Copyright (c) 2011, William Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    The MP-A CPU Board contains the following devices [mp-a.c]:
+        M6800 processor [m6800.c].
+        M6810 128 byte RAM at 0xA000 [m6810.c].
+        M6830, SWTBUG, or custom boot ROM at 0xE000 [bootrom.c].
+        Interface to the SS-50 bus and the MP-B2 Mother Board for I/O 
+            and memory boards [mp-b2.c].
+        Note: The file names of the emulator source programs for each device are
+        contained in "[]".
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define UNIT_V_SWT      (UNIT_V_UF)      /* on SWTBUG, off MIKBUG */
+#define UNIT_SWT        (1 << UNIT_V_SWT)
+#define UNIT_V_RAM      (UNIT_V_UF+1)   /* off disables 6810 RAM */
+#define UNIT_RAM        (1 << UNIT_V_RAM)
+
+/* local global variables */
+
+/* function prototypes */
+
+int32 CPU_BD_get_mbyte(int32 addr);
+int32 CPU_BD_get_mword(int32 addr);
+void CPU_BD_put_mbyte(int32 addr, int32 val);
+void CPU_BD_put_mword(int32 addr, int32 val);
+
+/* external routines */
+
+/* MP-B2 bus routines */
+extern int32 MB_get_mbyte(int32 addr);
+extern int32 MB_get_mword(int32 addr);
+extern void MB_put_mbyte(int32 addr, int32 val);
+extern void MB_put_mword(int32 addr, int32 val);
+
+/* M6810 bus routines */
+extern int32 m6810_get_mbyte(int32 addr);
+extern void m6810_put_mbyte(int32 addr, int32 val);
+
+/* BOOTROM bus routines */
+extern UNIT BOOTROM_unit;
+extern int32 BOOTROM_get_mbyte(int32 offset);
+
+/* MP-A data structures
+
+   CPU_BD_dev        MP-A2 device descriptor
+   CPU_BD_unit       MP-A2 unit descriptor
+   CPU_BD_reg        MP-A2 register list
+   CPU_BD_mod        MP-A2 modifiers list */
+
+UNIT CPU_BD_unit = { UDATA (NULL, 0, 0) };
+
+REG CPU_BD_reg[] = {
+    { NULL }
+};
+
+MTAB CPU_BD_mod[] = {
+    { UNIT_SWT, UNIT_SWT, "SWT", "SWT", NULL },
+    { UNIT_SWT, 0, "NOSWT", "NOSWT", NULL },
+    { UNIT_RAM, UNIT_RAM, "RAM", "RAM", NULL },
+    { UNIT_RAM, 0, "NORAM", "NORAM", NULL },
+    { 0 }
+};
+
+DEBTAB CPU_BD_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE CPU_BD_dev = {
+    "MP-A",                             //name
+    &CPU_BD_unit,                       //units
+    CPU_BD_reg,                         //registers
+    CPU_BD_mod,                         //modifiers
+    1,                                  //numunits
+    16,                                 //aradix
+    16,                                 //awidth
+    1,                                  //aincr
+    16,                                 //dradix
+    8,                                  //dwidth
+    NULL,                               //examine
+    NULL,                               //deposit
+    NULL,                               //reset
+    NULL,                               //boot
+    NULL,                               //attach
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags
+    0,                                  //dctrl
+    CPU_BD_debug,                       /* debflags */
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+/*  get a byte from memory */
+
+int32 CPU_BD_get_mbyte(int32 addr)
+{
+    int32 val;
+
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mbyte: addr=%04X\n", addr);
+    switch(addr & 0xF000) {
+        case 0xA000:
+            if (CPU_BD_unit.flags & UNIT_RAM) {
+                val = m6810_get_mbyte(addr - 0xA000) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
+                return val;
+            } else {
+                val = MB_get_mbyte(addr) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
+                return val;
+            }
+        case 0xE000:
+            val = BOOTROM_get_mbyte(addr - 0xE000) & 0xFF;
+            if (CPU_BD_dev.dctrl & DEBUG_read)
+                printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
+            return val;
+        case 0xF000:
+            val = BOOTROM_get_mbyte(addr - (0x10000 - BOOTROM_unit.capac)) & 0xFF;
+            if (CPU_BD_dev.dctrl & DEBUG_read)
+                printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
+            return val;
+        default:
+            val = MB_get_mbyte(addr) & 0xFF;
+            if (CPU_BD_dev.dctrl & DEBUG_read)
+                printf("CPU_BD_get_mbyte: mp_b2 val=%02X\n", val);
+            return val;
+    }
+}
+
+/*  get a word from memory */
+
+int32 CPU_BD_get_mword(int32 addr)
+{
+    int32 val;
+
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mword: addr=%04X\n", addr);
+    val = (CPU_BD_get_mbyte(addr) << 8);
+    val |= CPU_BD_get_mbyte(addr+1);
+    val &= 0xFFFF;
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mword: val=%04X\n", val);
+    return val;
+}
+
+/*  put a byte to memory */
+
+void CPU_BD_put_mbyte(int32 addr, int32 val)
+{
+    if (CPU_BD_dev.dctrl & DEBUG_write)
+        printf("CPU_BD_put_mbyte: addr=%04X, val=%02X\n", addr, val);
+    switch(addr & 0xF000) {
+        case 0xA000:
+            if (CPU_BD_unit.flags & UNIT_RAM) {
+                m6810_put_mbyte(addr - 0xA000, val);
+                return;
+            } else {
+                MB_put_mbyte(addr, val);
+                return;
+            }
+        default:
+            MB_put_mbyte(addr, val);
+            return;
+    }
+}
+
+/*  put a word to memory */
+
+void CPU_BD_put_mword(int32 addr, int32 val)
+{
+    if (CPU_BD_dev.dctrl & DEBUG_write)
+        printf("CPU_BD_put_mword: addr=%04X, val=%04X\n", addr, val);
+    CPU_BD_put_mbyte(addr, val >> 8);
+    CPU_BD_put_mbyte(addr+1, val);
+}
+
+/* end of mp-a.c */
diff --git a/swtp6800/common/mp-a2.c b/swtp6800/common/mp-a2.c
new file mode 100644
index 00000000..21805dcb
--- /dev/null
+++ b/swtp6800/common/mp-a2.c
@@ -0,0 +1,263 @@
+/*  mp-a2.c: SWTP MP-A2 M6800 CPU simulator
+
+    Copyright (c) 2011, William Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+
+    The MP-A2 CPU Board contains the following devices [mp-a2.c]:
+        M6800 processor [m6800.c].
+        M6810 128 byte RAM at 0xA000 [m6810.c].
+        M6830, SWTBUG, or custom boot ROM at 0xE000 [bootrom.c].
+        4 ea 2716 EPROMs at either 0xC000, 0xC800, 0xD000 and 0xD800 (LO_PROM)or
+            0xE000, 0xE800, 0xF000 and 0xF800 (HI_PROM) [eprom.c].
+        Interface to the SS-50 bus and the MP-B2 Mother Board for I/O 
+            and memory boards [mp-b2.c].
+        Note: The file names of the emulator source programs for each device are
+        contained in "[]".
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define UNIT_V_USER_D   (UNIT_V_UF)     /* user defined switch */
+#define UNIT_USER_D     (1 << UNIT_V_USER_D)
+#define UNIT_V_4K_8K    (UNIT_V_UF+1)   /* off if HI_PROM and only 2K EPROM */
+#define UNIT_4K_8K      (1 << UNIT_V_4K_8K)
+#define UNIT_V_SWT      (UNIT_V_UF+2)   /* on SWTBUG, off MIKBUG */
+#define UNIT_SWT        (1 << UNIT_V_SWT)
+#define UNIT_V_8K       (UNIT_V_UF+3)   /* off if HI_PROM and only 2K or 4k EPROM */
+#define UNIT_8K         (1 << UNIT_V_8K)
+#define UNIT_V_RAM      (UNIT_V_UF+4)   /* off disables 6810 RAM */
+#define UNIT_RAM        (1 << UNIT_V_RAM)
+#define UNIT_V_LO_PROM  (UNIT_V_UF+5)   /* on EPROMS @ C000-CFFFH, off no EPROMS */
+#define UNIT_LO_PROM    (1 << UNIT_V_LO_PROM)
+#define UNIT_V_HI_PROM  (UNIT_V_UF+6)   /* on EPROMS @ F000-FFFFH, off fo LO_PROM, MON, or no EPROMS */
+#define UNIT_HI_PROM    (1 << UNIT_V_HI_PROM)
+#define UNIT_V_MON      (UNIT_V_UF+7)   /* on for monitor vectors in high memory */
+#define UNIT_MON        (1 << UNIT_V_MON)
+
+/* local global variables */
+
+/* function prototypes */
+
+int32 get_base(void);
+int32 CPU_BD_get_mbyte(int32 addr);
+int32 CPU_BD_get_mword(int32 addr);
+void CPU_BD_put_mbyte(int32 addr, int32 val);
+void CPU_BD_put_mword(int32 addr, int32 val);
+
+/* external routines */
+
+/* MP-B2 bus routines */
+extern int32 MB_get_mbyte(int32 addr);
+extern int32 MB_get_mword(int32 addr);
+extern void MB_put_mbyte(int32 addr, int32 val);
+extern void MB_put_mword(int32 addr, int32 val);
+
+/* M6810 bus routines */
+extern int32 m6810_get_mbyte(int32 addr);
+extern void m6810_put_mbyte(int32 addr, int32 val);
+
+/* BOOTROM bus routines */
+extern UNIT BOOTROM_unit;
+extern int32 BOOTROM_get_mbyte(int32 offset);
+
+/* I2716 bus routines */
+extern int32 i2716_get_mbyte(int32 offset);
+
+/* MP-A2 data structures
+
+   CPU_BD_dev        MP-A2 device descriptor
+   CPU_BD_unit       MP-A2 unit descriptor
+   CPU_BD_reg        MP-A2 register list
+   CPU_BD_mod        MP-A2 modifiers list */
+
+UNIT CPU_BD_unit = { UDATA (NULL, 0, 0) };
+
+REG CPU_BD_reg[] = {
+    { NULL }
+};
+
+MTAB CPU_BD_mod[] = {
+    { UNIT_USER_D, UNIT_USER_D, "USER_D", "USER_D", NULL },
+    { UNIT_USER_D, 0, "NOUSER_D", "NOUSER_D", NULL },
+    { UNIT_4K_8K, UNIT_4K_8K, "4K_8K", "4K_8K", NULL },
+    { UNIT_4K_8K, 0, "NO4K_8K", "NO4K_8K", NULL },
+    { UNIT_SWT, UNIT_SWT, "SWT", "SWT", NULL },
+    { UNIT_SWT, 0, "NOSWT", "NOSWT", NULL },
+    { UNIT_8K, UNIT_8K, "8K", "8K", NULL },
+    { UNIT_8K, 0, "NO8K", "NO8K", NULL },
+    { UNIT_RAM, UNIT_RAM, "RAM", "RAM", NULL },
+    { UNIT_RAM, 0, "NORAM", "NORAM", NULL },
+    { UNIT_LO_PROM, UNIT_LO_PROM, "LO_PROM", "LO_PROM", NULL },
+    { UNIT_LO_PROM, 0, "NOLO_PROM", "NOLO_PROM", NULL },
+    { UNIT_HI_PROM, UNIT_HI_PROM, "HI_PROM", "HI_PROM", NULL },
+    { UNIT_HI_PROM, 0, "NOHI_PROM", "NOHI_PROM", NULL },
+    { UNIT_MON, UNIT_MON, "MON", "MON", NULL },
+    { UNIT_MON, 0, "NOMON", "NOMON", NULL },
+    { 0 }
+};
+
+DEBTAB CPU_BD_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE CPU_BD_dev = {
+    "MP-A2",                            //name
+    &CPU_BD_unit,                        //units
+    CPU_BD_reg,                          //registers
+    CPU_BD_mod,                          //modifiers
+    1,                                  //numunits
+    16,                                 //aradix 
+    16,                                 //awidth 
+    1,                                  //aincr 
+    16,                                 //dradix 
+    8,                                  //dwidth
+    NULL,                               //examine 
+    NULL,                               //deposit 
+    NULL,                               //reset
+    NULL,                               //boot
+    NULL,                               //attach 
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags 
+    0,                                  //dctrl 
+    CPU_BD_debug,                       /* debflags */
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+/*  get base address of 2716's */
+
+int32 get_base(void)
+{
+    if (CPU_BD_unit.flags & UNIT_LO_PROM)
+        return 0xC000;
+    else if (CPU_BD_unit.flags & UNIT_HI_PROM)
+        return 0xF000;
+    return 0;
+}
+
+/*  get a byte from memory */
+
+int32 CPU_BD_get_mbyte(int32 addr)
+{
+    int32 val;
+
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mbyte: addr=%04X\n", addr);
+    switch(addr & 0xF000) {
+        case 0xA000:
+            if (CPU_BD_unit.flags & UNIT_RAM) {
+                val = m6810_get_mbyte(addr - 0xA000) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
+                return val;
+            } else {
+                val = MB_get_mbyte(addr) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
+                return val;
+            }
+        case 0xC000:
+            if (CPU_BD_unit.flags & UNIT_LO_PROM) {
+                val = i2716_get_mbyte(addr - 0xC000) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: 2716=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+            break;
+        case 0xE000:
+            val = BOOTROM_get_mbyte(addr - 0xE000) & 0xFF;
+            if (CPU_BD_dev.dctrl & DEBUG_read)
+                printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
+            return val;
+        case 0xF000:
+            if (CPU_BD_unit.flags & UNIT_MON) {
+                val = BOOTROM_get_mbyte(addr - (0x10000 - BOOTROM_unit.capac)) & 0xFF;
+                if (CPU_BD_dev.dctrl & DEBUG_read)
+                    printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
+                return val;
+            }
+        default:
+            val = MB_get_mbyte(addr) & 0xFF;
+            if (CPU_BD_dev.dctrl & DEBUG_read)
+                printf("CPU_BD_get_mbyte: mp_b2 val=%02X\n", val);
+            return val;
+    }
+}
+
+/*  get a word from memory */
+
+int32 CPU_BD_get_mword(int32 addr)
+{
+    int32 val;
+
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mword: addr=%04X\n", addr);
+    val = (CPU_BD_get_mbyte(addr) << 8);
+    val |= CPU_BD_get_mbyte(addr+1);
+    val &= 0xFFFF;
+    if (CPU_BD_dev.dctrl & DEBUG_read)
+        printf("CPU_BD_get_mword: val=%04X\n", val);
+    return val;
+}
+
+/*  put a byte to memory */
+
+void CPU_BD_put_mbyte(int32 addr, int32 val)
+{
+    if (CPU_BD_dev.dctrl & DEBUG_write)
+        printf("CPU_BD_put_mbyte: addr=%04X, val=%02X\n", addr, val);
+    switch(addr & 0xF000) {
+        case 0xA000:
+            if (CPU_BD_unit.flags & UNIT_RAM) {
+                m6810_put_mbyte(addr - 0xA000, val);
+                return;
+            } else {
+                MB_put_mbyte(addr, val);
+                return;
+            }
+        default:
+            MB_put_mbyte(addr, val);
+            return;
+    }
+}
+
+/*  put a word to memory */
+
+void CPU_BD_put_mword(int32 addr, int32 val)
+{
+    if (CPU_BD_dev.dctrl & DEBUG_write)
+        printf("CPU_BD_put_mword: addr=%04X, val=%04X\n", addr, val);
+    CPU_BD_put_mbyte(addr, val >> 8);
+    CPU_BD_put_mbyte(addr+1, val);
+}
+
+/* end of mp-a2.c */
diff --git a/swtp6800/common/mp-b2.c b/swtp6800/common/mp-b2.c
new file mode 100644
index 00000000..7b93d7d5
--- /dev/null
+++ b/swtp6800/common/mp-b2.c
@@ -0,0 +1,322 @@
+/*  mp-b2.c: SWTP SS-50/SS-30 MP-B2 Mother Board
+
+    Copyright (c) 2011, William A. Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not be
+    used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+*/
+
+#include <stdio.h>
+#include "swtp_defs.h"
+
+#define UNIT_V_RAM_0000   (UNIT_V_UF)   /* MP-8M board 0 enable */
+#define UNIT_RAM_0000     (1 << UNIT_V_RAM_0000)
+#define UNIT_V_RAM_2000   (UNIT_V_UF+1) /* MP-8M board 1 enable */
+#define UNIT_RAM_2000     (1 << UNIT_V_RAM_2000)
+#define UNIT_V_RAM_4000   (UNIT_V_UF+2) /* MP-8M board 2 enable */
+#define UNIT_RAM_4000     (1 << UNIT_V_RAM_4000)
+#define UNIT_V_RAM_6000   (UNIT_V_UF+3) /* MP-8M board 3 enable */
+#define UNIT_RAM_6000     (1 << UNIT_V_RAM_6000)
+#define UNIT_V_RAM_A000   (UNIT_V_UF+4) /* MP-8M board 4 enable */
+#define UNIT_RAM_A000     (1 << UNIT_V_RAM_A000)
+#define UNIT_V_RAM_C000   (UNIT_V_UF+5) /* MP-8M board 5 enable */
+#define UNIT_RAM_C000     (1 << UNIT_V_RAM_C000)
+
+/* function prototypes */
+
+/* empty I/O device routine */
+int32 nulldev(int32 io, int32 data);
+
+/* SS-50 bus routines */
+int32 MB_get_mbyte(int32 addr);
+int32 MB_get_mword(int32 addr);
+void MB_put_mbyte(int32 addr, int32 val);
+void MB_put_mword(int32 addr, int32 val);
+
+/* MP-8M bus routines */
+extern int32 mp_8m_get_mbyte(int32 addr);
+extern void mp_8m_put_mbyte(int32 addr, int32 val);
+
+/* SS-50 I/O address space functions */
+
+/* MP-S serial I/O routines */
+extern int32 sio0s(int32 io, int32 data);
+extern int32 sio0d(int32 io, int32 data);
+extern int32 sio1s(int32 io, int32 data);
+extern int32 sio1d(int32 io, int32 data);
+
+/* DC-4 FDC I/O routines */
+extern int32 fdcdrv(int32 io, int32 data);
+extern int32 fdccmd(int32 io, int32 data);
+extern int32 fdctrk(int32 io, int32 data);
+extern int32 fdcsec(int32 io, int32 data);
+extern int32 fdcdata(int32 io, int32 data);
+
+/* This is the I/O configuration table.  There are 32 possible
+device addresses, if a device is plugged into a port it's routine
+address is here, 'nulldev' means no device is available
+*/
+
+struct idev {
+        int32 (*routine)();
+};
+
+struct idev dev_table[32] = {
+        {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /*Port 0 8000-8003 */
+        {&sio0s},   {&sio0d},   {&sio1s},   {&sio1d},   /*Port 1 8004-8007 */
+/* sio1x routines just return the last value read on the matching
+   sio0x routine.  SWTBUG tests for the MP-C with most port reads! */
+        {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /*Port 2 8008-800B*/
+        {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /*Port 3 800C-800F*/
+        {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /*Port 4 8010-8013*/
+        {&fdcdrv},  {&nulldev}, {&nulldev}, {&nulldev}, /*Port 5 8014-8017*/
+        {&fdccmd},  {&fdctrk},  {&fdcsec},  {&fdcdata}, /*Port 6 8018-801B*/
+        {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}  /*Port 7 801C-801F*/
+};
+
+/* dummy i/o device */
+
+int32 nulldev(int32 io, int32 data)
+{
+    if (io == 0)
+        return (0xFF);
+    return 0;
+}
+
+/* Mother Board data structures
+
+    MB_dev        Mother Board device descriptor
+    MB_unit       Mother Board unit descriptor
+    MB_reg        Mother Board register list
+    MB_mod        Mother Board modifiers list
+*/
+
+UNIT MB_unit = { 
+    UDATA (NULL, 0, 0)
+};
+
+REG MB_reg[] = {
+    { NULL }
+};
+
+MTAB MB_mod[] = {
+    { UNIT_RAM_0000, UNIT_RAM_0000, "BD0 On", "BD0", NULL },
+    { UNIT_RAM_0000, 0, "BD0 Off", "NOBD0", NULL },
+    { UNIT_RAM_2000, UNIT_RAM_2000, "BD1 On", "BD1", NULL },
+    { UNIT_RAM_2000, 0, "BD1 Off", "NOBD1", NULL },
+    { UNIT_RAM_4000, UNIT_RAM_4000, "BD2 On", "BD2", NULL },
+    { UNIT_RAM_4000, 0, "BD2 Off", "NOBD2", NULL },
+    { UNIT_RAM_6000, UNIT_RAM_6000, "BD3 On", "BD3", NULL },
+    { UNIT_RAM_6000, 0, "BD3 Off", "NOBD3", NULL },
+    { UNIT_RAM_A000, UNIT_RAM_A000, "BD4 On", "BD4", NULL },
+    { UNIT_RAM_A000, 0, "BD4 Off", "NOBD4", NULL },
+    { UNIT_RAM_C000, UNIT_RAM_C000, "BD5 On", "BD5", NULL },
+    { UNIT_RAM_C000, 0, "BD5 Off", "NOBD5", NULL },
+    { 0 }
+};
+
+DEBTAB MB_debug[] = {
+    { "ALL", DEBUG_all },
+    { "FLOW", DEBUG_flow },
+    { "READ", DEBUG_read },
+    { "WRITE", DEBUG_write },
+    { "LEV1", DEBUG_level1 },
+    { "LEV2", DEBUG_level2 },
+    { NULL }
+};
+
+DEVICE MB_dev = {
+    "MP-B2",                            //name
+    &MB_unit,                           //units
+    MB_reg,                             //registers
+    MB_mod,                             //modifiers
+    1,                                  //numunits
+    16,                                 //aradix
+    16,                                 //awidth
+    1,                                  //aincr
+    16,                                 //dradix
+    8,                                  //dwidth
+    NULL,                               //examine
+    NULL,                               //deposit
+    NULL,                               //reset
+    NULL,                               //boot
+    NULL,                               //attach
+    NULL,                               //detach
+    NULL,                               //ctxt
+    DEV_DEBUG,                          //flags
+    0,                                  //dctrl
+    MB_debug,                           /* debflags */
+    NULL,                               //msize
+    NULL                                //lname
+};
+
+/*  get a byte from memory */
+
+int32 MB_get_mbyte(int32 addr)
+{
+    int32 val;
+
+    if (MB_dev.dctrl & DEBUG_read)
+        printf("MB_get_mbyte: addr=%04X\n", addr);
+    switch(addr & 0xF000) {
+        case 0x0000:
+        case 0x1000:
+            if (MB_unit.flags & UNIT_RAM_0000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        case 0x2000:
+        case 0x3000:
+            if (MB_unit.flags & UNIT_RAM_2000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        case 0x4000:
+        case 0x5000:
+            if (MB_unit.flags & UNIT_RAM_4000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        case 0x6000:
+        case 0x7000:
+            if (MB_unit.flags & UNIT_RAM_6000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        case 0x8000:
+            val = (dev_table[addr - 0x8000].routine(0, 0)) & 0xFF;
+            if (MB_dev.dctrl & DEBUG_read)
+                printf("MB_get_mbyte: I/O addr=%04X val=%02X\n", addr, val);
+            return val;
+        case 0xA000:
+        case 0xB000:
+            if (MB_unit.flags & UNIT_RAM_A000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        case 0xC000:
+        case 0xD000:
+            if (MB_unit.flags & UNIT_RAM_C000) {
+                val = mp_8m_get_mbyte(addr) & 0xFF;
+                if (MB_dev.dctrl & DEBUG_read)
+                    printf("MB_get_mbyte: mp_8m val=%02X\n", val);
+                return val;
+            } else
+                return 0xFF;
+        default:
+            return 0xFF;
+    }
+}
+
+/*  get a word from memory */
+
+int32 MB_get_mword(int32 addr)
+{
+    int32 val;
+
+
+    if (MB_dev.dctrl & DEBUG_read)
+        printf("MB_get_mword: addr=%04X\n", addr);
+    val = (MB_get_mbyte(addr) << 8);
+    val |= MB_get_mbyte(addr+1);
+    val &= 0xFFFF;
+    if (MB_dev.dctrl & DEBUG_read)
+        printf("MB_get_mword: val=%04X\n", val);
+    return val;
+}
+
+/*  put a byte to memory */
+
+void MB_put_mbyte(int32 addr, int32 val)
+{
+    if (MB_dev.dctrl & DEBUG_write)
+        printf("MB_put_mbyte: addr=%04X, val=%02X\n", addr, val);
+    switch(addr & 0xF000) {
+        case 0x0000:
+        case 0x1000:
+            if (MB_unit.flags & UNIT_RAM_0000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        case 0x2000:
+        case 0x3000:
+            if (MB_unit.flags & UNIT_RAM_2000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        case 0x4000:
+        case 0x5000:
+            if (MB_unit.flags & UNIT_RAM_4000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        case 0x6000:
+        case 0x7000:
+            if (MB_unit.flags & UNIT_RAM_6000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        case 0x8000:
+            dev_table[addr - 0x8000].routine(1, val);
+            return;
+        case 0xA000:
+        case 0xB000:
+            if (MB_unit.flags & UNIT_RAM_A000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        case 0xC000:
+        case 0xD000:
+            if (MB_unit.flags & UNIT_RAM_C000) {
+                mp_8m_put_mbyte(addr, val);
+                return;
+            }
+        default:
+            return;
+    }
+}
+
+/*  put a word to memory */
+
+void MB_put_mword(int32 addr, int32 val)
+{
+    if (MB_dev.dctrl & DEBUG_write)
+        printf("MB_ptt_mword: addr=%04X, val=%04X\n", addr, val);
+    MB_put_mbyte(addr, val >> 8);
+    MB_put_mbyte(addr+1, val);
+}
+
+/* end of mp-b2.c */
diff --git a/swtp6800/common/mp-s.c b/swtp6800/common/mp-s.c
new file mode 100644
index 00000000..6c9c12a3
--- /dev/null
+++ b/swtp6800/common/mp-s.c
@@ -0,0 +1,330 @@
+/*  mp-s.c: SWTP MP-S serial I/O card emulator
+
+    Copyright (c) 2005-2011, William Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    Willaim Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+   
+    These functions support a simulated SWTP MP-S interface card.
+    The card contains one M6850 ACIA.  The ACIA implements one complete
+    serial port.  It provides 7 or 8-bit ASCII RS-232 interface to Terminals
+    or 20 mA current loop interface to a model 33 or 37 Teletype.  It is not
+    compatible with baudot Teletypes.  Baud rates from 110 to 1200 are
+    switch selectable from S! on the MP-S. The ACIA ports appear at all 
+    4 addresses.  This fact is used by SWTBUG to determine the presence of the 
+    MP-S vice MP-C serial card.  The ACIA interrupt request line can be connected
+    to the IRQ or NMI interrupt lines by a jumper on the MP-S.
+
+    All I/O is via either programmed I/O or interrupt controlled I/O.
+    It has a status port and a data port.  A write to the status port
+    can select some options for the device (0x03 will reset the port).
+    A read of the status port gets the port status:
+
+    +---+---+---+---+---+---+---+---+
+    | I | P | O | F |CTS|DCD|TXE|RXF|
+    +---+---+---+---+---+---+---+---+
+
+    RXF - A 1 in this bit position means a character has been received
+    	  on the data port and is ready to be read.
+    TXE - A 1 in this bit means the port is ready to receive a character
+    	  on the data port and transmit it out over the serial line.
+ 
+    A read to the data port gets the buffered character, a write
+    to the data port writes the character to the device.
+*/
+
+#include    <stdio.h>
+#include    <ctype.h>
+#include    "swtp_defs.h"
+
+#define UNIT_V_TTY  (UNIT_V_UF)         // TTY or ANSI mode
+#define UNIT_TTY   (1 << UNIT_V_TTY)
+
+/* local global variables */
+
+int32 ptr_stopioe = 0;                  // stop on error
+int32 ptp_stopioe = 0;                  // stop on error
+int32 odata;
+int32 status;
+
+int32 ptp_flag = 0;
+int32 ptr_flag = 0;
+
+/* function prototypes */
+
+t_stat sio_svc (UNIT *uptr);
+t_stat ptr_svc (UNIT *uptr);
+t_stat ptp_svc (UNIT *uptr);
+t_stat sio_reset (DEVICE *dptr);
+t_stat ptr_reset (DEVICE *dptr);
+t_stat ptp_reset (DEVICE *dptr);
+int32 sio0s(int32 io, int32 data);
+int32 sio0d(int32 io, int32 data);
+int32 sio1s(int32 io, int32 data);
+int32 sio1d(int32 io, int32 data);
+
+/* sio data structures
+
+   sio_dev        SIO device descriptor
+   sio_unit       SIO unit descriptor
+   sio_reg        SIO register list
+   sio_mod        SIO modifiers list */
+
+UNIT sio_unit = { UDATA (&sio_svc, 0, 0), KBD_POLL_WAIT
+};
+
+REG sio_reg[] = {
+    { ORDATA (DATA, sio_unit.buf, 8) },
+    { ORDATA (STAT, sio_unit.u3, 8) },
+    { NULL }
+};
+
+MTAB sio_mod[] = {
+    { UNIT_TTY, UNIT_TTY, "TTY", "TTY", NULL },
+    { UNIT_TTY, 0, "ANSI", "ANSI", NULL },
+    { 0 }
+};
+
+DEVICE sio_dev = {
+    "MP-S", &sio_unit, sio_reg, sio_mod,
+    1, 10, 31, 1, 8, 8,
+    NULL, NULL, &sio_reset,
+    NULL, NULL, NULL
+};
+
+/* paper tape reader data structures
+
+   ptr_dev        PTR device descriptor
+   ptr_unit       PTR unit descriptor
+   ptr_reg        PTR register list
+   ptr_mod        PTR modifiers list */
+
+UNIT ptr_unit = { UDATA (&ptr_svc, UNIT_SEQ + UNIT_ATTABLE, 0), KBD_POLL_WAIT
+};
+
+DEVICE ptr_dev = {
+    "PTR", &ptr_unit, NULL, NULL,
+    1, 10, 31, 1, 8, 8,
+    NULL, NULL, &ptr_reset,
+    NULL, NULL, NULL
+};
+
+/* paper tape punch data structures
+
+   ptp_dev        PTP device descriptor
+   ptp_unit       PTP unit descriptor
+   ptp_reg        PTP register list
+   ptp_mod        PTP modifiers list */
+
+UNIT ptp_unit = { UDATA (&ptp_svc, UNIT_SEQ + UNIT_ATTABLE, 0), KBD_POLL_WAIT
+};
+DEVICE ptp_dev = {
+    "PTP", &ptp_unit, NULL, NULL,
+    1, 10, 31, 1, 8, 8,
+    NULL, NULL, &ptp_reset,
+    NULL, NULL, NULL
+};
+
+/* console input service routine */
+
+int32 sio_svc (UNIT *uptr)
+{
+    int32 temp;
+
+    sim_activate (&sio_unit, sio_unit.wait); // continue poll
+    if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
+        return temp;                    // no char or error?
+    sio_unit.buf = temp & 0xFF;         // Save char
+    sio_unit.u3 |= 0x01;                // Set RXF flag
+    /* Do any special character handling here */
+    sio_unit.pos++;                     // step character count
+    return SCPE_OK;
+}
+
+/* paper tape reader input service routine */
+
+int32 ptr_svc (UNIT *uptr)
+{
+    int32 temp;
+
+    sim_activate (&ptr_unit, ptr_unit.wait); // continue poll
+    if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
+        return temp;                    // no char or error?
+    ptr_unit.buf = temp & 0xFF;         // Save char
+    ptr_unit.u3 |= 0x01;                // Set RXF flag
+    /* Do any special character handling here */
+    ptr_unit.pos++;                     // step character count
+    return SCPE_OK;
+}
+
+/* paper tape punch output service routine */
+
+int32 ptp_svc (UNIT *uptr)
+{
+    return SCPE_OK;
+}
+
+/* Reset console */
+
+int32 sio_reset (DEVICE *dptr)
+{
+    sio_unit.buf = 0;                   // Data buffer
+    sio_unit.u3 = 0x02;                 // Status buffer
+    sim_activate (&sio_unit, sio_unit.wait); // activate unit
+    return SCPE_OK;
+}
+
+/* Reset paper tape reader */
+
+int32 ptr_reset (DEVICE *dptr)
+{
+    ptr_unit.buf = 0;
+    ptr_unit.u3 = 0x02;
+    sim_activate (&ptr_unit, ptr_unit.wait); // activate unit
+//    sim_cancel (&ptr_unit);             // deactivate unit
+    return SCPE_OK;
+}
+
+/* Reset paper tape punch */
+
+int32 ptp_reset (DEVICE *dptr)
+{
+    ptp_unit.buf = 0;
+    ptp_unit.u3 = 0x02;
+    sim_activate (&ptp_unit, ptp_unit.wait); // activate unit
+//    sim_cancel (&ptp_unit);             // deactivate unit
+    return SCPE_OK;
+}
+
+/*  I/O instruction handlers, called from the MP-B2 module when a
+   read or write occur to addresses 0x8004-0x8007. */
+
+int32 sio0s(int32 io, int32 data)
+{
+    if (io == 0) {                      // control register read
+        if (ptr_flag) {                 // reader enabled?
+            if ((ptr_unit.flags & UNIT_ATT) == 0) { // attached?
+                ptr_unit.u3 &= 0xFE;    // no, clear RXF flag 
+                ptr_flag = 0;           // clear reader flag
+                printf("Reader not attached to file\n");
+            } else {                    // attached
+                if (feof(ptr_unit.fileref)) { // EOF
+                    ptr_unit.u3 &= 0xFE; // clear RXF flag
+                    ptr_flag = 0;       // clear reader flag
+                } else                  // not EOF
+                    ptr_unit.u3 |= 0x01; // set ready
+            }
+            return (status = ptr_unit.u3); // return ptr status
+        } else {
+            return (status = sio_unit.u3); // return console status
+        }
+    } else {                            // control register write
+        if (data == 0x03) {             // reset port!
+            sio_unit.u3 = 0x02;         // reset console
+            sio_unit.buf = 0;
+            sio_unit.pos = 0;
+            ptr_unit.u3 = 0x02;         // reset reader
+            ptr_unit.buf = 0;
+            ptr_unit.pos = 0;
+            ptp_unit.u3 = 0x02;         // reset punch
+            ptp_unit.buf = 0;
+            ptp_unit.pos = 0;
+        }
+    return (status = 0);                // invalid io
+    }
+}
+
+int32 sio0d(int32 io, int32 data)
+{
+    if (io == 0) {                      // data register read
+        if (ptr_flag) {                 // RDR enabled?
+            if ((ptr_unit.flags & UNIT_ATT) == 0) // attached?
+                return 0;               // no, done
+//          printf("ptr_unit.u3=%02X\n", ptr_unit.u3);
+            if ((ptr_unit.u3 & 0x01) == 0) { // yes, more data?
+//              printf("Returning old %02X\n", odata); // no, return previous byte
+                return (odata & 0xFF);
+            }
+            if ((odata = getc(ptr_unit.fileref)) == EOF) { // end of file?
+//              printf("Got EOF\n");
+                ptr_unit.u3 &= 0xFE;    // clear RXF flag	
+                return (odata = 0);     // no data
+            }
+//          printf("Returning new %02X\n", odata);
+            ptr_unit.pos++;             // step character count
+            ptr_unit.u3 &= 0xFE;        // clear RXF flag	
+            return (odata & 0xFF);      // return character
+        } else {
+            sio_unit.u3 &= 0xFE;        // clear RXF flag
+            return (odata = sio_unit.buf); // return next char
+        }
+    } else {                            // data register write
+        if (isprint(data) || data == '\r' || data == '\n') { // printable?
+            sim_putchar(data);          // print character on console
+            if (ptp_flag && ptp_unit.flags & UNIT_ATT) { // PTP enabled & attached?
+                putc(data, ptp_unit.fileref);
+                ptp_unit.pos++;         // step character counter
+            }
+        } else {                        // DC1-DC4 control Reader/Punch
+            switch (data) {
+                case 0x11:              // PTR on
+                    ptr_flag = 1;
+                    ptr_unit.u3 |= 0x01;
+//                    printf("Reader on\n");
+                    break;
+                case 0x12:              // PTP on
+                    ptp_flag = 1;
+                    ptp_unit.u3 |= 0x02;
+//                    printf("Punch on\n");
+                    break;
+                case 0x13:              // PTR off
+                    ptr_flag = 0;
+//                    printf("Reader off-%d bytes read\n", ptr_unit.pos);
+                    break;
+                case 0x14:              // PTP off
+                    ptp_flag = 0;
+//                    printf("Punch off-%d bytes written\n", ptp_unit.pos);
+                    break;
+                default:                // ignore all other characters
+                    break;
+            }
+        }
+    }
+    return (odata = 0);
+}
+
+/*	because each port appears at 2 addresses and this fact is used
+	to determine if it is a MP-C or MP-S repeatedly in the SWTBUG
+	monitor, this code assures that reads of the high ports return
+	the same data as was read the last time on the low ports.
+*/
+
+int32 sio1s(int32 io, int32 data)
+{
+    return status;
+}
+
+int32 sio1d(int32 io, int32 data)
+{
+    return odata;
+}
+
+/* end of mp-s.c */
\ No newline at end of file
diff --git a/swtp6800/swtp6800/mp-a2_sys.c b/swtp6800/swtp6800/mp-a2_sys.c
new file mode 100644
index 00000000..8a043061
--- /dev/null
+++ b/swtp6800/swtp6800/mp-a2_sys.c
@@ -0,0 +1,87 @@
+/*  mp-a_sys.c: SWTP 6800 system interface
+
+    Copyright (c) 2005, William Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+*/
+
+#include <ctype.h>
+#include <string.h>
+#include "swtp_defs.h"
+
+/* externals */
+
+extern DEVICE CPU_BD_dev;
+extern DEVICE m6800_dev;
+extern REG m6800_reg[];
+extern DEVICE BOOTROM_dev;
+extern DEVICE m6810_dev;
+extern DEVICE i2716_dev;
+
+extern DEVICE MB_dev;
+extern DEVICE sio_dev;
+extern DEVICE ptr_dev;
+extern DEVICE ptp_dev;
+extern DEVICE mp_8m_dev;
+extern DEVICE dsk_dev;
+
+/* SCP data structures
+
+   sim_name		simulator name string
+   sim_PC		pointer to saved PC register descriptor
+   sim_emax		number of words needed for examine
+   sim_devices		array of pointers to simulated devices
+   sim_stop_messages	array of pointers to stop messages
+   sim_load		binary loader
+*/
+
+char sim_name[] = "SWTP 6800, V2, MP-A2 CPU Board";
+
+REG *sim_PC = &m6800_reg[0];
+
+int32 sim_emax = 4;
+
+DEVICE *sim_devices[] = {
+    &CPU_BD_dev,
+    &m6800_dev,
+    &BOOTROM_dev,
+    &m6810_dev,
+    &i2716_dev,
+    &MB_dev,
+    &sio_dev,
+    &ptr_dev,
+    &ptp_dev,
+    &mp_8m_dev,
+    &dsk_dev,
+    NULL
+};
+
+const char *sim_stop_messages[] = {
+    "Unknown error",
+    "Unknown I/O Instruction",
+    "HALT instruction",
+    "Breakpoint",
+    "Invalid Opcode",
+    "Invalid Memory" 
+};
+
+/* end of mp-a_sys.c */
diff --git a/swtp6800/swtp6800/mp-a_sys.c b/swtp6800/swtp6800/mp-a_sys.c
new file mode 100644
index 00000000..4460b781
--- /dev/null
+++ b/swtp6800/swtp6800/mp-a_sys.c
@@ -0,0 +1,85 @@
+/*  mp-a_sys.c: SWTP 6800 system interface
+
+    Copyright (c) 2005, William Beech
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and associated documentation files (the "Software"),
+    to deal in the Software without restriction, including without limitation
+    the rights to use, copy, modify, merge, publish, distribute, sublicense,
+    and/or sell copies of the Software, and to permit persons to whom the
+    Software is furnished to do so, subject to the following conditions:
+
+    The above copyright notice and this permission notice shall be included in
+    all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+    WILLIAM A BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+    Except as contained in this notice, the name of William A. Beech shall not
+    be used in advertising or otherwise to promote the sale, use or other dealings
+    in this Software without prior written authorization from William A. Beech.
+*/
+
+#include <ctype.h>
+#include <string.h>
+#include "swtp_defs.h"
+
+/* externals */
+
+extern DEVICE CPU_BD_dev;
+extern DEVICE m6800_dev;
+extern REG m6800_reg[];
+extern DEVICE BOOTROM_dev;
+extern DEVICE m6810_dev;
+
+extern DEVICE MB_dev;
+extern DEVICE sio_dev;
+extern DEVICE ptr_dev;
+extern DEVICE ptp_dev;
+extern DEVICE mp_8m_dev;
+extern DEVICE dsk_dev;
+
+/* SCP data structures
+
+   sim_name		simulator name string
+   sim_PC		pointer to saved PC register descriptor
+   sim_emax		number of words needed for examine
+   sim_devices		array of pointers to simulated devices
+   sim_stop_messages	array of pointers to stop messages
+   sim_load		binary loader
+*/
+
+char sim_name[] = "SWTP 6800, V2, MP-A CPU Board";
+
+REG *sim_PC = &m6800_reg[0];
+
+int32 sim_emax = 4;
+
+DEVICE *sim_devices[] = {
+    &CPU_BD_dev,
+    &m6800_dev,
+    &BOOTROM_dev,
+    &m6810_dev,
+    &MB_dev,
+    &sio_dev,
+    &ptr_dev,
+    &ptp_dev,
+    &mp_8m_dev,
+    &dsk_dev,
+    NULL
+};
+
+const char *sim_stop_messages[] = {
+    "Unknown error",
+    "Unknown I/O Instruction",
+    "HALT instruction",
+    "Breakpoint",
+    "Invalid Opcode",
+    "Invalid Memory" 
+};
+
+/* end of mp-a_sys.c */
diff --git a/swtp6800/swtp6800/swtbug.bin b/swtp6800/swtp6800/swtbug.bin
new file mode 100644
index 00000000..8cef56ad
Binary files /dev/null and b/swtp6800/swtp6800/swtbug.bin differ
diff --git a/swtp6800/swtp6800/swtp6800mp-a.ini b/swtp6800/swtp6800/swtp6800mp-a.ini
new file mode 100644
index 00000000..7b775df0
--- /dev/null
+++ b/swtp6800/swtp6800/swtp6800mp-a.ini
@@ -0,0 +1,8 @@
+set bootrom 2708
+attach bootrom swtbug.bin
+set cpu hex
+set cpu itrap
+set cpu mtrap
+reset
+set mp-b2 bd0, bd1, bd2, bd3, bd4, bd5
+g
diff --git a/swtp6800/swtp6800/swtp6800mp-a2.ini b/swtp6800/swtp6800/swtp6800mp-a2.ini
new file mode 100644
index 00000000..5f26385a
--- /dev/null
+++ b/swtp6800/swtp6800/swtp6800mp-a2.ini
@@ -0,0 +1,9 @@
+set bootrom 2708
+attach bootrom swtbug.bin
+set mp-a2 mon, lo_prom
+set cpu hex
+set cpu itrap
+set cpu mtrap
+reset
+set mp-b2 bd0, bd1, bd2, bd3, bd4, bd5
+g
diff --git a/swtp/swtp_defs.h b/swtp6800/swtp6800/swtp_defs.h
similarity index 64%
rename from swtp/swtp_defs.h
rename to swtp6800/swtp6800/swtp_defs.h
index 42bb2e3a..6b286405 100644
--- a/swtp/swtp_defs.h
+++ b/swtp6800/swtp6800/swtp_defs.h
@@ -1,6 +1,6 @@
 /* swtp_defs.h: SWTP 6800 simulator definitions
 
-Copyright (c) 2005, 2007, William Beech
+Copyright (c) 2005-2012, William Beech
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -22,25 +22,34 @@ Copyright (c) 2005, 2007, William Beech
    Except as contained in this notice, the name of William A Beech shall not
    be used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from William A Beech.
-
-   Based on work by Charles E Owen (c) 1997 and Peter Schorn (c) 2002-2005
-
 */
 
-#include "sim_defs.h"				// simulator defs
+#include <ctype.h>
+#include "sim_defs.h"             // simulator defs
 
 /* Memory */
 
-#define MAXMEMSIZE	65536			// max memory size
-#define MEMSIZE		(cpu_unit.capac)// actual memory size
-#define ADDRMASK	(MAXMEMSIZE - 1)// address mask
+#define MAXMEMSIZE	65536		// max memory size
+#define MEMSIZE		(m6800_unit.capac) // actual memory size
+#define ADDRMASK	(MAXMEMSIZE - 1) // address mask
 #define MEM_ADDR_OK(x)	(((uint32) (x)) < MEMSIZE)
 
+/* debug definitions */
+
+#define DEBUG_flow      0x0001
+#define DEBUG_read      0x0002
+#define DEBUG_write     0x0004
+#define DEBUG_level1    0x0008
+#define DEBUG_level2    0x0010
+#define DEBUG_reg       0x0020
+#define DEBUG_asm       0x0040
+#define DEBUG_all       0xFFFF
+
 /* Simulator stop codes */
 
-#define STOP_RSRV	1				// must be 1
-#define STOP_HALT	2				// HALT-really WAI
-#define STOP_IBKPT	3				// breakpoint
-#define STOP_OPCODE	4				// invalid opcode
-#define STOP_MEMORY	5				// invalid memory address
+#define STOP_RSRV	1		// must be 1
+#define STOP_HALT	2		// HALT-really WAI
+#define STOP_IBKPT	3		// breakpoint
+#define STOP_OPCODE	4		// invalid opcode
+#define STOP_MEMORY	5		// invalid memory address