mirror of
https://github.com/simh/simh.git
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Notes For V3.2-1
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. 1. New Features in 3.2-1 1.1 SCP and libraries - Added SET CONSOLE subhierarchy. - Added SHOW CONSOLE subhierarchy. - Added limited keyboard mapping capability. 1.2 HP2100 (new features from Dave Bryan) - Added instruction printout to HALT message. - Added M and T internal registers. - Added N, S, and U breakpoints. 1.3 PDP-11 and VAX - Added DHQ11 support (from John Dundas) 2. Bugs Fixed in 3.2-1 2.1 HP2100 (most fixes from Dave Bryan) - SBT increments B after store. - DMS console map must check dms_enb. - SFS x,C and SFC x,C work. - MP violation clears automatically on interrupt. - SFS/SFC 5 is not gated by protection enabled. - DMS enable does not disable mem prot checks. - DMS status inconsistent at simulator halt. - Examine/deposit are checking wrong addresses. - Physical addresses are 20b not 15b. - Revised DMS to use memory rather than internal format. - Revised IBL facility to conform to microcode. - Added DMA EDT I/O pseudo-opcode. - Separated DMA SRQ (service request) from FLG. - Revised peripherals to make SFS x,C and SFC x,C work. - Revised boot ROMs to use IBL facility. - Revised IBL treatment of SR to preserve SR<5:3>. - Fixed LPS, LPT timing. - Fixed DP boot interpretation of SR<0>. - Revised DR boot code to use IBL algorithm. - Fixed TTY input behavior during typeout for RTE-IV. - Suppressed nulls on TTY output for RTE-IV. - Added SFS x,C and SFC x,C to print/parse routines. - Fixed spurious timing error in magtape reads. 2.2 All DEC console devices - Removed SET TTI CTRL-C option. 2.3 PDP-11/VAX peripherals - Fixed bug in TQ reporting write protect status (reported by Lyle Bickley). - Fixed TK70 model number and media ID (found by Robert Schaffrath). - Fixed bug in autoconfigure (found by John Dundas). 2.4 VAX - Fixed bug in DIVBx and DIVWx (reported by Peter Trimmel).
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
26aa6de663
commit
e2ba672610
@@ -26,6 +26,12 @@
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dp 12557A 2871 disk subsystem
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13210A 7900 disk subsystem
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21-Apr-04 RMS Fixed typo in boot loader (found by Dave Bryan)
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26-Apr-04 RMS Fixed SFS x,C and SFC x,C
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Fixed SR setting in IBL
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Fixed interpretation of SR<0>
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Revised IBL loader
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Implemented DMA SRQ (follows FLG)
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25-Apr-03 RMS Revised for extended file support
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Fixed bug(s) in boot (found by Terry Newton)
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10-Nov-02 RMS Added BOOT command, fixed numerous bugs
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@@ -122,7 +128,7 @@
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extern uint16 *M;
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extern uint32 PC, SR;
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extern uint32 dev_cmd[2], dev_ctl[2], dev_flg[2], dev_fbf[2];
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extern uint32 dev_cmd[2], dev_ctl[2], dev_flg[2], dev_fbf[2], dev_srq[2];
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extern int32 sim_switches;
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extern UNIT cpu_unit;
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@@ -167,8 +173,8 @@ t_stat dp_showtype (FILE *st, UNIT *uptr, int32 val, void *desc);
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*/
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DIB dp_dib[] = {
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{ DPD, 0, 0, 0, 0, &dpdio },
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{ DPC, 0, 0, 0, 0, &dpcio } };
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{ DPD, 0, 0, 0, 0, 0, &dpdio },
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{ DPC, 0, 0, 0, 0, 0, &dpcio } };
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#define dpd_dib dp_dib[0]
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#define dpc_dib dp_dib[1]
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@@ -182,6 +188,7 @@ REG dpd_reg[] = {
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{ FLDATA (CTL, dpd_dib.ctl, 0) },
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{ FLDATA (FLG, dpd_dib.flg, 0) },
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{ FLDATA (FBF, dpd_dib.fbf, 0) },
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{ FLDATA (SRQ, dpd_dib.srq, 0) },
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{ FLDATA (XFER, dpd_xfer, 0) },
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{ FLDATA (WVAL, dpd_wval, 0) },
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{ BRDATA (DBUF, dpxb, 8, 16, DP_NUMWD) },
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@@ -227,6 +234,7 @@ REG dpc_reg[] = {
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{ FLDATA (CTL, dpc_dib.ctl, 0) },
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{ FLDATA (FLG, dpc_dib.flg, 0) },
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{ FLDATA (FBF, dpc_dib.fbf, 0) },
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{ FLDATA (SRQ, dpc_dib.srq, 0) },
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{ FLDATA (EOC, dpc_eoc, 0) },
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{ BRDATA (RARC, dpc_rarc, 8, 8, DP_NUMDRV) },
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{ BRDATA (RARH, dpc_rarh, 8, 2, DP_NUMDRV) },
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@@ -275,14 +283,14 @@ int32 devd;
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devd = IR & I_DEVMASK; /* get device no */
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switch (inst) { /* case on opcode */
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case ioFLG: /* flag clear/set */
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if ((IR & I_HC) == 0) { setFLG (devd); } /* STF */
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if ((IR & I_HC) == 0) { setFSR (devd); } /* STF */
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break;
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case ioSFC: /* skip flag clear */
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if (FLG (devd) == 0) PC = (PC + 1) & VAMASK;
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return dat;
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break;
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case ioSFS: /* skip flag set */
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if (FLG (devd) != 0) PC = (PC + 1) & VAMASK;
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return dat;
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break;
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case ioOTX: /* output */
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dpd_obuf = dat;
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if (!dpc_busy || dpd_xfer) dpd_wval = 1; /* if !overrun, valid */
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@@ -306,7 +314,7 @@ case ioCTL: /* control clear/set */
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break;
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default:
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break; }
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if (IR & I_HC) { clrFLG (devd); } /* H/C option */
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if (IR & I_HC) { clrFSR (devd); } /* H/C option */
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return dat;
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}
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@@ -318,14 +326,14 @@ int32 devd = dpd_dib.devno;
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devc = IR & I_DEVMASK; /* get device no */
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switch (inst) { /* case on opcode */
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case ioFLG: /* flag clear/set */
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if ((IR & I_HC) == 0) { setFLG (devc); } /* STF */
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if ((IR & I_HC) == 0) { setFSR (devc); } /* STF */
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break;
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case ioSFC: /* skip flag clear */
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if (FLG (devc) == 0) PC = (PC + 1) & VAMASK;
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return dat;
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break;
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case ioSFS: /* skip flag set */
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if (FLG (devc) != 0) PC = (PC + 1) & VAMASK;
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return dat;
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break;
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case ioOTX: /* output */
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dpc_obuf = dat;
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break;
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@@ -351,7 +359,7 @@ case ioCTL: /* control clear/set */
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fnc = CW_GETFNC (dpc_obuf); /* from cmd word */
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switch (fnc) { /* case on fnc */
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case FNC_STA: /* rd sta */
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if (dp_ctype) { clrFLG (devd); } /* 13210? clr dch flag */
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if (dp_ctype) { clrFSR (devd); } /* 13210? clr dch flag */
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case FNC_SEEK: case FNC_CHK: /* seek, check */
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case FNC_AR: /* addr rec */
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dp_god (fnc, drv, dpc_dtime); /* sched dch xfr */
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@@ -365,7 +373,7 @@ case ioCTL: /* control clear/set */
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break;
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default:
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break; }
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if (IR & I_HC) { clrFLG (devc); } /* H/C option */
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if (IR & I_HC) { clrFSR (devc); } /* H/C option */
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return dat;
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}
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@@ -428,7 +436,7 @@ case FNC_SEEK: /* seek, need cyl */
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if (CMD (devd)) { /* dch active? */
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dpc_rarc[drv] = DA_GETCYL (dpd_obuf); /* take cyl word */
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dpd_wval = 0; /* clr data valid */
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setFLG (devd); /* set dch flg */
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setFSR (devd); /* set dch flg */
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clrCMD (devd); /* clr dch cmd */
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uptr->FNC = FNC_SEEK1; } /* advance state */
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sim_activate (uptr, dpc_xtime); /* no, wait more */
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@@ -438,7 +446,7 @@ case FNC_SEEK1: /* seek, need hd/sec */
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dpc_rarh[drv] = DA_GETHD (dpd_obuf); /* get head */
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dpc_rars[drv] = DA_GETSC (dpd_obuf); /* get sector */
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dpd_wval = 0; /* clr data valid */
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setFLG (devd); /* set dch flg */
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setFSR (devd); /* set dch flg */
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clrCMD (devd); /* clr dch cmd */
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if (sim_is_active (&dpc_unit[drv])) { /* if busy, */
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dpc_sta[drv] = dpc_sta[drv] | STA_SKE;
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@@ -457,7 +465,7 @@ case FNC_AR: /* arec, need cyl */
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if (CMD (devd)) { /* dch active? */
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dpc_rarc[drv] = DA_GETCYL (dpd_obuf); /* take cyl word */
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dpd_wval = 0; /* clr data valid */
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setFLG (devd); /* set dch flg */
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setFSR (devd); /* set dch flg */
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clrCMD (devd); /* clr dch cmd */
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uptr->FNC = FNC_AR1; } /* advance state */
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sim_activate (uptr, dpc_xtime); /* no, wait more */
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@@ -467,9 +475,9 @@ case FNC_AR1: /* arec, need hd/sec */
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dpc_rarh[drv] = DA_GETHD (dpd_obuf); /* get head */
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dpc_rars[drv] = DA_GETSC (dpd_obuf); /* get sector */
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dpd_wval = 0; /* clr data valid */
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setFLG (devc); /* set cch flg */
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setFSR (devc); /* set cch flg */
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clrCMD (devc); /* clr cch cmd */
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setFLG (devd); /* set dch flg */
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setFSR (devd); /* set dch flg */
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clrCMD (devd); } /* clr dch cmd */
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else sim_activate (uptr, dpc_xtime); /* no, wait more */
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break;
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@@ -484,7 +492,7 @@ case FNC_STA: /* read status */
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else dpd_ibuf = STA_NRDY; /* not ready */
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if (dpd_ibuf & STA_ALLERR) /* errors? set flg */
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dpd_ibuf = dpd_ibuf | STA_ERR;
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setFLG (devd); /* set dch flg */
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setFSR (devd); /* set dch flg */
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clrCMD (devd); /* clr dch cmd */
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clrCMD (devc); /* clr cch cmd */
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dpc_sta[drv] = dpc_sta[drv] & /* clr sta flags */
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@@ -498,7 +506,7 @@ case FNC_CHK: /* check, need cnt */
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if (CMD (devd)) { /* dch active? */
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dpc_cnt = dpd_obuf & DA_CKMASK; /* get count */
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dpd_wval = 0; /* clr data valid */
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/* setFLG (devd); /* set dch flg */
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/* setFSR (devd); /* set dch flg */
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/* clrCMD (devd); /* clr dch cmd */
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dp_goc (FNC_CHK1, drv, dpc_xtime); } /* sched drv */
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else sim_activate (uptr, dpc_xtime); /* wait more */
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@@ -535,7 +543,7 @@ drv = uptr - dpc_dev.units; /* get drive no */
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devc = dpc_dib.devno; /* get cch devno */
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devd = dpd_dib.devno; /* get dch devno */
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if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
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setFLG (devc); /* set cch flg */
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setFSR (devc); /* set cch flg */
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clrCMD (devc); /* clr cch cmd */
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dpc_sta[drv] = 0; /* clr status */
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dpc_busy = 0; /* ctlr is free */
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@@ -553,7 +561,7 @@ case FNC_SEEK3: /* waiting for flag */
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uptr->FNC = FNC_SEEK3; /* next state */
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sim_activate (uptr, dpc_xtime); }
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else {
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setFLG (devc); /* set cch flg */
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setFSR (devc); /* set cch flg */
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clrCMD (devc); } /* clear cmd */
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return SCPE_OK;
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@@ -589,7 +597,7 @@ case FNC_CHK1: /* check */
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if (dpc_cnt == 0) break; } /* stop at zero */
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dp_ptr = 0; } /* wrap buf ptr */
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if (CMD (devd) && dpd_xfer) { /* dch on, xfer? */
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setFLG (devd); } /* set flag */
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setFSR (devd); } /* set flag */
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clrCMD (devd); /* clr dch cmd */
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sim_activate (uptr, dpc_xtime); /* sched next word */
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return SCPE_OK;
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@@ -623,7 +631,7 @@ case FNC_WD: /* write */
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if (err = ferror (uptr->fileref)) break; /* error? */
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dp_ptr = 0; } /* next sector */
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if (CMD (devd) && dpd_xfer) { /* dch on, xfer? */
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setFLG (devd); } /* set flag */
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setFSR (devd); } /* set flag */
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clrCMD (devd); /* clr dch cmd */
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sim_activate (uptr, dpc_xtime); /* sched next word */
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return SCPE_OK;
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@@ -632,7 +640,7 @@ default:
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return SCPE_IERR; } /* end case fnc */
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if (!dp_ctype) dpc_sta[drv] = dpc_sta[drv] | STA_ATN; /* 12559 sets ATN */
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setFLG (devc); /* set cch flg */
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setFSR (devc); /* set cch flg */
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clrCMD (devc); /* clr cch cmd */
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dpc_busy = 0; /* ctlr is free */
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dpd_xfer = dpd_wval = 0;
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@@ -659,6 +667,7 @@ dpc_dib.cmd = dpd_dib.cmd = 0; /* clear cmd */
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dpc_dib.ctl = dpd_dib.ctl = 0; /* clear ctl */
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dpc_dib.fbf = dpd_dib.fbf = 1; /* set fbf */
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dpc_dib.flg = dpd_dib.flg = 1; /* set flg */
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dpc_dib.srq = dpd_dib.flg = 1; /* srq follows flg */
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sim_cancel (&dpd_unit); /* cancel dch */
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for (i = 0; i < DP_NUMDRV; i++) { /* loop thru drives */
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sim_cancel (&dpc_unit[i]); /* cancel activity */
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@@ -711,27 +720,24 @@ return SCPE_OK;
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/* 7900/7901 bootstrap routine (HP 12992F ROM) */
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#define LDR_BASE 077
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#define CHANGE_DEV (1 << 24)
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static const int32 dboot[IBL_LNT] = {
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0106700+CHANGE_DEV, /*ST CLC DC ; clr dch */
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0106701+CHANGE_DEV, /* CLC CC ; clr cch */
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const uint16 dp_rom[IBL_LNT] = {
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0106710, /*ST CLC DC ; clr dch */
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0106711, /* CLC CC ; clr cch */
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0017757, /* JSB STAT ; get status */
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0067746, /*SK LDB SKCMD ; seek cmd */
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0106600+CHANGE_DEV, /* OTB DC ; cyl # */
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0103700+CHANGE_DEV, /* STC DC,C ; to dch */
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0106601+CHANGE_DEV, /* OTB CC ; seek cmd */
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0103701+CHANGE_DEV, /* STC CC,C ; to cch */
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0102300+CHANGE_DEV, /* SFS DC ; addr wd ok? */
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0106610, /* OTB DC ; cyl # */
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0103710, /* STC DC,C ; to dch */
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0106611, /* OTB CC ; seek cmd */
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0103711, /* STC CC,C ; to cch */
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0102310, /* SFS DC ; addr wd ok? */
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0027710, /* JMP *-1 ; no, wait */
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0006400, /* CLB */
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0102501, /* LIA 1 ; read switches */
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0002011, /* SLA,RSS ; <0> set? */
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0047747, /* ADB BIT9 ; head 2 = fixed */
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0106600+CHANGE_DEV, /* OTB DC ; head/sector */
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0103700+CHANGE_DEV, /* STC DC,C ; to dch */
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0102301+CHANGE_DEV, /* SFS CC ; seek done? */
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0047747, /* ADB BIT9 ; head 2 = removable */
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0106610, /* OTB DC ; head/sector */
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0103710, /* STC DC,C ; to dch */
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0102311, /* SFS CC ; seek done? */
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0027720, /* JMP *-1 ; no, wait */
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0017757, /* JSB STAT ; get status */
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0067776, /* LDB DMACW ; DMA control */
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@@ -742,11 +748,11 @@ static const int32 dboot[IBL_LNT] = {
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0067752, /* LDB CNT ; word count */
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0106602, /* OTB 2 */
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0063745, /* LDB RDCMD ; read cmd */
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0102601+CHANGE_DEV, /* OTA CC ; to cch */
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0103700+CHANGE_DEV, /* STC DC,C ; start dch */
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0103606, /* STC 6,C ; start DMA */
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0103701+CHANGE_DEV, /* STC CC,C ; start cch */
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0102301+CHANGE_DEV, /* SFS CC ; done? */
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0102611, /* OTA CC ; to cch */
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0103710, /* STC DC,C ; start dch */
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0103706, /* STC 6,C ; start DMA */
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0103711, /* STC CC,C ; start cch */
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0102311, /* SFS CC ; done? */
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0027737, /* JMP *-1 ; no, wait */
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0017757, /* JSB STAT ; get status */
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0027775, /* JMP XT ; done */
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@@ -761,11 +767,11 @@ static const int32 dboot[IBL_LNT] = {
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0, 0, 0, 0, /* unused */
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0000000, /*STAT 0 */
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0002400, /* CLA ; status request */
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0102601+CHANGE_DEV, /* OTC CC ; to cch */
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0103701+CHANGE_DEV, /* STC CC,C ; start cch */
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0102300+CHANGE_DEV, /* SFS DC ; done? */
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0102611, /* OTC CC ; to cch */
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0103711, /* STC CC,C ; start cch */
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0102310, /* SFS DC ; done? */
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0027763, /* JMP *-1 */
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0102500+CHANGE_DEV, /* LIA DC ; get status */
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0102510, /* LIA DC ; get status */
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0013743, /* AND FSMSK ; mask 15,14,3,0 */
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0002003, /* SZA,RSS ; drive ready? */
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0127757, /* JMP STAT,I ; yes */
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@@ -774,23 +780,18 @@ static const int32 dboot[IBL_LNT] = {
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0102030, /* HLT 30 ; yes */
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0027700, /* JMP ST ; no, retry */
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0117751, /*XT JSB ADDR2,I ; start program */
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0120000+CHANGE_DEV, /*DMACW 120000+DC */
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0120010, /*DMACW 120000+DC */
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0000000 }; /* -ST */
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t_stat dpc_boot (int32 unitno, DEVICE *dptr)
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{
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int32 i, dev;
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int32 dev;
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if (unitno != 0) return SCPE_NOFNC; /* only unit 0 */
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dev = dpd_dib.devno; /* get data chan dev */
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PC = ((MEMSIZE - 1) & ~IBL_MASK) & VAMASK; /* start at mem top */
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SR = IBL_DP + (dev << IBL_V_DEV); /* set SR */
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if (sim_switches & SWMASK ('F')) SR = SR | IBL_FIX; /* boot from fixed? */
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for (i = 0; i < IBL_LNT; i++) { /* copy bootstrap */
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if (dboot[i] & CHANGE_DEV) /* IO instr? */
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M[PC + i] = (dboot[i] + dev) & DMASK;
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else M[PC + i] = dboot[i]; }
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M[PC + LDR_BASE] = (~PC + 1) & DMASK;
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if (ibl_copy (dp_rom, dev)) return SCPE_IERR; /* copy boot to memory */
|
||||
SR = (SR & IBL_OPT) | IBL_DP | (dev << IBL_V_DEV); /* set SR */
|
||||
if (sim_switches & SWMASK ('R')) SR = SR | IBL_DP_REM; /* boot from removable? */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user