diff --git a/VAX/vax_cpu.c b/VAX/vax_cpu.c
index 62d051a1..bbacdbb2 100644
--- a/VAX/vax_cpu.c
+++ b/VAX/vax_cpu.c
@@ -1,6 +1,6 @@
 /* vax_cpu.c: VAX CPU
 
-   Copyright (c) 1998-2017, Robert M Supnik
+   Copyright (c) 1998-2019, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    cpu          VAX central processor
 
+   14-Apr-19    RMS     Added hook for non-standard MxPR CC's
    31-Mar-17    RMS     Fixed uninitialized variable on FPD path (COVERITY)
    13-Mar-17    RMS     Fixed dangling else in show_opnd (COVERITY)
    29-Dec-16    RMS     Removed delay in invoking sim_idle (Mark Pizzolato)
@@ -271,6 +272,7 @@ int32 mem_err = 0;
 int32 crd_err = 0;
 int32 p1 = 0, p2 = 0;                                   /* fault parameters */
 int32 fault_PC;                                         /* fault PC */
+int32 mxpr_cc_vc = 0;                                   /* MxPR V,C bits */
 int32 pcq_p = 0;                                        /* PC queue ptr */
 int32 hst_p = 0;                                        /* history pointer */
 int32 hst_lnt = 0;                                      /* history length */
@@ -3003,14 +3005,18 @@ for ( ;; ) {
         break;
 
     case MTPR:
-        cc = (cc & CC_C) | op_mtpr (opnd);
+        mxpr_cc_vc = cc & CC_C;                         /* std: V=0, C unchgd */
+        cc = op_mtpr (opnd);
+        cc = cc | (mxpr_cc_vc & (CC_V|CC_C));           /* or in V,C */
         SET_IRQL;                                       /* update intreq */
         break;
 
     case MFPR:
+        mxpr_cc_vc = cc & CC_C;                         /* std: V=0, C unchgd */
         r = op_mfpr (opnd);
         WRITE_L (r);
-        CC_IIZP_L (r);
+        CC_IIZZ_L (r);                                  /* set NV, clr VC */
+        cc = cc | (mxpr_cc_vc & (CC_V|CC_C));           /* or in V,C */
         break;
 
 /* CIS or emulated instructions */