mirror of
https://github.com/simh/simh.git
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Notes For V3.0-1
RESTRICTION: The FP15 and XVM features of the PDP-15 are only partially debugged. Do NOT enable these features for normal operations. 1. New Features in 3.0-1 1.1 PDP-1 - Added block loader format support to LOAD. - Changed BOOT PTR to allow loading of all of the first bank of memory. 1.2 PDP-18b Family - Added PDP-4 EAE support. - Added PDP-15 FP15 support. - Added PDP-15 XVM support. - Added PDP-15 "re-entrancy ECO". - Added PDP-7, PDP-9, PDP-15 hardware RIM loader support in BOOT PTR. 2. Bugs Fixed in 3.0-1 2.1 PDP-11/VAX - Fixed bug in user disk size (found by Chaskiel M Grundman). 2.2 PDP-1 - Updated CPU, line printer, standard devices to detect indefinite I/O wait. - Fixed incorrect logical, missing activate, break in drum simulator. - Fixed bugs in instruction decoding, overprinting for line printer. 2.3 PDP-10 - Fixed bug in RP read header. 2.4 PDP-18b Family - Fixed bug in PDP-4 line printer overprinting. - Fixed bug in PDP-15 memory protect/skip interaction. - Fixed bug in RF set size routine. - Increased PTP TIME for PDP-15 operating systems. 2.5 PDP-8 - Fixed bug in DF, RF set size routine. 2.6 Nova - Fixed bug in DSK set size routine. 2.7 1401 - Revised fetch to model hardware more closely. 2.8 Ibm1130 - Fixed bugs found by APL 1130. 2.9 Altairz80 - Fixed bug in real-time clock on Windows host. 2.10 HP2100 -- Fixed DR drum sizes. -- Fixed DR variable capacity interaction with SAVE/RESTORE. 3. New Features in 3.0 vs prior releases 3.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support 3.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 3.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 4. Bugs Fixed in 3.0 vs prior releases 4.1 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). 4.2 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. 4.3 Nova - Fixed DSK variable size interaction with restore. 4.4 PDP-1 - Fixed DT variable size interaction with restore. 4.5 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. 4.6 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. 4.7 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. 4.8 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. 4.9 GRI - Fixed bug in SC queue pointer management.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
4ffd3be790
commit
f9564b81b9
@@ -25,6 +25,7 @@
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cpu PDP-1 central processor
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23-Jul-03 RMS Revised to detect I/O wait hang
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05-Dec-02 RMS Added drum support
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06-Oct-02 RMS Revised for V2.10
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20-Aug-02 RMS Added DECtape support
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@@ -239,6 +240,7 @@ int32 sbs = 0; /* sequence break */
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int32 sbs_init = 0; /* seq break startup */
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int32 ioh = 0; /* I/O halt */
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int32 ioc = 0; /* I/O completion */
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int32 cpls = 0; /* pending completions */
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int32 extm = 0; /* ext mem mode */
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int32 extm_init = 0; /* ext mem startup */
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int32 stop_inst = 0; /* stop on rsrv inst */
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@@ -257,13 +259,13 @@ t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
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t_stat cpu_reset (DEVICE *dptr);
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t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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extern int32 ptr (int32 inst, int32 dev, int32 IO);
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extern int32 ptp (int32 inst, int32 dev, int32 IO);
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extern int32 tti (int32 inst, int32 dev, int32 IO);
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extern int32 tto (int32 inst, int32 dev, int32 IO);
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extern int32 lpt (int32 inst, int32 dev, int32 IO);
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extern int32 dt (int32 inst, int32 dev, int32 IO);
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extern int32 drm (int32 inst, int32 dev, int32 IO);
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extern int32 ptr (int32 inst, int32 dev, int32 dat);
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extern int32 ptp (int32 inst, int32 dev, int32 dat);
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extern int32 tti (int32 inst, int32 dev, int32 dat);
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extern int32 tto (int32 inst, int32 dev, int32 dat);
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extern int32 lpt (int32 inst, int32 dev, int32 dat);
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extern int32 dt (int32 inst, int32 dev, int32 dat);
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extern int32 drm (int32 inst, int32 dev, int32 dat);
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int32 sc_map[512] = {
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0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, /* 00000xxxx */
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@@ -403,7 +405,7 @@ xct_count = 0; /* track nested XCT's */
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sim_interval = sim_interval - 1;
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xct_instr: /* label for XCT */
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if ((IR == 0610001) && ((MA & EPCMASK) == 0) && (sbs & SB_ON)) {
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if ((IR == (OP_JMP+IA+1)) && ((MA & EPCMASK) == 0) && (sbs & SB_ON)) {
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sbs = sbs & ~SB_IP; /* seq debreak */
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PCQ_ENTRY; /* save old PC */
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OV = (M[1] >> 17) & 1; /* restore OV */
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@@ -432,12 +434,15 @@ switch (op) { /* decode IR<0:4> */
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case 001: /* AND */
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AC = AC & M[MA];
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break;
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case 002: /* IOR */
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AC = AC | M[MA];
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break;
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case 003: /* XOR */
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AC = AC ^ M[MA];
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break;
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case 004: /* XCT */
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if (xct_count >= xct_max) { /* too many XCT's? */
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reason = STOP_XCT;
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@@ -445,6 +450,7 @@ case 004: /* XCT */
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xct_count = xct_count + 1; /* count XCT's */
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IR = M[MA]; /* get instruction */
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goto xct_instr; /* go execute */
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case 007: /* CAL, JDA */
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MA = (PC & EPCMASK) | ((IR & IA)? (IR & DAMASK): 0100);
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PCQ_ENTRY;
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@@ -452,24 +458,31 @@ case 007: /* CAL, JDA */
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AC = EPC_WORD;
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PC = INCR_ADDR (MA);
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break;
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case 010: /* LAC */
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AC = M[MA];
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break;
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case 011: /* LIO */
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IO = M[MA];
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break;
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case 012: /* DAC */
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if (MEM_ADDR_OK (MA)) M[MA] = AC;
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break;
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case 013: /* DAP */
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if (MEM_ADDR_OK (MA)) M[MA] = (AC & DAMASK) | (M[MA] & ~DAMASK);
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break;
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case 014: /* DIP */
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if (MEM_ADDR_OK (MA)) M[MA] = (AC & ~DAMASK) | (M[MA] & DAMASK);
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break;
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case 015: /* DIO */
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if (MEM_ADDR_OK (MA)) M[MA] = IO;
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break;
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case 016: /* DZM */
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if (MEM_ADDR_OK (MA)) M[MA] = 0;
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break;
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@@ -498,6 +511,7 @@ case 020: /* ADD */
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if (((~t ^ M[MA]) & (t ^ AC)) & 0400000) OV = 1;
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if (AC == 0777777) AC = 0; /* minus 0 cleanup */
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break;
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case 021: /* SUB */
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t = AC ^ 0777777; /* complement AC */
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AC = t + M[MA]; /* -AC + MB */
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@@ -505,32 +519,39 @@ case 021: /* SUB */
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if (((~t ^ M[MA]) & (t ^ AC)) & 0400000) OV = 1;
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AC = AC ^ 0777777; /* recomplement AC */
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break;
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case 022: /* IDX */
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AC = M[MA] + 1;
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if (AC >= 0777777) AC = (AC + 1) & 0777777;
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if (MEM_ADDR_OK (MA)) M[MA] = AC;
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break;
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case 023: /* ISP */
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AC = M[MA] + 1;
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if (AC >= 0777777) AC = (AC + 1) & 0777777;
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if (MEM_ADDR_OK (MA)) M[MA] = AC;
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if (AC < 0400000) PC = INCR_ADDR (PC);
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break;
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case 024: /* SAD */
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if (AC != M[MA]) PC = INCR_ADDR (PC);
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break;
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case 025: /* SAS */
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if (AC == M[MA]) PC = INCR_ADDR (PC);
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break;
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case 030: /* JMP */
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PCQ_ENTRY;
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PC = MA;
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break;
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case 031: /* JSP */
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AC = EPC_WORD;
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PCQ_ENTRY;
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PC = MA;
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break;
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case 034: /* LAW */
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AC = (IR & 07777) ^ ((IR & IA)? 0777777: 0);
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break;
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@@ -691,8 +712,11 @@ case 035:
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if (ioh) { /* I/O halt? */
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if (ioc) ioh = 0; /* comp pulse? done */
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else { /* wait more */
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sim_interval = 0; /* force event */
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PC = DECR_ADDR (PC); } /* re-execute */
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PC = DECR_ADDR (PC); /* re-execute */
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if (cpls == 0) { /* any pending pulses? */
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reason = STOP_WAIT; /* no, CPU hangs */
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break; }
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sim_interval = 0; } /* force event */
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break; } /* skip iot */
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ioh = 1; /* turn on halt */
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PC = DECR_ADDR (PC); } /* re-execute */
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@@ -745,6 +769,7 @@ case 035:
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if (io_data & IOT_SKP) PC = INCR_ADDR (PC); /* skip? */
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if (io_data >= IOT_REASON) reason = io_data >> IOT_V_REASON;
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break;
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default: /* undefined */
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reason = STOP_RSRV; /* halt */
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break; } /* end switch opcode */
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@@ -759,7 +784,7 @@ t_stat cpu_reset (DEVICE *dptr)
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{
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sbs = sbs_init;
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extm = extm_init;
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ioh = ioc = 0;
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ioh = ioc = cpls = 0;
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OV = 0;
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PF = 0;
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pcq_r = find_reg ("PCQ", NULL, dptr);
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@@ -23,6 +23,8 @@
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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22-Jul-03 RMS Updated for "hardware" RIM loader
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Revised to detect I/O wait hang
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05-Dec-02 RMS Added IOT skip support (required by drum)
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14-Apr-99 RMS Changed t_addr to unsigned
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@@ -34,7 +36,9 @@
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Automatic multiply/divide Type 10
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Memory extension control Type 15
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Serial drum Type 24
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Line printer control Type 62
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Microtape (DECtape) control Type 550
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*/
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#include "sim_defs.h"
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@@ -46,7 +50,7 @@
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#define STOP_IBKPT 3 /* breakpoint */
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#define STOP_XCT 4 /* nested XCT's */
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#define STOP_IND 5 /* nested indirects */
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#define STOP_WAIT 6 /* wait state */
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#define STOP_WAIT 6 /* IO wait hang */
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/* Memory */
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@@ -59,11 +63,14 @@
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/* Architectural constants */
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#define DMASK 0777777 /* data mask */
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#define DAMASK 007777 /* direct addr */
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#define DAMASK 0007777 /* direct addr */
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#define EPCMASK (AMASK & ~DAMASK) /* extended addr */
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#define IA 010000 /* indirect flag */
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#define IO_WAIT 010000 /* I/O sync wait */
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#define IO_CPLS 004000 /* completion pulse */
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#define IA 0010000 /* indirect flag */
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#define IO_WAIT 0010000 /* I/O sync wait */
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#define IO_CPLS 0004000 /* completion pulse */
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#define OP_DAC 0240000 /* DAC */
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#define OP_DIO 0320000 /* DIO */
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#define OP_JMP 0600000 /* JMP */
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#define GEN_CPLS(x) (((x) ^ ((x) << 1)) & IO_WAIT) /* completion pulse? */
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/* IOT subroutine return codes */
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@@ -96,6 +103,17 @@
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#define IOS_PNT (1 << IOS_V_PNT)
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#define IOS_SPC (1 << IOS_V_SPC)
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/* Completion pulses */
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#define CPLS_V_PTR 5
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#define CPLS_V_PTP 4
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#define CPLS_V_TTO 3
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#define CPLS_V_LPT 2
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#define CPLS_PTR (1 << CPLS_V_PTR)
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#define CPLS_PTP (1 << CPLS_V_PTP)
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#define CPLS_TTO (1 << CPLS_V_TTO)
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#define CPLS_LPT (1 << CPLS_V_LPT)
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/* Sequence break flags */
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#define SB_V_IP 0 /* in progress */
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@@ -1,14 +1,14 @@
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To: Users
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From: Bob Supnik
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Subj: PDP-1 Simulator Usage
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Date: 15-Dec-2002
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Date: 15-Jul-2003
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2002, written by Robert M Supnik
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Copyright (c) 1993-2002, Robert M Supnik
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Original code published in 1993-2003, written by Robert M Supnik
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Copyright (c) 1993-2003, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -75,8 +75,8 @@ The PDP-1 simulator implements the following unique stop conditions:
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memory reference address decoding
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- more than XCTMAX nested executes are detected during
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instruction execution
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- wait state entered, and no I/O operations outstanding
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(ie, no interrupt can ever occur)
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- I/O wait, and no I/O operations outstanding (i.e, no I/O
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completion will ever occur)
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The PDP-1 loader supports RIM format tapes. The DUMP command is not
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implemented.
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@@ -1,4 +1,4 @@
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/* pdp1_drm.c: drum/fixed head disk simulator
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/* pdp1_drm.c: PDP-1 drum simulator
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Copyright (c) 1993-2002, Robert M Supnik
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@@ -25,6 +25,7 @@
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drm Type 24 serial drum
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23-Jul-03 RMS Fixed incorrect logical, missing activate
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05-Dec-02 RMS Cloned from pdp18b_drm.c
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*/
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@@ -95,45 +96,44 @@ DEVICE drm_dev = {
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/* IOT routines */
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int32 drm (int32 IR, int32 dev, int32 IO)
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int32 drm (int32 IR, int32 dev, int32 dat)
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{
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int32 t;
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int32 pulse = (IR >> 6) & 037;
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if (drm_dev.flags & DEV_DIS) /* disabled? */
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return (stop_inst << IOT_V_REASON) | IO; /* stop if requested */
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if ((pulse != 001) & (pulse != 011)) /* invalid pulse? */
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return (stop_inst << IOT_V_REASON) | IO; /* stop if requested */
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return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
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if ((pulse != 001) && (pulse != 011)) /* invalid pulse? */
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return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
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switch (dev) { /* switch on device */
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case 061: /* DWR, DRD */
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drm_ma = IO & 0177777; /* load mem addr */
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drm_ma = dat & 0177777; /* load mem addr */
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drm_unit.FUNC = pulse & DRM_WRITE; /* save function */
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break;
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case 062: /* DBL, DCN */
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if (pulse & 010) drm_da = IO & DRM_SMASK; /* load sector # */
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if (pulse & 010) drm_da = dat & DRM_SMASK; /* load sector # */
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iosta = iosta & ~IOS_DRM; /* clear flags */
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drm_err = 0;
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t = ((drm_da % DRM_NUMSC) * DRM_NUMWDS) - GET_POS (drm_time);
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if (t <= 0) t = t + DRM_NUMWDT; /* wrap around? */
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sim_activate (&drm_unit, t); /* start operation */
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break;
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case 063: /* DTD */
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if (iosta & IOS_DRM) return (IO | IOT_SKP); /* skip if done */
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if (pulse == 011) return (stop_inst << IOT_V_REASON) | dat;
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if (iosta & IOS_DRM) return (dat | IOT_SKP); /* skip if done */
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break;
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case 064: /* DSE, DSP */
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if ((drm_err == 0) || (pulse & 010)) /* no error, par test? */
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return (IO | IOT_SKP);
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return (dat | IOT_SKP);
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}
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return IO;
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return dat;
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}
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/* Unit service
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This code assumes the entire drum is buffered.
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*/
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/* Unit service - this code assumes the entire drum is buffered */
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t_stat drm_svc (UNIT *uptr)
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{
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int32 i;
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uint32 da;
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uint32 i, da;
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if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
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drm_err = 1; /* set error */
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@@ -334,23 +334,23 @@ DEVICE dt_dev = {
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NULL, &dt_attach, &dt_detach,
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NULL, DEV_DISABLE };
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int32 dt (int32 IR, int32 dev, int32 IO)
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int32 dt (int32 IR, int32 dev, int32 dat)
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{
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int32 pulse = (IR >> 6) & 037;
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int32 fnc, mot, unum;
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UNIT *uptr = NULL;
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if (dt_dev.flags & DEV_DIS) /* disabled? */
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return (stop_inst << IOT_V_REASON) | IO; /* stop if requested */
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return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
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unum = DTA_GETUNIT (dtsa); /* get unit no */
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if (unum >= 0) uptr = dt_dev.units + unum; /* get unit */
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if (pulse == 003) { /* MSE */
|
||||
if ((dtsa ^ IO) & DTA_UNIT) dt_deselect (dtsa); /* new unit? */
|
||||
dtsa = (dtsa & ~DTA_UNIT) | (IO & DTA_UNIT);
|
||||
if ((dtsa ^ dat) & DTA_UNIT) dt_deselect (dtsa); /* new unit? */
|
||||
dtsa = (dtsa & ~DTA_UNIT) | (dat & DTA_UNIT);
|
||||
dtsb = dtsb & ~(DTB_DTF | DTB_BEF | DTB_ERF | DTB_ALLERR); }
|
||||
if (pulse == 004) { /* MLC */
|
||||
dtsa = (dtsa & ~DTA_RW) | (IO & DTA_RW); /* load dtsa */
|
||||
dtsa = (dtsa & ~DTA_RW) | (dat & DTA_RW); /* load dtsa */
|
||||
dtsb = dtsb & ~(DTB_DTF | DTB_BEF | DTB_ERF | DTB_ALLERR);
|
||||
fnc = DTA_GETFNC (dtsa); /* get fnc */
|
||||
if ((uptr == NULL) || /* invalid? */
|
||||
@@ -361,10 +361,10 @@ if (pulse == 004) { /* MLC */
|
||||
dt_seterr (uptr, DTB_SEL); /* select err */
|
||||
else dt_newsa (dtsa); }
|
||||
if (pulse == 005) { /* MRD */
|
||||
IO = (IO & ~DMASK) | dtdb;
|
||||
dat = (dat & ~DMASK) | dtdb;
|
||||
dtsb = dtsb & ~(DTB_DTF | DTB_BEF); }
|
||||
if (pulse == 006) { /* MWR */
|
||||
dtdb = IO & DMASK;
|
||||
dtdb = dat & DMASK;
|
||||
dtsb = dtsb & ~(DTB_DTF | DTB_BEF); }
|
||||
if (pulse == 007) { /* MRS */
|
||||
dtsb = dtsb & ~(DTB_REV | DTB_GO); /* clr rev, go */
|
||||
@@ -373,9 +373,9 @@ if (pulse == 007) { /* MRS */
|
||||
if (mot & DTS_DIR) dtsb = dtsb | DTB_REV; /* rev? set */
|
||||
if ((mot >= DTS_ACCF) || (uptr->STATE & 0777700))
|
||||
dtsb = dtsb | DTB_GO; } /* accel? go */
|
||||
IO = (IO & ~DMASK) | dtsb; }
|
||||
dat = (dat & ~DMASK) | dtsb; }
|
||||
DT_UPDINT;
|
||||
return IO;
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* Unit deselect */
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
|
||||
lpt Type 62 line printer for the PDP-1
|
||||
|
||||
23-Jul-03 RMS Fixed bugs in instruction decoding, overprinting
|
||||
Revised to detect I/O wait hang
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
30-May-02 RMS Widened POS to 32b
|
||||
13-Apr-01 RMS Revised for register arrays
|
||||
@@ -36,10 +38,10 @@
|
||||
#define LPT_BSIZE (BPTR_MAX * 3) /* line size */
|
||||
#define BPTR_MASK 077 /* buf ptr mask */
|
||||
|
||||
extern int32 ioc, sbs, iosta;
|
||||
extern int32 stop_inst;
|
||||
|
||||
int32 lpt_rpls = 0, lpt_iot = 0, lpt_stopioe = 0, bptr = 0;
|
||||
int32 lpt_spc = 0; /* print (0) vs spc */
|
||||
int32 lpt_ovrpr = 0; /* overprint */
|
||||
int32 lpt_stopioe = 0; /* stop on error */
|
||||
int32 lpt_bptr = 0; /* buffer ptr */
|
||||
char lpt_buf[LPT_BSIZE + 1] = { 0 };
|
||||
static const unsigned char lpt_trans[64] = {
|
||||
' ','1','2','3','4','5','6','7','8','9','\'','~','#','V','^','<',
|
||||
@@ -47,6 +49,9 @@ static const unsigned char lpt_trans[64] = {
|
||||
'@','J','K','L','M','N','O','P','Q','R','$','=','-',')','-','(',
|
||||
'_','A','B','C','D','E','F','G','H','I','*','.','+',']','|','[' };
|
||||
|
||||
extern int32 ioc, cpls, sbs, iosta;
|
||||
extern int32 stop_inst;
|
||||
|
||||
t_stat lpt_svc (UNIT *uptr);
|
||||
t_stat lpt_reset (DEVICE *dptr);
|
||||
|
||||
@@ -64,9 +69,10 @@ REG lpt_reg[] = {
|
||||
{ ORDATA (BUF, lpt_unit.buf, 8) },
|
||||
{ FLDATA (PNT, iosta, IOS_V_PNT) },
|
||||
{ FLDATA (SPC, iosta, IOS_V_SPC) },
|
||||
{ FLDATA (RPLS, lpt_rpls, 0) },
|
||||
{ DRDATA (BPTR, bptr, 6) },
|
||||
{ ORDATA (LPT_STATE, lpt_iot, 6), REG_HRO },
|
||||
{ FLDATA (RPLS, cpls, CPLS_V_LPT) },
|
||||
{ DRDATA (BPTR, lpt_bptr, 6) },
|
||||
{ ORDATA (LPT_STATE, lpt_spc, 6), REG_HRO },
|
||||
{ FLDATA (LPT_OVRPR, lpt_ovrpr, 0), REG_HRO },
|
||||
{ DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, lpt_unit.wait, 24), PV_LEFT },
|
||||
{ FLDATA (STOP_IOE, lpt_stopioe, 0) },
|
||||
@@ -82,38 +88,39 @@ DEVICE lpt_dev = {
|
||||
|
||||
/* Line printer IOT routine */
|
||||
|
||||
int32 lpt (int32 inst, int32 dev, int32 data)
|
||||
int32 lpt (int32 inst, int32 dev, int32 dat)
|
||||
{
|
||||
int32 i;
|
||||
|
||||
if (lpt_dev.flags & DEV_DIS) /* disabled? */
|
||||
return (stop_inst << IOT_V_REASON) | data; /* stop if requested */
|
||||
if ((inst & 0700) == 0100) { /* fill buf */
|
||||
if (bptr < BPTR_MAX) { /* limit test ptr */
|
||||
i = bptr * 3; /* cvt to chr ptr */
|
||||
lpt_buf[i] = lpt_trans[(data >> 12) & 077];
|
||||
lpt_buf[i + 1] = lpt_trans[(data >> 6) & 077];
|
||||
lpt_buf[i + 2] = lpt_trans[data & 077]; }
|
||||
bptr = (bptr + 1) & BPTR_MASK;
|
||||
return data; }
|
||||
lpt_rpls = 0;
|
||||
if ((inst & 0700) == 0200) { /* space */
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
if ((inst & 07000) == 01000) { /* fill buf */
|
||||
if (lpt_bptr < BPTR_MAX) { /* limit test ptr */
|
||||
i = lpt_bptr * 3; /* cvt to chr ptr */
|
||||
lpt_buf[i] = lpt_trans[(dat >> 12) & 077];
|
||||
lpt_buf[i + 1] = lpt_trans[(dat >> 6) & 077];
|
||||
lpt_buf[i + 2] = lpt_trans[dat & 077]; }
|
||||
lpt_bptr = (lpt_bptr + 1) & BPTR_MASK;
|
||||
return dat; }
|
||||
if ((inst & 07000) == 02000) { /* space */
|
||||
iosta = iosta & ~IOS_SPC; /* space, clear flag */
|
||||
lpt_iot = (inst >> 6) & 077; } /* state = space n */
|
||||
else { iosta = iosta & ~IOS_PNT; /* clear flag */
|
||||
lpt_iot = 0; } /* state = print */
|
||||
lpt_spc = (inst >> 6) & 077; } /* state = space n */
|
||||
else if ((inst & 07000) == 00000) { /* print */
|
||||
iosta = iosta & ~IOS_PNT; /* clear flag */
|
||||
lpt_spc = 0; } /* state = print */
|
||||
else return (stop_inst << IOT_V_REASON) | dat; /* not implemented */
|
||||
if (GEN_CPLS (inst)) { /* comp pulse? */
|
||||
ioc = 0; /* clear flop */
|
||||
lpt_rpls = 1; } /* request completion */
|
||||
cpls = cpls | CPLS_LPT; } /* request completion */
|
||||
else cpls = cpls & ~CPLS_LPT;
|
||||
sim_activate (&lpt_unit, lpt_unit.wait); /* activate */
|
||||
return data;
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* Unit service, printer is in one of three states
|
||||
|
||||
lpt_iot = 000 write buffer to file, set state to
|
||||
lpt_iot = 010 write cr, then write buffer to file
|
||||
lpt_iot = 02x space command x, then set state to 0
|
||||
lpt_spc = 000 write buffer to file, set overprint
|
||||
lpt_iot = 02x space command x, clear overprint
|
||||
*/
|
||||
|
||||
t_stat lpt_svc (UNIT *uptr)
|
||||
@@ -129,30 +136,32 @@ static const char *lpt_cc[] = {
|
||||
"\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n",
|
||||
"\f" };
|
||||
|
||||
if (cpls & CPLS_LPT) { /* completion pulse? */
|
||||
ioc = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_LPT; } /* clr pulse pending */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
ioc = ioc | lpt_rpls; /* restart */
|
||||
if (lpt_iot & 020) { /* space? */
|
||||
if (lpt_spc) { /* space? */
|
||||
iosta = iosta | IOS_SPC; /* set flag */
|
||||
if ((lpt_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (lpt_stopioe, SCPE_UNATT);
|
||||
fputs (lpt_cc[lpt_iot & 07], lpt_unit.fileref); /* print cctl */
|
||||
fputs (lpt_cc[lpt_spc & 07], lpt_unit.fileref); /* print cctl */
|
||||
if (ferror (lpt_unit.fileref)) { /* error? */
|
||||
perror ("LPT I/O error");
|
||||
clearerr (lpt_unit.fileref);
|
||||
return SCPE_IOERR; }
|
||||
lpt_iot = 0; } /* clear state */
|
||||
lpt_ovrpr = 0; } /* dont overprint */
|
||||
else { iosta = iosta | IOS_PNT; /* print */
|
||||
if ((lpt_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (lpt_stopioe, SCPE_UNATT);
|
||||
if (lpt_iot & 010) fputc ('\r', lpt_unit.fileref);
|
||||
if (lpt_ovrpr) fputc ('\r', lpt_unit.fileref); /* overprint? */
|
||||
fputs (lpt_buf, lpt_unit.fileref); /* print buffer */
|
||||
if (ferror (lpt_unit.fileref)) { /* test error */
|
||||
perror ("LPT I/O error");
|
||||
clearerr (lpt_unit.fileref);
|
||||
return SCPE_IOERR; }
|
||||
bptr = 0;
|
||||
lpt_bptr = 0;
|
||||
for (i = 0; i <= LPT_BSIZE; i++) lpt_buf[i] = 0; /* clear buffer */
|
||||
lpt_iot = 010; } /* set state */
|
||||
lpt_ovrpr = 1; } /* set overprint */
|
||||
lpt_unit.pos = ftell (lpt_unit.fileref); /* update position */
|
||||
return SCPE_OK;
|
||||
}
|
||||
@@ -163,11 +172,12 @@ t_stat lpt_reset (DEVICE *dptr)
|
||||
{
|
||||
int32 i;
|
||||
|
||||
iosta = iosta & ~(IOS_PNT | IOS_SPC); /* clear flags */
|
||||
bptr = 0; /* clear buffer ptr */
|
||||
lpt_bptr = 0; /* clear buffer ptr */
|
||||
for (i = 0; i <= LPT_BSIZE; i++) lpt_buf[i] = 0; /* clear buffer */
|
||||
lpt_iot = 0; /* clear state */
|
||||
lpt_rpls = 0;
|
||||
lpt_spc = 0; /* clear state */
|
||||
lpt_ovrpr = 0; /* clear overprint */
|
||||
cpls = cpls & ~CPLS_LPT;
|
||||
iosta = iosta & ~(IOS_PNT | IOS_SPC); /* clear flags */
|
||||
sim_cancel (&lpt_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
tti keyboard
|
||||
tto teleprinter
|
||||
|
||||
23-Jul-03 RMS Revised to detect I/O wait hang
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
22-Dec-02 RMS Added break support
|
||||
29-Nov-02 RMS Fixed output flag initialization (found by Derek Peschel)
|
||||
@@ -52,16 +53,16 @@
|
||||
#define TTI 0
|
||||
#define TTO 1
|
||||
|
||||
extern int32 sbs, ioc, iosta, PF, IO, PC;
|
||||
extern int32 M[];
|
||||
|
||||
int32 ptr_rpls = 0, ptr_stopioe = 0, ptr_state = 0;
|
||||
int32 ptp_rpls = 0, ptp_stopioe = 0;
|
||||
int32 ptr_state = 0;
|
||||
int32 ptr_stopioe = 0;
|
||||
int32 ptp_stopioe = 0;
|
||||
int32 tti_hold = 0; /* tti hold buf */
|
||||
int32 tto_rpls = 0; /* tto restart */
|
||||
int32 tty_buf = 0; /* tty buffer */
|
||||
int32 tty_uc = 0; /* tty uc/lc */
|
||||
|
||||
extern int32 sbs, ioc, cpls, iosta, PF, IO, PC;
|
||||
extern int32 M[];
|
||||
|
||||
t_stat ptr_svc (UNIT *uptr);
|
||||
t_stat ptp_svc (UNIT *uptr);
|
||||
t_stat tti_svc (UNIT *uptr);
|
||||
@@ -123,7 +124,7 @@ UNIT ptr_unit = {
|
||||
REG ptr_reg[] = {
|
||||
{ ORDATA (BUF, ptr_unit.buf, 18) },
|
||||
{ FLDATA (DONE, iosta, IOS_V_PTR) },
|
||||
{ FLDATA (RPLS, ptr_rpls, 0) },
|
||||
{ FLDATA (RPLS, cpls, CPLS_V_PTR) },
|
||||
{ ORDATA (STATE, ptr_state, 5), REG_HRO },
|
||||
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
|
||||
@@ -150,7 +151,7 @@ UNIT ptp_unit = {
|
||||
REG ptp_reg[] = {
|
||||
{ ORDATA (BUF, ptp_unit.buf, 8) },
|
||||
{ FLDATA (DONE, iosta, IOS_V_PTP) },
|
||||
{ FLDATA (RPLS, ptp_rpls, 0) },
|
||||
{ FLDATA (RPLS, cpls, CPLS_V_PTP) },
|
||||
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
|
||||
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
|
||||
@@ -177,7 +178,7 @@ UNIT tty_unit[] = {
|
||||
REG tty_reg[] = {
|
||||
{ ORDATA (BUF, tty_buf, 6) },
|
||||
{ FLDATA (UC, tty_uc, UC_V) },
|
||||
{ FLDATA (RPLS, tto_rpls, 0) },
|
||||
{ FLDATA (RPLS, cpls, CPLS_V_TTO) },
|
||||
{ ORDATA (HOLD, tti_hold, 9), REG_HRO },
|
||||
{ FLDATA (KDONE, iosta, IOS_V_TTI) },
|
||||
{ DRDATA (KPOS, tty_unit[TTI].pos, T_ADDR_W), PV_LEFT },
|
||||
@@ -196,18 +197,18 @@ DEVICE tty_dev = {
|
||||
|
||||
/* Paper tape reader: IOT routine */
|
||||
|
||||
int32 ptr (int32 inst, int32 dev, int32 data)
|
||||
int32 ptr (int32 inst, int32 dev, int32 dat)
|
||||
{
|
||||
iosta = iosta & ~IOS_PTR; /* clear flag */
|
||||
if (dev == 0030) return ptr_unit.buf; /* RRB */
|
||||
ptr_state = (dev == 0002)? 18: 0; /* mode = bin/alp */
|
||||
ptr_rpls = 0;
|
||||
ptr_unit.buf = 0; /* clear buffer */
|
||||
sim_activate (&ptr_unit, ptr_unit.wait);
|
||||
if (GEN_CPLS (inst)) { /* comp pulse? */
|
||||
ioc = 0;
|
||||
ptr_rpls = 1; }
|
||||
return data;
|
||||
cpls = cpls | CPLS_PTR; }
|
||||
else cpls = cpls & ~CPLS_PTR;
|
||||
sim_activate (&ptr_unit, ptr_unit.wait);
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* Unit service */
|
||||
@@ -231,10 +232,12 @@ else if (temp & 0200) { /* binary */
|
||||
ptr_state = ptr_state - 6;
|
||||
ptr_unit.buf = ptr_unit.buf | ((temp & 077) << ptr_state); }
|
||||
if (ptr_state == 0) { /* done? */
|
||||
if (ptr_rpls) IO = ptr_unit.buf; /* restart? fill IO */
|
||||
if (cpls & CPLS_PTR) { /* completion pulse? */
|
||||
IO = ptr_unit.buf; /* fill IO */
|
||||
ioc = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_PTR; }
|
||||
iosta = iosta | IOS_PTR; /* set flag */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
ioc = ioc | ptr_rpls; } /* restart */
|
||||
sbs = sbs | SB_RQ; } /* req seq break */
|
||||
else sim_activate (&ptr_unit, ptr_unit.wait); /* get next char */
|
||||
return SCPE_OK;
|
||||
}
|
||||
@@ -245,7 +248,7 @@ t_stat ptr_reset (DEVICE *dptr)
|
||||
{
|
||||
ptr_state = 0; /* clear state */
|
||||
ptr_unit.buf = 0;
|
||||
ptr_rpls = 0;
|
||||
cpls = cpls & ~CPLS_PTR;
|
||||
iosta = iosta & ~IOS_PTR; /* clear flag */
|
||||
sim_cancel (&ptr_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
@@ -253,48 +256,61 @@ return SCPE_OK;
|
||||
|
||||
/* Bootstrap routine */
|
||||
|
||||
#define BOOT_START 07772
|
||||
#define BOOT_LEN (sizeof (boot_rom) / sizeof (int))
|
||||
int32 ptr_getw (UNIT *uptr)
|
||||
{
|
||||
int32 i, tmp, word;
|
||||
|
||||
static const int32 boot_rom[] = {
|
||||
0730002, /* r, rpb + wait */
|
||||
0327776, /* dio x */
|
||||
0107776, /* xct x */
|
||||
0730002, /* rpb + wait */
|
||||
0760400, /* x, halt */
|
||||
0607772 /* jmp r */
|
||||
};
|
||||
for (i = word = 0; i < 3;) {
|
||||
if ((tmp = getc (uptr->fileref)) == EOF) return -1;
|
||||
uptr->pos = uptr->pos + 1;
|
||||
if (tmp & 0200) {
|
||||
word = (word << 6) | (tmp & 077);
|
||||
i++; } }
|
||||
return word;
|
||||
}
|
||||
|
||||
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
|
||||
{
|
||||
int32 i;
|
||||
int32 origin, val;
|
||||
|
||||
for (i = 0; i < BOOT_LEN; i++) M[BOOT_START + i] = boot_rom[i];
|
||||
PC = BOOT_START;
|
||||
return SCPE_OK;
|
||||
for (;;) {
|
||||
if ((val = ptr_getw (&ptr_unit)) < 0) return SCPE_FMT;
|
||||
if (((val & 0760000) == OP_DIO) || /* DIO? */
|
||||
((val & 0760000) == OP_DAC)) { /* hack - Macro1 err */
|
||||
origin = val & 07777;
|
||||
if ((val = ptr_getw (&ptr_unit)) < 0) return SCPE_FMT;
|
||||
M[origin] = val; }
|
||||
else if ((val & 0760000) == OP_JMP) { /* JMP? */
|
||||
PC = val & 007777;
|
||||
break; }
|
||||
else return SCPE_FMT; /* bad instr */
|
||||
}
|
||||
return SCPE_OK; /* done */
|
||||
}
|
||||
|
||||
/* Paper tape punch: IOT routine */
|
||||
|
||||
int32 ptp (int32 inst, int32 dev, int32 data)
|
||||
int32 ptp (int32 inst, int32 dev, int32 dat)
|
||||
{
|
||||
iosta = iosta & ~IOS_PTP; /* clear flag */
|
||||
ptp_rpls = 0;
|
||||
ptp_unit.buf = (dev == 0006)? ((data >> 12) | 0200): (data & 0377);
|
||||
sim_activate (&ptp_unit, ptp_unit.wait); /* start unit */
|
||||
ptp_unit.buf = (dev == 0006)? ((dat >> 12) | 0200): (dat & 0377);
|
||||
if (GEN_CPLS (inst)) { /* comp pulse? */
|
||||
ioc = 0;
|
||||
ptp_rpls = 1; }
|
||||
return data;
|
||||
cpls = cpls | CPLS_PTP; }
|
||||
else cpls = cpls & ~CPLS_PTP;
|
||||
sim_activate (&ptp_unit, ptp_unit.wait); /* start unit */
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* Unit service */
|
||||
|
||||
t_stat ptp_svc (UNIT *uptr)
|
||||
{
|
||||
if (cpls & CPLS_PTP) { /* completion pulse? */
|
||||
ioc = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_PTP; }
|
||||
iosta = iosta | IOS_PTP; /* set flag */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
ioc = ioc | ptp_rpls; /* process restart */
|
||||
if ((ptp_unit.flags & UNIT_ATT) == 0) /* not attached? */
|
||||
return IORETURN (ptp_stopioe, SCPE_UNATT);
|
||||
if (putc (ptp_unit.buf, ptp_unit.fileref) == EOF) { /* I/O error? */
|
||||
@@ -310,7 +326,7 @@ return SCPE_OK;
|
||||
t_stat ptp_reset (DEVICE *dptr)
|
||||
{
|
||||
ptp_unit.buf = 0; /* clear state */
|
||||
ptp_rpls = 0;
|
||||
cpls = cpls & ~CPLS_PTP;
|
||||
iosta = iosta & ~IOS_PTP; /* clear flag */
|
||||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
@@ -318,7 +334,7 @@ return SCPE_OK;
|
||||
|
||||
/* Typewriter IOT routines */
|
||||
|
||||
int32 tti (int32 inst, int32 dev, int32 data)
|
||||
int32 tti (int32 inst, int32 dev, int32 dat)
|
||||
{
|
||||
iosta = iosta & ~IOS_TTI; /* clear flag */
|
||||
if (inst & (IO_WAIT | IO_CPLS)) /* wait or sync? */
|
||||
@@ -326,16 +342,16 @@ if (inst & (IO_WAIT | IO_CPLS)) /* wait or sync? */
|
||||
return tty_buf & 077;
|
||||
}
|
||||
|
||||
int32 tto (int32 inst, int32 dev, int32 data)
|
||||
int32 tto (int32 inst, int32 dev, int32 dat)
|
||||
{
|
||||
iosta = iosta & ~IOS_TTO; /* clear flag */
|
||||
tto_rpls = 0;
|
||||
tty_buf = data & TT_WIDTH; /* load buffer */
|
||||
sim_activate (&tty_unit[TTO], tty_unit[TTO].wait); /* activate unit */
|
||||
tty_buf = dat & TT_WIDTH; /* load buffer */
|
||||
if (GEN_CPLS (inst)) { /* comp pulse? */
|
||||
ioc = 0;
|
||||
tto_rpls = 1; }
|
||||
return data;
|
||||
cpls = cpls | CPLS_TTO; }
|
||||
else cpls = cpls & ~CPLS_TTO;
|
||||
sim_activate (&tty_unit[TTO], tty_unit[TTO].wait); /* activate unit */
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* Unit service routines */
|
||||
@@ -373,9 +389,11 @@ t_stat tto_svc (UNIT *uptr)
|
||||
{
|
||||
int32 out;
|
||||
|
||||
if (cpls & CPLS_TTO) { /* completion pulse? */
|
||||
ioc = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_TTO; }
|
||||
iosta = iosta | IOS_TTO; /* set flag */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
ioc = ioc | tto_rpls; /* process restart */
|
||||
if (tty_buf == FIODEC_UC) { /* upper case? */
|
||||
tty_uc = UC;
|
||||
return SCPE_OK; }
|
||||
@@ -399,7 +417,7 @@ t_stat tty_reset (DEVICE *dptr)
|
||||
tty_buf = 0; /* clear buffer */
|
||||
tty_uc = 0; /* clear case */
|
||||
tti_hold = 0; /* clear hold buf */
|
||||
tto_rpls = 0; /* clear reset pulse */
|
||||
cpls = cpls & ~CPLS_TTO;
|
||||
iosta = (iosta & ~IOS_TTI) | IOS_TTO; /* clear flag */
|
||||
sim_activate (&tty_unit[TTI], tty_unit[TTI].wait); /* activate keyboard */
|
||||
sim_cancel (&tty_unit[TTO]); /* stop printer */
|
||||
|
||||
@@ -23,6 +23,7 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
22-Jul-03 RMS Updated for "hardware" RIM loader
|
||||
05-Dec-02 RMS Added drum support
|
||||
21-Nov-02 RMS Changed typewriter to half duplex
|
||||
20-Aug-02 RMS Added DECtape support
|
||||
@@ -52,6 +53,7 @@ extern int32 M[];
|
||||
extern int32 PC;
|
||||
extern int32 ascii_to_fiodec[], fiodec_to_ascii[];
|
||||
extern int32 sc_map[];
|
||||
extern int32 sim_switches;
|
||||
|
||||
/* SCP data structures and interface routines
|
||||
|
||||
@@ -86,44 +88,83 @@ const char *sim_stop_messages[] = {
|
||||
"Breakpoint",
|
||||
"Nested XCT's",
|
||||
"Nested indirect addresses",
|
||||
"Infinite wait state" };
|
||||
"Infinite I/O wait state" };
|
||||
|
||||
/* Binary loader
|
||||
/* Binary loader - supports both RIM format and Macro block format */
|
||||
|
||||
At the moment, implements RIM loader format
|
||||
*/
|
||||
|
||||
int32 getword (FILE *fileref)
|
||||
int32 getw (FILE *inf)
|
||||
{
|
||||
int32 i, tmp, word;
|
||||
|
||||
word = 0;
|
||||
for (i = 0; i < 3;) {
|
||||
if ((tmp = getc (fileref)) == EOF) return -1;
|
||||
if ((tmp = getc (inf)) == EOF) return -1;
|
||||
if (tmp & 0200) {
|
||||
word = (word << 6) | (tmp & 077);
|
||||
i++; } }
|
||||
return word;
|
||||
}
|
||||
|
||||
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
|
||||
t_stat rim_load (FILE *inf)
|
||||
{
|
||||
int32 origin, val;
|
||||
|
||||
if ((*cptr != 0) || (flag != 0)) return SCPE_ARG;
|
||||
for (;;) {
|
||||
if ((val = getword (fileref)) < 0) return SCPE_FMT;
|
||||
if (((val & 0770000) == 0320000) || /* DIO? */
|
||||
((val & 0770000) == 0240000)) { /* DAC? - incorrect */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if (((val & 0760000) == OP_DIO) || /* DIO? */
|
||||
((val & 0760000) == OP_DAC)) { /* hack - Macro1 err */
|
||||
origin = val & 07777;
|
||||
if ((val = getword (fileref)) < 0) return SCPE_FMT;
|
||||
if (MEM_ADDR_OK (origin)) M[origin++] = val; }
|
||||
else if ((val & 0770000) == 0600000) { /* JMP? */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
M[origin] = val; }
|
||||
else if ((val & 0760000) == OP_JMP) { /* JMP? */
|
||||
PC = val & 007777;
|
||||
break; }
|
||||
else return SCPE_FMT; /* bad instr */
|
||||
}
|
||||
return SCPE_OK; /* done */
|
||||
}
|
||||
|
||||
t_stat blk_load (FILE *inf)
|
||||
{
|
||||
int32 val, start, count, csum;
|
||||
|
||||
for (;;) {
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT; /* get word, EOF? */
|
||||
if ((val & 0760000) == OP_DIO) { /* DIO? */
|
||||
csum = val; /* init checksum */
|
||||
start = val & 07777; /* starting addr */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val & 0760000) != OP_DIO) return SCPE_FMT;
|
||||
csum = csum + val;
|
||||
if (csum > 0777777) csum = (csum + 1) & 0777777;
|
||||
count = (val & 07777) - start + 1; /* block count */
|
||||
if (count <= 0) return SCPE_FMT;
|
||||
while (count--) { /* loop on data */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
csum = csum + val;
|
||||
if (csum > 0777777) csum = (csum + 1) & 0777777;
|
||||
M[start++] = val; }
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if (val != csum) return SCPE_CSUM; }
|
||||
else if ((val & 0760000) == OP_JMP) { /* JMP? */
|
||||
PC = val & 007777;
|
||||
break; }
|
||||
else return SCPE_FMT; /* bad instr */
|
||||
}
|
||||
return SCPE_OK; /* done */
|
||||
}
|
||||
|
||||
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
|
||||
{
|
||||
t_stat sta;
|
||||
|
||||
if ((*cptr != 0) || (flag != 0)) return SCPE_ARG;
|
||||
sta = rim_load (fileref);
|
||||
if (sta != SCPE_OK) return sta;
|
||||
if ((sim_switches & SWMASK ('B')) || match_ext (fnam, "BIN"))
|
||||
return blk_load (fileref);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Symbol tables */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user