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mirror of https://github.com/simh/simh.git synced 2026-04-29 21:16:46 +00:00

Notes For V3.0-1

RESTRICTION: The FP15 and XVM features of the PDP-15 are only partially
debugged.  Do NOT enable these features for normal operations.

1. New Features in 3.0-1

1.1 PDP-1

- Added block loader format support to LOAD.
- Changed BOOT PTR to allow loading of all of the first bank of memory.

1.2 PDP-18b Family

- Added PDP-4 EAE support.
- Added PDP-15 FP15 support.
- Added PDP-15 XVM support.
- Added PDP-15 "re-entrancy ECO".
- Added PDP-7, PDP-9, PDP-15 hardware RIM loader support in BOOT PTR.

2. Bugs Fixed in 3.0-1

2.1 PDP-11/VAX

- Fixed bug in user disk size (found by Chaskiel M Grundman).

2.2 PDP-1

- Updated CPU, line printer, standard devices to detect indefinite I/O wait.
- Fixed incorrect logical, missing activate, break in drum simulator.
- Fixed bugs in instruction decoding, overprinting for line printer.

2.3 PDP-10

- Fixed bug in RP read header.

2.4 PDP-18b Family

- Fixed bug in PDP-4 line printer overprinting.
- Fixed bug in PDP-15 memory protect/skip interaction.
- Fixed bug in RF set size routine.
- Increased PTP TIME for PDP-15 operating systems.

2.5 PDP-8

- Fixed bug in DF, RF set size routine.

2.6 Nova

- Fixed bug in DSK set size routine.

2.7 1401

- Revised fetch to model hardware more closely.

2.8 Ibm1130

- Fixed bugs found by APL 1130.

2.9 Altairz80

- Fixed bug in real-time clock on Windows host.

2.10 HP2100

-- Fixed DR drum sizes.
-- Fixed DR variable capacity interaction with SAVE/RESTORE.

3. New Features in 3.0 vs prior releases

3.1 SCP and Libraries

- Added ASSIGN/DEASSIGN (logical name) commands.
- Changed RESTORE to unconditionally detach files.
- Added E11 and TPC format support to magtape library.
- Fixed bug in SHOW CONNECTIONS.
- Added USE_ADDR64 support

3.2 All magtapes

- Magtapes support SIMH format, E11 format, and TPC format (read only).
- SET <tape_unit> FORMAT=format sets the specified tape unit's format.
- SHOW <tape_unit> FORMAT displays the specified tape unit's format.
- Tape format can also be set as part of the ATTACH command, using
  the -F switch.

3.3 VAX

- VAX can be compiled without USE_INT64.
- If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support
  files > 2GB.
- VAX ROM has speed control (SET ROM DELAY/NODELAY).

4. Bugs Fixed in 3.0 vs prior releases

4.1 VAX

- Fixed CVTfi bug: integer overflow not set if exponent out of range
- Fixed EMODx bugs:
  o First and second operands reversed
  o Separated fraction received wrong exponent
  o Overflow calculation on separated integer incorrect
  o Fraction not set to zero if exponent out of range
- Fixed interval timer and ROM access to pass power-up self-test even on very
  fast host processors (fixes from Mark Pizzolato).

4.2 1401

- Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS.
- Fixed MCE bug, BS off by 1 if zero suppress.
- Fixed chaining bug, D lost if return to SCP.
- Fixed H branch, branch occurs after continue.
- Added check for invalid 8 character MCW, LCA.
- Fixed magtape load-mode end of record response.

4.3 Nova

- Fixed DSK variable size interaction with restore.

4.4 PDP-1

- Fixed DT variable size interaction with restore.

4.5 PDP-11

- Fixed DT variable size interaction with restore.
- Fixed bug in MMR1 update (found by Tim Stark).
- Added XQ features and fixed bugs:
  o Corrected XQ interrupts on IE state transition (code by Tom Evans).
  o Added XQ interrupt clear on soft reset.
  o Removed XQ interrupt when setting XL or RL (multiple people).
  o Added SET/SHOW XQ STATS.
  o Added SHOW XQ FILTERS.
  o Added ability to split received packet into multiple buffers.
  o Added explicit runt and giant packet processing.

4.6 PDP-18B

- Fixed DT, RF variable size interaction with restore.
- Fixed MT bug in MTTR.

4.7 PDP-8

- Fixed DT, DF, RF, RX variable size interaction with restore.
- Fixed MT bug in SKTR.

4.8 HP2100

- Fixed bug in DP (13210A controller only), DQ read status.
- Fixed bug in DP, DQ seek complete.

4.9 GRI

- Fixed bug in SC queue pointer management.
This commit is contained in:
Bob Supnik
2003-07-31 16:17:00 -07:00
committed by Mark Pizzolato
parent 4ffd3be790
commit f9564b81b9
74 changed files with 6938 additions and 2812 deletions

View File

@@ -25,6 +25,7 @@
cpu PDP-1 central processor
23-Jul-03 RMS Revised to detect I/O wait hang
05-Dec-02 RMS Added drum support
06-Oct-02 RMS Revised for V2.10
20-Aug-02 RMS Added DECtape support
@@ -239,6 +240,7 @@ int32 sbs = 0; /* sequence break */
int32 sbs_init = 0; /* seq break startup */
int32 ioh = 0; /* I/O halt */
int32 ioc = 0; /* I/O completion */
int32 cpls = 0; /* pending completions */
int32 extm = 0; /* ext mem mode */
int32 extm_init = 0; /* ext mem startup */
int32 stop_inst = 0; /* stop on rsrv inst */
@@ -257,13 +259,13 @@ t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_reset (DEVICE *dptr);
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
extern int32 ptr (int32 inst, int32 dev, int32 IO);
extern int32 ptp (int32 inst, int32 dev, int32 IO);
extern int32 tti (int32 inst, int32 dev, int32 IO);
extern int32 tto (int32 inst, int32 dev, int32 IO);
extern int32 lpt (int32 inst, int32 dev, int32 IO);
extern int32 dt (int32 inst, int32 dev, int32 IO);
extern int32 drm (int32 inst, int32 dev, int32 IO);
extern int32 ptr (int32 inst, int32 dev, int32 dat);
extern int32 ptp (int32 inst, int32 dev, int32 dat);
extern int32 tti (int32 inst, int32 dev, int32 dat);
extern int32 tto (int32 inst, int32 dev, int32 dat);
extern int32 lpt (int32 inst, int32 dev, int32 dat);
extern int32 dt (int32 inst, int32 dev, int32 dat);
extern int32 drm (int32 inst, int32 dev, int32 dat);
int32 sc_map[512] = {
0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, /* 00000xxxx */
@@ -403,7 +405,7 @@ xct_count = 0; /* track nested XCT's */
sim_interval = sim_interval - 1;
xct_instr: /* label for XCT */
if ((IR == 0610001) && ((MA & EPCMASK) == 0) && (sbs & SB_ON)) {
if ((IR == (OP_JMP+IA+1)) && ((MA & EPCMASK) == 0) && (sbs & SB_ON)) {
sbs = sbs & ~SB_IP; /* seq debreak */
PCQ_ENTRY; /* save old PC */
OV = (M[1] >> 17) & 1; /* restore OV */
@@ -432,12 +434,15 @@ switch (op) { /* decode IR<0:4> */
case 001: /* AND */
AC = AC & M[MA];
break;
case 002: /* IOR */
AC = AC | M[MA];
break;
case 003: /* XOR */
AC = AC ^ M[MA];
break;
case 004: /* XCT */
if (xct_count >= xct_max) { /* too many XCT's? */
reason = STOP_XCT;
@@ -445,6 +450,7 @@ case 004: /* XCT */
xct_count = xct_count + 1; /* count XCT's */
IR = M[MA]; /* get instruction */
goto xct_instr; /* go execute */
case 007: /* CAL, JDA */
MA = (PC & EPCMASK) | ((IR & IA)? (IR & DAMASK): 0100);
PCQ_ENTRY;
@@ -452,24 +458,31 @@ case 007: /* CAL, JDA */
AC = EPC_WORD;
PC = INCR_ADDR (MA);
break;
case 010: /* LAC */
AC = M[MA];
break;
case 011: /* LIO */
IO = M[MA];
break;
case 012: /* DAC */
if (MEM_ADDR_OK (MA)) M[MA] = AC;
break;
case 013: /* DAP */
if (MEM_ADDR_OK (MA)) M[MA] = (AC & DAMASK) | (M[MA] & ~DAMASK);
break;
case 014: /* DIP */
if (MEM_ADDR_OK (MA)) M[MA] = (AC & ~DAMASK) | (M[MA] & DAMASK);
break;
case 015: /* DIO */
if (MEM_ADDR_OK (MA)) M[MA] = IO;
break;
case 016: /* DZM */
if (MEM_ADDR_OK (MA)) M[MA] = 0;
break;
@@ -498,6 +511,7 @@ case 020: /* ADD */
if (((~t ^ M[MA]) & (t ^ AC)) & 0400000) OV = 1;
if (AC == 0777777) AC = 0; /* minus 0 cleanup */
break;
case 021: /* SUB */
t = AC ^ 0777777; /* complement AC */
AC = t + M[MA]; /* -AC + MB */
@@ -505,32 +519,39 @@ case 021: /* SUB */
if (((~t ^ M[MA]) & (t ^ AC)) & 0400000) OV = 1;
AC = AC ^ 0777777; /* recomplement AC */
break;
case 022: /* IDX */
AC = M[MA] + 1;
if (AC >= 0777777) AC = (AC + 1) & 0777777;
if (MEM_ADDR_OK (MA)) M[MA] = AC;
break;
case 023: /* ISP */
AC = M[MA] + 1;
if (AC >= 0777777) AC = (AC + 1) & 0777777;
if (MEM_ADDR_OK (MA)) M[MA] = AC;
if (AC < 0400000) PC = INCR_ADDR (PC);
break;
case 024: /* SAD */
if (AC != M[MA]) PC = INCR_ADDR (PC);
break;
case 025: /* SAS */
if (AC == M[MA]) PC = INCR_ADDR (PC);
break;
case 030: /* JMP */
PCQ_ENTRY;
PC = MA;
break;
case 031: /* JSP */
AC = EPC_WORD;
PCQ_ENTRY;
PC = MA;
break;
case 034: /* LAW */
AC = (IR & 07777) ^ ((IR & IA)? 0777777: 0);
break;
@@ -691,8 +712,11 @@ case 035:
if (ioh) { /* I/O halt? */
if (ioc) ioh = 0; /* comp pulse? done */
else { /* wait more */
sim_interval = 0; /* force event */
PC = DECR_ADDR (PC); } /* re-execute */
PC = DECR_ADDR (PC); /* re-execute */
if (cpls == 0) { /* any pending pulses? */
reason = STOP_WAIT; /* no, CPU hangs */
break; }
sim_interval = 0; } /* force event */
break; } /* skip iot */
ioh = 1; /* turn on halt */
PC = DECR_ADDR (PC); } /* re-execute */
@@ -745,6 +769,7 @@ case 035:
if (io_data & IOT_SKP) PC = INCR_ADDR (PC); /* skip? */
if (io_data >= IOT_REASON) reason = io_data >> IOT_V_REASON;
break;
default: /* undefined */
reason = STOP_RSRV; /* halt */
break; } /* end switch opcode */
@@ -759,7 +784,7 @@ t_stat cpu_reset (DEVICE *dptr)
{
sbs = sbs_init;
extm = extm_init;
ioh = ioc = 0;
ioh = ioc = cpls = 0;
OV = 0;
PF = 0;
pcq_r = find_reg ("PCQ", NULL, dptr);