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Code Releases Activity

Merge branch 'FastAsynchIO' into simhv38-2-rc2

Browse Source 
Conflicts:
	PDP11/pdp11_tq.c
	PDP11/pdp11_ts.c
	PDP11/pdp11_xq.h
	VAX/vax780_sbi.c
	VAX/vax_cpu.c
	makefile
	scp.c
	sim_defs.h
	sim_ether.c
	sim_timer.c
This commit is contained in:
Mark Pizzolato
2011-04-15 10:47:35 -07:00
parent 87157dc737 4ca8935d60
commit fe8b1f06de
84 changed files with 15748 additions and 714 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
VAX/vax780_fload.c
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@@ -88,7 +88,7 @@ uint32 rtfile_find (uint32 block, uint32 sector);
/* FLOAD file_name {file_origin} */
t_stat vax780_fload (int flag, char *cptr)
t_stat vax780_fload (int32 flag, char *cptr)
{
char gbuf[CBUFSIZE];
uint16 file_name[3], blkbuf[BLK_SIZE];

4
VAX/vax780_sbi.c
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@@ -28,6 +28,7 @@
sbi bus controller
21-Mar-2011 RMS Added autoreboot capability (from Mark Pizzalato)
04-Feb-2011 MP Added RQB, RQC, and RQD as bootable controllers
31-May-2008 RMS Fixed machine_check calling sequence (found by Peter Schorn)
03-May-2006 RMS Fixed writes to ACCS
28-May-2008 RMS Inlined physical memory routines
@@ -111,6 +112,9 @@ static struct boot_dev boot_tab[] = {
{ "HK", BOOT_HK, 0 },
{ "RL", BOOT_RL, 0 },
{ "RQ", BOOT_UDA, 1 << 24 },
{ "RQB", BOOT_UDA, 1 << 24 },
{ "RQC", BOOT_UDA, 1 << 24 },
{ "RQD", BOOT_UDA, 1 << 24 },
{ "TQ", BOOT_TK, 1 << 24 },
{ NULL }
};

5
VAX/vax780_stddev.c
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@@ -287,6 +287,10 @@ REG clk_reg[] = {
{ DRDATA (TODR, todr_reg, 32), PV_LEFT },
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPS, clk_tps, 8), REG_HIDDEN + REG_NZ + PV_LEFT },
#if defined (SIM_ASYNCH_IO)
{ DRDATA (LATENCY, sim_asynch_latency, 32), PV_LEFT },
{ DRDATA (INST_LATENCY, sim_asynch_inst_latency, 32), PV_LEFT },
#endif
{ NULL }
};
@@ -573,6 +577,7 @@ t_stat clk_svc (UNIT *uptr)
tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */
sim_activate (&clk_unit, tmr_poll); /* reactivate unit */
tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */
AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */
todr_reg = todr_reg + 1; /* incr TODR */
if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */
tmr_incr (TMR_INC); /* do timer service */

2
VAX/vax_cpu.c
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@@ -26,6 +26,7 @@
cpu VAX central processor
23-Mar-11 RMS Revised for new idle design (from Mark Pizzolato)
05-Jan-11 MP Added Asynch I/O support
24-Apr-10 RMS Added OLDVMS idle timer option
Fixed bug in SET CPU IDLE
21-May-08 RMS Removed inline support
@@ -612,6 +613,7 @@ for ( ;; ) {
}
fault_PC = PC;
recqptr = 0; /* clr recovery q */
AIO_CHECK_EVENT;
if (sim_interval <= 0) { /* chk clock queue */
temp = sim_process_event ();
if (temp)

5
VAX/vax_stddev.c
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@@ -27,6 +27,7 @@
tto terminal output
clk 100Hz and TODR clock
05-Jan-11 MP Added Asynch I/O support
17-Aug-08 RMS Resync TODR on any clock reset
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
17-Oct-06 RMS Synced keyboard poll to real-time clock for idling
@@ -178,6 +179,10 @@ REG clk_reg[] = {
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (POLL, tmr_poll, 24), REG_NZ + PV_LEFT + REG_HRO },
{ DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT },
#if defined (SIM_ASYNCH_IO)
{ DRDATA (LATENCY, sim_asynch_latency, 32), PV_LEFT },
{ DRDATA (INST_LATENCY, sim_asynch_inst_latency, 32), PV_LEFT },
#endif
{ NULL }
};