This is the initial release of the Altair8800 simulator.
Why another Altair simulator? AltairZ80 has been described as a
“software simulator”, where the intent is to run software designed
specifically for executing under a simulator. Altair8800 is intended
to accurately simulate the Altair hardware and execute software
that will run unchanged on real hardware. Software and disk images
can be moved between the Altair8800 simulator and real Altair and
other S-100 hardware without any changes. The Altair8800 simulator
is a tool that can assist with the restoration of vintage Altair
and other S-100 hardware and software along with the development
of new hardware and software. The accomplish this, the following
are major differences between AltairZ80 and Altair8800.
* The monolithic design where devices access other devices directly
through external variables and functions is no longer supported.
All devices exchange data through a new BUS device. Memory and I/O
address decoding and transfers are now handled by the BUS device.
All interrupt requests are handled by the BUS device.
* System RAM was moved from the CPU device to a new RAM device and
managed by the BUS device.
* Banked RAM was moved from the CPU device to a new BRAM device.
* Banked RAM can only be accessed through the BUS device. Memory in
banks that are not currently selected cannot be accessed. The AZ80
“banked” RAM was removed.
* ROMs were moved from the CPU and DSK devices to the new ROM device.
Mike Douglas’ Altmon Monitor is also available through the ROM
device. The custom AltairZ80 ALTAIRROM, which is not compatible
with original Altair disk images, is also available.
* The custom ALTAIRROM boot loader was replaced with the original
MITS Disk Boot Loader as the default ROM.
* The monolithic Multiple-CPU/RAM/ROM/IO/BankedRAM CPU device has
been replaced with a generic CPU device that provides an abstraction
layer between SIMH and the supported CPU architectures (currently
8080 and Z80). All IO is handled through the BUS device. RAM, Banked
RAM, and ROM are each handled by their own independent devices.
* The AltairZ80 SIO device was replaced with the M2SIO0 and M2SIO1
devices. The M2SIO devices fully support TMXR.
* A new SIO device was added to provide generic, programmable, Serial
IO. TMXR is not supported on this device.
* The Altair 8800 did not have PTR or PTP hardware devices. They have
been removed and replaced with the M2SIO1 device. PTR and PTP devices
are defined by software executing on the simulator.
* Contention between multiple enabled serial devices checking the
single host keyboard for input is now handled by the BUS device.
Port 0xFF sense switches was moved to a new SSW device and IMSAI
programmed output was moved to a new PO device.
* The SIMH pseudo device no longer uses the removed PTR and PTP
devices. The SIMH device has its own IO system. To avoid conflicts
with other devices and remain compatible with the R and W utilities
written for AltairZ80, SIMH “borrows” I/O ports 12H and 13H during
file transfers. Only SIMH commands needed to support R and W file
transfers are supported. All other SIMH commands were removed.
* AltairZ80-specific versions of CP/M are not supported by Altair8800.
* PC queue was removed from CPU device and replaced with CPU HISTORY.
* The Altair8800 simulator only supports 16-bit address and 8-bit
data buses. 8086 and 68K CPU architectures were removed.
* All CPU timing (clockFrequency) and “sleeps” (SIO SLEEP) have been
removed. SIMH THROTTLE is fully supported and is the recommended
way to manage simulator speed and host CPU utilization. Executing
“SET THROTTLE 100K/1”, for example, should provide ample speed
without tasking the host CPU.
* HEXLOAD and HEXSAVE commands were added. The LOAD “-h” option has
been removed. Intel Hex and sRecord (coming soon) formats are
supported.
* The WD179X device was converted to an API.
* A new DSK API was added to provide a consistent way to manage soft
sector raw disk images.
* Support for the proprietary IMD disk image format was removed. Only
RAW disk images are supported.
The following devices are supported by this initial release:
BUS - Altair (S-100) Bus
CPU - Intel 8080 / Zilog Z80
RAM - 64K RAM
ROM - ROMs
BRAM - Banked RAM
DSK - MITS 88-DCDD Floppy Disk Controller
M2SIO0 - MITS 88-2SIO Port 0
M2SIO1 - MITS 88-2SIO Port 1
SSW - Sense Switches
PO - Programmed Output
SIO - Generic Serial I/O
SBC200 - SD Systems SBC-200
TARBELL - Tarbell SD and DD Floppy Disk Controller
VFII - SD Systems VersaFloppy II
SIMH - SIMH Pseudo Device
This commit introduces dozens of changes to make the 3B2-700 simulator
fully functional and ready for wider use. In addition to 3B2-700
availability, this commit includes a tremendous amount of refactoring
of the 3B2-400 and common code to make the project structure easier to
maintain and reason about.
This change introduces initial support for the AT&T 3B2 Rev 3 platform, based
around the WE32200 CPU with up to 64MB of RAM and SCSI disk and tape support.
This simulator is experimental and not yet supported. It will not be built by
default, but can be built with:
make 3b2-600
Or by using the 3B2-600 Windows Visual Studio project.
Custom TTL design by Marvin Minsky. There are two displays: one
raster scan for bitmapped characters, and another random scan for
vector graphics. There is also a keyboard, and a UART for talking
to a host computer.
The computer is normally booted off a ROM which reads and starts a
secondary loader from the UART. The loader is responsible for reading
the payload, which comes in checksummed blocks. The LOAD command
accepts files in same format.
The I650 simulator depends on the sim_card library which had API chages that
the author agreed to before the changes were committed, but no update of the
I650 simulator code has come for the past 2 months.
These include simulators for the IBM 701, IBM 702, IBM 704, IBM 705,
IBM 705/3, IBM 709, IBM 1410/IBM 7010, IBM 7070, IBM 7080, IBM 7090
and IBM7094.
These basically were a collection of machines that shared a common
set it peripherals, Each group had its own instruction set, hence
different simulators.
IBM 701 -> i701
IBM 702/705/705/3/7080 -> i7080
IBM 7070/7074 -> i7070
IBM 1410/7010 -> i7010
IBM 704 -> i704
IBM 704/709/7090/7094 -> i7090
The i7090 can be set to simulate a IBM 704 however you end up
disabling almost everything, since the 704 did not have any channels.
A build option exists that allows this one to be built without all the
extra features.
The i7090 simulator’s implementation of the IBM 7094 is a more
complete implementation of the IBM 7094 which can run CTSS
while the existing simh I7094 can’t.
