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4 Commits

Author SHA1 Message Date
Howard M. Harte
8bdc206fea Replace getw/putw with sim_read/sim_write 
For endian-neutral behavior use sim_read/sim_write instead of getwand
putw.
 2012-11-20 16:33:26 -08:00
Howard M. Harte
dafb61a585 Add TBR register to CPU. 2012-11-20 15:49:05 -08:00
Mark Pizzolato
6cda56650d Fixed compiler identified bugs and warnings. 2012-11-08 06:23:52 -08:00
Howard M. Harte
35ef1c8d24 Initial public version of TX-0 for SIMH 
Integrate TX-0 simulation into SIMH.
 2012-11-07 20:47:26 -08:00