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113 lines
4.4 KiB
C
113 lines
4.4 KiB
C
/* pdp11_td.h: TU58 cartridge controller API
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------------------------------------------------------------------------------
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Copyright (c) 2015, Mark Pizzolato
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the author.
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------------------------------------------------------------------------------
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Modification history:
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20-Sep-15 MP Initial Version
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------------------------------------------------------------------------------
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*/
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#ifndef PDP11_TD_H
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#define PDP11_TD_H
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#include "sim_defs.h"
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#include "sim_disk.h"
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typedef struct CTLR CTLR;
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t_stat td_connect_console_device (DEVICE *dptr,
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void (*rx_set_int) (int32 ctlr_num, t_bool val),
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void (*tx_set_int) (int32 ctlr_num, t_bool val));
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t_stat td_rd_i_csr (CTLR *ctlr, int32 *data);
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t_stat td_rd_i_buf (CTLR *ctlr, int32 *data);
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t_stat td_rd_o_csr (CTLR *ctlr, int32 *data);
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t_stat td_rd_o_buf (CTLR *ctlr, int32 *data);
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t_stat td_wr_i_csr (CTLR *ctlr, int32 data);
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t_stat td_wr_i_buf (CTLR *ctlr, int32 data);
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t_stat td_wr_o_csr (CTLR *ctlr, int32 data);
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t_stat td_wr_o_buf (CTLR *ctlr, int32 data);
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/* Debug detail levels */
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#define TDDEB_OPS 00001 /* transactions */
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#define TDDEB_IRD 00002 /* input reg reads */
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#define TDDEB_ORD 00004 /* output reg reads */
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#define TDDEB_RRD 00006 /* reg reads */
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#define TDDEB_IWR 00010 /* input reg writes */
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#define TDDEB_OWR 00020 /* output reg writes */
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#define TDDEB_RWR 00030 /* reg writes */
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#define TDDEB_TRC 00040 /* trace */
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#define TDDEB_INT 00100 /* interrupts */
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#define TDDEB_PKT 00200 /* packet */
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#define TDDEB_DAT 00400 /* data */
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#define TDDEB_ERR 01000 /* errors */
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static DEBTAB td_deb[] = {
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{ "OPS", TDDEB_OPS, "transactions" },
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{ "PKT", TDDEB_PKT, "packet" },
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{ "RRD", TDDEB_RRD, "reg reads"},
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{ "IRD", TDDEB_IRD, "input reg reads" },
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{ "ORD", TDDEB_ORD, "output reg reads" },
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{ "RWR", TDDEB_RWR, "reg writes" },
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{ "IWR", TDDEB_IWR, "input reg writes" },
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{ "OWR", TDDEB_OWR, "output reg writes" },
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{ "INT", TDDEB_INT, "interrupts" },
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{ "TRC", TDDEB_TRC, "trace" },
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{ "DAT", TDDEB_DAT, "data" },
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{ "ERR", TDDEB_ERR, "errors" },
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{ NULL, 0 }
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};
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/* TU58 definitions */
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#define TD_NUMBLK 512 /* blocks/tape */
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#define TD_NUMBY 512 /* bytes/block */
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#define TD_SIZE (TD_NUMBLK * TD_NUMBY) /* bytes/tape */
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#define TD_DRV(d) \
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{ 128, 4, 1, 512, #d, 512 }
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static DRVTYP drv_tab[] = {
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TD_DRV (TU58),
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{ 0 }
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};
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static t_stat td_attach (UNIT *uptr, CONST char *cptr)
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{
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return sim_disk_attach (uptr, cptr, TD_NUMBY,
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sizeof (uint16), TRUE, 0,
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"TU58", 0, 0);
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}
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#endif /* _PDP11_TD_H */
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