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1. New Features
1.1 Directory and documentation
- Only common files (SCP and libraries) are in the top level
directory. Individual simulator files are in their individual
directories.
- simh_doc.txt has been split up. simh_doc.txt now documents
only SCP. The individual simulators are documented in separate
text files in their own directories.
- mingw_build.bat is a batch file for the MINGW/gcc environment
that will build all the simulators, assuming the root directory
structure is at c:\sim.
- Makefile is a UNIX make file for the gcc environment that will
build all the simulators, assuming the root directory is at
c:\sim.
1.2 SCP
- DO <file name> executes the SCP commands in the specified file.
- Replicated registers in unit structures can now be declared as
arrays for examine, modify, save, and restore. Most replicated
unit registers (for example, mag tape position registers) have
been changed to arrays.
- The ADD/REMOVE commands have been replaced by SET unit ONLINE
and SET unit OFFLINE, respectively.
- Register names that are unique within an entire simulator do
not have to be prefaced with the device name.
- The ATTACH command can attach files read only, either under
user option (-r), or because the attached file is ready only.
- The SET/SHOW capabilities have been extended. New forms include:
SET <dev> param{=value}{ param ...}
SET <unit> param{=value}{ param ...}
SHOW <dev> {param param ...}
SHOW <unit> {param param ...}
- Multiple breakpoints have been implemented. Breakpoints are
set/cleared/displayed by:
BREAK addr_list{[count]}
NOBREAK addr_list
SHOW BREAK addr_list
1.3 PDP-11 simulator
- Unibus map implemented, with 22b RP controller (URH70) or 18b
RP controller (URH11) (in debug).
- All DMA peripherals rewritten to use map.
- Many peripherals modified for source sharing with VAX.
- RQDX3 implemented.
- Bugs fixed in RK11 and RL11 write check.
1.4 PDP-10 simulator
- ITS 1-proceed implemented.
- Bugs fixed in ITS PC sampling and LPMR
1.5 18b PDP simulator
- Interrupts split out to multiple levels to allow easier
expansion.
1.5 IBM System 3 Simulator
- Written by Charles (Dutch) Owen.
1.6 VAX Simulator (in debug)
- Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3,
RLV12, TSV11, DZV11, LPV11, PCV11.
- CDROM capability has been added to the RQDX3, to allow testing
with VMS hobbyist images.
1.7 SDS 940 Simulator (not tested)
- Simulates SDS 940, 16K-64K memory, fixed and moving head
disk, magtape, line printer, console.
1.8 Altair Z80
- Revised from Charles (Dutch) Owen's original by Peter Schorn.
- MITS 8080 with full Z80 simulation.
- 4K and 8K BASIC packages, Prolog package.
1.9 Interdata
The I4 simulator has been withdrawn for major rework. Look for
a complete 16b/32b Interdata simulator sometime next year.
2. Release Notes
2.1 SCP
SCP now allows replicated registers in unit structures to be
modelled as arrays. All replicated register declarations have
been replaced by register array declarations. As a result,
save files from prior revisions will generate errors after
restoring main memory.
2.2 PDP-11
The Unibus map code is in debug. The map was implemented primarily
to allow source sharing with the VAX, which requires a DMA map.
DMA devices work correctly with the Unibus map disabled.
The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple
drives, and booted the completed system from scratch.
2.3 VAX
The VAX simulator will run the boot code up to the >>> prompt. It
can successfully process a SHOW DEVICE command. It runs the HCORE
instruction diagnostic. It can boot the hobbyist CD through SYSBOOT
and through the date/time dialog and restore the hobbyist CD, using
standalone backup. On the boot of the restored disk, it gets to the
date/time dialog, and then crashes.
2.4 SDS 940
The SDS 940 is untested, awaiting real code.
2.5 GCC Optimization
At -O2 and above, GCC does not correctly compile the simulators which
use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is
that optimized state maintained in registers is being used in the
setjmp processing routine. On the PDP-11 and PDP-10, all of this
state has been either made global, or volatile, to encourage GCC to
keep the state up to date in memory. The VAX is still vulnerable.
3. Work list
3.1 SCP
- Better ENABLE/DISABLE.
3.2 PDP-11 RQDX3
Software mapped mode, RCT read simulation, VMS debug.
783 lines
22 KiB
Plaintext
783 lines
22 KiB
Plaintext
To: Users
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From: Bob Supnik
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Subj: 18b PDP Simulator Usage
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Date: 1-Dec-01
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2001, written by Robert M Supnik
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This memorandum documents the PDP-4, PDP-7, PDP-9, and PDP-15 simulators.
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1. Simulator Files
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To compile a particular model in the 18b family, you must include the appropriate
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switch in the compilation command line:
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PDP-4/ PDP4
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PDP-7/ PDP7
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PDP-9/ PDP9
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PDP-15/ PDP15
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If no model is specified, the default is the PDP-9.
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sim/ sim_defs.h
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sim_sock.h
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sim_tmxr.h
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scp.c
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scp_tty.c
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sim_rev.c
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sim_sock.c
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sim_tmxr.c
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sim/pdp18b/ pdp18b_defs.h
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pdp18b_cpu.c
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pdp18b_drm.c
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pdp18b_dt.c
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pdp18b_lp.c
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pdp18b_mt.c
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pdp18b_rf.c
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pdp18b_rp.c
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pdp18b_stddev.c
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pdp18b_sys.c
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pdp18b_tt1.c
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2. 18b PDP Features
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The other four 18b PDP's (PDP-4, PDP-7, PDP-9, PDP-15) are very similar
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and are configured as follows:
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system device simulates
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name(s)
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PDP-4 CPU PDP-4 CPU with 8KW of memory
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PTR,PTP integral paper tape/Type 75 punch
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TTI,TTO KSR28 console terminal (Baudot code)
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LPT Type 62 line printer (Hollerith code)
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CLK integral real-time clock
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PDP-7 CPU PDP-7 CPU with 32KW of memory
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- Type 177 extended arithmetic element (EAE)
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- Type 148 memory extension
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PTR,PTP Type 444 paper tape reader/Type 75 punch
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TTI,TTO KSR 33 console terminal
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LPT Type 647 line printer
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CLK integral real-time clock
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DRM Type 24 serial drum
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PDP-9 CPU PDP-9 CPU with 32KW of memory
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- KE09A extended arithmetic element (EAE)
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- KF09A automatic priority interrupt (API)
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- KG09B memory extension
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- KP09A power detection
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- KX09A memory protection
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PTR,PTP PC09A paper tape reader/punch
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TTI,TTO KSR 33 console terminal
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TTI1,TTO1 LT09A second console terminal
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LPT Type 647E line printer
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CLK integral real-time clock
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RF RF09/RS09 fixed-head disk
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DT TC02/TU55 DECtape
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MT TC59/TU10 magnetic tape
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PDP-15 CPU PDP-15 CPU with 32KW of memory
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- KE15 extended arithmetic element (EAE)
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- KA15 automatic priority interrupt (API)
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- KF15 power detection
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- KM15 memory protection
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PTR,PTP PC15 paper tape reader/punch
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TTI,TTO KSR 35 console terminal
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TTI1,TTO1 LT15 second console terminal
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LPT LP15 line printer
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CLK integral real-time clock
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RP RP15/RP02 disk pack
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RF RF15/RS09 fixed-head disk
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DT TC15/TU56 DECtape
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MT TC59/TU10 magnetic tape
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The DRM, RF, RP, DT, and MT devices can be DISABLEd.
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The 18b PDP simulators implement several unique stop conditions:
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- an unimplemented instruction is decoded, and register
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STOP_INST is set
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- more than XCTMAX nested executes are detected during
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instruction execution
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The PDP-4 and PDP-7 loaders support only RIM format tapes. The PDP-9
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and PDP-15 support both RIM and BIN format tapes. If the file extension
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is .RIM, or the -r switch is specified with LOAD, the file is assumed to
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be RIM format; if the file extension is not .RIM, or if the -b switch is
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specified, the file is assumed to be BIN format.
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2.1 CPU
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The CPU options are the presence of the EAE, the presense of the API (for
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the PDP-9 and PDP-15), and the size of main memory.
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SET CPU EAE enable EAE
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SET CPU NOEAE disable EAE
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SET CPU API enable API
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SET CPU NOAPI disable API
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SET CPU 4K set memory size = 4K
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SET CPU 8K set memory size = 8K
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SET CPU 12K set memory size = 12K
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SET CPU 16K set memory size = 16K
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SET CPU 20K set memory size = 20K
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SET CPU 24K set memory size = 24K
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SET CPU 28K set memory size = 28K
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SET CPU 32K set memory size = 32K
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SET CPU 48K set memory size = 48K
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SET CPU 64K set memory size = 64K
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SET CPU 80K set memory size = 80K
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SET CPU 96K set memory size = 96K
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SET CPU 112K set memory size = 112K
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SET CPU 128K set memory size = 128K
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Memory sizes greater than 8K are only available on the PDP-7, PDP-9, and
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PDP-15; memory sizes greater than 32KW are only available on the PDP-15.
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If memory size is being reduced, and the memory being truncated contains
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non-zero data, the simulator asks for confirmation. Data in the truncated
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portion of memory is lost. Initial memory size is 8K for the PDP-4, 32K
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for the PDP-7 and PDP-9, and 128K for the PDP-15.
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CPU registers include the visible state of the processor as well as the
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control registers for the interrupt system.
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system name size comments
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all PC addr program counter
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all AC 18 accumulator
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all L 1 link
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7,9,15 MQ 18 multiplier-quotient
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7,9,15 SC 6 shift counter
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7,9,15 EAE_AC_SIGN 1 EAE AC sign
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all SR 18 front panel switches
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all INT[0:4] 32 interrupt requests,
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0:3 = API levels 0-3
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4 = PI level
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all IORS 18 IORS register
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all ION 1 interrupt enable
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all ION_DELAY 2 interrupt enable delay
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9,15 APIENB 1 API enable
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9,15 APIREQ 8 API requesting levels
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9,15 APIACT 8 API active levels
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9,15 BR addr memory protection bounds
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15 XR 18 index register
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15 LR 18 limit register
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15 BR 17 memory protection bounds
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9,15 USMD 1 user mode
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9,15 USMDBUF 1 user mode buffer
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9,15 NEXM 1 non-existent memory violation
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9,15 PRVN 1 privilege violation
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7,9 EXTM 1 extend mode
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7,9 EXTM_INIT 1 extend mode value after reset
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15 BANKM 1 bank mode
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15 BANKM_INIT 1 bank mode value after reset
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7 TRAPM 1 trap mode
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7,9,15 TRAPP 1 trap pending
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7,9 EMIRP 1 EMIR instruction pending
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9,15 RESTP 1 DBR or RES instruction pending
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9,15 PWRFL 1 power fail flag
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all OLDPC addr PC prior to last transfer
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all STOP_INST 1 stop on undefined instruction
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all WRU 8 interrupt character
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"addr" signifies the address width of the system (13b for the PDP-4, 15b for
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the PDP-7 and PDP-9, 17b for the PDP-15).
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2.2 Programmed I/O Devices
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2.2.1 Paper Tape Reader (PTR)
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The paper tape reader (PTR) reads data from a disk file. The POS
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register specifies the number of the next data item to be read. Thus,
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by changing POS, the user can backspace or advance the reader.
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On the PDP-4 and PDP-7, the paper tape reader supports the BOOT command.
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BOOT PTR copies the RIM loader into memory and starts it running, while
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BOOT -F PTR copies the funny format binary loader into memory and starts
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it running.
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The paper tape reader implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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ERR 1 error flag (PDP-9, PDP-15 only)
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POS 31 position in the input file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape
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end of file 1 report error and stop
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0 out of tape
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OS I/O error x report error and stop
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2.2.2 Paper Tape Punch (PTP)
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The paper tape punch (PTP) writes data to a disk file. The POS
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register specifies the number of the next data item to be written.
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Thus, by changing POS, the user can backspace or advance the punch.
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The paper tape punch implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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ERR 1 error flag (PDP-9, PDP-15 only)
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape or paper
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OS I/O error x report error and stop
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2.2.3 Terminal Input (TTI)
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The terminal input (TTI) polls the console keyboard for input. The
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input side has one option, UC; when set, it automatically converts lower
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case input to upper case.
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The PDP-9 and PDP-15 operate the console terminal (TTI/TTO), by default,
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as half duplex. For backward compatibility, on the PDP-9 and PDP-15
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the first terminal input has a second option, FDX; when set, it operates
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the terminal input in full-duplex mode. The second terminal is always
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full duplex.
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The terminal input implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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POS 31 number of characters input
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TIME 24 keyboard polling interval
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2.2.4 Terminal Output (TTO)
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The terminal output (TTO) writes to the simulator console window. The
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terminal output has one option, UC; when set, it suppresses lower case
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output (so that ALTMODE is not echoed as }).
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The terminal output implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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POS 31 number of chararacters output
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TIME 24 time from I/O initiation to interrupt
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2.2.5 Line Printer (LPT)
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The line printer (LPT) writes data to a disk file. The POS register
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specifies the number of the next data item to be written. Thus,
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by changing POS, the user can backspace or advance the printer.
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The PDP-4 used a Type 62 printer controller, with these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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SPC 1 spacing done flag
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BPTR 6 print buffer pointer
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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LBUF[0:119] 8 line buffer
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The PDP-7 and PDP-7 used a Type 647 printer controller, with these
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registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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ENABLE 1 interrupt enable (PDP-9 only)
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ERR 1 error flag
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BPTR 7 print buffer pointer
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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LBUF[0:119] 8 line buffer
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The PDP-15 used an LP15 printer controller, with these registers:
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name size comments
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STA 18 status register
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MA 18 DMA memory address
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INT 1 interrupt pending flag
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ENABLE 1 interrupt enable
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LCNT 8 line counter
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BPTR 7 print buffer pointer
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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LBUF[0:131] 8 line buffer
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For all three models, error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape or paper
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OS I/O error x report error and stop
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2.2.6 Real-Time Clock (CLK)
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The real-time clock (CLK) implements these registers:
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name size comments
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INT 1 interrupt pending flag
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DONE 1 device done flag
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ENABLE 1 clock enable
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TIME 24 clock frequency
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TPS 8 ticks per second (60 or 50)
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The real-time clock autocalibrates; the clock interval is adjusted up or
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down so that the clock tracks actual elapsed time.
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2.2.7 Second Terminal (TTI1, TTO1)
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The second terminal consists of two independent devices, TTI1 and TTO1.
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The second terminal performs input and output through a Telnet session
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connected to a user-specified port. The ATTACH command specifies the
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port to be used:
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ATTACH TTI1 <port>(cr) -- set up listening port
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where port is a decimal number between 1 and 65535 that is not being used
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for other TCP/IP activities.
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Once TTI1 is attached and the simulator is running, the terminal listens
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for a connection on the specified port. It assumes that the incoming
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connection is a Telnet connection. The connection remain opens until
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disconnected by the Telnet client, or by a DETACH TTI1 command.
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The second terminal input has one option, UC; when set, it automatically
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converts lower case input to upper case. The second terminal output also
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has one option, UC; when set, it suppresses lower case output (so that
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ALTMODE is not echoed as }).
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The SHOW TTI1 LINESTATUS command displays the current connection to the
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second terminal.
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The second terminal input implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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POS 31 number of characters input
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TIME 24 keyboard polling interval
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The second terminal output implements these registers:
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name size comments
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BUF 8 last data item processed
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INT 1 interrupt pending flag
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DONE 1 device done flag
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POS 31 number of chararacters output
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TIME 24 time from I/O initiation to interrupt
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2.3 RP15/RP02 Disk Pack (RP)
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RP15 options include the ability to make units write enabled or write locked:
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SET RPn LOCKED set unit n write locked
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SET RPn ENABLED set unit n write enabled
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Units can also be REMOVEd or ADDed to the configuration.
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The RP15 implements these registers:
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name size comments
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STA 18 status A
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STB 18 status B
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|
DA 18 disk address
|
|
MA 18 current memory address
|
|
WC 18 word count
|
|
INT 1 interrupt pending flag
|
|
BUSY 1 control busy flag
|
|
STIME 24 seek time, per cylinder
|
|
RTIME 24 rotational delay
|
|
STOP_IOE 1 stop on I/O error
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
end of file x assume rest of disk is zero
|
|
|
|
OS I/O error x report error and stop
|
|
|
|
2.4 Type 24 Serial Drum (DRM)
|
|
|
|
The serial drum (DRM) implements these registers:
|
|
|
|
name size comments
|
|
|
|
DA 9 drum address (sector number)
|
|
MA 15 current memory address
|
|
INT 1 interrupt pending flag
|
|
DONE 1 device done flag
|
|
ERR 1 error flag
|
|
WLK 32 write lock switches
|
|
TIME 24 rotational latency, per word
|
|
STOP_IOE 1 stop on I/O error
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
Drum data files are buffered in memory; therefore, end of file and OS
|
|
I/O errors cannot occur.
|
|
|
|
2.5 RF09/RF15/RS09 Fixed Head Disk (RF)
|
|
|
|
The RF09/RF15 implements these registers:
|
|
|
|
name size comments
|
|
|
|
STA 18 status
|
|
DA 21 current disk address
|
|
MA 18 memory address (in memory)
|
|
WC 18 word count (in memory)
|
|
BUF 18 data buffer (diagnostic only)
|
|
INT 1 interrupt pending flag
|
|
WLK[0:7] 16 write lock switches for disks 0-7
|
|
TIME 24 rotational delay, per word
|
|
BURST 1 burst flag
|
|
STOP_IOE 1 stop on I/O error
|
|
|
|
The RF09/RF15 is a three-cycle data break device. If BURST = 0, word
|
|
transfers are scheduled individually; if BURST = 1, the entire transfer
|
|
occurs in a single data break.
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
RF15/RF09 data files are buffered in memory; therefore, end of file and OS
|
|
I/O errors cannot occur.
|
|
|
|
2.6 TC02/TU55 and TC15/TU56 DECtape (DT)
|
|
|
|
DECtapes drives are numbered 1-8; in the simulator, drive 8 is unit 0.
|
|
DECtape options include the ability to make units write enabled or write
|
|
locked.
|
|
|
|
SET DTn LOCKED set unit n write locked
|
|
SET DTn ENABLED set unit n write enabled
|
|
|
|
Units can also be REMOVEd or ADDed to the configuration.
|
|
|
|
The TC02/TC15 supports both PDP-8 format and PDP-9/11/15 format DECtape
|
|
images. ATTACH tries to determine the tape format from the DECtape image;
|
|
the user can force a particular format with switches:
|
|
|
|
-f foreign (PDP-8) format
|
|
-n native (PDP-9/11/15) format
|
|
|
|
The DECtape controller is a data-only simulator; the timing and mark
|
|
track, and block header and trailer, are not stored. Thus, the WRITE
|
|
TIMING AND MARK TRACK function is not supported; the READ ALL function
|
|
always returns the hardware standard block header and trailer; and the
|
|
WRITE ALL function dumps non-data words into the bit bucket.
|
|
|
|
The DECtape controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
DTSA 12 status register A
|
|
DTSB 12 status register B
|
|
INT 1 interrupt pending flag
|
|
ENB 1 interrupt enable flag
|
|
DTF 1 DECtape flag
|
|
ERF 1 error flag
|
|
CA 18 current address (memory location 30)
|
|
WC 18 word count (memory location 31)
|
|
LTIME 31 time between lines
|
|
ACTIME 31 time to accelerate to full speed
|
|
DCTIME 31 time to decelerate to a full stop
|
|
SUBSTATE 2 read/write command substate
|
|
POS[0:7] 31 position, in lines, units 0-7
|
|
STATT[0:7] 31 unit state, units 0-7
|
|
|
|
It is critically important to maintain certain timing relationships
|
|
among the DECtape parameters, or the DECtape simulator will fail to
|
|
operate correctly.
|
|
|
|
- LTIME must be at least 6
|
|
- ACTIME must be less than DCTIME, and both need to be at
|
|
least 100 times LTIME
|
|
|
|
2.7 TC59/TU10 Magnetic Tape (MT)
|
|
|
|
Magnetic tape options include the ability to make units write enabled or
|
|
or write locked.
|
|
|
|
SET MTn LOCKED set unit n write locked
|
|
SET MTn ENABLED set unit n write enabled
|
|
|
|
Units can also be REMOVEd or ADDed to the configuration.
|
|
|
|
The magnetic tape controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
CMD 18 command
|
|
STA 18 main status
|
|
MA 18 memory address (in memory)
|
|
WC 18 word count (in memory)
|
|
INT 1 interrupt pending flag
|
|
STOP_IOE 1 stop on I/O error
|
|
TIME 24 record delay
|
|
UST[0:7] 24 unit status, units 0-7
|
|
POS[0:7] 31 position, units 0-7
|
|
|
|
Error handling is as follows:
|
|
|
|
error processed as
|
|
|
|
not attached tape not ready
|
|
|
|
end of file (read or space) end of physical tape
|
|
(write) ignored
|
|
|
|
OS I/O error report error and stop
|
|
|
|
2.8 Symbolic Display and Input
|
|
|
|
The 18b PDP simulators implement symbolic display and input. Display is
|
|
controlled by command line switches:
|
|
|
|
-a display as ASCII character
|
|
-c display as (sixbit) character string
|
|
-m display instruction mnemonics
|
|
|
|
The PDP-15 also recognizes an additional switch:
|
|
|
|
-p display as packed ASCII (five 7b ASCII
|
|
characters in two 18b words)
|
|
|
|
Input parsing is controlled by the first character typed in or by command
|
|
line switches:
|
|
|
|
' or -a ASCII character
|
|
" or -c three character sixbit string
|
|
alphabetic instruction mnemonic
|
|
numeric octal number
|
|
|
|
The PDP-15 also recognizes an additional input mode:
|
|
|
|
# or -p five character packed ASCII string in
|
|
two 18b words
|
|
|
|
Instruction input uses standard 18b PDP assembler syntax. There are six
|
|
instruction classes: memory reference, EAE, index (PDP-15 only), IOT,
|
|
operate, and LAW.
|
|
|
|
Memory reference instructions have the format
|
|
|
|
memref {I/@} address{,X}
|
|
|
|
where I (PDP-4, PDP-7, PDP-9) /@ (PDP-15) signifies indirect reference,
|
|
and X signifies indexing (PDP-15 in page mode only). The address is an
|
|
octal number in the range 0 - 017777 (PDP-4, PDP-7, PDP-9, and PDP-15 in
|
|
bank mode) or 0 - 07777 (PDP-15 in page mode).
|
|
|
|
IOT instructions consist of single mnemonics, eg, KRB, TLS. IOT instructions
|
|
may be or'd together
|
|
|
|
iot iot iot...
|
|
|
|
IOT's may also include the number 10, signifying clear the accumulator
|
|
|
|
iot 10
|
|
|
|
The simulator does not check the legality of IOT combinations. IOT's for
|
|
which there is no opcode may be specified as IOT n, where n is an octal
|
|
number in the range 0 - 07777.
|
|
|
|
EAE instructions have the format
|
|
|
|
eae {+/- shift count}
|
|
|
|
EAE instructions may be or'd together
|
|
|
|
eae eae eae...
|
|
|
|
The simulator does not check the legality of EAE combinations. EAE's for
|
|
which there is no opcode may be specified as EAE n, where n is an octal
|
|
number in the range 0 - 037777.
|
|
|
|
Index instructions (PDP-15 only) have the format
|
|
|
|
index {immediate}
|
|
|
|
The immediate, if allowed, must be in the range of -0400 to +0377.
|
|
|
|
Operate instructions have the format
|
|
|
|
opr opr opr...
|
|
|
|
The simulator does not check the legality of the proposed combination. The
|
|
operands for MUY and DVI must be deposited explicitly.
|
|
|
|
Finally, the LAW instruction has the format
|
|
|
|
LAW immediate
|
|
|
|
where immediate is in the range of 0 to 017777.
|
|
|
|
2.9 Character Sets
|
|
|
|
The PDP-4's console was an ASR-28 Teletype; its character encoding was
|
|
Baudot. The PDP-4's line printer used a modified Hollerith character
|
|
set. The PDP-7's and PDP-9's consoles were KSR-33 Teletypes; their
|
|
character sets were basically ASCII. The PDP-7's and PDP-9's line
|
|
printers used sixbit encoding (ASCII codes 040 - 0137 masked to six
|
|
bits). The PDP-15's I/O devices were all ASCII. The following table
|
|
provides equivalences between ASCII characters and the PDP-4's I/O devices.
|
|
In the console table, FG stands for figures (upper case).
|
|
|
|
PDP-4 PDP-4
|
|
ASCII console line printer
|
|
|
|
000 - 006 none none
|
|
bell FG+024 none
|
|
010 - 011 none none
|
|
lf 010 none
|
|
013 - 014 none none
|
|
cr 002 none
|
|
016 - 037 none none
|
|
space 004 000
|
|
! FG+026 none
|
|
" FG+021 none
|
|
# FG+005 none
|
|
$ FG+062 none
|
|
% none none
|
|
& FG+013 none
|
|
' FG+032 none
|
|
( FG+036 057
|
|
) FG+011 055
|
|
* none 072
|
|
+ none 074
|
|
, FG+006 033
|
|
- FG+030 054
|
|
. FG+007 073
|
|
/ FG+027 021
|
|
0 FG+015 020
|
|
1 FG+035 001
|
|
2 FG+031 002
|
|
3 FG+020 003
|
|
4 FG+012 004
|
|
5 FG+001 005
|
|
6 FG+025 006
|
|
7 FG+034 007
|
|
8 FG+014 010
|
|
9 FG+003 011
|
|
: FG+016 none
|
|
; FG+017 none
|
|
< none 034
|
|
= none 053
|
|
> none 034
|
|
? FG+023 037
|
|
@ none {MID DOT} 040
|
|
A 030 061
|
|
B 023 062
|
|
C 016 063
|
|
D 022 064
|
|
E 020 065
|
|
F 026 066
|
|
G 013 067
|
|
H 005 070
|
|
I 014 071
|
|
J 032 041
|
|
K 036 042
|
|
L 011 043
|
|
M 007 044
|
|
N 006 045
|
|
O 003 046
|
|
P 015 047
|
|
Q 035 050
|
|
R 012 051
|
|
S 024 022
|
|
T 001 023
|
|
U 034 024
|
|
V 017 025
|
|
W 031 026
|
|
X 027 027
|
|
Y 025 030
|
|
Z 021 031
|
|
[ none none
|
|
\ none {OVERLINE} 056
|
|
] none none
|
|
^ none {UP ARROW} 035
|
|
_ none UC+040
|
|
0140 - 0177 none none
|