# Not meant for direct top level usage. Used with 
# tb_rlink_(direct|serport|...)[_ssim].vbom and config
# lines to generate the different cases.
#
# libs
../../slvtypes.vhd
../../genlib/genlib.vhd
../../comlib/comlib.vhd
../../rbus/rblib.vhd
../../rbus/rbdlib.vhd
../rlinklib.vbom
../../simlib/simlib.vhd
../../simlib/simbus.vhd
# components
../../simlib/simclk.vbom
../../simlib/simclkcnt.vbom
../../genlib/tb/clkdivce_tb.vbom
../../rbus/rbd_tester.vbom
${uut := tbd_rlink_direct.vbom}  -UUT
# design
tb_rlink.vhd
@top:tb_rlink
