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mirror of https://github.com/wfjm/w11.git synced 2026-05-03 14:49:57 +00:00

add GitHub action; code/comment cosmetics

This commit is contained in:
wfjm
2022-04-17 19:37:26 +02:00
parent 6b8c0633bc
commit 0c3d853a2b
10 changed files with 86 additions and 14 deletions

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@@ -1,4 +1,4 @@
-- $Id: tb_arty.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: tb_arty.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2016-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -10,7 +10,7 @@
-- simlib/simclkcnt
-- rlink/tbcore/tbcore_rlink
-- xlib/sfs_gsim_core
-- tb_basys3_core
-- tb_arty_core
-- serport/tb/serport_master_tb
-- arty_aif [UUT]
--

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@@ -1,4 +1,4 @@
-- $Id: sys_w11a_arty.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: sys_w11a_arty.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2018-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -169,7 +169,6 @@ architecture syn of sys_w11a_arty is
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_SYSMON : rb_sres_type := rb_sres_init;
signal RB_SRES_USRACC : rb_sres_type := rb_sres_init;

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@@ -1,4 +1,4 @@
-- $Id: sys_w11a_br_arty.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: sys_w11a_br_arty.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2016-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -153,7 +153,6 @@ architecture syn of sys_w11a_br_arty is
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_SYSMON : rb_sres_type := rb_sres_init;
signal RB_SRES_USRACC : rb_sres_type := rb_sres_init;

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@@ -1,4 +1,4 @@
-- $Id: sys_w11a_as7.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: sys_w11a_as7.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -155,7 +155,6 @@ architecture syn of sys_w11a_as7 is
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_SYSMON : rb_sres_type := rb_sres_init;
signal RB_SRES_USRACC : rb_sres_type := rb_sres_init;

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@@ -1,4 +1,4 @@
-- $Id: sys_w11a_br_as7.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: sys_w11a_br_as7.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2018-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -131,7 +131,6 @@ architecture syn of sys_w11a_br_as7 is
signal RB_MREQ : rb_mreq_type := rb_mreq_init;
signal RB_SRES : rb_sres_type := rb_sres_init;
signal RB_SRES_CPU : rb_sres_type := rb_sres_init;
signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
signal RB_SRES_SYSMON : rb_sres_type := rb_sres_init;
signal RB_SRES_USRACC : rb_sres_type := rb_sres_init;

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@@ -1,4 +1,4 @@
-- $Id: sys_w11a_c7.vhd 1181 2019-07-08 17:00:50Z mueller $
-- $Id: sys_w11a_c7.vhd 1211 2021-08-28 11:20:34Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2017-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -15,7 +15,7 @@
-- w11a/pdp11_bram_memctl
-- bplib/fx2rlink/ioleds_sp1c
-- w11a/pdp11_hio70
-- bplib/bpgen/sn_humanio_eum_rbus
-- bplib/bpgen/sn_humanio_emu_rbus
-- bplib/sysmon/sysmonx_rbus_base
-- vlib/rbus/rbd_usracc
-- vlib/rbus/rb_sres_or_4

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@@ -1,4 +1,4 @@
-- $Id: simlib.vhd 1202 2019-08-13 17:23:16Z mueller $
-- $Id: simlib.vhd 1210 2021-08-26 13:27:26Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--