From 1401e20a2eaf44e176aad088e66456134939ea7c Mon Sep 17 00:00:00 2001 From: wfjm Date: Thu, 7 Jul 2022 09:30:31 +0200 Subject: [PATCH] Some minor updates - rtl/vlib/rlink/tbcore/rlink_cext_dpi.c: add function prototypes - rtl/sys_gen/tst_rlink/cmoda7/tb: add missing ssim vbom - tools/bin - ti_w11: update --help text, add -ar,-n4d,-bn4d - tmuconv: add DEUNA defs --- README.md | 2 +- doc/CHANGELOG.md | 2 + doc/README_known_issues.md | 22 ++- .../cmoda7/tb/tb_tst_rlink_c7_ssim.vbom | 8 + rtl/vlib/rlink/tbcore/rlink_cext_dpi.c | 8 +- tools/bin/ti_w11 | 14 +- tools/bin/tmuconv | 10 +- tools/man/man1/tmuconv.1 | 137 +++++++++++++++++- 8 files changed, 183 insertions(+), 20 deletions(-) create mode 100644 rtl/sys_gen/tst_rlink/cmoda7/tb/tb_tst_rlink_c7_ssim.vbom diff --git a/README.md b/README.md index c1c334d5..697ef211 100644 --- a/README.md +++ b/README.md @@ -70,7 +70,7 @@ which is ### License This project is released under the [GPL V3 license](https://www.gnu.org/licenses/gpl-3.0.html), -all files contain a [SPDX](https://spdx.org/)-style disclaimer: +all files contain an [SPDX](https://spdx.org/)-style disclaimer: SPDX-License-Identifier: GPL-3.0-or-later diff --git a/doc/CHANGELOG.md b/doc/CHANGELOG.md index 05632b43..0fcf9af2 100644 --- a/doc/CHANGELOG.md +++ b/doc/CHANGELOG.md @@ -38,6 +38,8 @@ The full set of tests is only run for tagged releases. - **/tbrun.yml: since nexys4 not longer available switch to nexys4d - tools/bin - njobihtm: add -n and -h options + - ti_w11: update --help text, add -ar,-n4d,-bn4d + - tmuconv: add DEUNA defs - tools/dox - w11_(cpp|vhd_all).Doxyfile: for Doxygen V1.9.4 - w11_tcl.Doxyfile: removed, Tcl support removed in Doxygen V1.8.18 diff --git a/doc/README_known_issues.md b/doc/README_known_issues.md index 3f4a5354..b66acaf8 100644 --- a/doc/README_known_issues.md +++ b/doc/README_known_issues.md @@ -187,13 +187,6 @@ simulations currently fail due to startup and initialization problems. Cause is MMCM/PLL startup, which is not properly reflected in the test bench. Will be resolved in an upcoming release. -### V0.73-1 {[issue #9](https://github.com/wfjm/w11/issues/9)} -- Vivado xelab sometimes extremely slow -as of Vivado 2016.2 `xelab` shows sometimes extremely long build times, -especially for generated post-synthesis VHDL models. But also building a -behavioral simulation for a w11a design can take 25 min. Even though -post-synthesis or post-routing models are now generated in Verilog working -with `xsim` is cumbersome and time consuming. - ### V0.65-2 {[issue #7](https://github.com/wfjm/w11/issues/7)} -- Some exotic RH70/RP/RM features not implemented some exotic RH70/RP/RM features and conditions not implemented yet - last block transfered flag (in DS) @@ -382,6 +375,19 @@ still deconfigured for Vivado designs, but this has much less practical impact. ## Closed issues +### V0.73-1 {[issue #9](https://github.com/wfjm/w11/issues/9)} -- Vivado xelab sometimes extremely slow +#### Original Issue +as of Vivado 2016.2 `xelab` shows sometimes extremely long build times, +especially for generated post-synthesis VHDL models. But also building a +behavioral simulation for a w11a design can take 25 min. Even though +post-synthesis or post-routing models are now generated in Verilog working +with `xsim` is cumbersome and time consuming. + +#### Reason for closure on 2022-07-05 +Re-checked with Vivado 2022.1. +Building models with `xelab` is now quite fast. +The issue disappeared somewhere between Vivado 2016.3 and 2022.1. + ### V0.76-2 {[issue #17](https://github.com/wfjm/w11/issues/17)} -- Help wanted: Testing with Arty S7 appreciated #### Original Issue The w11a design for Arty S7 (50 die size), see rtl/sys_gen/w11a/artys7, @@ -394,7 +400,7 @@ documentation of your board to avoid potential damage. Looking forward to receive test reports. -#### Reason for closure +#### Reason for closure on 2020-04-20 Apparently nobody invested into an Arty S7. The sys_w11a_as7 will be marked untested, removed from the default build and test flows, but kept in the repository. diff --git a/rtl/sys_gen/tst_rlink/cmoda7/tb/tb_tst_rlink_c7_ssim.vbom b/rtl/sys_gen/tst_rlink/cmoda7/tb/tb_tst_rlink_c7_ssim.vbom new file mode 100644 index 00000000..82fec27f --- /dev/null +++ b/rtl/sys_gen/tst_rlink/cmoda7/tb/tb_tst_rlink_c7_ssim.vbom @@ -0,0 +1,8 @@ +# configure for _*sim case +# Note: this tb uses sys_tst_rlink_c7.vbom in local directory +# (not in .. as usual) to allow a tb specific configure !!! +# configure +cmoda7_aif = sys_tst_rlink_c7_ssim.vhd +# design +tb_tst_rlink_c7.vbom +@top:tb_tst_rlink_c7 diff --git a/rtl/vlib/rlink/tbcore/rlink_cext_dpi.c b/rtl/vlib/rlink/tbcore/rlink_cext_dpi.c index b018f347..d2d60c29 100644 --- a/rtl/vlib/rlink/tbcore/rlink_cext_dpi.c +++ b/rtl/vlib/rlink/tbcore/rlink_cext_dpi.c @@ -1,9 +1,10 @@ -/* $Id: rlink_cext_dpi.c 1190 2019-07-13 17:05:39Z mueller $ +/* $Id: rlink_cext_dpi.c 1247 2022-07-06 07:04:33Z mueller $ * SPDX-License-Identifier: GPL-3.0-or-later - * Copyright 2016- by Walter F.J. Mueller + * Copyright 2016-2022 by Walter F.J. Mueller * * Revision History: * Date Rev Vers Comment + * 2022-07-05 1247 1.0.1 add function declarations to avoid xelab warnings * 2016-02-07 729 1.0 Initial version */ @@ -11,6 +12,9 @@ /* simple forwarders to call the old VHPI interface from DPI */ +int rlink_cext_getbyte(int clk); +int rlink_cext_putbyte(int dat); + DPI_DLLESPEC int rlink_cext_getbyte_dpi(int clk) { diff --git a/tools/bin/ti_w11 b/tools/bin/ti_w11 index d94763d8..cbade09b 100755 --- a/tools/bin/ti_w11 +++ b/tools/bin/ti_w11 @@ -1,10 +1,11 @@ #!/usr/bin/perl -w -# $Id: ti_w11 1172 2019-06-29 07:27:24Z mueller $ +# $Id: ti_w11 1248 2022-07-07 06:25:50Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright 2013-2019 by Walter F.J. Mueller +# Copyright 2013-2022 by Walter F.J. Mueller # # Revision History: # Date Rev Version Comment +# 2022-07-06 1248 1.4.5 update --help text, add -ar,-n4d,-bn4d # 2019-04-19 1133 1.4.4 for -e use .end start address when available # 2019-01-04 1103 1.4.3 add -ar,-n4d (ddr versions) # 2017-06-25 916 1.4.2 add -c7 (cmoda7 support) @@ -368,10 +369,13 @@ sub print_usage { print "usage: ti_w11 ...\n"; print " setup options for ghdl simulation runs:\n"; print " -c7 start tb_w11a_c7 simulation (default: -fx)\n"; + print " -ar start tb_w11a_arty simulation (default: -fx)\n"; + print " -bar start tb_w11a_br_arty simulation (default: -fx)\n"; + print " -n4d start tb_w11a_n4d simulation (default: -fx)\n"; + print " -bn4d start tb_w11a_br_n4d simulation (default: -fx)\n"; print " -b3 start tb_w11a_b3 simulation (default: -fx)\n"; print " -n4 start tb_w11a_n4 simulation\n"; print " -bn4 start tb_w11a_br_n4 simulation\n"; - print " -bar start tb_w11a_br_arty simulation (default: -fx)\n"; print " -n3 start tb_w11a_n3 simulation (default: -fc)\n"; print " -n2 start tb_w11a_n2 simulation (default: -fc)\n"; print " -s3 start tb_w11a_s3 simulation (default: -f2)\n"; @@ -400,6 +404,6 @@ sub print_usage { print " file type '.mac': on the fly compile with asm-11\n"; print " any other file type: assume lda format\n"; print "\n"; - print " either one of -s3,-n2,-n3,-b3,-n4,-bn4 must be given -> sim run\n"; - print " or one of -t or -u must be given -> fpga run\n"; + print " either one of -c7,-ar,-arb, ... ,-n2,-s3 must be given -> sim run\n"; + print " or one of -t or -u must be given -> fpga run\n"; } diff --git a/tools/bin/tmuconv b/tools/bin/tmuconv index 503ed55b..95089cd7 100755 --- a/tools/bin/tmuconv +++ b/tools/bin/tmuconv @@ -1,10 +1,11 @@ #!/usr/bin/perl -w -# $Id: tmuconv 1189 2019-07-13 16:41:07Z mueller $ +# $Id: tmuconv 1248 2022-07-07 06:25:50Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright 2008-2019 by Walter F.J. Mueller +# Copyright 2008-2022 by Walter F.J. Mueller # # Revision History: # Date Rev Version Comment +# 2022-07-06 1246 1.1.5 add DEUNA defs # 2019-07-13 1189 1.1.4 drop superfluous exists for $opts # 2018-12-18 1089 1.1.3 add and use bailout # 2018-10-05 1053 1.1.2 use 'ca.*' instead of 'sy.*' fields @@ -350,6 +351,10 @@ my %pdp11_regs = ( # use simh naming convention 176502=> "tib.bu", 176504=> "tob.cs", 176506=> "tob.bu", + 174516=> "de.pr3", + 174514=> "de.pr2", + 174512=> "de.pr1", + 174510=> "de.pr0", 174400=> "rl.cs ", 174402=> "rl.ba ", 174404=> "rl.da ", @@ -722,6 +727,7 @@ sub do_file { $emtyp_str .= " 074 PC11-PTP" if ($emlast_addr == 0074); $emtyp_str .= " 100 KW11-L" if ($emlast_addr == 0100); $emtyp_str .= " 104 KW11-P" if ($emlast_addr == 0104); + $emtyp_str .= " 120 DEUNA" if ($emlast_addr == 0120); $emtyp_str .= " 160 RL11" if ($emlast_addr == 0160); $emtyp_str .= " 200 LP11" if ($emlast_addr == 0200); $emtyp_str .= " 220 RK11" if ($emlast_addr == 0220); diff --git a/tools/man/man1/tmuconv.1 b/tools/man/man1/tmuconv.1 index 1e3334d8..d73e7826 100644 --- a/tools/man/man1/tmuconv.1 +++ b/tools/man/man1/tmuconv.1 @@ -1,11 +1,11 @@ .\" -*- nroff -*- -.\" $Id: tmuconv.1 1237 2022-05-15 07:51:47Z mueller $ +.\" $Id: tmuconv.1 1248 2022-07-07 06:25:50Z mueller $ .\" SPDX-License-Identifier: GPL-3.0-or-later .\" Copyright 2013-2022 by Walter F.J. Mueller .\" .\" ------------------------------------------------------------------ . -.TH TMUCONV 1 2010-10-22 "Retro Project" "Retro Project Manual" +.TH TMUCONV 1 2022-07-06 "Retro Project" "Retro Project Manual" .\" ------------------------------------------------------------------ .SH NAME tmuconv \- convert w11a tmu output into human readable format @@ -60,6 +60,139 @@ trace ib transactions (ibus cycles) .\" ---------------------------------------------- .IP "\fB\-help\fR" print full help text and exit. +. +.\" ------------------------------------------------------------------ +.SH TRACE OUTPUT FORMAT +Each output line starts with the cycle number and the trace type. +The format of the rest of the line depends on trace type. + +\fB\-t_id\fP: the instruction decode trace gives +.RS 2 +.PD 0 +.IP "-" 2 +the PC of the instruction +.IP "-" +the PSW at the beginning(!) of the instruction +.IP "-" +the instruction word (as loaded into the instruction register) +.IP "-" +the instruction in MACRO-11 syntax +.IP "-" +the number of cycles of the previous(!) instruction +.PD +.RE +.PP + +.EX + cycle pc psw ireg code nc + 71587 id 006054 000011 012410 mov (r4)+,(r0) (4) + 71683 id 002146 000340 116767 movb nnn(pc),nnn(pc) (9) +.EE + +\fB\-t_ru\fP: the register update trace gives +.RS 2 +.PD 0 +.IP "-" 2 +the byte update indicator +.IP "-" +the register set (0 pr 1) +.IP "-" +the register number (0 to 7) +.IP "-" +the loaded data value +.IP "-" +in case of a stack pointer update the values of kernel, supervisor and user +stack pointers +.IP "-" +in case of an R0-R5 update the values of all these six registers +.IP "-" +the symbolic name of the register +.PD +.RE +.PP + +.EX + cycle b sr data + 71578 ru 0 07 006102 pc + 71649 ru 0 06 002000 002000*------ ------ ksp + 71634 ru 0 04 010752 006110 006112 177776 010752 010752*010642 r04 +.EE + +\fB\-t_em\fP: the memory transaction trace gives +.RS 2 +.PD 0 +.IP "-" 2 +the r/w flag +.IP "-" +the byte enables +.IP "-" +the memory address (as 22bit number) +.IP "-" +the data written to memory +.IP "-" +the data received from memory +.IP "-" +four flag bits 'crwh' indicating cancel, read, write, and cache-hit +.IP "-" +the number of extra wait cycles +.IP "-" +in case of vector fetches and associated stack pushes some descriptive text +.PD +.RE +.PP + +.EX + cycle be addr wdat rdat crwh nc + 11374 em w 11 00000004 000006 0010 (1) + 52574 em r 11 00002164 177624 0101 (1) + + 52530 em r 11 00000020 002142 0101 (1) + 52532 em r 11 00000022 000340 0101 (1) VFETCH 020 IOT + 52536 em w 11 00001776 000017 0010 (1) + 52538 em w 11 00001774 004316 0010 (1) SPUSH +.EE + +\fB\-t_ib\fP: the ibus transaction trace gives +.RS 2 +.PD 0 +.IP "-" 2 +two flag bits 'cr' indicating console and remote access +.IP "-" +two flag bits 'rm' indicating read/write and modify +.IP "-" +the byte enables +.IP "-" +the bus address (as 16bit number) +.IP "-" +the data written to bus +.IP "-" +the data received from bus +.IP "-" +the acknowledge flag +.IP "-" +the number of extra wait cycles +.IP "-" +if known, the symbolic name of the register +.PD +.RE +.PP + +.EX + cycle cr rmbe addr wdat rdat a nc name + 988 ib cr r 11 177500 000000 1 (0) ii.acr + 52583 ib -- w 11 177570 000001 1 (0) sdreg + 70729 ib -- r 11 177776 000004 1 (0) psw +.EE + +The w11 CPU starts a cache cycle for each read or write, and cancels the +cache request when an ibus access is detected. That's why an 'ib' line +is usually preceded by an 'em' line with the 'cancel' flag, like + +.EX + 52582 em w 11 00177570 000001 cancel 1000 (1) + 52583 ib -- w 11 177570 000001 1 (0) sdreg +.EE + . .\" ------------------------------------------------------------------ .SH EXAMPLES