From 15efcf961f69397b2b9a8a5ea3edcda1eeb997b5 Mon Sep 17 00:00:00 2001 From: wfjm Date: Sun, 30 Sep 2018 09:36:51 +0200 Subject: [PATCH] add dmpcnt test bench (short and preliminary) --- tools/tbench/cpu_all.dat | 3 +- tools/tbench/w11a_pcnt/test_pcnt_basics.tcl | 110 ++++++++++++++++++++ tools/tbench/w11a_pcnt/test_pcnt_regs.tcl | 44 ++++++++ tools/tbench/w11a_pcnt/w11a_pcnt_all.dat | 7 ++ 4 files changed, 163 insertions(+), 1 deletion(-) create mode 100644 tools/tbench/w11a_pcnt/test_pcnt_basics.tcl create mode 100644 tools/tbench/w11a_pcnt/test_pcnt_regs.tcl create mode 100644 tools/tbench/w11a_pcnt/w11a_pcnt_all.dat diff --git a/tools/tbench/cpu_all.dat b/tools/tbench/cpu_all.dat index be2a7fb7..e7a46b4a 100644 --- a/tools/tbench/cpu_all.dat +++ b/tools/tbench/cpu_all.dat @@ -1,4 +1,4 @@ -# $Id: cpu_all.dat 1044 2018-09-15 11:12:07Z mueller $ +# $Id: cpu_all.dat 1050 2018-09-23 15:46:42Z mueller $ # ## steering file for all cpu tests # @@ -8,4 +8,5 @@ @w11a_cmon/w11a_cmon_all.dat @w11a_hbpt/w11a_hbpt_all.dat @w11a_kw11p/w11a_kw11p_all.dat +@w11a_pcnt/w11a_pcnt_all.dat # diff --git a/tools/tbench/w11a_pcnt/test_pcnt_basics.tcl b/tools/tbench/w11a_pcnt/test_pcnt_basics.tcl new file mode 100644 index 00000000..d39e3d74 --- /dev/null +++ b/tools/tbench/w11a_pcnt/test_pcnt_basics.tcl @@ -0,0 +1,110 @@ +# $Id: test_pcnt_basics.tcl 1050 2018-09-23 15:46:42Z mueller $ +# +# Copyright 2018- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2018-09-23 1450 1.0 Initial version +# +# Test basic perf counter functionality + +# ---------------------------------------------------------------------------- +rlc log "test_pcnt_regs: test register response ------------------------------" + +if {[$cpu get haspcnt] == 0} { + rlc log " test_pcnt_regs-W: no pcnt unit found, test aborted" + return +} + +# -- Section A --------------------------------------------------------------- +rlc log " A: simple loop code ---------------------------------------" + +cpu0 ldasm -lst lst -sym sym { + . = 1000 +stack: +start: clr r0 + mov #32.,r1 +1$: inc r0 + sob r1,1$ + halt +stop: +} + +rlc log " A1: run code, with pcnt running --------------------" +# clear and start pcnt +$cpu cp \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "CLR"}] \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "STA"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT run] +# run code +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +rw11::asmtreg $cpu r0 32 r1 0 +# stop pcnt +$cpu cp \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "STO"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT] +# now some counters have well defined states +# 1 =0 cpu_km_prix +# 2 >0 cpu_km_pri0 +# 3 =0 cpu_km_wait +# 4 =0 cpu_sm +# 5 =0 cpu_um +# 6 67 cpu_inst +# 7 =0 cpu_vfetch +# 8 =0 cpu_irupt +# 9 33 cpu_pcload +rlc log " A2: test random access (ainc=0) --------------------" +# read pc(6) twice, (9) once, check status +$cpu cp \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 6 ainc 0] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 ainc 0] \ + -rreg pc.data -edata 67 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 waddr 1 ainc 0] \ + -rreg pc.data -edata 0 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 waddr 0 ainc 0] \ + -rreg pc.data -edata 67 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 waddr 1 ainc 0] \ + -rreg pc.data -edata 0 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 waddr 0 ainc 0] \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 9 ainc 0] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 9 ainc 0] \ + -rreg pc.data -edata 33 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 9 waddr 1 ainc 0] \ + -rreg pc.data -edata 0 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 9 waddr 0 ainc 0] + +rlc log " A3: test sequential access (ainc=1) ----------------" +# read pc(6) to pc(9) check status +$cpu cp \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 6 ainc 1] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 ainc 1] \ + -rreg pc.data -edata 67 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 6 waddr 1 ainc 1] \ + -rreg pc.data -edata 0 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 7 waddr 0 ainc 1] \ + -rreg pc.data -edata 0 \ + -rreg pc.data -edata 0 \ + -rreg pc.data -edata 0 \ + -rreg pc.data -edata 0 \ + -rreg pc.data -edata 33 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 9 waddr 1 ainc 1] \ + -rreg pc.data -edata 0 \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 10 waddr 0 ainc 1] + +rlc log " A3: test block access (ainc=1) ---------------------" +# read pc(3) to pc(9) check status +$cpu cp \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 3 ainc 1] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 3 ainc 1] \ + -rblk pc.data 14 -edata {0 0 0 0 0 0 67 0 0 0 0 0 33 0} \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 10 waddr 0 ainc 1] + +#rlc log " A4: test clear -------------------------------------" +$cpu cp \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "CLR"] \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 3 ainc 1] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 3 ainc 1] \ + -rblk pc.data 14 -edata {0 0 0 0 0 0 0 0 0 0 0 0 0 0} \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 10 waddr 0 ainc 1] diff --git a/tools/tbench/w11a_pcnt/test_pcnt_regs.tcl b/tools/tbench/w11a_pcnt/test_pcnt_regs.tcl new file mode 100644 index 00000000..559d0241 --- /dev/null +++ b/tools/tbench/w11a_pcnt/test_pcnt_regs.tcl @@ -0,0 +1,44 @@ +# $Id: test_pcnt_regs.tcl 1050 2018-09-23 15:46:42Z mueller $ +# +# Copyright 2018- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2018-09-23 1450 1.0 Initial version +# +# Test register response + +# ---------------------------------------------------------------------------- +rlc log "test_pcnt_regs: test register response ------------------------------" + +if {[$cpu get haspcnt] == 0} { + rlc log " test_pcnt_regs-W: no pcnt unit found, test aborted" + return +} + +# -- Section A --------------------------------------------------------------- +rlc log " A basic register access tests -----------------------------" + +rlc log " A1: write cntl, read stat --------------------------" +# test start,stop works and run flag follows +$cpu cp \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "CLR"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT] \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "STA"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT run] \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "STO"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT] +# test that load works, caddr and ainc follow in status, and that clr clears +$cpu cp \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 0x07 ainc 0] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 0x07 ainc 0] \ + -wreg pc.cntl [regbldkv rw11::PC_CNTL func "LOA" caddr 0x17 ainc 1] \ + -rreg pc.stat -edata [regbldkv rw11::PC_STAT caddr 0x17 ainc 1] \ + -wreg pc.cntl [regbld rw11::PC_CNTL {func "CLR"}] \ + -rreg pc.stat -edata [regbld rw11::PC_STAT] + +rlc log " A2: test err when written --------------------------" +$cpu cp \ + -wreg pc.stat 0x100 -estaterr \ + -wreg pc.data 0x100 -estaterr diff --git a/tools/tbench/w11a_pcnt/w11a_pcnt_all.dat b/tools/tbench/w11a_pcnt/w11a_pcnt_all.dat new file mode 100644 index 00000000..50ba53f3 --- /dev/null +++ b/tools/tbench/w11a_pcnt/w11a_pcnt_all.dat @@ -0,0 +1,7 @@ +# $Id: w11a_pcnt_all.dat 1050 2018-09-23 15:46:42Z mueller $ +# +## steering file for all w11a_pcnt tests +# +test_pcnt_regs.tcl +test_pcnt_basics.tcl +#