From 1c9dbeb4edec542108fc6122a36cdce8d364eb98 Mon Sep 17 00:00:00 2001 From: wfjm Date: Sun, 28 Apr 2019 12:51:58 +0200 Subject: [PATCH] dl11_buf: buffered DL11; add tbench - ibdr_dl11_buf: new DL11 interface with fifo buffering - ibdr_dl11: drop rbuf.rrdy, set rbuf.[rx]size0 instead - ibdr_maxisys: add ibdr_dl11_buf - librw11/RtraceTools: new, some helper methods for buffer tracing - librw11/Rw11CntlDL11: add dl11_buf readout - librwxxtpp/RtclRw11CntlDL11: add getters& setters for dl11_buf readout - ibd_dl11/util.tcl: setup defs for dl11_buf; add rdump proc - rw11/util.tcl: setup_tt: add dl{rxqlim,txrlim}; dlrrlim->dlrxrlim - oskit/*/*_boot.tcl: setup dlrxrlim - tbench/dl11: tbench for dl11(_buf) --- doc/CHANGELOG.md | 14 +- rtl/ibus/ibdlib.vhd | 22 +- rtl/ibus/ibdr_dl11.vhd | 22 +- rtl/ibus/ibdr_dl11_buf.vbom | 9 + rtl/ibus/ibdr_dl11_buf.vhd | 444 ++++++++++++++++++ rtl/ibus/ibdr_maxisys.vbom | 1 + rtl/ibus/ibdr_maxisys.vhd | 76 ++- rtl/sys_gen/w11a/arty/sys_w11a_arty.vhd | 3 +- rtl/sys_gen/w11a/basys3/sys_w11a_b3.vhd | 3 +- rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vhd | 3 +- rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd | 3 +- rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd | 5 +- rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vhd | 3 +- rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd | 3 +- tools/oskit/211bsd_rk/211bsd_rk_boot.tcl | 4 +- tools/oskit/211bsd_rl/211bsd_rl_boot.tcl | 4 +- tools/oskit/211bsd_rp/211bsd_rp_boot.tcl | 4 +- .../oskit/211bsd_rpeth/211bsd_rpeth_boot.tcl | 4 +- .../oskit/211bsd_rpmin/211bsd_rpmin_boot.tcl | 4 +- tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl | 4 +- tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl | 4 +- tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl | 4 +- .../oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl | 4 +- .../oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl | 4 +- .../rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl | 4 +- tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl | 4 +- tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl | 4 +- tools/oskit/u5ed_rk/u5ed_rk_boot.tcl | 4 +- tools/oskit/u7ed_rp/u7ed_rp_boot.tcl | 4 +- tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl | 6 +- tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl | 6 +- tools/src/librw11/Makefile | 3 +- tools/src/librw11/RtraceTools.cpp | 122 +++++ tools/src/librw11/RtraceTools.hpp | 42 ++ tools/src/librw11/Rw11CntlDL11.cpp | 289 +++++++++--- tools/src/librw11/Rw11CntlDL11.hpp | 48 +- tools/src/librw11/Rw11CntlDL11.ipp | 75 +++ tools/src/librwxxtpp/RtclRw11CntlDL11.cpp | 15 +- tools/tbench/dev_all.dat | 3 +- tools/tbench/dl11/dl11_all.dat | 7 + tools/tbench/dl11/test_dl11_loop.tcl | 115 +++++ tools/tbench/dl11/test_dl11_rx.tcl | 272 +++++++++++ tools/tbench/dl11/test_dl11_tx.tcl | 428 +++++++++++++++++ tools/tcl/ibd_dl11/util.tcl | 25 +- tools/tcl/rw11/util.tcl | 11 +- 45 files changed, 1992 insertions(+), 146 deletions(-) create mode 100644 rtl/ibus/ibdr_dl11_buf.vbom create mode 100644 rtl/ibus/ibdr_dl11_buf.vhd create mode 100644 tools/src/librw11/RtraceTools.cpp create mode 100644 tools/src/librw11/RtraceTools.hpp create mode 100644 tools/src/librw11/Rw11CntlDL11.ipp create mode 100644 tools/tbench/dl11/dl11_all.dat create mode 100644 tools/tbench/dl11/test_dl11_loop.tcl create mode 100644 tools/tbench/dl11/test_dl11_rx.tcl create mode 100644 tools/tbench/dl11/test_dl11_tx.tcl diff --git a/doc/CHANGELOG.md b/doc/CHANGELOG.md index 5b74f2ad..ac4d5818 100644 --- a/doc/CHANGELOG.md +++ b/doc/CHANGELOG.md @@ -30,6 +30,7 @@ The full set of tests is only run for tagged releases. - ib_rlim_{gen,slv}: new modules for implementation of rate limiters - ibdr_lp11_buf: new LP11 interface with fifo buffering - ibdr_pc11_buf: new PC11 interface with fifo buffering + - ibdr_dl11_buf: new DL11 interface with fifo buffering - simclkv: test bench clock generator with variable period - new verification codes - w11a_ibtst/*: tbench for ibd_ibtst @@ -37,10 +38,12 @@ The full set of tests is only run for tagged releases. - w11a/test_w11a_sdreg.tcl: tbench for sdreg - test_lp11_all.tcl: tbench for lp11 and lp11_buf - test_pc11_*.tcl: tbench for pc11 and pc11_buf + - test_dl11_*.tcl: tbench for dl11 and dl11_buf - new test and demonstration codes under tools/mcode - dl11/dl11echo.mac: console interface echo tester - sys/blink.mac: 'blinking lights' demo (rsx,bsd and other modes) - new tools + - librw11/RtraceTools: some helper methods for buffer tracing - ldadump: lda file dumper ### Changes @@ -68,24 +71,31 @@ The full set of tests is only run for tagged releases. - Rw11CntlPC11 - BootCode(): boot loader rewritten - remove SetOnline(), use UnitSetup() - - asm-11: .end directive autocreates '...end' label + - asm-11: + - .end directive autocreates '...end' label + - print lines with errors to stderr unless -lst seen - ti_w11: for -e use .end start address when available - firmware changes - rbd_rbmon: more robust ack,err trace when busy - rbd_tester: use now fifo_simple_dram - ibd_ibtst: rename dly[rw]->bsy[rw]; datto for write; add datab + - ibd_kw11p: + - add csr.ir (rem; as intreq monitor) + - the source of external events (rate=11) is now selectable vai an new rem + accessible csr.erate field. options: sysclk, 1 Mhz, extevt, none - ibdr_dl11: changes for ibdr_dl11_buf compatibility (val in msb, ib_rlim_slv) - ibdr_lp11: move valid bit to msb of buf (for ibdr_lp11_buf compatibility) - ibdr_pc11: changes for ibdr_pc11_buf compatibility - sys_w11a_s3: set BTOWIDTH 7 (was 6, must be > vmbox atowidth (6)) - pdp11_sys70: instantiate ibd_ibtst (when sys_conf_ibtst = true) - - ibdr_maxisys,sys_conf ready for buffered DL,PC and dz11 + - ibdr_maxisys,sys_conf ready for buffered LP11,PC11 and DL11 - use type code instead of boolean for sys_conf_ibd_{dl11,lp11,pc11} - add sys_conf_ibtst (enabled in all systems) - add sys_conf_ibd_dz11 (enabled in all systems) - add ib_rlim_gen to support rate limiters - instantiate ibd_ibtst - instantiate ibdr_lp11_buf + - instantiate ibdr_pc11_buf ### Bug Fixes - backend code: some getters crashed with `SIGSEGV`, see diff --git a/rtl/ibus/ibdlib.vhd b/rtl/ibus/ibdlib.vhd index 43c98586..9bdf3888 100644 --- a/rtl/ibus/ibdlib.vhd +++ b/rtl/ibus/ibdlib.vhd @@ -1,4 +1,4 @@ --- $Id: ibdlib.vhd 1131 2019-04-14 13:24:25Z mueller $ +-- $Id: ibdlib.vhd 1139 2019-04-27 14:00:38Z mueller $ -- -- Copyright 2008-2019 by Walter F.J. Mueller -- @@ -19,6 +19,7 @@ -- Tool versions: ise 8.2-14.7; viv 2014.4-2018.3; ghdl 0.18-0.35 -- Revision History: -- Date Rev Version Comment +-- 2019-04-26 1139 1.3.7 add ibdr_dl11_buf -- 2019-04-14 1131 1.3.6 RLIM_CEV now slv8 -- 2019-04-07 1129 1.3.5 add ibdr_pc11_buf -- 2019-04-07 1128 1.3.4 ibdr_dl11: use RLIM_CEV, drop CE_USEC @@ -240,6 +241,25 @@ component ibdr_dl11 is -- ibus dev(rem): DL11-A/B ); end component; +component ibdr_dl11_buf is -- ibus dev(rem): DL11-A/B + generic ( + IB_ADDR : slv16 := ibaddr_dl11; + AWIDTH : natural := 5); -- fifo address width + port ( + CLK : in slbit; -- clock + RESET : in slbit; -- system reset + BRESET : in slbit; -- ibus reset + RLIM_CEV : in slv8; -- clock enable vector + RB_LAM : out slbit; -- remote attention + IB_MREQ : in ib_mreq_type; -- ibus request + IB_SRES : out ib_sres_type; -- ibus response + EI_REQ_RX : out slbit; -- interrupt request, receiver + EI_REQ_TX : out slbit; -- interrupt request, transmitter + EI_ACK_RX : in slbit; -- interrupt acknowledge, receiver + EI_ACK_TX : in slbit -- interrupt acknowledge, transmitter + ); +end component; + component ibdr_pc11 is -- ibus dev(rem): PC11 -- fixed address: 177550 port ( diff --git a/rtl/ibus/ibdr_dl11.vhd b/rtl/ibus/ibdr_dl11.vhd index 9d6c008e..c9240453 100644 --- a/rtl/ibus/ibdr_dl11.vhd +++ b/rtl/ibus/ibdr_dl11.vhd @@ -1,4 +1,4 @@ --- $Id: ibdr_dl11.vhd 1138 2019-04-26 08:14:56Z mueller $ +-- $Id: ibdr_dl11.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2008-2019 by Walter F.J. Mueller -- @@ -28,6 +28,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2019-04-27 1140 1.3.3 drop rbuf.rrdy, set rbuf.[rx]size0 instead -- 2019-04-24 1138 1.3.2 add rcsr.ir and xcsr.ir (intreq monitors) -- 2019-04-14 1131 1.3.1 RLIM_CEV now slv8 -- 2019-04-07 1127 1.3 for dl11_buf compat: xbuf.val in bit 15 and 8; @@ -86,7 +87,9 @@ architecture syn of ibdr_dl11 is constant rcsr_ibf_rie : integer := 6; constant rcsr_ibf_rir : integer := 5; - constant rbuf_ibf_rrdy : integer := 15; + constant rbuf_ibf_rsize0: integer := 8; + constant rbuf_ibf_xsize0: integer := 0; + subtype rbuf_ibf_data is integer range 7 downto 0; constant xcsr_ibf_xrdy : integer := 7; constant xcsr_ibf_xie : integer := 6; @@ -194,7 +197,7 @@ begin idout(rcsr_ibf_rie) := r.rie; if IB_MREQ.racc = '0' then -- cpu --------------------- - if ibw0 = '1' then + if ibw0 = '1' then -- rcsr write n.rie := IB_MREQ.din(rcsr_ibf_rie); if IB_MREQ.din(rcsr_ibf_rie) = '1' then if r.rdone='1' and r.rie='0' then -- ie set while done=1 @@ -215,9 +218,11 @@ begin when ibaddr_rbuf => -- RBUF -- receive data buffer ------- - idout(r.rbuf'range) := r.rbuf; - if IB_MREQ.racc = '0' then -- cpu --------------------- + idout(rbuf_ibf_data) := r.rbuf; + if ibrd = '1' then -- rbuf read + n.rintreq := '0'; -- cancel interrupt + end if; if ibrd='1' and r.rdone='1' then n.rval := '0'; -- clear rbuf valid irrlimsta := '1'; -- start rx timer @@ -225,9 +230,10 @@ begin end if; else -- rri --------------------- - idout(rbuf_ibf_rrdy) := not r.rval; + idout(rbuf_ibf_rsize0) := r.rval; -- rbuf occupied when rval=1 + idout(rbuf_ibf_xsize0) := not r.xrdy; -- xbuf empty when xrdy=1 if ibw0 = '1' then - n.rbuf := IB_MREQ.din(n.rbuf'range); + n.rbuf := IB_MREQ.din(rbuf_ibf_data); n.rval := '1'; -- set rbuf valid end if; end if; @@ -293,7 +299,7 @@ begin n.rdone := '0'; -- clear done n.rintreq := '0'; -- clear pending interrupts else -- not busy and data valid - n.rdone := '1'; -- clear done + n.rdone := '1'; -- set done if r.rdone='0' and r.rie='1' then -- done going 0->1 and ie=1 n.rintreq := '1'; -- request rx interrupt end if; diff --git a/rtl/ibus/ibdr_dl11_buf.vbom b/rtl/ibus/ibdr_dl11_buf.vbom new file mode 100644 index 00000000..8ebe18f2 --- /dev/null +++ b/rtl/ibus/ibdr_dl11_buf.vbom @@ -0,0 +1,9 @@ +# libs +../vlib/slvtypes.vhd +../vlib/memlib/memlib.vhd +iblib.vhd +# components +../vlib/memlib/fifo_simple_dram.vbom +ib_rlim_slv.vbom +# design +ibdr_dl11_buf.vhd diff --git a/rtl/ibus/ibdr_dl11_buf.vhd b/rtl/ibus/ibdr_dl11_buf.vhd new file mode 100644 index 00000000..adae88be --- /dev/null +++ b/rtl/ibus/ibdr_dl11_buf.vhd @@ -0,0 +1,444 @@ +-- $Id: ibdr_dl11_buf.vhd 1140 2019-04-28 10:21:21Z mueller $ +-- +-- Copyright 2019- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 3, or (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: ibdr_dl11_buf - syn +-- Description: ibus dev(rem): DL11-A/B +-- +-- Dependencies: fifo_simple_dram +-- ib_rlim_slv +-- Test bench: - +-- Target Devices: generic +-- Tool versions: ise 8.2-14.7; viv 2017.2; ghdl 0.18-0.35 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2019-04-26 1139 1.0 Initial version (derived from ibdr_{dl11,pc11_buf}) +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.slvtypes.all; +use work.memlib.all; +use work.iblib.all; + +-- ---------------------------------------------------------------------------- +entity ibdr_dl11_buf is -- ibus dev(rem): DL11-A/B + generic ( + IB_ADDR : slv16 := slv(to_unsigned(8#177560#,16)); + AWIDTH : natural := 5); -- fifo address width + port ( + CLK : in slbit; -- clock + RESET : in slbit; -- system reset + BRESET : in slbit; -- ibus reset + RLIM_CEV : in slv8; -- clock enable vector + RB_LAM : out slbit; -- remote attention + IB_MREQ : in ib_mreq_type; -- ibus request + IB_SRES : out ib_sres_type; -- ibus response + EI_REQ_RX : out slbit; -- interrupt request, receiver + EI_REQ_TX : out slbit; -- interrupt request, transmitter + EI_ACK_RX : in slbit; -- interrupt acknowledge, receiver + EI_ACK_TX : in slbit -- interrupt acknowledge, transmitter + ); +end ibdr_dl11_buf; + +architecture syn of ibdr_dl11_buf is + + constant ibaddr_rcsr : slv2 := "00"; -- rcsr address offset + constant ibaddr_rbuf : slv2 := "01"; -- rbuf address offset + constant ibaddr_xcsr : slv2 := "10"; -- xcsr address offset + constant ibaddr_xbuf : slv2 := "11"; -- xbuf address offset + + subtype rcsr_ibf_rrlim is integer range 14 downto 12; + subtype rcsr_ibf_type is integer range 10 downto 8; + constant rcsr_ibf_rdone : integer := 7; + constant rcsr_ibf_rie : integer := 6; + constant rcsr_ibf_rir : integer := 5; + constant rcsr_ibf_rlb : integer := 4; + constant rcsr_ibf_fclr : integer := 1; + + subtype rbuf_ibf_rsize is integer range AWIDTH-1+8 downto 8; + subtype rbuf_ibf_xsize is integer range AWIDTH-1 downto 0; + subtype rbuf_ibf_data is integer range 7 downto 0; + + subtype xcsr_ibf_xrlim is integer range 14 downto 12; + constant xcsr_ibf_xrdy : integer := 7; + constant xcsr_ibf_xie : integer := 6; + constant xcsr_ibf_xir : integer := 5; + constant xcsr_ibf_rlb : integer := 4; + constant xcsr_ibf_fclr : integer := 1; + + constant xbuf_ibf_xval : integer := 15; + subtype xbuf_ibf_size is integer range AWIDTH-1+8 downto 8; + subtype xbuf_ibf_data is integer range 7 downto 0; + + type regs_type is record -- state registers + ibsel : slbit; -- ibus select + rrlim : slv3; -- rcsr: receiver rate limit + rdone : slbit; -- rcsr: receiver done + rie : slbit; -- rcsr: receiver interrupt enable + rintreq : slbit; -- rx interrupt request + xrlim : slv3; -- xcsr: transmitter rate limit + xrdy : slbit; -- xcsr: transmitter ready + xie : slbit; -- xcsr: transmitter interrupt enable + xintreq : slbit; -- tx interrupt request + end record regs_type; + + constant regs_init : regs_type := ( + '0', -- ibsel + "000", -- rrlim + '0','0','0', -- rdone,rie,rintreq + "000", -- xrlim + '1', -- xrdy !! is set !! + '0', -- xie + '0' -- xintreq + ); + + constant c_size1 : slv(AWIDTH-1 downto 0) := slv(to_unsigned(1,AWIDTH)); + + signal R_REGS : regs_type := regs_init; + signal N_REGS : regs_type := regs_init; + + signal RBUF_CE : slbit := '0'; + signal RBUF_WE : slbit := '0'; + signal RBUF_DO : slv8 := (others=>'0'); + signal RBUF_RESET : slbit := '0'; + signal RBUF_EMPTY : slbit := '0'; + signal RBUF_FULL : slbit := '0'; + signal RBUF_SIZE : slv(AWIDTH-1 downto 0) := (others=>'0'); + + signal XBUF_CE : slbit := '0'; + signal XBUF_WE : slbit := '0'; + signal XBUF_DO : slv8 := (others=>'0'); + signal XBUF_RESET : slbit := '0'; + signal XBUF_EMPTY : slbit := '0'; + signal XBUF_FULL : slbit := '0'; + signal XBUF_SIZE : slv(AWIDTH-1 downto 0) := (others=>'0'); + + signal RRLIM_START : slbit := '0'; + signal RRLIM_BUSY : slbit := '0'; + signal XRLIM_START : slbit := '0'; + signal XRLIM_BUSY : slbit := '0'; + +begin + + assert AWIDTH>=4 and AWIDTH<=7 + report "assert(AWIDTH>=4 and AWIDTH<=7): unsupported AWIDTH" + severity failure; + + RBUF : fifo_simple_dram + generic map ( + AWIDTH => AWIDTH, + DWIDTH => 8) + port map ( + CLK => CLK, + RESET => RBUF_RESET, + CE => RBUF_CE, + WE => RBUF_WE, + DI => IB_MREQ.din(rbuf_ibf_data), + DO => RBUF_DO, + EMPTY => RBUF_EMPTY, + FULL => RBUF_FULL, + SIZE => RBUF_SIZE + ); + + XBUF : fifo_simple_dram + generic map ( + AWIDTH => AWIDTH, + DWIDTH => 8) + port map ( + CLK => CLK, + RESET => XBUF_RESET, + CE => XBUF_CE, + WE => XBUF_WE, + DI => IB_MREQ.din(xbuf_ibf_data), + DO => XBUF_DO, + EMPTY => XBUF_EMPTY, + FULL => XBUF_FULL, + SIZE => XBUF_SIZE + ); + + RRLIM : ib_rlim_slv + port map ( + CLK => CLK, + RESET => RESET, + RLIM_CEV => RLIM_CEV, + SEL => R_REGS.rrlim, + START => RRLIM_START, + STOP => BRESET, + DONE => open, + BUSY => RRLIM_BUSY + ); + + XRLIM : ib_rlim_slv + port map ( + CLK => CLK, + RESET => RESET, + RLIM_CEV => RLIM_CEV, + SEL => R_REGS.xrlim, + START => XRLIM_START, + STOP => BRESET, + DONE => open, + BUSY => XRLIM_BUSY + ); + + proc_regs: process (CLK) + begin + if rising_edge(CLK) then + if BRESET = '1' then + R_REGS <= regs_init; + if RESET = '0' then -- if RESET=0 we do just an ibus reset + R_REGS.rrlim <= N_REGS.rrlim; -- keep RRLIM field + R_REGS.xrlim <= N_REGS.xrlim; -- keep XRLIM field + end if; + else + R_REGS <= N_REGS; + end if; + end if; + end process proc_regs; + + proc_next : process (R_REGS, IB_MREQ, EI_ACK_RX, EI_ACK_TX, RESET, + RBUF_DO, RBUF_EMPTY, RBUF_FULL, RBUF_SIZE, RRLIM_BUSY, + XBUF_DO, XBUF_EMPTY, XBUF_FULL, XBUF_SIZE, XRLIM_BUSY) + variable r : regs_type := regs_init; + variable n : regs_type := regs_init; + variable idout : slv16 := (others=>'0'); + variable ibreq : slbit := '0'; + variable iback : slbit := '0'; + variable ibrd : slbit := '0'; + variable ibw0 : slbit := '0'; + variable ibw1 : slbit := '0'; + variable ilam : slbit := '0'; + variable irbufce : slbit := '0'; + variable irbufwe : slbit := '0'; + variable irbufrst : slbit := '0'; + variable irrlimsta : slbit := '0'; + variable ixbufce : slbit := '0'; + variable ixbufwe : slbit := '0'; + variable ixbufrst : slbit := '0'; + variable ixrlimsta : slbit := '0'; + begin + + r := R_REGS; + n := R_REGS; + + idout := (others=>'0'); + ibreq := IB_MREQ.re or IB_MREQ.we; + iback := r.ibsel and ibreq; + ibrd := IB_MREQ.re; + ibw0 := IB_MREQ.we and IB_MREQ.be0; + ibw1 := IB_MREQ.we and IB_MREQ.be1; + ilam := '0'; + irbufce := '0'; + irbufwe := '0'; + irbufrst := RESET; + irrlimsta := '0'; + ixbufce := '0'; + ixbufwe := '0'; + ixbufrst := RESET; + ixrlimsta := '0'; + + -- ibus address decoder + n.ibsel := '0'; + if IB_MREQ.aval='1' and + IB_MREQ.addr(12 downto 3)=IB_ADDR(12 downto 3) then + n.ibsel := '1'; + end if; + + -- ibus transactions + if r.ibsel = '1' then + case IB_MREQ.addr(2 downto 1) is + + when ibaddr_rcsr => -- RCSR -- receive control status ---- + + idout(rcsr_ibf_rdone) := r.rdone; + idout(rcsr_ibf_rie) := r.rie; + + if IB_MREQ.racc = '0' then -- cpu --------------------- + if ibw0 = '1' then -- rcsr write + n.rie := IB_MREQ.din(rcsr_ibf_rie); + if IB_MREQ.din(rcsr_ibf_rie) = '1' then-- set IE to 1 + if r.rdone='1' and r.rie='0' then -- ie 0->1 while done=1 + n.rintreq := '1'; -- request interrupt + end if; + else -- set IE to 0 + n.rintreq := '0'; -- cancel interrupt + end if; + end if; + + else -- rri --------------------- + idout(rcsr_ibf_rrlim) := r.rrlim; + idout(rcsr_ibf_type) := slv(to_unsigned(AWIDTH,3)); + idout(rcsr_ibf_rir) := r.rintreq; + idout(rcsr_ibf_rlb) := RRLIM_BUSY; + + if ibw1 = '1' then + n.rrlim := IB_MREQ.din(rcsr_ibf_rrlim); + end if; + if ibw0 = '1' then + if IB_MREQ.din(rcsr_ibf_fclr) = '1' then -- 1 written to FCLR + irbufrst := '1'; -- then reset fifo + end if; + end if; + end if; + + when ibaddr_rbuf => -- RBUF -- receive data buffer ------- + + if IB_MREQ.racc = '0' then -- cpu --------------------- + idout(rbuf_ibf_data) := RBUF_DO; + if ibrd = '1' then -- rbuf read + n.rintreq := '0'; -- cancel interrupt + end if; + if ibrd='1' and r.rdone='1' then -- rbuf write + irbufce := '1'; -- read next value from fifo + irbufwe := '0'; + if RBUF_SIZE = c_size1 then -- last value (size=1) + ilam := '1'; -- rri lam + end if; + irrlimsta := '1'; -- start rx timer + end if; + + else -- rri --------------------- + idout(rbuf_ibf_rsize) := RBUF_SIZE; + idout(rbuf_ibf_xsize) := XBUF_SIZE; + if ibw0 = '1' then + if RBUF_FULL = '0' then -- fifo not full + irbufce := '1'; -- write to fifo + irbufwe := '1'; + else -- write to full fifo + iback := '0'; -- signal nak + end if; + end if; + end if; + + when ibaddr_xcsr => -- XCSR -- transmit control status --- + + idout(xcsr_ibf_xrdy) := r.xrdy; + idout(xcsr_ibf_xie) := r.xie; + + if IB_MREQ.racc = '0' then -- cpu --------------------- + if ibw0 = '1' then + n.xie := IB_MREQ.din(xcsr_ibf_xie); + if IB_MREQ.din(xcsr_ibf_xie) = '1' then-- set IE to 1 + if r.xrdy='1' and r.xie='0' then -- ie 0->1 while ready=1 + n.xintreq := '1'; -- request interrupt + end if; + else -- set IE to 0 + n.xintreq := '0'; -- cancel interrupts + end if; + end if; + + else -- rri --------------------- + idout(xcsr_ibf_xrlim) := r.xrlim; + idout(xcsr_ibf_xir) := r.xintreq; + idout(xcsr_ibf_rlb) := XRLIM_BUSY; + + if ibw1 = '1' then + n.xrlim := IB_MREQ.din(xcsr_ibf_xrlim); -- set XRLIM field + end if; + if ibw0 = '1' then + if IB_MREQ.din(xcsr_ibf_fclr) = '1' then -- 1 written to FCLR + ixbufrst := '1'; -- then reset fifo + end if; + end if; + end if; + + when ibaddr_xbuf => -- XBUF -- transmit data buffer ------ + + if IB_MREQ.racc = '0' then -- cpu --------------------- + if ibw0 = '1' then + ixrlimsta := '1'; -- start transmitter timer + if r.xrdy = '1' then -- ignore buf write when rdy=0 + if XBUF_FULL = '0' then -- fifo not full + ixbufce := '1'; -- write to fifo + ixbufwe := '1'; + if XBUF_EMPTY = '1' then -- first write to empty fifo + ilam := '1'; -- request attention + end if; + end if; + end if; + end if; + + else -- rri --------------------- + idout(xbuf_ibf_xval) := not XBUF_EMPTY; + idout(xbuf_ibf_size) := XBUF_SIZE; + idout(xbuf_ibf_data) := XBUF_DO; + if ibrd = '1' then + if XBUF_EMPTY = '0' then -- fifo not empty + ixbufce := '1'; -- read from fifo + ixbufwe := '0'; + else -- read from empty fifo + iback := '0'; -- signal nak + end if; + end if; + end if; + + when others => null; + end case; + + end if; + + -- other state changes + + if EI_ACK_RX = '1' then + n.rintreq := '0'; + end if; + if EI_ACK_TX = '1' then + n.xintreq := '0'; + end if; + + if (RRLIM_BUSY or RBUF_EMPTY) = '1' then -- busy or fifo empty + n.rdone := '0'; -- clear done + else -- not busy and data valid + n.rdone := '1'; -- set done + if r.rdone='0' and r.rie='1' then -- done going 0->1 and ie=1 + n.rintreq := '1'; -- request rx interrupt + end if; + end if; + + if (XRLIM_BUSY or XBUF_FULL) ='1' then -- busy or fifo full + n.xrdy := '0'; -- clear ready + n.xintreq := '0'; -- clear interrupt + else -- not busy and fifo not full + n.xrdy := '1'; -- set ready + if r.xrdy='0' and r.xie='1' then -- ready going 0->1 and ie=1 + n.xintreq := '1'; -- request interrupt + end if; + end if; + + N_REGS <= n; + + RBUF_RESET <= irbufrst; + RBUF_CE <= irbufce; + RBUF_WE <= irbufwe; + RRLIM_START <= irrlimsta; + + XBUF_RESET <= ixbufrst; + XBUF_CE <= ixbufce; + XBUF_WE <= ixbufwe; + XRLIM_START <= ixrlimsta; + + IB_SRES.dout <= idout; + IB_SRES.ack <= iback; + IB_SRES.busy <= '0'; + + RB_LAM <= ilam; + EI_REQ_RX <= r.rintreq; + EI_REQ_TX <= r.xintreq; + + end process proc_next; + + +end syn; diff --git a/rtl/ibus/ibdr_maxisys.vbom b/rtl/ibus/ibdr_maxisys.vbom index 3d261f1c..7eae8a99 100644 --- a/rtl/ibus/ibdr_maxisys.vbom +++ b/rtl/ibus/ibdr_maxisys.vbom @@ -14,6 +14,7 @@ ibdr_rl11.vbom ibdr_rk11.vbom ibdr_tm11.vbom ibdr_dl11.vbom +ibdr_dl11_buf.vbom ibdr_pc11.vbom ibdr_pc11_buf.vbom ibdr_lp11.vbom diff --git a/rtl/ibus/ibdr_maxisys.vhd b/rtl/ibus/ibdr_maxisys.vhd index 4a0e03df..6ef726ff 100644 --- a/rtl/ibus/ibdr_maxisys.vhd +++ b/rtl/ibus/ibdr_maxisys.vhd @@ -1,4 +1,4 @@ --- $Id: ibdr_maxisys.vhd 1136 2019-04-24 09:27:28Z mueller $ +-- $Id: ibdr_maxisys.vhd 1139 2019-04-27 14:00:38Z mueller $ -- -- Copyright 2009-2019 by Walter F.J. Mueller -- @@ -25,6 +25,7 @@ -- ibdr_rk11 -- ibdr_tm11 -- ibdr_dl11 +-- ibdr_dl11_buf -- ibdr_pc11 -- ibdr_pc11_buf -- ibdr_lp11 @@ -52,6 +53,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2019-04-26 1139 1.6.7 add ibdr_dl11_buf -- 2019-04-23 1136 1.6.6 add CLK port to ib_intmap24 -- 2019-04-14 1131 1.6.5 ib_rlim_gen has CPUSUSP port; RLIM_CEV now slv8 -- 2019-04-07 1129 1.6.4 add ibdr_pc11_buf @@ -383,22 +385,43 @@ begin ); end generate TM11; - DL11_0 : ibdr_dl11 - port map ( - CLK => CLK, - RESET => RESET, - BRESET => BRESET, - RLIM_CEV => RLIM_CEV, - RB_LAM => RB_LAM_DL11_0, - IB_MREQ => IB_MREQ, - IB_SRES => IB_SRES_DL11_0, - EI_REQ_RX => EI_REQ_DL11RX_0, - EI_REQ_TX => EI_REQ_DL11TX_0, - EI_ACK_RX => EI_ACK_DL11RX_0, - EI_ACK_TX => EI_ACK_DL11TX_0 - ); + DL11_0: if sys_conf_ibd_dl11_0 = 0 generate + TTA : ibdr_dl11 + port map ( + CLK => CLK, + RESET => RESET, + BRESET => BRESET, + RLIM_CEV => RLIM_CEV, + RB_LAM => RB_LAM_DL11_0, + IB_MREQ => IB_MREQ, + IB_SRES => IB_SRES_DL11_0, + EI_REQ_RX => EI_REQ_DL11RX_0, + EI_REQ_TX => EI_REQ_DL11TX_0, + EI_ACK_RX => EI_ACK_DL11RX_0, + EI_ACK_TX => EI_ACK_DL11TX_0 + ); + end generate DL11_0; - DL11_1: if sys_conf_ibd_dl11_1 >= 0 generate + DL11_0BUF: if sys_conf_ibd_dl11_0 > 0 generate + TTA : ibdr_dl11_buf + generic map ( + AWIDTH => sys_conf_ibd_dl11_0) + port map ( + CLK => CLK, + RESET => RESET, + BRESET => BRESET, + RLIM_CEV => RLIM_CEV, + RB_LAM => RB_LAM_DL11_0, + IB_MREQ => IB_MREQ, + IB_SRES => IB_SRES_DL11_0, + EI_REQ_RX => EI_REQ_DL11RX_0, + EI_REQ_TX => EI_REQ_DL11TX_0, + EI_ACK_RX => EI_ACK_DL11RX_0, + EI_ACK_TX => EI_ACK_DL11TX_0 + ); + end generate DL11_0BUF; + + DL11_1: if sys_conf_ibd_dl11_1 = 0 generate begin TTB : ibdr_dl11 generic map ( @@ -418,6 +441,27 @@ begin ); end generate DL11_1; + DL11_1BUF: if sys_conf_ibd_dl11_1 > 0 generate + begin + TTB : ibdr_dl11_buf + generic map ( + IB_ADDR => slv(to_unsigned(8#176500#,16)), + AWIDTH => sys_conf_ibd_dl11_1) + port map ( + CLK => CLK, + RESET => RESET, + BRESET => BRESET, + RLIM_CEV => RLIM_CEV, + RB_LAM => RB_LAM_DL11_1, + IB_MREQ => IB_MREQ, + IB_SRES => IB_SRES_DL11_1, + EI_REQ_RX => EI_REQ_DL11RX_1, + EI_REQ_TX => EI_REQ_DL11TX_1, + EI_ACK_RX => EI_ACK_DL11RX_1, + EI_ACK_TX => EI_ACK_DL11TX_1 + ); + end generate DL11_1BUF; + PC11: if sys_conf_ibd_pc11 = 0 generate begin PCA : ibdr_pc11 diff --git a/rtl/sys_gen/w11a/arty/sys_w11a_arty.vhd b/rtl/sys_gen/w11a/arty/sys_w11a_arty.vhd index fe2ef37c..9e601e5f 100644 --- a/rtl/sys_gen/w11a/arty/sys_w11a_arty.vhd +++ b/rtl/sys_gen/w11a/arty/sys_w11a_arty.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_arty.vhd 1116 2019-03-03 08:24:07Z mueller $ +-- $Id: sys_w11a_arty.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2018-2019 by Walter F.J. Mueller -- @@ -37,6 +37,7 @@ -- -- Synthesized: -- Date Rev viv Target flop lutl lutm bram slic +-- 2019-04-27 1140 2017.2 xc7a35t-1l 6706 10249 898 17.0 3380 +*buf -- 2019-03-02 1116 2017.2 xc7a35t-1l 6625 10705 836 17.0 3218 -- 2019-02-02 1108 2018.3 xc7a35t-1l 6579 9839 819 17.0 3225 -- 2019-02-02 1108 2017.2 xc7a35t-1l 6575 9798 802 17.0 3182 diff --git a/rtl/sys_gen/w11a/basys3/sys_w11a_b3.vhd b/rtl/sys_gen/w11a/basys3/sys_w11a_b3.vhd index 1860c4e8..5c426138 100644 --- a/rtl/sys_gen/w11a/basys3/sys_w11a_b3.vhd +++ b/rtl/sys_gen/w11a/basys3/sys_w11a_b3.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_b3.vhd 1116 2019-03-03 08:24:07Z mueller $ +-- $Id: sys_w11a_b3.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2015-2019 by Walter F.J. Mueller -- @@ -35,6 +35,7 @@ -- -- Synthesized: -- Date Rev viv Target flop lutl lutm bram slic +-- 2019-04-27 1140 2017.2 xc7a35t-1 2835 6032 248 47.5 1879 +*buf -- 2019-03-02 1116 2017.2 xc7a35t-1 2748 5725 186 47.5 1811 +ibtst -- 2019-02-02 1108 2018.3 xc7a35t-1 2711 5910 170 47.5 1825 -- 2019-02-02 1108 2017.2 xc7a35t-1 2698 5636 170 47.5 1728 diff --git a/rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vhd b/rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vhd index dac2aa66..f26aa60e 100644 --- a/rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vhd +++ b/rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_c7.vhd 1116 2019-03-03 08:24:07Z mueller $ +-- $Id: sys_w11a_c7.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2017-2019 by Walter F.J. Mueller -- @@ -37,6 +37,7 @@ -- -- Synthesized: -- Date Rev viv Target flop lutl lutm bram slic +-- 2019-04-27 1140 2017.2 xc7a35t-1 3243 6618 260 50.0 2009 +ibtst -- 2019-03-02 1116 2017.2 xc7a35t-1 3156 6332 198 50.0 1918 +ibtst -- 2019-02-02 1108 2018.3 xc7a35t-1 3112 6457 182 50.0 1936 -- 2019-02-02 1108 2017.2 xc7a35t-1 3107 6216 182 50.0 1884 diff --git a/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd b/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd index 79a999bf..c02fee53 100644 --- a/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd +++ b/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_n2.vhd 1116 2019-03-03 08:24:07Z mueller $ +-- $Id: sys_w11a_n2.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2010-2019 by Walter F.J. Mueller -- @@ -34,6 +34,7 @@ -- -- Synthesized (xst): -- Date Rev ise Target flop lutl lutm slic t peri +-- 2019-04-27 1140 14.7 131013 xc3s1200e-4 3087 9352 588 5515 ok: +*buf 63% -- 2019-03-02 1116 14.7 131013 xc3s1200e-4 3024 8246 526 5322 ok: +ibtst 61% -- 2019-01-27 1108 14.7 131013 xc3s1200e-4 2976 8101 510 5201 ok: -iist -- 2018-10-13 1055 14.7 131013 xc3s1200e-4 3097 8484 510 5471 ok: +dmpcnt diff --git a/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd b/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd index a8c2dc2d..92081746 100644 --- a/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd +++ b/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_n3.vhd 1137 2019-04-24 10:49:19Z mueller $ +-- $Id: sys_w11a_n3.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2011-2019 by Walter F.J. Mueller -- @@ -34,7 +34,8 @@ -- -- Synthesized (xst): -- Date Rev ise Target flop lutl lutm slic t peri --- 2019-03-24 1137 14.7 131013 xc6slx16-2 3049 5727 223 2045 ok: +pcbuf 89% +-- 2019-04-27 1140 14.7 131013 xc6slx16-2 3053 5742 232 2050 ok: +dlbuf 89% +-- 2019-04-24 1137 14.7 131013 xc6slx16-2 3049 5727 223 2045 ok: +pcbuf 89% -- 2019-03-17 1123 14.7 131013 xc6slx16-2 3059 5722 212 2041 ok: +lpbuf 89% -- 2019-03-02 1116 14.7 131013 xc6slx16-2 3048 5741 212 2030 ok: +ibtst 89% -- 2019-01-27 1108 14.7 131013 xc6slx16-2 2979 5542 201 2018 ok: -iist 88% diff --git a/rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vhd b/rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vhd index 48a9f396..0305f694 100644 --- a/rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vhd +++ b/rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_n4.vhd 1137 2019-04-24 10:49:19Z mueller $ +-- $Id: sys_w11a_n4.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2013-2019 by Walter F.J. Mueller -- @@ -35,6 +35,7 @@ -- -- Synthesized: -- Date Rev viv Target flop lutl lutm bram slic MHz +-- 2019-04-27 1140 2017.2 xc7a100t-1 3288 6574 260 17.0 2132 80 +dlbuf -- 2019-04-24 1137 2017.2 xc7a100t-1 3251 6465 228 17.0 2043 80 +pcbuf -- 2019-03-17 1123 2017.2 xc7a100t-1 3231 6403 212 17.0 2053 80 +lpbuf -- 2019-03-02 1116 2017.2 xc7a100t-1 3200 6317 198 17.0 2032 80 +ibtst diff --git a/rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd b/rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd index 09061c77..695b6fa5 100644 --- a/rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd +++ b/rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd @@ -1,4 +1,4 @@ --- $Id: sys_w11a_s3.vhd 1116 2019-03-03 08:24:07Z mueller $ +-- $Id: sys_w11a_s3.vhd 1140 2019-04-28 10:21:21Z mueller $ -- -- Copyright 2007-2019 by Walter F.J. Mueller -- @@ -33,6 +33,7 @@ -- -- Synthesized (xst): -- Date Rev ise Target flop lutl lutm slic t peri +-- 2019-04-27 1140 14.7 131013 xc3s1000-4 2890 8306 524 5252 OK: +*buf 68% -- 2019-03-02 1116 14.7 131013 xc3s1000-4 2830 8045 462 5086 OK: +ibtst 66% -- 2019-01-27 1108 14.7 131013 xc3s1000-4 2782 7873 446 4942 OK: -iist 64% -- 2018-10-13 1055 14.7 131013 xc3s1000-4 2890 8217 446 5177 OK: +dmpcnt 67% diff --git a/tools/oskit/211bsd_rk/211bsd_rk_boot.tcl b/tools/oskit/211bsd_rk/211bsd_rk_boot.tcl index 1a5bf1fe..fda654f4 100644 --- a/tools/oskit/211bsd_rk/211bsd_rk_boot.tcl +++ b/tools/oskit/211bsd_rk/211bsd_rk_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rk_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_rk_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RK05 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_rl/211bsd_rl_boot.tcl b/tools/oskit/211bsd_rl/211bsd_rl_boot.tcl index af095ef0..cb76db95 100644 --- a/tools/oskit/211bsd_rl/211bsd_rl_boot.tcl +++ b/tools/oskit/211bsd_rl/211bsd_rl_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rl_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_rl_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RL02 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_rp/211bsd_rp_boot.tcl b/tools/oskit/211bsd_rp/211bsd_rp_boot.tcl index be556abe..c3d85191 100644 --- a/tools/oskit/211bsd_rp/211bsd_rp_boot.tcl +++ b/tools/oskit/211bsd_rp/211bsd_rp_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rp_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_rp_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RP06 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_rpeth/211bsd_rpeth_boot.tcl b/tools/oskit/211bsd_rpeth/211bsd_rpeth_boot.tcl index 814e0a66..1615f6d2 100644 --- a/tools/oskit/211bsd_rpeth/211bsd_rpeth_boot.tcl +++ b/tools/oskit/211bsd_rpeth/211bsd_rpeth_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rpeth_boot.tcl 899 2017-05-27 13:25:41Z mueller $ +# $Id: 211bsd_rpeth_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RP06 based system with ethernet # @@ -17,7 +17,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_rpmin/211bsd_rpmin_boot.tcl b/tools/oskit/211bsd_rpmin/211bsd_rpmin_boot.tcl index 989dff02..6bf19795 100644 --- a/tools/oskit/211bsd_rpmin/211bsd_rpmin_boot.tcl +++ b/tools/oskit/211bsd_rpmin/211bsd_rpmin_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rpmin_boot.tcl 899 2017-05-27 13:25:41Z mueller $ +# $Id: 211bsd_rpmin_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RP06 based minimal memory system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl b/tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl index e7adfadb..fda9854c 100644 --- a/tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl +++ b/tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_rm05_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_rm05_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for 211bsd RM05 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl b/tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl index c081efea..63135da6 100644 --- a/tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl +++ b/tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_tm_rm05_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_tm_rm05_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for creating a 211bsd RM05 system from a TM11 dist kit # @@ -15,7 +15,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl b/tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl index d944b675..5ddafb13 100644 --- a/tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl +++ b/tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl @@ -1,4 +1,4 @@ -# $Id: 211bsd_tm_rp06_boot.tcl 835 2016-12-31 10:00:14Z mueller $ +# $Id: 211bsd_tm_rp06_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for creating a 211bsd RP06 system from a TM11 dist kit # @@ -15,7 +15,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (211bsd uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl b/tools/oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl index 67fea5b4..76ca9516 100644 --- a/tools/oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl +++ b/tools/oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl @@ -1,4 +1,4 @@ -# $Id: rsx11m-31_rk_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: rsx11m-31_rk_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for RSX11-M V3.1 RK05 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp,pp (enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" dlrrlim 5 +rw11::setup_tt "cpu0" dlrxrlim 5 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl b/tools/oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl index 110f8860..e20e797d 100644 --- a/tools/oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl +++ b/tools/oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl @@ -1,4 +1,4 @@ -# $Id: rsx11m-40_rk_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: rsx11m-40_rk_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for RSX11-M V4.0 RK05 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp,pp (enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" dlrrlim 5 +rw11::setup_tt "cpu0" dlrxrlim 5 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl b/tools/oskit/rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl index bb2ae25a..871d2520 100644 --- a/tools/oskit/rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl +++ b/tools/oskit/rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl @@ -1,4 +1,4 @@ -# $Id: rsx11mp-30_rp_boot.tcl 1126 2019-04-06 17:37:40Z mueller $ +# $Id: rsx11mp-30_rp_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for RSX11-M+ V3.0 RP06 based system # @@ -14,7 +14,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp,pp -rw11::setup_tt "cpu0" to7bit 1 +rw11::setup_tt "cpu0" dlrxrlim 5 to7bit 1 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl b/tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl index e0c852e8..b41c78d6 100644 --- a/tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl +++ b/tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl @@ -1,4 +1,4 @@ -# $Id: rt11-40_rk_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: rt11-40_rk_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for RT-11 V4.0 RK05 based system # @@ -13,7 +13,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" ndl 1 dlrrlim 5 +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl b/tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl index c4ed9957..5754af04 100644 --- a/tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl +++ b/tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl @@ -1,4 +1,4 @@ -# $Id: rt11-53_rl_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: rt11-53_rl_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for RT-11 V5.3 RL02 based system # @@ -13,7 +13,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" ndl 1 dlrrlim 5 +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/u5ed_rk/u5ed_rk_boot.tcl b/tools/oskit/u5ed_rk/u5ed_rk_boot.tcl index 47de26da..3d550beb 100644 --- a/tools/oskit/u5ed_rk/u5ed_rk_boot.tcl +++ b/tools/oskit/u5ed_rk/u5ed_rk_boot.tcl @@ -1,4 +1,4 @@ -# $Id: u5ed_rk_boot.tcl 922 2017-07-02 12:13:36Z mueller $ +# $Id: u5ed_rk_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for Unix 5th Edition RK05 based system # @@ -12,7 +12,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (uses only 1 console; uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" ndl 1 to7bit 1 +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/u7ed_rp/u7ed_rp_boot.tcl b/tools/oskit/u7ed_rp/u7ed_rp_boot.tcl index d4ca64e7..0a67fdac 100644 --- a/tools/oskit/u7ed_rp/u7ed_rp_boot.tcl +++ b/tools/oskit/u7ed_rp/u7ed_rp_boot.tcl @@ -1,4 +1,4 @@ -# $Id: u7ed_rp_boot.tcl 921 2017-07-02 11:55:14Z mueller $ +# $Id: u7ed_rp_boot.tcl 1139 2019-04-27 14:00:38Z mueller $ # # Setup file for Unix 7th Edition RP04 based system # @@ -12,7 +12,7 @@ rutil::dohook "preinithook" puts [rlw] # setup tt,lp (uses only 1 console; uses parity -> use 7 bit mode) -rw11::setup_tt "cpu0" ndl 1 to7bit 1 +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 to7bit 1 rw11::setup_lp # mount disks diff --git a/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl b/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl index 401afcd1..328ab801 100644 --- a/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl +++ b/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl @@ -1,4 +1,4 @@ -# $Id: xxdp22_rl_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: xxdp22_rl_boot.tcl 1140 2019-04-28 10:21:21Z mueller $ # # Setup file for XXDP V2.2 RL02 based system # @@ -12,8 +12,8 @@ rutil::dohook "preinithook" puts [rlw] -# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" ndl 1 dlrrlim 5 to7bit 1 +# setup tt,lp,pp (single console; enable rx rate lim; set tx rate lim to slow) +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 dltxrlim 7 to7bit 1 rw11::setup_lp rw11::setup_pp diff --git a/tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl b/tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl index 920ac9ae..23fb19a3 100644 --- a/tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl +++ b/tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl @@ -1,4 +1,4 @@ -# $Id: xxdp25_rl_boot.tcl 1128 2019-04-07 13:12:47Z mueller $ +# $Id: xxdp25_rl_boot.tcl 1140 2019-04-28 10:21:21Z mueller $ # # Setup file for XXDP V2.5 RL02 based system # @@ -12,8 +12,8 @@ rutil::dohook "preinithook" puts [rlw] -# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) -rw11::setup_tt "cpu0" ndl 1 dlrrlim 5 to7bit 1 +# setup tt,lp,pp (single console; enable rx rate lim; set tx rate lim to slow) +rw11::setup_tt "cpu0" ndl 1 dlrxrlim 5 dltxrlim 7 to7bit 1 rw11::setup_lp rw11::setup_pp diff --git a/tools/src/librw11/Makefile b/tools/src/librw11/Makefile index 3dc6bc11..153e6f5f 100644 --- a/tools/src/librw11/Makefile +++ b/tools/src/librw11/Makefile @@ -1,4 +1,4 @@ -# $Id: Makefile 1100 2019-01-02 10:56:47Z mueller $ +# $Id: Makefile 1140 2019-04-28 10:21:21Z mueller $ # # Revision History: # Date Rev Version Comment @@ -47,6 +47,7 @@ OBJ_all += Rw11VirtEth.o Rw11VirtEthTap.o OBJ_all += Rw11VirtStream.o OBJ_all += Rw11Rdma.o Rw11RdmaDisk.o OBJ_all += RethTools.o RethBuf.o +OBJ_all += RtraceTools.o # DEP_all = $(OBJ_all:.o=.dep) # diff --git a/tools/src/librw11/RtraceTools.cpp b/tools/src/librw11/RtraceTools.cpp new file mode 100644 index 00000000..e9f24cb9 --- /dev/null +++ b/tools/src/librw11/RtraceTools.cpp @@ -0,0 +1,122 @@ +// $Id: RtraceTools.cpp 1140 2019-04-28 10:21:21Z mueller $ +// +// Copyright 2019- by Walter F.J. Mueller +// +// This program is free software; you may redistribute and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation, either version 3, or (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, but +// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for complete details. +// +// Revision History: +// Date Rev Version Comment +// 2019-04-27 1140 1.0 Initial version +// --------------------------------------------------------------------------- + +/*! + \file + \brief Implemenation of RethTools . +*/ + +#include "librtools/RosPrintBvi.hpp" + +#include "RtraceTools.hpp" + +using namespace std; + +/*! + \namespace Retro::RtraceTools + \brief FIXME_docs +*/ + +// all method definitions in namespace Retro +namespace Retro { +namespace RtraceTools { + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +void TraceBuffer(RlogMsg& lmsg, const uint16_t* pbuf, size_t done, + uint32_t level) +{ + size_t nchar = 0; + switch (level) { + case 2: // level=2: compact ascii -------- + for (size_t i=0; i < done; i++) { + uint8_t ochr = pbuf[i] & 0377; + if (ochr>=040 && ochr<0177) { + if (nchar == 0) lmsg << "\n '"; + lmsg << char(ochr); + nchar += 1; + if (nchar >= 64) { + lmsg << "'"; + nchar = 0; + } + } else { + if (nchar > 0) lmsg << "'"; + lmsg << "\n "; + TraceChar(lmsg, ochr); + nchar = 0; + } + } + if (nchar > 0) lmsg << "'"; + break; + + case 3: // level=3: compact octal -------- + for (size_t i=0; i < done; i++) { + if (nchar == 0) lmsg << "\n "; + uint8_t ochr = pbuf[i] & 0377; + lmsg << ' ' << RosPrintBvi(ochr,8); + nchar += 1; + if (nchar >= 16) nchar = 0; + } + break; + + case 4: // level=4: octal + ascii -------- + for (size_t i=0; i < done; i++) { + if (nchar == 0) lmsg << "\n "; + uint8_t ochr = pbuf[i] & 0377; + lmsg << " " << RosPrintBvi(ochr,8) << ' '; + TraceChar(lmsg, ochr); + nchar += 1; + if (nchar >= 6) nchar = 0; + } + break; + } + + return; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +void TraceChar(RlogMsg& lmsg, uint8_t chr) +{ + lmsg << ((chr&0200) ? "|" : " "); + uint8_t chr7 = chr & 0177; + if (chr7 < 040) { + switch (chr7) { + case 010: lmsg << "BS "; break; + case 011: lmsg << "HT "; break; + case 012: lmsg << "LF "; break; + case 013: lmsg << "VT "; break; + case 014: lmsg << "FF "; break; + case 015: lmsg << "CR "; break; + case 033: lmsg << "ESC"; break; + default: lmsg << "^" << char('@'+chr7) << " "; + } + } else { + if (chr7 < 0177) { + lmsg << "'" << char(chr7) << "'"; + } else { + lmsg << "DEL"; + } + } + return; +} + +} // end namespace RtraceTools +} // end namespace Retro diff --git a/tools/src/librw11/RtraceTools.hpp b/tools/src/librw11/RtraceTools.hpp new file mode 100644 index 00000000..61f0e5ab --- /dev/null +++ b/tools/src/librw11/RtraceTools.hpp @@ -0,0 +1,42 @@ +// $Id: RtraceTools.hpp 1140 2019-04-28 10:21:21Z mueller $ +// +// Copyright 2019- by Walter F.J. Mueller +// +// This program is free software; you may redistribute and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation, either version 3, or (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, but +// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for complete details. +// +// Revision History: +// Date Rev Version Comment +// 2019-04-27 1140 1.0 Initial version +// --------------------------------------------------------------------------- + +/*! + \file + \brief Declaration of class RtraceTools . +*/ + +#ifndef included_Retro_RtraceTools +#define included_Retro_RtraceTools 1 + +#include + +#include "librtools/RlogMsg.hpp" + +namespace Retro { + + namespace RtraceTools { + void TraceBuffer(RlogMsg& lmsg, const uint16_t* pbuf, + size_t done, uint32_t level); + void TraceChar(RlogMsg& lmsg, uint8_t chr); + + } // end namespace RtraceTools + +} // end namespace Retro + +#endif diff --git a/tools/src/librw11/Rw11CntlDL11.cpp b/tools/src/librw11/Rw11CntlDL11.cpp index ba5f75fa..f0685624 100644 --- a/tools/src/librw11/Rw11CntlDL11.cpp +++ b/tools/src/librw11/Rw11CntlDL11.cpp @@ -1,4 +1,4 @@ -// $Id: Rw11CntlDL11.cpp 1133 2019-04-19 18:43:00Z mueller $ +// $Id: Rw11CntlDL11.cpp 1140 2019-04-28 10:21:21Z mueller $ // // Copyright 2013-2019 by Walter F.J. Mueller // @@ -13,6 +13,7 @@ // // Revision History: // Date Rev Version Comment +// 2019-04-27 1139 1.5 add dl11_buf readout // 2019-04-19 1133 1.4.2 use ExecWibr(),ExecRibr() // 2019-04-14 1131 1.4.1 proper unit init, call UnitSetupAll() in Start() // 2019-04-06 1126 1.4 xbuf.val in msb; rrdy in rbuf (new iface) @@ -35,6 +36,7 @@ */ #include +#include #include "librtools/RosFill.hpp" #include "librtools/RosPrintBvi.hpp" @@ -42,6 +44,7 @@ #include "librtools/Rexception.hpp" #include "librtools/RlogMsg.hpp" +#include "RtraceTools.hpp" #include "Rw11CntlDL11.hpp" using namespace std; @@ -70,21 +73,22 @@ const uint16_t Rw11CntlDL11::kProbeOff; const bool Rw11CntlDL11::kProbeInt; const bool Rw11CntlDL11::kProbeRem; -const uint16_t Rw11CntlDL11::kRCSR_M_RLIM; +const uint16_t Rw11CntlDL11::kFifoMaxSize; + const uint16_t Rw11CntlDL11::kRCSR_V_RLIM; const uint16_t Rw11CntlDL11::kRCSR_B_RLIM; const uint16_t Rw11CntlDL11::kRCSR_V_TYPE; const uint16_t Rw11CntlDL11::kRCSR_B_TYPE; const uint16_t Rw11CntlDL11::kRCSR_M_RDONE; const uint16_t Rw11CntlDL11::kRCSR_M_FCLR; -const uint16_t Rw11CntlDL11::kRBUF_M_RRDY; -const uint16_t Rw11CntlDL11::kRBUF_V_SIZE; -const uint16_t Rw11CntlDL11::kRBUF_B_SIZE; +const uint16_t Rw11CntlDL11::kRBUF_V_RSIZE; +const uint16_t Rw11CntlDL11::kRBUF_B_RSIZE; const uint16_t Rw11CntlDL11::kRBUF_M_BUF; const uint16_t Rw11CntlDL11::kXCSR_V_RLIM; const uint16_t Rw11CntlDL11::kXCSR_B_RLIM; const uint16_t Rw11CntlDL11::kXCSR_M_XRDY; +const uint16_t Rw11CntlDL11::kXCSR_M_FCLR; const uint16_t Rw11CntlDL11::kXBUF_M_VAL; const uint16_t Rw11CntlDL11::kXBUF_V_SIZE; const uint16_t Rw11CntlDL11::kXBUF_B_SIZE; @@ -97,10 +101,21 @@ Rw11CntlDL11::Rw11CntlDL11() : Rw11CntlBase("dl11"), fPC_xbuf(0), fPC_rbuf(0), - fRxRlim(0) + fRxRlim(0), + fItype(0), + fFsize(0), + fTxRblkSize(4), + fTxQueBusy(false) { // must be here because Units have a back-ptr (not available at Rw11CntlBase) fspUnit[0].reset(new Rw11UnitDL11(this, 0)); // single unit controller + + fStats.Define(kStatNRxBlk, "NRxBlk" , "wblk done"); + fStats.Define(kStatNTxQue, "NTxQue" , "rblk queued"); + fStats.Define(kStatNRxChar, "NRxChar", "input char"); + fStats.Define(kStatNRxLine, "NRxLine", "input lines"); + fStats.Define(kStatNTxChar, "NTxChar", "output char"); + fStats.Define(kStatNTxLine, "NTxLine", "output lines"); } //------------------------------------------+----------------------------------- @@ -134,13 +149,26 @@ void Rw11CntlDL11::Start() Cpu().AllIAddrMapInsert(Name()+".xcsr", Base() + kXCSR); Cpu().AllIAddrMapInsert(Name()+".xbuf", Base() + kXBUF); - // ensure unit status is initialized (rlim,...) - UnitSetupAll(); + // detect device type + fItype = (fProbe.DataRem()>>kRCSR_V_TYPE) & kRCSR_B_TYPE; + fFsize = (1<RcvQueueEmpty()) { - uint16_t rcsr = Cpu().ExecRibr(fBase+kRCSR); - if ((rcsr & kRCSR_M_RDONE) == 0) RcvChar(); // send if RBUF not full + if (fspUnit[0]->RcvQueueEmpty()) return; // spurious call + + uint16_t rbuf = Cpu().ExecRibr(fBase+kRBUF); + if (!Buffered()) { + RxProcessUnbuf(); + } else { + RxProcessBuf(rbuf); } return; @@ -176,6 +209,20 @@ void Rw11CntlDL11::Wakeup() //------------------------------------------+----------------------------------- //! FIXME_docs +void Rw11CntlDL11::SetRxQlim(uint16_t qlim) +{ + if (qlim == 0) qlim = fFsize; + if (qlim > fFsize) + throw Rexception("Rw11CntlDL11::SetRxQlim", + "Bad args: qlim larger than fifosize"); + + fRxQlim = qlim; + return; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + void Rw11CntlDL11::SetRxRlim(uint16_t rlim) { if (rlim > kRCSR_B_RLIM) @@ -189,9 +236,14 @@ void Rw11CntlDL11::SetRxRlim(uint16_t rlim) //------------------------------------------+----------------------------------- //! FIXME_docs -uint16_t Rw11CntlDL11::RxRlim() const +void Rw11CntlDL11::SetTxRlim(uint16_t rlim) { - return fRxRlim; + if (rlim > kXCSR_B_RLIM) + throw Rexception("Rw11CntlDL11::SetTxRlim","Bad args: rlim too large"); + + fTxRlim = rlim; + UnitSetup(0); + return; } //------------------------------------------+----------------------------------- @@ -204,12 +256,18 @@ void Rw11CntlDL11::Dump(std::ostream& os, int ind, const char* text, os << bl << (text?text:"--") << "Rw11CntlDL11 @ " << this << endl; os << bl << " fPC_xbuf: " << fPC_xbuf << endl; os << bl << " fPC_rbuf: " << fPC_rbuf << endl; + os << bl << " fRxQlim: " << RosPrintf(fRxQlim,"d",3) << endl; os << bl << " fRxRlim: " << fRxRlim << endl; + os << bl << " fTxRlim: " << RosPrintf(fTxRlim,"d",3) << endl; + os << bl << " fItype: " << RosPrintf(fItype,"d",3) << endl; + os << bl << " fFsize: " << RosPrintf(fFsize,"d",3) << endl; + os << bl << " fTxRblkSize: " << RosPrintf(fTxRblkSize,"d",3) << endl; + os << bl << " fTxQueBusy: " << RosPrintf(fTxQueBusy) << endl; Rw11CntlBase::Dump(os, ind, " ^", detail); return; -} - +} + //------------------------------------------+----------------------------------- //! FIXME_docs @@ -218,32 +276,177 @@ int Rw11CntlDL11::AttnHandler(RlinkServer::AttnArgs& args) fStats.Inc(kStatNAttnHdl); Server().GetAttnInfo(args, fPrimClist); - uint16_t xbuf = fPrimClist[fPC_xbuf].Data(); - uint16_t rbuf = fPrimClist[fPC_rbuf].Data(); - - uint8_t ochr = xbuf & kXBUF_M_BUF; - bool xval = xbuf & kXBUF_M_VAL; - bool rrdy = rbuf & kRBUF_M_RRDY; - - if (fTraceLevel>0) TraceChar('t', xbuf, ochr); - if (xval) fspUnit[0]->Snd(&ochr, 1); - if (rrdy && !fspUnit[0]->RcvQueueEmpty()) RcvChar(); + if (!Buffered()) { // un-buffered iface ------------- + ProcessUnbuf(fPrimClist[fPC_rbuf].Data(), + fPrimClist[fPC_xbuf].Data()); + } else { // buffered iface ---------------- + RxProcessBuf(fPrimClist[fPC_rbuf].Data()); + TxProcessBuf(fPrimClist[fPC_xbuf], true, fPrimClist[fPC_rbuf].Data()); + } return 0; } +//------------------------------------------+----------------------------------- +//! FIXME_docs + +void Rw11CntlDL11::ProcessUnbuf(uint16_t rbuf, uint16_t xbuf) +{ + uint8_t ochr = xbuf & kXBUF_M_BUF; + uint16_t rsize = (rbuf >>kRBUF_V_RSIZE) & kRBUF_B_RSIZE; + bool xval = xbuf & kXBUF_M_VAL; + + if (fTraceLevel>0) TraceChar('t', xbuf, ochr); + if (xval) { + fspUnit[0]->Snd(&ochr, 1); + fStats.Inc(kStatNTxChar); + if (ochr == '\n') fStats.Inc(kStatNTxLine); // for output count LF + } + if (rsize==0 && !fspUnit[0]->RcvQueueEmpty()) RxProcessUnbuf(); +} + //------------------------------------------+----------------------------------- //! FIXME_docs // RcvQueueEmpty() must be false !! -void Rw11CntlDL11::RcvChar() +void Rw11CntlDL11::RxProcessUnbuf() { uint8_t ichr = fspUnit[0]->RcvQueueNext(); + fStats.Inc(kStatNRxChar); + if (ichr == '\r') fStats.Inc(kStatNRxLine); // on input count CR if (fTraceLevel>0) TraceChar('r', 0, ichr); Cpu().ExecWibr(fBase+kRBUF, ichr); return; } +//------------------------------------------+----------------------------------- +//! FIXME_docs + +void Rw11CntlDL11::RxProcessBuf(uint16_t rbuf) +{ + uint16_t rsize = (rbuf >>kRBUF_V_RSIZE) & kRBUF_B_RSIZE; + + if (rsize >= fRxQlim) return; // no space in fifo -> quit + if (fspUnit[0]->RcvQueueEmpty()) return; // no data available -> quit + + uint16_t qsiz = fspUnit[0]->RcvQueueSize(); + uint16_t nmax = fRxQlim - rsize; // limit is fifo space + if (qsiz < nmax) nmax = qsiz; // or avail data + + vector iblock; + iblock.reserve(nmax); + for (uint16_t i = 0; iRcvQueueNext(); + if (ichr == '\r') fStats.Inc(kStatNRxLine); // on input count CR + iblock.push_back(uint16_t(ichr)); + } + fStats.Inc(kStatNRxChar,double(nmax)); + + if (fTraceLevel > 0) { + RlogMsg lmsg(LogFile()); + lmsg << "-I " << Name() << ":" + << " rsize=" << RosPrintf(rsize,"d",3) + << " size=" << RosPrintf(iblock.size(),"d",3); + if (fTraceLevel > 1) RtraceTools::TraceBuffer(lmsg, iblock.data(), + iblock.size(), fTraceLevel); + } + + fStats.Inc(kStatNRxBlk); + RlinkCommandList clist; + Cpu().AddWbibr(clist, fBase+kRBUF, move(iblock)); + Server().Exec(clist); + + return; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +void Rw11CntlDL11::TxProcessBuf(const RlinkCommand& cmd, bool prim, + uint16_t rbuf) +{ + const uint16_t* xbuf = cmd.BlockPointer(); + size_t done = cmd.BlockDone(); + + uint16_t fbeg = 0; + uint16_t fend = 0; + uint16_t fdel = 0; + uint16_t smin = 0; + uint16_t smax = 0; + + if (done > 0) { + fbeg = (xbuf[0] >>kXBUF_V_SIZE) & kXBUF_B_SIZE; + fend = (xbuf[done-1]>>kXBUF_V_SIZE) & kXBUF_B_SIZE; + fdel = fbeg-fend+1; + smin = kFifoMaxSize; + + uint8_t ochr[kFifoMaxSize]; + for (size_t i=0; i < done; i++) { + uint16_t size = (xbuf[i]>>kXBUF_V_SIZE) & kXBUF_B_SIZE; + ochr[i] = xbuf[i] & kXBUF_M_BUF; + if (ochr[i] == '\n') fStats.Inc(kStatNTxLine); // for output count LF + smin = min(smin,size); + smax = max(smax,size); + } + fStats.Inc(kStatNTxChar,double(done)); + fspUnit[0]->Snd(ochr, done); + } + + // determine next chunk size from highest fifo 'size' field, at least 4 + fTxRblkSize = max(uint16_t(4), max(uint16_t(done),smax)); + + // queue further reads when queue idle and fifo not emptied + // check for 'size==1' not seen in current read + if ((!fTxQueBusy) && smin > 1) { // if smin>1 no size==1 seen + fStats.Inc(kStatNTxQue); + fTxQueBusy = true; + Server().QueueAction(bind(&Rw11CntlDL11::TxRcvHandler, this)); + } + + if (fTraceLevel > 0) { + RlogMsg lmsg(LogFile()); + lmsg << "-I " << Name() << ":" + << " prim=" << prim + << " size=" << RosPrintf(cmd.BlockSize(),"d",3) + << " done=" << RosPrintf(done,"d",3) + << " fifo=" << RosPrintf(fbeg,"d",3) + << "," << RosPrintf(fend,"d",3) + << ";" << RosPrintf(fdel,"d",3) + << "," << RosPrintf(done-fdel,"d",3) + << ";" << RosPrintf(smax,"d",3) + << "," << RosPrintf(smin,"d",3) + << " que=" << fTxQueBusy; + if (prim) { + uint16_t rsize = (rbuf >>kRBUF_V_RSIZE) & kRBUF_B_RSIZE; + lmsg << " rsize=" << RosPrintf(rsize,"d",3); + } + + if (fTraceLevel > 1) RtraceTools::TraceBuffer(lmsg, xbuf, + done, fTraceLevel); + } + + // re-sizing the prim rblk invalidates pbuf -> so must be done last + if (prim) { // if primary list + fPrimClist[fPC_xbuf].SetBlockRead(fTxRblkSize); // setup size for next attn + } + +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +int Rw11CntlDL11::TxRcvHandler() +{ + fTxQueBusy = false; + RlinkCommandList clist; + Cpu().AddRbibr(clist, fBase+kXBUF, fTxRblkSize); + clist[0].SetExpectStatus(0, RlinkCommand::kStat_M_RbTout | + RlinkCommand::kStat_M_RbNak); + Server().Exec(clist); + TxProcessBuf(clist[0], false, 0); + return 0; +} + //------------------------------------------+----------------------------------- //! FIXME_docs void Rw11CntlDL11::TraceChar(char dir, uint16_t xbuf, uint8_t chr) @@ -259,32 +462,8 @@ void Rw11CntlDL11::TraceChar(char dir, uint16_t xbuf, uint8_t chr) } lmsg << " rcvq=" << RosPrintf(fspUnit[0]->RcvQueueSize(),"d",3); if (xval || dir != 't') { - lmsg << " char="; - if (chr>=040 && chr<0177) { - lmsg << "'" << char(chr) << "'"; - } else { - lmsg << RosPrintBvi(chr,8); - lmsg << " " << ((chr&0200) ? "|" : " "); - uint8_t chr7 = chr & 0177; - if (chr7 < 040) { - switch (chr7) { - case 010: lmsg << "BS"; break; - case 011: lmsg << "HT"; break; - case 012: lmsg << "LF"; break; - case 013: lmsg << "VT"; break; - case 014: lmsg << "FF"; break; - case 015: lmsg << "CR"; break; - case 033: lmsg << "ESC"; break; - default: lmsg << "^" << char('@'+chr7); - } - } else { - if (chr7 < 0177) { - lmsg << "'" << char(chr7) << "'"; - } else { - lmsg << "DEL"; - } - } - } + lmsg << " char=" << RosPrintBvi(chr,8) << " "; + RtraceTools::TraceChar(lmsg, chr); } return; } diff --git a/tools/src/librw11/Rw11CntlDL11.hpp b/tools/src/librw11/Rw11CntlDL11.hpp index 5dd6adba..714fd048 100644 --- a/tools/src/librw11/Rw11CntlDL11.hpp +++ b/tools/src/librw11/Rw11CntlDL11.hpp @@ -1,4 +1,4 @@ -// $Id: Rw11CntlDL11.hpp 1126 2019-04-06 17:37:40Z mueller $ +// $Id: Rw11CntlDL11.hpp 1140 2019-04-28 10:21:21Z mueller $ // // Copyright 2013-2019 by Walter F.J. Mueller // @@ -13,6 +13,7 @@ // // Revision History: // Date Rev Version Comment +// 2019-04-26 1139 1.4 add dl11_buf readout // 2019-04-06 1126 1.3 xbuf.val in msb; rrdy in rbuf (new iface) // 2017-05-14 897 1.2 add RcvChar(),TraceChar() // 2017-04-02 865 1.1.1 Dump(): add detail arg @@ -48,8 +49,16 @@ namespace Retro { virtual void UnitSetup(size_t ind); void Wakeup(); + void SetRxQlim(uint16_t qlim); + uint16_t RxQlim() const; void SetRxRlim(uint16_t rlim); uint16_t RxRlim() const; + void SetTxRlim(uint16_t rlim); + uint16_t TxRlim() const; + + uint16_t Itype() const; + bool Buffered() const; + uint16_t FifoSize() const; virtual void Dump(std::ostream& os, int ind=0, const char* text=0, int detail=0) const; @@ -67,39 +76,62 @@ namespace Retro { static const bool kProbeInt = true; //!< probe int active static const bool kProbeRem = true; //!< probr rem active - static const uint16_t kRCSR_M_RLIM = 0070000; + static const uint16_t kFifoMaxSize = 127; //!< maximal fifo size + static const uint16_t kRCSR_V_RLIM = 12; //!< rcsr.rlim shift static const uint16_t kRCSR_B_RLIM = 007; //!< rcsr.rlim bit mask static const uint16_t kRCSR_V_TYPE = 8; //!< rcsr.type shift static const uint16_t kRCSR_B_TYPE = 0007; //!< rcsr.type bit mask static const uint16_t kRCSR_M_RDONE = kWBit07; //!< rcsr.rdone mask - static const uint16_t kRCSR_M_FCLR = kWBit05; //!< rcsr.fclr mask - static const uint16_t kRBUF_M_RRDY = kWBit15; //!< rbuf.rrdy mask - static const uint16_t kRBUF_V_SIZE = 8; //!< rbuf.size shift - static const uint16_t kRBUF_B_SIZE = 0177; //!< rbuf.size bit mask + static const uint16_t kRCSR_M_FCLR = kWBit01; //!< rcsr.fclr mask + static const uint16_t kRBUF_V_RSIZE = 8; //!< rbuf.rsize shift + static const uint16_t kRBUF_B_RSIZE = 0177; //!< rbuf.rsize bit mask static const uint16_t kRBUF_M_BUF = 0377; //!< rbuf data mask static const uint16_t kXCSR_V_RLIM = 12; //!< xcsr.rlim shift static const uint16_t kXCSR_B_RLIM = 007; //!< xcsr.rlim bit mask static const uint16_t kXCSR_M_XRDY = kWBit07; //!< xcsr.xrdy mask + static const uint16_t kXCSR_M_FCLR = kWBit01; //!< xcsr.fclr mask static const uint16_t kXBUF_M_VAL = kWBit15; //!< xbuf.val mask static const uint16_t kXBUF_V_SIZE = 8; //!< xbuf.size shift static const uint16_t kXBUF_B_SIZE = 0177; //!< xbuf.size bit mask static const uint16_t kXBUF_M_BUF = 0xff; //!< xbuf data mask + // statistics counter indices + enum stats { + kStatNRxBlk= Rw11Cntl::kDimStat, //!< done wblk + kStatNTxQue, //!< queue rblk + kStatNRxChar, //!< input char + kStatNRxLine, //!< input lines + kStatNTxChar, //!< output char + kStatNTxLine, //!< output lines + kDimStat + }; + protected: int AttnHandler(RlinkServer::AttnArgs& args); - void RcvChar(); + void ProcessUnbuf(uint16_t rbuf, uint16_t xbuf); + void RxProcessUnbuf(); + void RxProcessBuf(uint16_t rbuf); + void TxProcessBuf(const RlinkCommand& cmd, bool prim, + uint16_t rbuf); + int TxRcvHandler(); void TraceChar(char dir, uint16_t xbuf, uint8_t chr); protected: size_t fPC_xbuf; //!< PrimClist: xbuf index size_t fPC_rbuf; //!< PrimClist: rbuf index + uint16_t fRxQlim; //!< rx queue limit uint16_t fRxRlim; //!< rx interrupt rate limit + uint16_t fTxRlim; //!< tx interrupt rate limit + uint16_t fItype; //!< interface type + uint16_t fFsize; //!< fifo size + uint16_t fTxRblkSize; //!< tx rblk chunk size + bool fTxQueBusy; //!< tx queue busy }; } // end namespace Retro -//#include "Rw11CntlDL11.ipp" +#include "Rw11CntlDL11.ipp" #endif diff --git a/tools/src/librw11/Rw11CntlDL11.ipp b/tools/src/librw11/Rw11CntlDL11.ipp new file mode 100644 index 00000000..ead4d6fc --- /dev/null +++ b/tools/src/librw11/Rw11CntlDL11.ipp @@ -0,0 +1,75 @@ +// $Id: Rw11CntlDL11.ipp 1139 2019-04-27 14:00:38Z mueller $ +// +// Copyright 2019- by Walter F.J. Mueller +// +// This program is free software; you may redistribute and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation, either version 3, or (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, but +// WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for complete details. +// +// Revision History: +// Date Rev Version Comment +// 2019-04-26 1139 1.0 Initial version +// --------------------------------------------------------------------------- + +/*! + \brief Implemenation (inline) of Rw11CntlDL11. +*/ + + +// all method definitions in namespace Retro +namespace Retro { + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline uint16_t Rw11CntlDL11::RxQlim() const +{ + return fRxQlim; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline uint16_t Rw11CntlDL11::RxRlim() const +{ + return fRxRlim; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline uint16_t Rw11CntlDL11::TxRlim() const +{ + return fTxRlim; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline uint16_t Rw11CntlDL11::Itype() const +{ + return fItype; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline bool Rw11CntlDL11::Buffered() const +{ + return fFsize > 0; +} + +//------------------------------------------+----------------------------------- +//! FIXME_docs + +inline uint16_t Rw11CntlDL11::FifoSize() const +{ + return fFsize; +} + +} // end namespace Retro diff --git a/tools/src/librwxxtpp/RtclRw11CntlDL11.cpp b/tools/src/librwxxtpp/RtclRw11CntlDL11.cpp index 89b459fc..249dfa20 100644 --- a/tools/src/librwxxtpp/RtclRw11CntlDL11.cpp +++ b/tools/src/librwxxtpp/RtclRw11CntlDL11.cpp @@ -1,4 +1,4 @@ -// $Id: RtclRw11CntlDL11.cpp 1114 2019-02-23 18:01:55Z mueller $ +// $Id: RtclRw11CntlDL11.cpp 1139 2019-04-27 14:00:38Z mueller $ // // Copyright 2013-2019 by Walter F.J. Mueller // @@ -13,6 +13,7 @@ // // Revision History: // Date Rev Version Comment +// 2019-04-26 1139 1.2 add getters& setters for dl11_buf readout // 2019-02-23 1114 1.1.2 use std::bind instead of lambda // 2018-12-15 1082 1.1.1 use lambda instead of boost::bind // 2017-04-16 878 1.1 add class in ctor; derive from RtclRw11CntlTermBase @@ -51,8 +52,16 @@ RtclRw11CntlDL11::RtclRw11CntlDL11() : RtclRw11CntlTermBase("Rw11CntlDL11","term") { Rw11CntlDL11* pobj = &Obj(); - fGets.Add ("rxrlim", bind(&Rw11CntlDL11::RxRlim, pobj)); - fSets.Add ("rxrlim", bind(&Rw11CntlDL11::SetRxRlim,pobj, _1)); + fGets.Add ("rxqlim", bind(&Rw11CntlDL11::RxQlim, pobj)); + fGets.Add ("rxrlim", bind(&Rw11CntlDL11::RxRlim, pobj)); + fGets.Add ("txrlim", bind(&Rw11CntlDL11::TxRlim, pobj)); + fGets.Add ("itype", bind(&Rw11CntlDL11::Itype, pobj)); + fGets.Add ("buffered", bind(&Rw11CntlDL11::Buffered, pobj)); + fGets.Add ("fifosize", bind(&Rw11CntlDL11::FifoSize, pobj)); + + fSets.Add ("rxqlim", bind(&Rw11CntlDL11::SetRxQlim,pobj, _1)); + fSets.Add ("rxrlim", bind(&Rw11CntlDL11::SetRxRlim,pobj, _1)); + fSets.Add ("txrlim", bind(&Rw11CntlDL11::SetTxRlim,pobj, _1)); } //------------------------------------------+----------------------------------- diff --git a/tools/tbench/dev_all.dat b/tools/tbench/dev_all.dat index 638ceb5c..369f5ceb 100644 --- a/tools/tbench/dev_all.dat +++ b/tools/tbench/dev_all.dat @@ -1,7 +1,8 @@ -# $Id: dev_all.dat 1138 2019-04-26 08:14:56Z mueller $ +# $Id: dev_all.dat 1139 2019-04-27 14:00:38Z mueller $ # ## steering file for all devices tests # +@dl11/dl11_all.dat @lp11/lp11_all.dat @pc11/pc11_all.dat @rhrp/rhrp_all.dat diff --git a/tools/tbench/dl11/dl11_all.dat b/tools/tbench/dl11/dl11_all.dat new file mode 100644 index 00000000..71a9b818 --- /dev/null +++ b/tools/tbench/dl11/dl11_all.dat @@ -0,0 +1,7 @@ +# $Id: dl11_all.dat 1139 2019-04-27 14:00:38Z mueller $ +# +## steering file for all dl11 tests +# +test_dl11_tx.tcl +test_dl11_rx.tcl +test_dl11_loop.tcl diff --git a/tools/tbench/dl11/test_dl11_loop.tcl b/tools/tbench/dl11/test_dl11_loop.tcl new file mode 100644 index 00000000..f63883bd --- /dev/null +++ b/tools/tbench/dl11/test_dl11_loop.tcl @@ -0,0 +1,115 @@ +# $Id: test_dl11_loop.tcl 1139 2019-04-27 14:00:38Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-04-26 1139 1.0 Initial version (derived from test_pc11_loop.tcl) +# +# Test DL11 combined receiver + transmitter response + +# ---------------------------------------------------------------------------- +rlc log "test_dl11_loop: test dl11 receive+transmit response -----------------" +package require ibd_dl11 +if {![ibd_dl11::setup]} { + rlc log " test_dl11_loop-W: device not found, test aborted" + return +} + +# obtain 'type' from rcsr +$cpu cp -ribr tta.rcsr dlrcsr +set type [regget ibd_dl11::RRCSR(type) $dlrcsr] +if {$type == 0} { + rlc log " test_dl11_loop-W: only available for buffered dl11" + return +} + +set fsize [expr {(1<<$type)-1}] +set nbyte [expr {$fsize - 3}] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: loopback test: copy receive -> transmit ($nbyte bytes)-------" + +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dl.mac| + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = v..tti ; setup receiver vector + .word vh.tti + .word cp.pr7 + + . = v..tto ; setup transmitter vector + .word vh.tto + .word cp.pr7 + +; + . = 1000 ; code area +stack: +; +; register usage: +; r4 buffer write ptr +; r5 buffer read ptr +; +start: mov #buf,r4 ; setup write ptr + mov r4,r5 ; setup read ptr +; + spl 7 + bic #to.ie,@#to.csr ;;; disable tto irupt + bis #ti.ie,@#ti.csr ;;; enable tti irupt + spl 0 +; +3$: wait + br 3$ +; +vh.tti: tstb @#ti.csr ;;; done set ? + bpl ehalt ;;; if pl not -> error halt + movb @#ti.buf,(r4)+ ;;; read char, to fifo + bis #to.ie,@#to.csr ;;; enable tto irupt + rti +; +vh.tto: tstb @#to.csr ;;; ready set ? + bpl ehalt ;;; if not error halt + cmp r4,r5 ;;; data in fifo ? + beq ehalt ;;; if eq not -> error halt + movb (r5)+,@#to.buf ;;; send char to transmitter + beq lchar ;;; if eq last char seen + cmp r4,r5 ;;; more char in fifo + bne 1$ ;;; if ne yes, keep irupt enabled + bic #to.ie,@#to.csr ;;; if fifo empty, disable tto irupt +1$: rti + +ehalt: halt +lchar: halt +stop: +buf: .blkb 256. +} + +## puts $lst + +set rdata {} +set pdata {} +for {set i 0} { $i < $nbyte } {incr i} { + set v [expr {$nbyte-$i-1}] + lappend rdata $v + lappend pdata [regbldkv ibd_dl11::RXBUF val 1 size [expr {$nbyte-$i}] data $v] +} + +rw11::asmrun $cpu sym + +# fill receive fifo in two chunks +$cpu cp -wbibr tta.rbuf [lrange $rdata 0 [expr {$nbyte/2}] ] +$cpu cp -wbibr tta.rbuf [lrange $rdata [expr {$nbyte/2+1}] end ] + +rw11::asmwait $cpu sym + +# read and check transmitter fifo +$cpu cp \ + -wibr tta.rcsr 0x0 \ + -wibr tta.xcsr 0x0 \ + -rbibr tta.xbuf $nbyte -edata $pdata + +#puts [rw11::cml $cpu] diff --git a/tools/tbench/dl11/test_dl11_rx.tcl b/tools/tbench/dl11/test_dl11_rx.tcl new file mode 100644 index 00000000..3d67600c --- /dev/null +++ b/tools/tbench/dl11/test_dl11_rx.tcl @@ -0,0 +1,272 @@ +# $Id: test_dl11_rx.tcl 1140 2019-04-28 10:21:21Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-04-26 1139 1.0 Initial version (derived from test_pc11_pr.tcl) +# +# Test DL11 receiver response + +# ---------------------------------------------------------------------------- +rlc log "test_dl11_pr: test dl11 paper reader resonse ------------------------" +package require ibd_dl11 +if {![ibd_dl11::setup]} { + rlc log " test_dl11_pr-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dl11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# remember 'type' retrieved from rcsr for later tests +$cpu cp -ribr tta.rcsr dlrcsr +set type [regget ibd_dl11::RRCSR(type) $dlrcsr] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: test csr response -------------------------------------" +rlc log " A1.1: csr ie ---------------------------------------" +# loc IE=1 --> seen on loc and rem +# rem IE=0 --> stays, IE not rem writable +# loc IE=0 --> seen on loc and rem +set rcsrmask [regbld ibd_dl11::RRCSR done ie ir] + +$cpu cp \ + -wma tta.rcsr [regbld ibd_dl11::RCSR ie] \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ie] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR ie] $rcsrmask\ + -wibr tta.rcsr 0x0 \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ie] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR ie] $rcsrmask\ + -wma tta.rcsr 0x0 \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR ] $rcsrmask + +if {$type > 0} { # if buffered test rlim + rlc log " A1.2: csr rlim -----------------------------------" + # rem write rlim --> seen rem, not loc + # loc write rlim --> stays, rlim not loc writable + # breset --> rlim not cleared + set rcsrmaskbuf [regbld ibd_dl11::RRCSR {rlim -1} done ie ir] + $cpu cp \ + -wibr tta.rcsr [regbld ibd_dl11::RRCSR {rlim 1}] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR {rlim 1} ] $rcsrmaskbuf \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ] \ + -wibr tta.rcsr [regbld ibd_dl11::RRCSR {rlim 7}] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR {rlim 7} ] $rcsrmaskbuf \ + -wma tta.rcsr 0x0 \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR {rlim 7} ] $rcsrmaskbuf \ + -breset \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR {rlim 7} ] $rcsrmaskbuf \ + -wibr tta.rcsr [regbld ibd_dl11::RRCSR {rlim 0}] \ + -ribr tta.rcsr -edata [regbld ibd_dl11::RRCSR {rlim 0} ] $rcsrmaskbuf +} + +if {$type == 0} { # unbuffered -------------------------- + rlc log " A2: test data response (unbuffered) -----------------------" + rlc log " A2.1: rem write, loc read ------------------------" + + # test RSIZE=0 + # rem wr buf --> test DONE=1 RSIZE=1 (1 cmd delay) + # loc rd buf --> test DONE=0 RSIZE=0; + $cpu cp \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 0}] \ + -wibr tta.rbuf 0107 \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 1}] \ + -rma tta.rcsr \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR done] \ + -rma tta.rbuf -edata 0107 \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ] \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 0}] + + # expect and harvest attn (drop other attn potentially triggered by breset) + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl + +} else { # buffered --------------------------- + set fsize [expr {(1<<$type)-1}] + + rlc log " A2: test data response (basic fifo; AWIDTH=$type) --------" + rlc log " A2.1: rem write, loc read ------------------------" + + # rem wr buf --> test DONE=1 + # loc rd buf --> test DONE=0; test rem rbuf.busy=0 + # loc rd buf --> test that buf cleared + $cpu cp \ + -wibr tta.rbuf 0107 \ + -rma tta.rcsr \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR done] \ + -rma tta.rbuf -edata 0107 \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR ] \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF] + # expect and harvest attn + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl + + rlc log " A2.2: test fifo csr.fclr clears and breset doesn't" + # rem wr buf --> test rbuf.size=1 + # rem wr buf --> test rbuf.size=2 + # 2* rem wr buf --> test rbuf.size=4 + # breset --> test rbuf.size=4 + # 3* rem wr buf --> test rbuf.size=7 + # csr.fclr --> test rbuf.size=0 + $cpu cp \ + -wibr tta.rbuf 0xaa \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 1}] \ + -wibr tta.rbuf 0x55 \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 2}] \ + -wbibr tta.rbuf {0x11 0x22} \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 4}] \ + -breset \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 4}] \ + -wbibr tta.rbuf {0x33 0x44 0x55} \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 7}] \ + -wibr tta.rcsr [regbld ibd_dl11::RRCSR fclr] \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 0}] + # harvest breset/creset triggered attn's + rlc exec -attn + rlc wtlam 0. + + rlc log " A3: test fifo logic -------------------------------------" + rlc log " A3.1: fill and overfill fifo ---------------------" + set rdata {} + for {set i 0} { $i < $fsize } {incr i} { lappend rdata [expr {$i+0100}] } + # rem wr fsize bytes --> test rbuf.size=fsize + # rem wr buf --> test error and rbuf.size=fsize + # csr.fclr to discard data + $cpu cp \ + -wbibr tta.rbuf $rdata \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF rsize $fsize] \ + -wibr tta.rbuf 0xff -estaterr \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF rsize $fsize] \ + -wibr tta.rcsr [regbld ibd_dl11::RRCSR fclr] + + rlc log " A3.2: fill and empty fifo, attn on last read -----" + # rem wr 2 bytes --> test rbuf.size=2 + # loc rd buf --> test data; test rbuf.size=1; test no attn + $cpu cp \ + -wbibr tta.rbuf {0x55 0xaa} \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 2}] \ + -rma tta.rcsr \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR done] \ + -rma tta.rbuf -edata 0x55 \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 1}] + # test that no attn send + rlc exec -attn -edata 0x0 + # loc rd buf --> test data; test rbuf.size=0; test attn seen + $cpu cp \ + -rma tta.rcsr \ + -rma tta.rcsr -edata [regbld ibd_dl11::RCSR done] \ + -rma tta.rbuf -edata 0xaa \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {rsize 0}] + # expect and harvest attn + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl +} + +# -- Section B --------------------------------------------------------------- +rlc log " B1: test csr.ie and basic interrupt response --------------" +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dl.mac| + . = va.tti ; setup DL11 receiver interrupt vector + .word vh.tti + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +; use in following mov to psw instead of spl to allow immediate interrupt +; +start: spl 7 ;;; lock-out interrupts +1$: tstb @#ti.csr ;;; wait for done set + bpl 1$ ;;; + mov #ti.ie,@#ti.csr ;;; enable tti interrupt + mov #cp.pr6,@#cp.psw ;;; allow pri=7 + mov #cp.pr5,@#cp.psw ;;; allow pri=6 + mov #cp.pr4,@#cp.psw ;;; allow pri=5 + mov #cp.pr3,@#cp.psw ;;; allow pri=4 + mov #cp.pr2,@#cp.psw ;;; allow pri=3 + mov #cp.pr1,@#cp.psw ;;; allow pri=2 + mov #cp.pr0,@#cp.psw ;;; allow pri=1 + halt ;;; +; +vh.tti: mov @#ti.buf,r5 ;;; ptr handler + halt ;;; +stop: +} + +rw11::asmrun $cpu sym +$cpu cp -wibr tta.rbuf 0111 +rw11::asmwait $cpu sym +rw11::asmtreg $cpu r5 0111 \ + sp [expr {$sym(stack)-4}] +rw11::asmtmem $cpu [expr {$sym(stack)-2}] [list [regbld rw11::PSW {pri 3}]] +#puts [rw11::cml $cpu] + +rlc log " B2: test csr.ie and rri write -> cpu read -----------------" +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dl.mac| +; + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = v..tti ; setup DL11 receiver interrupt vector + .word vh.tti + .word cp.pr7 +; + . = 1000 ; data area +stack: +; +start: mov #buf,r5 ; set output buffer + mov #ti.ie,@#ti.csr ; enable interrupt +1$: wait ; wait for interrupt + br 1$ ; forever +; +vh.tti: movb @#ti.buf,(r5)+ ;;; store char + beq 1$ ;;; last one + rti ;;; exit interrupt +; +1$: halt +stop: +buf: .blkb 256. +} + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. + +set nchar 4 +if {$type == 0} { # unbuffered -------------------------- + rw11::asmrun $cpu sym + incr nchar -1 + $cpu cp -wibr tta.rbuf $nchar; # send initial byte + while {1} { + if {[rlc wtlam 1.] >= 1.} { break } + rlc exec -attn attnpat + if {$attnpat & $attncpu} { break }; # cpu attn + if {$attnpat & $attndl} { # dl attn + incr nchar -1 + $cpu cp -wibr tta.rbuf $nchar; # send next byte + } + } + rw11::asmtreg $cpu pc $sym(stop) + rw11::asmtmem $cpu [expr {$sym(buf)}] [list [expr {3 + (2<<8)}] \ + [expr {1 + (0<<8)}]] + +} else { # buffered ----------------------------- + rw11::asmrun $cpu sym + $cpu cp -wbibr tta.rbuf {7 6 5 4 3 2 1 0} + rw11::asmwait $cpu sym + rw11::asmtmem $cpu [expr {$sym(buf)}] [list [expr {7 + (6<<8)}] \ + [expr {5 + (4<<8)}] \ + [expr {3 + (2<<8)}] \ + [expr {1 + (0<<8)}]] +} diff --git a/tools/tbench/dl11/test_dl11_tx.tcl b/tools/tbench/dl11/test_dl11_tx.tcl new file mode 100644 index 00000000..eb93b3fa --- /dev/null +++ b/tools/tbench/dl11/test_dl11_tx.tcl @@ -0,0 +1,428 @@ +# $Id: test_dl11_tx.tcl 1140 2019-04-28 10:21:21Z mueller $ +# +# Copyright 2019- by Walter F.J. Mueller +# License disclaimer see License.txt in $RETROBASE directory +# +# Revision History: +# Date Rev Version Comment +# 2019-04-26 1139 1.0 Initial version (derived from test_pc11_pp.tcl) +# +# Test DL11 transmitter response + +# ---------------------------------------------------------------------------- +rlc log "test_dl11_tx: test dl11 paper puncher resonse -----------------------" +package require ibd_dl11 +if {![ibd_dl11::setup]} { + rlc log " test_dl11_tx-W: device not found, test aborted" + return +} + +rlc set statmask $rw11::STAT_DEFMASK +rlc set statvalue 0 + +set attndl [expr {1<<$ibd_dl11::ANUM}] +set attncpu [expr {1<<$rw11::ANUM}] + +# remember 'type' retrieved from rcsr for later tests +$cpu cp -ribr tta.rcsr dlrcsr +set type [regget ibd_dl11::RRCSR(type) $dlrcsr] + +# -- Section A --------------------------------------------------------------- +rlc log " A1: test csr response -------------------------------------" +rlc log " A1.1: csr rdy, ie, ir ------------------------------" +# breset --> test RDY=1,IE=0 +# loc IE=1 --> seen on loc and rem; rem sees IR=1 +# rem IE=0 --> stays, IE not rem writable +# loc IE=0 --> seen on loc and rem; rem sees IR=0 +set rcsrmask [regbld ibd_dl11::RXCSR rdy ie ir] + +$cpu cp \ + -breset \ + -wibr tta.xcsr 0x0 \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR rdy] $rcsrmask \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -wma tta.xcsr [regbld ibd_dl11::XCSR ie] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy ie] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR rdy ie ir] $rcsrmask\ + -wibr tta.xcsr 0x0 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy ie] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR rdy ie ir] $rcsrmask\ + -wma tta.xcsr 0x0 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR rdy] $rcsrmask + +if {$type > 0} { # if buffered test rlim + rlc log " A1.2: csr rlim -----------------------------------" + # rem write rlim --> seen rem, not loc + # loc write rlim --> stays, rlim not loc writable + # breset --> rlim not cleared + set rcsrmaskbuf [regbld ibd_dl11::RXCSR {rlim -1} rdy ie] + $cpu cp \ + -wibr tta.xcsr [regbld ibd_dl11::RXCSR {rlim 1}] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR {rlim 1} rdy] $rcsrmaskbuf \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -wibr tta.xcsr [regbld ibd_dl11::RXCSR {rlim 7}] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR {rlim 7} rdy] $rcsrmaskbuf \ + -wma tta.xcsr 0x0 \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR {rlim 7} rdy] $rcsrmaskbuf \ + -breset \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR {rlim 7} rdy] $rcsrmaskbuf \ + -wibr tta.xcsr [regbld ibd_dl11::RXCSR {rlim 0}] \ + -ribr tta.xcsr -edata [regbld ibd_dl11::RXCSR {rlim 0} rdy] $rcsrmaskbuf +} + +if {$type == 0} { # unbuffered -------------------------- + rlc log " A2: test data response (unbuffered) -----------------------" + rlc log " A2.1: loc write, rem read ------------------------" + # --> test XSIZE=0 + # loc wr buf --> test RDY=0 XSIZE=1 + # loc rd buf --> test RDY=0 (loc read is noop); test attn send + # rem wr buf --> test RDY=1 XSIZE=0 + $cpu cp \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {xsize 0}] \ + -wma tta.xbuf 0107 \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {xsize 1}] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR] \ + -rma tta.xbuf \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR] \ + -ribr tta.xbuf -edata [regbld ibd_dl11::RXBUF val {size 1} {data 0107} ] \ + -ribr tta.rbuf -edata [regbld ibd_dl11::RRBUF {xsize 0}] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + # expect and harvest attn (drop other attn potentially triggered by breset) + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl + + rlc log " A2.2: 8 bit data; rdy set on breset --------------" + $cpu cp \ + -wma tta.xbuf 0370 \ + -ribr tta.xbuf -edata [regbld ibd_dl11::RXBUF val {size 1} {data 0370} ] \ + -wma tta.xbuf 040 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR] \ + -breset \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + # harvest breset/creset triggered attn's + rlc exec -attn + rlc wtlam 0. + +} else { # buffered --------------------------- + set fsize [expr {(1<<$type)-1}] + + rlc log " A2: test data response (basic fifo; AWIDTH=$type) --" + rlc log " A2.1: loc write, rem read; rbuf.xsize check -------" + # loc wr buf --> test RDY=1 rbuf.xsize=1 + # loc rd buf --> test RDY=1 (loc read is noop); test attn send + # loc wr buf --> test RDY=1 rbuf.xsize=2 + # loc wr buf --> test RDY=1 rbuf.xsize=3 + # rem wr buf --> test VAL=1,SIZE=3 rbuf.xsize=2 + # rem wr buf --> test VAL=1,SIZE=2 rbuf.xsize=1 + # rem wr buf --> test VAL=1,SIZE=1 rbuf.xsize=0 + $cpu cp \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 0] \ + -wma tta.xbuf 031 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 1] \ + -rma tta.xbuf \ + -wma tta.xbuf 032 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 2] \ + -wma tta.xbuf 033 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 3] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 3 data 031] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 2] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 2 data 032] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 1] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 1 data 033] \ + -ribr tta.rbuf -edata [regbldkv ibd_dl11::RRBUF xsize 0] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + # expect and harvest attn (drop other attn potentially triggered by breset) + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl + + rlc log " A2.2: loc write, rem blk read abort; 8 bit data --" + # loc wr two char; rem blk rd three char --> expect 2 and error + # test 7 bit data path trunctation + $cpu cp \ + -wma tta.xbuf 0340 \ + -wma tta.xbuf 0037 \ + -rbibr tta.xbuf 4 -estaterr -edone 2 -edata \ + [list [regbldkv ibd_dl11::RXBUF val 1 size 2 data 0340] \ + [regbldkv ibd_dl11::RXBUF val 1 size 1 data 0037] ] + # expect and harvest attn + rlc wtlam 1. + rlc exec -attn -edata $attndl + + rlc log " A2.3: loc write, breset does not clear -----------" + $cpu cp \ + -wma tta.xbuf 041 \ + -wma tta.xbuf 042 \ + -breset \ + -rbibr tta.xbuf 3 -estaterr -edata \ + [list [regbldkv ibd_dl11::RXBUF val 1 size 2 data 0041] \ + [regbldkv ibd_dl11::RXBUF val 1 size 1 data 0042] ] + # expect and harvest attn (drop other attn potentially triggered by breset) + rlc wtlam 1. + rlc exec -attn -edata $attndl $attndl + + rlc log " A3: test fifo logic (csr.rdy and attn) ------------------" + rlc log " A3.1: 1st loc write, get attn --------------------" + # 1 loc wr -> get attn (1 in fifo; RDY=1) + $cpu cp \ + -wma tta.xbuf 051 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + # expect and harvest attn + rlc wtlam 1. + rlc exec -attn -edata $attndl + + rlc log " A3.2: 2nd loc write, no attn ---------------------" + # 1 loc wr -> no attn (2 in fifo) + $cpu cp \ + -wma tta.xbuf 052 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + rlc exec -attn -edata 0x0 + + rlc log " A3.3: write/read to non-empty fifo -> no attn ----" + # 1 rem rd (1 in fifo; RDY=1) + # 1 loc wr -> no attn (2 in fifo; RDY=1) + # 1 rem rd (1 in fifo; RDY=1) + $cpu cp \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 2 data 051] \ + -wma tta.xbuf 053 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + + rlc exec -attn -edata 0x0 + $cpu cp \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 2 data 052] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + + rlc log " A3.4: fill fifo, RDY 1->0 on $fsize char ---------" + # x = fsize in following + # x-2 loc wr (x-1 in fifo; RDY=1) + # 1 rem rd (x-2 in fifo; RDY=1) + # 1 rem rd (x-3 in fifo; RDY=1) + $cpu ldasm -lst lst -sym sym { + .include |lib/vec_cpucatch.mac| + . = 1000 ; data area +stack: +; +start: mov r2,(r0) + sob r1,start + halt +stop: +} + # specify ps in asmrun to use -start (and avoid a creset!!) + set fs0 $fsize + set fs1 [expr {$fsize-1}] + set fs2 [expr {$fsize-2}] + set fs4 [expr {$fsize-4}] + rw11::asmrun $cpu sym r0 [$cpu imap tta.xbuf] \ + r1 $fs2 \ + r2 066 \ + ps [regbld rw11::PSW {cmode k} {pri 7}] + rw11::asmwait $cpu sym + rw11::asmtreg $cpu r1 0 + + $cpu cp \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size $fs1 data 053] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size $fs2 data 066] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + + # 1 loc wr -> (x-2 in fifo; RDY=1) + # 1 loc wr -> (x-1 in fifo; RDY=1) + # 1 loc wr -> (x in fifo; RDY=0) + # 1 loc wr -> (x in fifo; RDY=0) (overfill !!) + $cpu cp \ + -wma tta.xbuf 066 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -wma tta.xbuf 066 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -wma tta.xbuf 066 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR] \ + -wma tta.xbuf 066 \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR] + + rlc log " A3.5: partial fifo read, RDY goes 1 --------------" + # 1 rem rd -> (x-1 in fifo; RDY=1) + # 1 rem rd -> (x-2 in fifo; RDY=1) + $cpu cp \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size $fs0 data 066] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size $fs1 data 066] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] + + rlc log " A3.6: full fifo read -----------------------------" + # x-4 rem rd -> ( 2 in fifo; RDY=1) + # 1 rem rd -> ( 1 in fifo; RDY=1) + # 1 rem rd -> ( 0 in fifo; RDY=1) + # 1 rem rd -> error + set edata {} + for {set i 0} { $i < $fs4 } {incr i} { + lappend edata [regbldkv ibd_dl11::RXBUF val 1 size [expr {$fs2-$i}] data 066] + } + $cpu cp \ + -rbibr tta.xbuf $fs4 -edata $edata \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 2 data 066] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF val 1 size 1 data 066] \ + -rma tta.xcsr -edata [regbld ibd_dl11::XCSR rdy] \ + -ribr tta.xbuf -estaterr +} + +# harvest triggered attn's +rlc exec -attn +rlc wtlam 0. + +# -- Section B --------------------------------------------------------------- +rlc log " B1: test csr.ie and basic interrupt response --------------" +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dl.mac| + . = va.tto ; setup DL11 transmitter interrupt vector + .word vh.tto + .word cp.pr7 +; + . = 1000 ; code area +stack: +; +; use in following mov to psw instead of spl to allow immediate interrupt +; +start: spl 7 ;;; lock-out interrupts + mov #to.ie,@#to.csr ;;; enable dlt interrupts + mov #cp.pr6,@#cp.psw ;;; allow pri=7 + mov #cp.pr5,@#cp.psw ;;; allow pri=6 + mov #cp.pr4,@#cp.psw ;;; allow pri=5 + mov #cp.pr3,@#cp.psw ;;; allow pri=4 + mov #cp.pr2,@#cp.psw ;;; allow pri=3 + mov #cp.pr1,@#cp.psw ;;; allow pri=2 + mov #cp.pr0,@#cp.psw ;;; allow pri=1 + halt ;;; +; +vh.tto: halt ;;; dlt handler +stop: +} + +# check that interrupt done, and pushed psw has pri=3 (device is pri=4) +rw11::asmrun $cpu sym +rw11::asmwait $cpu sym +rw11::asmtreg $cpu sp [expr {$sym(stack)-4}] +rw11::asmtmem $cpu [expr {$sym(stack)-2}] [list [regbld rw11::PSW {pri 3}]] + +rlc log " B2: test csr.ie and cpu write -> rri read -----------------" + +# load test code +$cpu ldasm -lst lst -sym sym { + .include |lib/defs_cpu.mac| + .include |lib/defs_dl.mac| +; + .include |lib/vec_cpucatch.mac| + .include |lib/vec_devcatch.mac| +; + . = v..tto ; setup DL11 transmitter interrupt vector + .word vh.tto + .word cp.pr7 +; + . = 1000 ; data area +stack: +; +start: ; call with r0= + spl 7 + mov #to.ie,@#to.csr ; enable interrupt + clr r1 ; clear out char + spl 0 +1$: wait ; wait for interrupt + br 1$ ; forever +; +vh.tto: movb r1,@#to.buf ;;; write char + dec r0 ;;; all done ? + beq 1$ ;;; if eq yes, quit + incb r1 ;;; + bicb #200,r1 ;;; + tstb @#to.csr ;;; ready set ? + bmi vh.tto ;;; if mi yes, loop + rti ;;; otherwise exit interrupt +; +1$: halt +stop: +} + +set nchar 4 +set charcur 0 +set charseen 0 +set haltseen 0 + +if {$type == 0} { # unbuffered -------------------------- + rw11::asmrun $cpu sym r0 $nchar + while {1} { + if {[rlc wtlam 1.] >= 1.} { break } + rlc exec -attn attnpat + if {$attnpat & $attncpu} { # cpu attn + set haltseen 1 + } + if {$attnpat & $attndl} { # dl attn + $cpu cp \ + -ribr tta.xbuf -edata [regbldkv ibd_dl11::RXBUF \ + val 1 size 1 data $charcur] + set charcur [expr { ($charcur+1) & 0377 }] + incr charseen + } + if {$charseen == $nchar && $haltseen} { break } + } + +} else { # buffered ----------------------------- + # setup char count as about 1.25 of fifo size + # AWIDTH 4 15+ 3 = 18 + # AWIDTH 5 31+ 7 = 38 + # AWIDTH 6 63+15 = 78 + # AWIDTH 7 127+31 = 158 + set nchar [expr {$fsize + ($fsize>>2)}] + set rsize [expr {$fsize>>2}] + set wttout 10.; # wtlam timeout + + set fstatmsk [regbld rw11::STAT cmderr rbtout rbnak]; # don't check err !! + + # try this to verify rlim logic --> quite a slow down !! + # $cpu cp -wibr tta.xcsr [regbld ibd_dl11::RXCSR {rlim 1}] + + rw11::asmrun $cpu sym r0 $nchar + while (1) { + if {[rlc wtlam $wttout] >= $wttout} { break }; # quit on timeout + rlc exec -attn attnpat + + if {$attnpat & $attncpu} { # cpu attn + set haltseen 1 + } + if {$attnpat & $attndl} { # dl attn + while (1) { + $cpu cp \ + -rbibr tta.xbuf $rsize fdata -estat 0x0 $fstatmsk + for {set i 0} { $i < [llength $fdata] } {incr i} { + set rbuf [lindex $fdata $i] + set val [regget ibd_dl11::RXBUF(val) $rbuf] + set size [regget ibd_dl11::RXBUF(size) $rbuf] + set data [regget ibd_dl11::RXBUF(data) $rbuf] + if {$val != 1 || $data != $charcur} { + rlc log "FAIL: bad data: val: $val; data: $data, exp: $charcur" + rlc errcnt -inc + } + if {$i == 0} { set rsize $size } + set charcur [expr { ($charcur+1) & 0177 }] + incr charseen + } + if {$size <= 1} { + rlc log " rbibr chain ends with size=1 after $charseen" + break; + } + } + } + if {$charseen == $nchar && $haltseen} { break } + } +} + +$cpu cp -rpc -edata $sym(stop); # check proper stop pc +if {$haltseen == 0} { $cpu cp -creset }; # kill rouge code + +# harvest any dangling attn +rlc exec -attn +rlc wtlam 0. diff --git a/tools/tcl/ibd_dl11/util.tcl b/tools/tcl/ibd_dl11/util.tcl index 5eba46d2..86b06d20 100644 --- a/tools/tcl/ibd_dl11/util.tcl +++ b/tools/tcl/ibd_dl11/util.tcl @@ -1,4 +1,4 @@ -# $Id: util.tcl 1138 2019-04-26 08:14:56Z mueller $ +# $Id: util.tcl 1140 2019-04-28 10:21:21Z mueller $ # # Copyright 2015-2019 by Walter F.J. Mueller # @@ -30,10 +30,10 @@ namespace eval ibd_dl11 { regdsc RCSR {done 7} {ie 6} regdsc RRCSR {rlim 14 3} {type 10 3} {done 7} {ie 6} {ir 5} {rlb 4} {fclr 1} - regdsc RRBUF {rrdy 15} {rsize 14 7 "d"} {tsize 6 7 "d"} + regdsc RRBUF {rsize 14 7 "d"} {xsize 6 7 "d"} - regdsc XCSR {done 7} {ie 6} - regdsc RXCSR {rlim 14 3} {done 7} {ie 6} {ir 5} {rlb 4} + regdsc XCSR {rdy 7} {ie 6} + regdsc RXCSR {rlim 14 3} {rdy 7} {ie 6} {ir 5} {rlb 4} regdsc RXBUF {val 15} {size 14 7 "d"} {data 7 8 "o"} rw11util::regmap_add ibd_dl11 tt?.rcsr {l? RCSR r? RRCSR} @@ -49,4 +49,21 @@ namespace eval ibd_dl11 { proc setup {{cpu "cpu0"}} { return [rw11::setup_cntl $cpu "dl11" "tta"] } + # + # rdump: register dump - rem view ------------------------------------------ + # + proc rdump {{cpu "cpu0"}} { + set rval {} + $cpu cp -ribr "tta.rcsr" rcsr \ + -ribr "tta.rbuf" rbuf \ + -ribr "tta.xcsr" xcsr + append rval "Controller registers:" + append rval [format "\n rcsr: %6.6o %s" $rcsr \ + [regtxt ibd_dl11::RRCSR $rcsr]] + append rval [format "\n rbuf: %6.6o %s" $rbuf \ + [regtxt ibd_dl11::RRBUF $rbuf]] + append rval [format "\n xcsr: %6.6o %s" $xcsr \ + [regtxt ibd_dl11::RXCSR $xcsr]] + + } } diff --git a/tools/tcl/rw11/util.tcl b/tools/tcl/rw11/util.tcl index df8636c9..03e2c426 100644 --- a/tools/tcl/rw11/util.tcl +++ b/tools/tcl/rw11/util.tcl @@ -1,4 +1,4 @@ -# $Id: util.tcl 1134 2019-04-21 17:18:03Z mueller $ +# $Id: util.tcl 1140 2019-04-28 10:21:21Z mueller $ # # Copyright 2013-2019 by Walter F.J. Mueller # @@ -13,6 +13,7 @@ # # Revision History: # Date Rev Version Comment +# 2019-04-27 1140 1.3.12 setup_tt: add dl{rxqlim,txrlim}; dlrrlim->dlrxrlim # 2019-04-20 1134 1.3.11 setup_pp: add {pr,pp}rlim and prqlim options # 2019-04-14 1131 1.3.10 setup_lp: add rlim option # 2019-04-07 1128 1.3.9 setup_tt: rename dlrlim to dlrrlim @@ -90,7 +91,9 @@ namespace eval rw11 { # proc setup_tt {{cpu "cpu0"} args} { # process and check options - args2opts opt {ndl 2 dlrrlim 0 ndz 0 to7bit 0 app 0 nbck 1} {*}$args + args2opts opt {ndl 2 dlrxqlim 0 dlrxrlim 0 dltxrlim 0 + ndz 0 + to7bit 0 app 0 nbck 1} {*}$args # check option values if {$opt(ndl) < 1 || $opt(ndl) > 2} { @@ -121,7 +124,9 @@ namespace eval rw11 { set unit "${cntl}0" ${cpu}${unit} att "tcp:?port=${port}" ${cpu}${unit} set log "tirri_${unit}.log${urlopt}" - ${cpu}${cntl} set rxrlim $opt(dlrrlim) + ${cpu}${cntl} set rxqlim $opt(dlrxqlim) + ${cpu}${cntl} set rxrlim $opt(dlrxrlim) + ${cpu}${cntl} set txrlim $opt(dltxrlim) ${cpu}${unit} set to7bit $opt(to7bit) } return