From 2421554d4e0e9fbeabc7ac735de6c139f38532ad Mon Sep 17 00:00:00 2001 From: wfjm Date: Thu, 1 Dec 2022 09:04:57 +0100 Subject: [PATCH] renames, cleanups, SimH V3.12-3 ready - rtl/w11a - pdp11.vhd: rename cpuerr_type adderr->oddadr etc - pdp11_mmu.vhd: rename mmu_mmr0_type dspace->page_dspace - pdp11_sequencer.vhd: rename adderr -> oddadr, don't set after err_mmu - tools/asm-11/lib/defs_reg70.mac: rename cp.aer -> cp.odd - tools/dasm-11/lib/defs_reg70.das: rename cp.aer -> cp.odd - tools/tcl/rw11/defs.tcl: rename adderr -> oddadr (in cpuerr) - tools/tcode - cpu_details.mac: minor updates; get SimH V3.12-3 ready - cpu_mmu.mac: minor updates; get SimH V3.12-3 ready --- rtl/w11a/pdp11.vhd | 11 ++-- rtl/w11a/pdp11_mmu.vhd | 15 ++--- rtl/w11a/pdp11_sequencer.vhd | 13 +++-- tools/asm-11/lib/defs_reg70.mac | 6 +- tools/dasm-11/lib/defs_reg70.das | 4 +- tools/tcl/rw11/defs.tcl | 5 +- tools/tcode/cpu_details.mac | 99 +++++++++++++++++++------------- tools/tcode/cpu_mmu.mac | 19 ++---- 8 files changed, 92 insertions(+), 80 deletions(-) diff --git a/rtl/w11a/pdp11.vhd b/rtl/w11a/pdp11.vhd index 8c262fe2..1297fcf9 100644 --- a/rtl/w11a/pdp11.vhd +++ b/rtl/w11a/pdp11.vhd @@ -1,4 +1,4 @@ --- $Id: pdp11.vhd 1321 2022-11-24 15:06:47Z mueller $ +-- $Id: pdp11.vhd 1323 2022-12-01 08:00:41Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later -- Copyright 2006-2022 by Walter F.J. Mueller -- @@ -11,6 +11,8 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2022-11-29 1323 1.5.18 rename cpuerr_type adderr->oddadr, mmu_mmr0_type +-- dspace->page_dspace; drop mmu_cntl_type.trap_done -- 2022-11-24 1321 1.5.17 add cpustat_type intpend -- 2022-11-21 1320 1.6.16 rename some rsv->ser and cpustat_type trap_->treq_; -- remove vm_cntl_type.trap_done; add in_vecysv; @@ -403,7 +405,7 @@ package pdp11 is type cpuerr_type is record -- CPU error register illhlt : slbit; -- illegal halt (in non-kernel mode) - adderr : slbit; -- address error (odd, jmp/jsr reg) + oddadr : slbit; -- odd address error nxm : slbit; -- non-existent memory iobto : slbit; -- I/O bus timeout (non-exist UB) ysv : slbit; -- yellow stack violation @@ -477,12 +479,11 @@ package pdp11 is cacc : slbit; -- console access (bypass mmu) dspace : slbit; -- dspace access mode : slv2; -- processor mode - trap_done : slbit; -- mmu trap taken (set mmr0 bit) end record mmu_cntl_type; constant mmu_cntl_init : mmu_cntl_type := ( '0','0','0','0', -- req, wacc, macc, cacc - '0',"00",'0' -- dspace, mode, trap_done + '0',"00" -- dspace, mode ); type mmu_stat_type is record -- mmu status port @@ -520,7 +521,7 @@ package pdp11 is ena_trap : slbit; -- enable traps inst_compl : slbit; -- instruction complete page_mode : slv2; -- page mode - dspace : slbit; -- address space (D=1, I=0) + page_dspace : slbit; -- page address space (D=1, I=0) page_num : slv3; -- page number ena_mmu : slbit; -- enable memory management trace_prev : slbit; -- mmr12 trace status in prev. state diff --git a/rtl/w11a/pdp11_mmu.vhd b/rtl/w11a/pdp11_mmu.vhd index e0eeace2..cf2f5209 100644 --- a/rtl/w11a/pdp11_mmu.vhd +++ b/rtl/w11a/pdp11_mmu.vhd @@ -1,4 +1,4 @@ --- $Id: pdp11_mmu.vhd 1294 2022-09-07 14:21:20Z mueller $ +-- $Id: pdp11_mmu.vhd 1323 2022-12-01 08:00:41Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later -- Copyright 2006-2022 by Walter F.J. Mueller -- @@ -17,7 +17,8 @@ -- -- Revision History: -- Date Rev Version Comment --- 2022-09-05 1294 1,4.4 BUGFIX: correct trap and PDR A logic +-- 2022-11-29 1323 1.4.5 rename mmu_mmr0_type dspace->page_dspace +-- 2022-09-05 1294 1.4.4 BUGFIX: correct trap and PDR A logic -- 2022-08-13 1279 1.4.3 ssr->mmr rename -- 2011-11-18 427 1.4.2 now numeric_std clean -- 2010-10-23 335 1.4.1 use ib_sel @@ -78,7 +79,7 @@ architecture syn of pdp11_mmu is constant mmr0_ibf_ena_trap : integer := 9; constant mmr0_ibf_inst_compl : integer := 7; subtype mmr0_ibf_page_mode is integer range 6 downto 5; - constant mmr0_ibf_dspace : integer := 4; + constant mmr0_ibf_page_dspace : integer := 4; subtype mmr0_ibf_page_num is integer range 3 downto 1; constant mmr0_ibf_ena_mmu : integer := 0; @@ -171,7 +172,7 @@ begin mmr0out(mmr0_ibf_ena_trap) := R_MMR0.ena_trap; mmr0out(mmr0_ibf_inst_compl) := R_MMR0.inst_compl; mmr0out(mmr0_ibf_page_mode) := R_MMR0.page_mode; - mmr0out(mmr0_ibf_dspace) := R_MMR0.dspace; + mmr0out(mmr0_ibf_page_dspace):= R_MMR0.page_dspace; mmr0out(mmr0_ibf_page_num) := R_MMR0.page_num; mmr0out(mmr0_ibf_ena_mmu) := R_MMR0.ena_mmu; end if; @@ -386,9 +387,9 @@ begin end if; if mmr_freeze = '0' then - nmmr0.dspace := DSPACE; - nmmr0.page_num := apf; - nmmr0.page_mode := CNTL.mode; + nmmr0.page_dspace := DSPACE; + nmmr0.page_num := apf; + nmmr0.page_mode := CNTL.mode; end if; end if; end if; diff --git a/rtl/w11a/pdp11_sequencer.vhd b/rtl/w11a/pdp11_sequencer.vhd index 5227c79c..479285b6 100644 --- a/rtl/w11a/pdp11_sequencer.vhd +++ b/rtl/w11a/pdp11_sequencer.vhd @@ -1,4 +1,4 @@ --- $Id: pdp11_sequencer.vhd 1322 2022-11-28 19:31:57Z mueller $ +-- $Id: pdp11_sequencer.vhd 1323 2022-12-01 08:00:41Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later -- Copyright 2006-2022 by Walter F.J. Mueller -- @@ -13,6 +13,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2022-11-29 1323 1.6.22 rename adderr -> oddadr, don't set after err_mmu -- 2022-11-28 1322 1.6.21 BUGFIX: correct mmu trap vs interrupt priority -- 2022-11-24 1321 1.6.20 BUGFIX: correct mmu trap handing in s_idecode -- 2022-11-21 1320 1.6.19 rename some rsv->ser and cpustat_type trap_->treq_; @@ -125,7 +126,7 @@ architecture syn of pdp11_sequencer is constant ibaddr_cpuerr : slv16 := slv(to_unsigned(8#177766#,16)); constant cpuerr_ibf_illhlt : integer := 7; - constant cpuerr_ibf_adderr : integer := 6; + constant cpuerr_ibf_oddadr : integer := 6; constant cpuerr_ibf_nxm : integer := 5; constant cpuerr_ibf_iobto : integer := 4; constant cpuerr_ibf_ysv : integer := 3; @@ -296,7 +297,7 @@ begin idout := (others=>'0'); if IBSEL_CPUERR = '1' then idout(cpuerr_ibf_illhlt) := R_CPUERR.illhlt; - idout(cpuerr_ibf_adderr) := R_CPUERR.adderr; + idout(cpuerr_ibf_oddadr) := R_CPUERR.oddadr; idout(cpuerr_ibf_nxm) := R_CPUERR.nxm; idout(cpuerr_ibf_iobto) := R_CPUERR.iobto; idout(cpuerr_ibf_ysv) := R_CPUERR.ysv; @@ -2383,8 +2384,8 @@ begin nstatus.in_vecysv := '0'; -- cancel ysv flow ndpcntl.gr_we := '1'; - if R_VMSTAT.err_odd='1' or R_VMSTAT.err_mmu='1' then - ncpuerr.adderr := '1'; + if R_VMSTAT.err_odd='1' then + ncpuerr.oddadr := '1'; elsif R_VMSTAT.err_nxm = '1' then ncpuerr.nxm := '1'; elsif R_VMSTAT.err_iobto = '1' then @@ -2394,7 +2395,7 @@ begin nstate := s_abort_4; elsif R_VMSTAT.err_odd = '1' then - ncpuerr.adderr := '1'; + ncpuerr.oddadr := '1'; nstate := s_abort_4; elsif R_VMSTAT.err_nxm = '1' then ncpuerr.nxm := '1'; diff --git a/tools/asm-11/lib/defs_reg70.mac b/tools/asm-11/lib/defs_reg70.mac index 2895e548..050194cb 100644 --- a/tools/asm-11/lib/defs_reg70.mac +++ b/tools/asm-11/lib/defs_reg70.mac @@ -1,6 +1,6 @@ -; $Id: defs_reg70.mac 1184 2019-07-10 20:39:44Z mueller $ +; $Id: defs_reg70.mac 1323 2022-12-01 08:00:41Z mueller $ ; SPDX-License-Identifier: GPL-3.0-or-later -; Copyright 2015- by Walter F.J. Mueller +; Copyright 2015-2022 by Walter F.J. Mueller ; ; definitions for 11/70 CPU registers (as in defs_reg70.das) ; @@ -23,7 +23,7 @@ ; symbol definitions for cpuerr ; cp.hlt = 000200 - cp.aer = 000100 + cp.odd = 000100 cp.nxm = 000040 cp.ito = 000020 cp.ysv = 000010 diff --git a/tools/dasm-11/lib/defs_reg70.das b/tools/dasm-11/lib/defs_reg70.das index 18753f84..9c862c06 100644 --- a/tools/dasm-11/lib/defs_reg70.das +++ b/tools/dasm-11/lib/defs_reg70.das @@ -1,4 +1,4 @@ -# $Id: defs_reg70.das 1286 2022-08-25 06:53:38Z mueller $ +# $Id: defs_reg70.das 1323 2022-12-01 08:00:41Z mueller $ # # definitions for 11/70 cpu registers # @@ -20,7 +20,7 @@ .symbol cp.ubm=170200 # .symset %cp.err = cp.hlt=000200,\ - cp.aer=000100,\ + cp.odd=000100,\ cp.nxm=000040,\ cp.ito=000020,\ cp.ysv=000010,\ diff --git a/tools/tcl/rw11/defs.tcl b/tools/tcl/rw11/defs.tcl index 509988ac..fd6e7e10 100644 --- a/tools/tcl/rw11/defs.tcl +++ b/tools/tcl/rw11/defs.tcl @@ -1,9 +1,10 @@ -# $Id: defs.tcl 1320 2022-11-22 18:52:59Z mueller $ +# $Id: defs.tcl 1323 2022-12-01 08:00:41Z mueller $ # SPDX-License-Identifier: GPL-3.0-or-later # Copyright 2014-2022 by Walter F.J. Mueller # # Revision History: # Date Rev Version Comment +# 2022-11-29 1323 1.0.12 rename adderr -> oddadr (in cpuerr) # 2022-11-21 1320 1.0.11 rename RUST recrsv -> recser # 2022-09-03 1292 1.0.10 shorter field names for MMR0,MMR1 # 2022-08-07 1273 1.0.9 ssr->mmr rename @@ -89,7 +90,7 @@ namespace eval rw11 { # # CPUERR - CPU Error Register ------------------------------------- set A_CPUERR 0177766 - regdsc CPUERR {illhlt 7} {adderr 6} {nxm 5} {iobto 4} {ysv 3} {rsv 2} + regdsc CPUERR {illhlt 7} {oddadr 6} {nxm 5} {iobto 4} {ysv 3} {rsv 2} # # CNTRL - Memory System Control Register ------------------------- set A_CNTRL 0177746 diff --git a/tools/tcode/cpu_details.mac b/tools/tcode/cpu_details.mac index 2919c2d9..fc1d4384 100644 --- a/tools/tcode/cpu_details.mac +++ b/tools/tcode/cpu_details.mac @@ -1,10 +1,10 @@ -; $Id: cpu_details.mac 1322 2022-11-28 19:31:57Z mueller $ +; $Id: cpu_details.mac 1323 2022-12-01 08:00:41Z mueller $ ; SPDX-License-Identifier: GPL-3.0-or-later ; Copyright 2022- by Walter F.J. Mueller ; ; Revision History: ; Date Rev Version Comment -; 2022-11-22 1320 1.0 Initial version +; 2022-11-29 1323 1.0 Initial version ; 2022-07-18 1259 0.1 First draft ; ; Test CPU details @@ -174,7 +174,7 @@ ta0102: spl 0 ; ensure execution at PR0 ; Test cp.hlt: halt in non-kernel mode ; ta0201: mov #177777,(r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; ensure that CPUERR is zero + htsteq (r0) ; ensure that CPUERR is zero ; mov #4000$,r2 ; mode list (user,supervisor) mov #2,r3 ; number of modes @@ -194,7 +194,7 @@ ta0201: mov #177777,(r0) ; clear CPUERR (any write should) 3000$: hcmpeq r1,#1 ; check tracer hcmpeq (r0),#cp.hlt ; check CPUERR mov #cp.rsv,(r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR ; sob r3,1000$ ; go for next mode ; @@ -205,15 +205,15 @@ ta0201: mov #177777,(r0) ; clear CPUERR (any write should) ; 9999$: iot ; end of test A2.1 ; -; Test A2.2 -- CPUERR cp.aer +++++++++++++++++++++++++++++++++++++++++ -; Test cp.aer: address error abort +; Test A2.2 -- CPUERR cp.odd +++++++++++++++++++++++++++++++++++++++++ +; Test cp.odd: odd address error abort ; ta0202: mov #1000$,vhustp ; continuation address tst @#001 ; odd address access halt -1000$: hcmpeq (r0),#cp.aer ; check CPUERR +1000$: hcmpeq (r0),#cp.odd ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR ; 9999$: iot ; end of test A2.2 ; @@ -235,7 +235,7 @@ ta0203: cmpb systyp,#sy.e11 ; e11 V7.3 return wrong CPUERR value halt 1000$: hcmpeq (r0),#cp.nxm ; check CPUERR com (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR ; reset ; disable mmu ;! MMU off pop kipar6 ; restore kipar6 @@ -250,7 +250,7 @@ ta0204: mov #1000$,vhustp ; continuation address halt 1000$: hcmpeq (r0),#cp.ito ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR ; 9999$: iot ; end of test A2.4 ; @@ -266,7 +266,7 @@ ta0205: cmpb systyp,#sy.e11 ; e11 V7.3 doesnt trap, runs on hold halt ; not executed, handler continues at 1000$ 1000$: hcmpeq (r0),#cp.ysv ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR ; mov #stack,sp 9999$: iot ; end of test A2.5 @@ -280,36 +280,46 @@ ta0206: cmpb systyp,#sy.e11 ; e11 V7.3 doesnt abort, runs on hold mov #340,sp clr -(sp) ; should abort (not trap) halt -1000$: mov #stack,sp ; direct iit handler +1000$: htsteq sp ; check SP=0 hcmpeq (r0),#cp.rsv ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR + mov #stack,sp ; restore stack ; 9999$: iot ; end of test A2.6 ; -; Test A2.7 -- CPUERR cp.rsv+cp.aer (odd address) ++++++++++++++++++++ -; Test cp.aer: fatal stack error after odd stack +; Test A2.7 -- CPUERR cp.odd + stack error +++++++++++++++++++++++++++ +; Test cp.odd: fatal stack error after odd stack ; ta0207: cmpb systyp,#sy.e11 ; e11 V7.3 pushes to odd stack, abort after halt beq 9999$ - mov #1000$,v..iit ; setup direct iit handler + cmpb systyp,#sy.sih ; SimH uses J11 semantics + bne 100$ + mov #,1010$+2 ; and sets rsv for all stack errors +; +100$: mov #1000$,v..iit ; setup direct iit handler mov #stack-1,sp clr -(sp) ; odd-address abort, fatal stack error halt -1000$: mov #stack,sp ; direct iit handler - hcmpeq (r0),# ; check CPUERR +1000$: htsteq sp ; check SP=0 +1010$: hcmpeq (r0),# ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR + mov #stack,sp ; restore stack ; 9999$: iot ; end of test A2.7 ; -; Test A2.8 -- CPUERR cp.rsv+cp.nxm ++++++++++++++++++++++++++++++++++ +; Test A2.8 -- CPUERR cp.nxm + stack error +++++++++++++++++++++++++++ ; Test cp.nxm: fatal stack error after non-existent memory abort ; Setup like in A2.3, put stack at p6base+4 ; ta0208: cmpb systyp,#sy.e11 ; e11 V7.3 pushes to bad stack, abort after halt beq 9999$ - mov #1000$,v..iit ; setup direct iit handler + cmpb systyp,#sy.sih ; SimH uses J11 semantics + bne 100$ + mov #,1010$+2 ; and sets rsv for all stack errors +; +100$: mov #1000$,v..iit ; setup direct iit handler mov #177400,kipar6 mov #m3.e22,mmr3 ; 22-bit mode mov #m0.ena,mmr0 ; enable mmu ;! MMU 22 @@ -317,42 +327,48 @@ ta0208: cmpb systyp,#sy.e11 ; e11 V7.3 pushes to bad stack, abort after halt mov #p6base+4,sp ; stack in non-existing memory clr -(sp) ; non-existing memory, fatal stack error halt -1000$: mov #stack,sp ; direct iit handler - hcmpeq (r0),# ; check CPUERR +1000$: htsteq sp ; check SP=0 +1010$: hcmpeq (r0),# ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR + mov #stack,sp ; restore stack ; reset ;! MMU off mov #001400,kipar6 ; restore kipar6 ; 9999$: iot ; end of test A2.8 ; -; Test A2.9 -- CPUERR cp.rsv+cp.ito ++++++++++++++++++++++++++++++++++ +; Test A2.9 -- CPUERR cp.ito + stack error +++++++++++++++++++++++++++ ; Test cp.ito: fatal stack error after unibus timeout ; Setup like in A2.4, put stack at 160004 ; ta0209: cmpb systyp,#sy.e11 ; e11 V7.3 pushes to bad stack, abort after halt beq 9999$ - mov #1000$,v..iit ; setup direct iit handler + cmpb systyp,#sy.sih ; SimH uses J11 semantics + bne 100$ + mov #,1010$+2 ; and sets rsv for all stack errors +; +100$: mov #1000$,v..iit ; setup direct iit handler mov #160004,sp ; stack at non-existing unibus device clr -(sp) ; non-existing memory, fatal stack error halt -1000$: mov #stack,sp ; direct iit handler - hcmpeq (r0),# ; check CPUERR +1000$: htsteq sp ; check SP=0 +1010$: hcmpeq (r0),# ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR + mov #stack,sp ; restore stack ; 9999$: iot ; end of test A2.9 ; -; Test A2.10 -- CPUERR cp.rsv+cp.aer (mmu abort) +++++++++++++++++++++ -; Test cp.rsv: fatal stack error after mmu abort +; Test A2.10 -- CPUERR mmu abort + stack error +++++++++++++++++++++++ +; Test cp.rsv: fatal stack error after mmu abort ; Set kernel I page 6 to non-resident ; -ta0210: cmpb systyp,#sy.sih ; this fatal stack error fails in SimH - beq 9999$ - cmpb systyp,#sy.e11 ; e11 V7.3 pushes to bad stack, does MMU 250 - beq 9999$ - mov #1000$,v..iit ; setup direct iit handler +ta0210: cmpb systyp,#sy.sih ; SimH uses J11 semantics + bne 100$ + mov #cp.rsv,1010$+2 ; and sets rsv for all stack errors +; +100$: mov #1000$,v..iit ; setup direct iit handler clr kipdr6 ; set non-resident mov #m3.e22,mmr3 ; 22-bit mode mov #m0.ena,mmr0 ; enable mmu ;! MMU 22 @@ -360,10 +376,11 @@ ta0210: cmpb systyp,#sy.sih ; this fatal stack error fails in SimH mov #p6base+4,sp ; stack in non-resident memory clr -(sp) ; MMU abort, fatal stack error halt -1000$: mov #stack,sp ; direct iit handler - hcmpeq (r0),# ; check CPUERR +1000$: htsteq sp ; check SP=0 +1010$: hcmpeq (r0),#cp.rsv ; check CPUERR clr (r0) ; clear CPUERR (any write should) - hcmpeq (r0),#0 ; check CPUERR + htsteq (r0) ; check CPUERR + mov #stack,sp ; restore stack ; reset ;! MMU off mov kipdr5,kipdr6 ; restore kipdr6 (default kipdr are identical) @@ -406,8 +423,8 @@ ta0301: ; 2000$: movb #7,1(r3) ; write MSB hcmpeq #3400,(r3) ; check MSB written -;; movb #70,(r3) ; write LSB (SimH not yet!) -;; hcmpeq #3400,(r3) ; check MSB unchanged (SimH not yet!) + movb #70,(r3) ; write LSB + hcmpeq #3400,(r3) ; check MSB unchanged clr (r3) ; STKLIM to default ; 9999$: iot ; end of test A3.1 diff --git a/tools/tcode/cpu_mmu.mac b/tools/tcode/cpu_mmu.mac index 073a4f12..dee0eb3b 100644 --- a/tools/tcode/cpu_mmu.mac +++ b/tools/tcode/cpu_mmu.mac @@ -1,10 +1,10 @@ -; $Id: cpu_mmu.mac 1322 2022-11-28 19:31:57Z mueller $ +; $Id: cpu_mmu.mac 1323 2022-12-01 08:00:41Z mueller $ ; SPDX-License-Identifier: GPL-3.0-or-later ; Copyright 2022- by Walter F.J. Mueller ; ; Revision History: ; Date Rev Version Comment -; 2022-09-10 1297 1.0 Initial version +; 2022-11-29 1323 1.0 Initial version ; 2022-07-24 1262 0.1 First draft ; ; Test CPU MMU: all aspects of the MMU @@ -639,9 +639,7 @@ tb0401: clr mmr3 ; no d dspace, no 22bit ; test abort PS on stack 1020$: hcmpeq (sp)+,#^b1010000000000000 ; abort PS ; - mov mmr0,r5 - bic #m0.ico,r5 - hcmpeq r5,#m0.anr!m0.ale!0100!<6*m0.pno>!m0.ena ; check mmr0 + hcmpeq mmr0,#m0.anr!m0.ale!0100!<6*m0.pno>!m0.ena ; check mmr0 hcmpeq mmr2,#p6base+200 ; check mmr2 ; reset ;! MMU off @@ -1326,13 +1324,8 @@ td0101: hcmpeq vc2sek+0,vc2dat+2 ; 2nd push hcmpeq vc2sek-2,vc2dat+4 ; 3rd push hcmpeq vc2sek-4,vc2dat+6 ; 4th push -; -; SimH wrongly sets m0.ico, skip mmr0 check for SimH - cmpb systyp,#sy.sih - beq 1010$ hcmpeq 3000$,#!m0.ena> -; -1010$: hcmpeq 3001$,#^b1111011000010100 ; -2,sp;2,r4 + hcmpeq 3001$,#^b1111011000010100 ; -2,sp;2,r4 hcmpeq 3002$,# ; ; reset user mode pdr/par @@ -1946,9 +1939,7 @@ tf0102: mov #154345,@#p6base ; inititialize target ; vhmmua: mov vhvmmu,r1 ; get context beq 1000$ ; if 0 halt - mov mmr0,r0 - bic #m0.ico,r0 ; mask ico (for Simh compatibility) - hcmpeq r0,(r1)+ ; check mmr0 + hcmpeq mmr0,(r1)+ ; check mmr0 hcmpeq mmr1,(r1)+ ; check mmr1 bic #m0.anr!m0.ale!m0.ard,mmr0 ; reset mmr0 abort flags mov r1,(sp) ; set up kernel return address