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pdp11_sequencer: BUGFIX: correct ysv flow implementation

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- rtl/w11a
  - pdp11.vhd: rename, eg srv->ser; drop trap_done; add in_vecysv
  - pdp11_sequencer: renames; BUGFIX: correct ysv flow implementation
  - pdp11_vmbox.vhd: rename some rsv->ser; remove obsolete trap_done
- tools/tbench/w11a/test_w11a_cpuerr.tcl: removed, all in cpu_details.mac
- tools/tcl/rw11/defs.tcl: renames
- tools/tcode/cpu_details.mac: expand A3.3, add A3.4
This commit is contained in:
wfjm
2022-11-23 08:46:12 +01:00
parent b5189053d3
commit 40608e35fe
8 changed files with 201 additions and 288 deletions
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24
rtl/w11a/pdp11.vhd
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@@ -1,4 +1,4 @@
-- $Id: pdp11.vhd 1310 2022-10-27 16:15:50Z mueller $
-- $Id: pdp11.vhd 1320 2022-11-22 18:52:59Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -11,6 +11,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-11-21 1320 1.6.16 rename some rsv->ser and cpustat_type trap_->treq_;
-- remove vm_cntl_type.trap_done; add in_vecysv;
-- 2022-10-25 1309 1.6.15 rename _gpr -> _gr
-- 2022-10-03 1301 1.6.14 add decode_stat_type.is_dstpcmode1
-- 2022-08-13 1279 1.6.13 ssr->mmr rename
@@ -352,7 +354,7 @@ package pdp11 is
constant c_cpurust_hbpt : slv4 := "0110"; -- cpu had hardware bpt
constant c_cpurust_runs : slv4 := "0111"; -- cpu running
constant c_cpurust_vecfet : slv4 := "1000"; -- vector fetch error halt
constant c_cpurust_recrsv : slv4 := "1001"; -- recursive red-stack halt
constant c_cpurust_recser : slv4 := "1001"; -- recursive stack error halt
constant c_cpurust_sfail : slv4 := "1100"; -- sequencer failure
constant c_cpurust_vfail : slv4 := "1101"; -- vmbox failure
@@ -376,11 +378,12 @@ package pdp11 is
breset : slbit; -- BRESET pulse
intack : slbit; -- INT_ACK pulse
intvect : slv9_2; -- current interrupt vector
trap_mmu : slbit; -- mmu trace trap pending
trap_ysv : slbit; -- ysv trap pending
treq_mmu : slbit; -- mmu trap requested
treq_ysv : slbit; -- ysv trap requested
prefdone : slbit; -- prefetch done
do_grwe : slbit; -- pending gr_we
do_intrsv : slbit; -- active rsv interrupt sequence
in_vecser : slbit; -- in fatal stack error vector flow
in_vecysv : slbit; -- in ysv trap flow
end record cpustat_type;
constant cpustat_init : cpustat_type := (
@@ -392,8 +395,8 @@ package pdp11 is
'0', -- waitsusp
'0','0','0','0', -- itimer,creset,breset,intack
(others=>'0'), -- intvect
'0','0','0', -- trap_(mmu|ysv), prefdone
'0','0' -- do_grwe, do_intrsv
'0','0','0', -- treq_(mmu|ysv), prefdone
'0','0','0' -- do_grwe, in_vec(ser|ysv)
);
type cpuerr_type is record -- CPU error register
@@ -415,15 +418,14 @@ package pdp11 is
bytop : slbit; -- byte operation
dspace : slbit; -- dspace operation
kstack : slbit; -- access through kernel stack
intrsv : slbit; -- active rsv interrupt sequence
vecser : slbit; -- in fatal stack error vector flow
mode : slv2; -- mode
trap_done : slbit; -- mmu trap taken (to set mmr0 bit)
end record vm_cntl_type;
constant vm_cntl_init : vm_cntl_type := (
'0','0','0','0', -- req, wacc, macc,cacc
'0','0','0', -- bytop, dspace, kstack
'0',"00",'0' -- intrsv, mode, trap_done
'0',"00" -- vecser, mode
);
type vm_stat_type is record -- virt memory status port
@@ -436,7 +438,7 @@ package pdp11 is
err_iobto : slbit; -- abort: non-existing I/O resource
err_rsv : slbit; -- abort: red stack violation
trap_ysv : slbit; -- trap: yellow stack violation
trap_mmu : slbit; -- trap: mmu trace trap
trap_mmu : slbit; -- trap: mmu trap
end record vm_stat_type;
constant vm_stat_init : vm_stat_type := (others=>'0');

54
rtl/w11a/pdp11_sequencer.vhd
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@@ -1,4 +1,4 @@
-- $Id: pdp11_sequencer.vhd 1316 2022-11-18 15:26:40Z mueller $
-- $Id: pdp11_sequencer.vhd 1320 2022-11-22 18:52:59Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -13,6 +13,9 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-11-21 1320 1.6.19 rename some rsv->ser and cpustat_type trap_->treq_;
-- remove vm_cntl_type.trap_done;
-- BUGFIX: correct ysv flow implementation
-- 2022-11-18 1316 1.6.18 BUGFIX: use is_kstackdst1246 also in dstr flow
-- 2022-10-29 1312 1.6.17 rename s_int_* -> s_vec_*, s_trap_* -> s_abort_*
-- 2022-10-25 1309 1.6.16 rename _gpr -> _gr
@@ -461,11 +464,11 @@ begin
if VM_STAT.ack = '1' then
pmok := true;
if VM_STAT.trap_mmu = '1' then -- remember trap_mmu, may happen on any
pnstatus.trap_mmu := '1'; -- memory access of an instruction
pnstatus.treq_mmu := '1'; -- memory access of an instruction
end if;
if VM_STAT.trap_ysv = '1' then -- remember trap_ysv (on any access)
if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set
pnstatus.trap_ysv := '1';
if VM_STAT.trap_ysv = '1' then -- remember trap_ysv (on final writes)
if R_STATUS.in_vecysv = '0' then -- trap when not in ysv vector flow
pnstatus.treq_ysv := '1';
end if;
end if;
elsif VM_STAT.err='1' or VM_STAT.fail='1' then
@@ -536,8 +539,8 @@ begin
pnmmumoni.idone := '1';
if unsigned(INT_PRI) > unsigned(PSW.pri) then
pnstate := s_idle;
elsif R_STATUS.trap_mmu='1' or pnstatus.trap_mmu='1' or
R_STATUS.trap_ysv='1' or pnstatus.trap_ysv='1' or
elsif R_STATUS.treq_mmu='1' or pnstatus.treq_mmu='1' or
R_STATUS.treq_ysv='1' or pnstatus.treq_ysv='1' or
PSW.tflag='1' then
pnstate := s_trap_disp;
elsif R_STATUS.cpugo='1' and -- running
@@ -560,8 +563,8 @@ begin
pnmmumoni.idone := '1';
if unsigned(INT_PRI) > unsigned(PSW.pri) then
pnstate := s_idle;
elsif R_STATUS.trap_mmu='1' or pnstatus.trap_mmu='1' or
R_STATUS.trap_ysv='1' or pnstatus.trap_ysv='1' or
elsif R_STATUS.treq_mmu='1' or pnstatus.treq_mmu='1' or
R_STATUS.treq_ysv='1' or pnstatus.treq_ysv='1' or
PSW.tflag='1' then
pnstate := s_trap_disp;
elsif R_STATUS.cpugo='1' and -- running
@@ -658,7 +661,7 @@ begin
nvmcntl := vm_cntl_init;
nvmcntl.dspace := '1'; -- DEFAULT
nvmcntl.mode := PSW.cmode; -- DEFAULT
nvmcntl.intrsv := R_STATUS.do_intrsv; -- DEFAULT
nvmcntl.vecser := R_STATUS.in_vecser; -- DEFAULT
ndpcntl := dpath_cntl_init;
ndpcntl.gr_asrc := SRCREG; -- DEFAULT
@@ -886,8 +889,8 @@ begin
ndpcntl.dres_sel := c_dpath_res_vmdout; -- DRES = VMDOUT
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
nstatus.cmdack := '1';
nstatus.trap_ysv := '0'; -- suppress traps on console
nstatus.trap_mmu := '0';
nstatus.treq_ysv := '0'; -- suppress traps on console
nstatus.treq_mmu := '0';
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
nstate := s_idle;
end if;
@@ -897,8 +900,8 @@ begin
nstate := s_cp_memw_w;
if (VM_STAT.ack or VM_STAT.err or VM_STAT.fail)='1' then
nstatus.cmdack := '1';
nstatus.trap_ysv := '0'; -- suppress traps on console
nstatus.trap_mmu := '0';
nstatus.treq_ysv := '0'; -- suppress traps on console
nstatus.treq_mmu := '0';
nstatus.cmdmerr := VM_STAT.err or VM_STAT.fail;
nstate := s_idle;
end if;
@@ -2157,17 +2160,17 @@ begin
do_start_vec(nstate, ndpcntl, lvector);
when s_trap_disp => -- -----------------------------------
if R_STATUS.trap_mmu = '1' then
nvmcntl.trap_done := '1'; -- mmu trap taken: set mmr0 trap bit
if R_STATUS.treq_mmu = '1' then -- mmu trap requested ?
lvector := "0101010"; -- mmu trap: vector (250)
elsif R_STATUS.trap_ysv = '1' then
elsif R_STATUS.treq_ysv = '1' then -- ysv trap requested ?
lvector := "0000001"; -- ysv trap: vector (4)
ncpuerr.ysv := '1';
nstatus.in_vecysv := '1'; -- signal start of ysv vector flow
else
lvector := "0000011"; -- trace trap: vector (14)
end if;
nstatus.trap_mmu := '0'; -- clear pending trap flags
nstatus.trap_ysv := '0'; --
nstatus.treq_mmu := '0'; -- clear trap request flags
nstatus.treq_ysv := '0'; --
do_start_vec(nstate, ndpcntl, lvector);
when s_int_ext => -- -----------------------------------
@@ -2280,7 +2283,8 @@ begin
nstate := s_vec_pushpc_w;
do_memcheck(nstate, nstatus, imemok);
if imemok then
nstatus.do_intrsv := '0'; -- signal end of rsv
nstatus.in_vecser := '0'; -- signal end of ser flow
nstatus.in_vecysv := '0'; -- signal end of ysv flow
ndpcntl.gr_we := '1'; -- load new PC
idm_pcload := '1'; -- signal flow change
do_fork_next(nstate, nstatus, nmmumoni); -- ???
@@ -2347,21 +2351,23 @@ begin
ndpcntl.gr_mode := c_psw_kmode; -- set kmode SP to 4
ndpcntl.gr_adst := c_gr_sp;
nstatus.trap_mmu :='0'; -- drop pending mmu trap
nstatus.treq_mmu := '0'; -- cancel mmu trap request
nstatus.treq_ysv := '0'; -- cancel ysv trap request
if R_VMSTAT.fail = '1' then -- vmbox failure
nstatus.cpugo := '0'; -- halt cpu
nstatus.cpurust := c_cpurust_vfail;
nstate := s_idle;
elsif R_STATUS.do_intrsv = '1' then -- double error
elsif R_STATUS.in_vecser = '1' then -- double fatal stack error
nstatus.cpugo := '0'; -- give up, HALT cpu
nstatus.cpurust := c_cpurust_recrsv;
nstatus.cpurust := c_cpurust_recser;
nstate := s_idle;
elsif R_VMSTAT.err = '1' then -- normal vm errors
if R_VMSTAT.err_rsv = '1' then
nstatus.do_intrsv := '1'; -- signal start of rsv
nstatus.in_vecser := '1'; -- signal start of ser flow
nstatus.in_vecysv := '0'; -- cancel ysv flow
ndpcntl.gr_we := '1';
if R_VMSTAT.err_odd='1' or R_VMSTAT.err_mmu='1' then

10
rtl/w11a/pdp11_vmbox.vhd
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@@ -1,4 +1,4 @@
-- $Id: pdp11_vmbox.vhd 1317 2022-11-19 15:33:42Z mueller $
-- $Id: pdp11_vmbox.vhd 1320 2022-11-22 18:52:59Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -18,6 +18,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-11-21 1320 1.6.9 rename some rsv->ser; remove obsolete trap_done;
-- 2022-11-18 1317 1.6.8 BUGFIX: correct red/yellow zone boundary
-- 2019-06-22 1170 1.6.7 support membe for em cacc access
-- 2016-05-22 767 1.6.6 don't init N_REGS (vivado fix for fsm inference)
@@ -119,7 +120,7 @@ architecture syn of pdp11_vmbox is
kstack : slbit; -- access through kernel stack
ysv : slbit; -- yellow stack violation detected
vaok : slbit; -- virtual address valid (from MMU)
trap_mmu : slbit; -- mmu trace trap requested
trap_mmu : slbit; -- mmu trap requested
mdin : slv16; -- data input (memory order)
paddr : slv22; -- physical address register
paddr_iopage : slv9; -- iopage base (upper 9 bits of paddr)
@@ -384,7 +385,6 @@ begin
immu_cntl.cacc := VM_CNTL.cacc;
immu_cntl.dspace := VM_CNTL.dspace;
immu_cntl.mode := VM_CNTL.mode;
immu_cntl.trap_done := VM_CNTL.trap_done;
case r.state is
when s_idle => -- s_idle: wait for vm_cntl request --
@@ -409,14 +409,14 @@ begin
if VM_CNTL.wacc='1' and VM_CNTL.macc='1' then
n.state := s_fail;
elsif VM_CNTL.kstack='1' and VM_CNTL.intrsv='0' and
elsif VM_CNTL.kstack='1' and VM_CNTL.vecser='0' and
is_stackred='1' then
n.state := s_errrsv;
else
iem_mreq.req := '1';
iem_mreq.we := VM_CNTL.wacc;
if VM_CNTL.kstack='1'and VM_CNTL.intrsv='0' then
if VM_CNTL.kstack='1' and VM_CNTL.vecser='0' then
n.ysv := is_stackyellow;
end if;
n.state := s_mem_w;