diff --git a/README.md b/README.md index 3e6bab47..038d142f 100644 --- a/README.md +++ b/README.md @@ -7,16 +7,32 @@ ### Overview The project contains the VHDL code for a **complete DEC PDP-11 system**: -a PDP-11/70 CPU with memory management unit, but without floating point unit, +a +[PDP-11/70](http://www.bitsavers.org/pdf/dec/pdp11/1170/EK-KB11C-TM-001_1170procMan.pdf) +CPU with memory management unit, but without floating point unit, a complete set of mass storage peripherals -(RK11/RK05, RL11/RL02, RK70/RP06, TM11/TU10) +([RK11/RK05](http://www.bitsavers.org/pdf/dec/unibus/RK11-C_manual1971.pdf), +[RL11/RL02](http://www.bitsavers.org/pdf/dec/disc/rl01_rl02/EK-RL122-TM-001_techAug82.pdf), +[RH70](http://www.bitsavers.org/pdf/dec/unibus/CSS-MO-F-5.2-27_RH70_Option_Description_Feb77.pdf)/[RP06](http://www.bitsavers.org/pdf/dec/disc/rp04_rp05_rp06/EK-RP056-MM-01_maint_Dec75.pdf), +[TM11/TU10](http://www.bitsavers.org/pdf/dec/magtape/tm11/TM11_Manual.pdf)) and a rather complete set of UNIBUS peripherals -(DL11, LP11, PC11, and DEUNA), +([DL11](http://www.bitsavers.org/pdf/dec/unibus/EK-DL11-TM-003_DL11_Asynchronous_Line_Interface_Manual_Sep75.pdf), +[LP11](http://www.bitsavers.org/pdf/dec/unibus/LP11_UsersMan.pdf), +[PC11](http://www.bitsavers.org/pdf/dec/unibus/PC11_Reader-Punch_Manual.pdf), +[DZ11](http://www.bitsavers.org/pdf/dec/unibus/EK-DZ110-TM-002_DZ11_Asynchronous_Multiplexer_Technical_Manual_Oct78.pdf), and +[DEUNA](http://www.bitsavers.org/pdf/dec/unibus/EK-DEUNA-TM-PRE_TechMan_Dec82.pdf)), and last but not least a cache and memory controllers for SRAM, PSRAM and SDRAM (via Xilinx MIG core). -The design is **FPGA proven**, runs currently on -Digilent Arty, Basys3, CmodA7, Nexys4, Nexys3, Nexys2 and S3board boards -and boots 5th Edition UNIX and 2.11BSD UNIX. +The design is **FPGA proven**, runs currently on Digilent +[Arty A7](rtl/sys_gen/w11a/arty), +[Basys3](rtl/sys_gen/w11a/basys3), +[Cmod A7](rtl/sys_gen/w11a/cmoda7), +[Nexys A7](rtl/sys_gen/w11a/nexys4d), +[Nexys4](rtl/sys_gen/w11a/nexys4), +[Nexys3](rtl/sys_gen/w11a/nexys3), +[Nexys2](rtl/sys_gen/w11a/nexys2) and +[S3board](rtl/sys_gen/w11a/s3board) +boards and boots 5th Edition UNIX and 2.11BSD UNIX. For more information look into: - w11 project [home page](https://wfjm.github.io/home/w11/) diff --git a/doc/README_known_issues.md b/doc/README_known_issues.md index 875c59dd..00396b9f 100644 --- a/doc/README_known_issues.md +++ b/doc/README_known_issues.md @@ -230,9 +230,37 @@ to avoid potential damage. Looking forward to receive test reports. #### Fix -Purchased Nexys A7-100 board after the -[Nexys4 board broke](https://wfjm.github.io/blogs/w11/2019-07-27-nexys4-obituary.html), -tested, and fixed one silly mistake. Closed with commit +The Nexys4 _(classic, with 16 MByte PSRAM)_ board, on which most of the recent +w11 was done, broke in late July 2019 +(see [blog](https://wfjm.github.io/blogs/w11/2019-07-27-nexys4-obituary.html)) +and a Nexys A7 was ordered as replacement. + +Basic tests with the test designs +[sys_tst_serloop2](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/tst_serloop/nexys4d/sys_tst_serloop2_n4d.vhd) and +[sys_tst_rlink_n4d](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/tst_rlink/nexys4d/sys_tst_rlink_n4d.vhd) +and the BRAM-only w11 design +[sys_w11a_br_n4d](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/w11a/nexys4d_bram/sys_w11a_br_n4d.vhd) worked fine. + +But all tests involving the DDR2 memory interface failed. The culprit was +quickly found, it was a mistake in the MIG configuration +[mig_a.prj](https://github.com/wfjm/w11/blob/master/rtl/bplib/nexys4d/mig_a.prj), +the polarity of the `SYS_RST` signal was `ACTIVE LOW` instead of `ACTIVE HIGH`. +After fixing this, the test designs +[sys_tst_mig_n4d](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/tst_mig/nexys4d/sys_tst_mig_n4d.vhd) and +[sys_tst_sram_n4d](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/tst_sram/nexys4d/sys_tst_sram_n4d.vhd) +as well as the w11 implementation +[sys_w11a_n4d](https://github.com/wfjm/w11/blob/master/rtl/sys_gen/w11a/nexys4d/sys_w11a_n4d.vhd) worked right away. + +The [tst_sram](https://github.com/wfjm/w11/tree/master/rtl/sys_gen/tst_sram) +designs show nicely that the DDR2 on the Nexys A7 board is slightly slower +than the DDR3 on the Arty A7 board +``` + Board test time clock period UI_CLK + Nexys A7 37.36 s 3333 ps 75.0 MHz + Arty A7 35.77 s 3000 ps 83.3 MHz +``` + +Closed with commit [563e230](https://github.com/wfjm/w11/commit/563e230). ### V0.66-1 {[issue #8](https://github.com/wfjm/w11/issues/8)} -- TM11 controller doesn't support odd transfer size diff --git a/doc/w11a_os_guide.md b/doc/w11a_os_guide.md index 57736663..bc223891 100644 --- a/doc/w11a_os_guide.md +++ b/doc/w11a_os_guide.md @@ -12,9 +12,9 @@ ### I/O emulation setup -All UNIBUS peripherals which exchange data (currently DL11, LP11, PC11, RK11, -RL11, RPRH, TM11, and DENUA ) are currently emulated via a backend process. The -communication between FPGA board and backend server can be via +All UNIBUS peripherals which exchange data (currently DL11, DZ11, LP11, PC11, +DEUNA, RK11, RL11, RPRH, and TM11) are currently emulated via a backend +process. The communication between FPGA board and backend server can be via - Serial port - via an integrated USB-UART bridge @@ -26,7 +26,8 @@ communication between FPGA board and backend server can be via 2017 one gets kernels with 16 ms default latency again, thanks to [kernel patch 9589541](https://patchwork.kernel.org/patch/9589541/). **For newer systems it is essential to install a udev rule** which - automatically sets low latency, see [docu](../tools/sys/README.md). + automatically sets low latency, see + [documentation in tools/sys](../tools/sys/README.md). - via RS232 port, as on S3board and Nexys2 - using a serial port (/dev/ttySx) is limited to 115 kBaud on most PCs. - using a USB-RS232 adapter was tested up to 460k Baud. @@ -52,45 +53,50 @@ Recommended setup for best performance (boards ordered by vintage): | Board | Channel/Interface | nom. speed | peak transfer rate | | :--------- | :--------------------- | :----------- | -----------------: | -| Arty A7 | USB-UART bridge | 12M Baud | 1090 kB/sec | -| Basys3 | USB-UART bridge | 12M Baud | 1090 kB/sec | -| Cmod A7 | USB-UART bridge | 12M Baud | 1090 kB/sec | -| Nexys A7 | USB-UART bridge | 12M Baud | 1090 kb/sec | -| Nexys4 | USB-UART bridge | 12M Baud | 1090 kb/sec | -| Nexys3 | Cypress FX2 USB | USB2.0 speed | 30000 kB/sec | -| Nexys2 | Cypress FX2 USB | USB2.0 speed | 30000 kB/sec | -| S3board | RS232+USB-RS232 cable | 460k Baud | 41 kB/sec | +| [Arty S7](https://wfjm.github.io/home/w11/inst/boards.html#digi_artys7) | USB-UART bridge | 12M Baud | 1090 kB/sec | +| [Arty A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_arty) | USB-UART bridge | 12M Baud | 1090 kB/sec | +| [Basys3](https://wfjm.github.io/home/w11/inst/boards.html#digi_basys3) | USB-UART bridge | 12M Baud | 1090 kB/sec | +| [Cmod A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_cmoda7) | USB-UART bridge | 12M Baud | 1090 kB/sec | +| [Nexys A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexysa7) | USB-UART bridge | 12M Baud | 1090 kb/sec | +| [Nexys4](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4) | USB-UART bridge | 12M Baud | 1090 kb/sec | +| [Nexys3](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys3) | Cypress FX2 USB | USB2.0 speed | 30000 kB/sec | +| [Nexys2](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys2) | Cypress FX2 USB | USB2.0 speed | 30000 kB/sec | +| [S3board](https://wfjm.github.io/home/w11/inst/boards.html#digi_s3board) | RS232+USB-RS232 cable | 460k Baud | 41 kB/sec | ### FPGA Board setup Recommended setups -- Arty +- [Arty A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_arty) or + [Arty S7](https://wfjm.github.io/home/w11/inst/boards.html#digi_artys7) - connect USB cable to micro-USB connector labeled 'J10' - to configure via vivado hardware server `make .vconfig` -- Basys3 +- [Basys3](https://wfjm.github.io/home/w11/inst/boards.html#digi_basys3) - connect USB cable to micro-USB connector labeled 'PROG' - to configure via vivado hardware server `make .vconfig` -- Cmod A7 +- [Cmod A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_cmoda7) - connect USB cable to micro-USB connector - to configure via vivado hardware server `make .vconfig` -- Nexys4 and Nexys A7 (or Nexys4 DDR) +- [Nexys4](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4) + and [Nexys A7](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexysa7) + (or + [Nexys4 DDR](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4d)) - connect USB cable to micro-USB connector labeled 'PROG' - to configure via vivado hardware server `make .vconfig` -- Nexys3 +- [Nexys3](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys3) - use Cypress FX for configure and and rlink communication - connect USB cable to micro-USB connector labeled 'USB PROG' - to configure via FX2 and jtag tool `make .jconfig` -- Nexys2 +- [Nexys2](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys2) - connect USB cable to mini-USB connector (between RS232 and PS/2 port) - to configure via FX2 and jtag tool `make .jconfig` -- S3board +- [S3board](https://wfjm.github.io/home/w11/inst/boards.html#digi_s3board) - connect the USB-RS232 cable to the RS232 port - connect a JTAG programmer (e.g. Xilinx USB Cable II) to JTAG pins - to configure via ISE Impact `make .iconfig` @@ -110,46 +116,44 @@ All examples below use the same basic setup are in the indicated positions (SWI=...). The concrete boot script name is given in the following sections - - for arty over serial + - for [sys_w11a_arty](../rtl/sys_gen/w11a/arty/README.md) or + [sys_w11a_as7](../rtl/sys_gen/w11a/artys7/README.md) over serial SWI = 0110 (gives console light emulation...) ti_w11 -tuD,12M,break,xon @_boot.tcl - **Note**: the arty w11a has currently only 176 kB memory (all from BRAMS!). - u5ed works fine. XXDP, RT11 and RSX-11M should work. - 211bsd will not boot, neither most RSX-11M+ systems. - - - for b3 over serial + - for [sys_w11a_b3](../rtl/sys_gen/w11a/basys3/README.md) over serial SWI = 00000000 00101000 (gives console light display on LEDS) ti_w11 -tuD,12M,break,xon @_boot.tcl - **Note**: the basys3 w11a has only 176 kB memory (all from BRAMS!). u5ed works fine. XXDP, RT11 and RSX-11M should work. 211bsd will not boot, neither most RSX-11M+ systems. - - for c7 over serial + - for [sys_w11a_c7](../rtl/sys_gen/w11a/cmoda7/README.md) over serial ti_w11 -tuD,12M,break,xon @_boot.tcl - **Note**: the c7 w11a has currently only 672 kB memory + **Note**: the c7 w11a has only 672 kB memory (512 SRAM + 160 BRAM). u5ed, u7ed, XXDP, RT11, RSX-11M and most most RSX-11M+ systems should work. 211bsd works only in the 'non-networking' configuration - [211bsd_rpmin](../tools/oskit/211bsd_rpmin) + [211bsd_rpmin](../tools/oskit/211bsd_rpmin). - - for n4 or n4d over serial + - for [sys_w11a_n4](../rtl/sys_gen/w11a/nexys4/README.md) + or [sys_w11a_n4d](../rtl/sys_gen/w11a/nexys4d/README.md) over serial SWI = 00000000 00101000 (gives console light display on LEDS) ti_w11 -tuD,12M,break,cts @_boot.tcl - - for n2,n3 over fx2 + - for [sys_w11a_n3](../rtl/sys_gen/w11a/nexys3/README.md) + or [sys_w11a_n2](../rtl/sys_gen/w11a/nexys2/README.md) over fx2 SWI = 00101100 ti_w11 -u @_boot.tcl - - for s3 over serial + - for [sys_w11a_s3](../rtl/sys_gen/w11a/s3board/README.md) over serial SWI = 00101010 ti_w11 -tu,460k,break,xon @_boot.tcl @@ -158,7 +162,7 @@ All examples below use the same basic setup - the letter after `-tu` is either the serial device number, denoted as ``, or the letter `D` for auto-detection of Digilent boards with a FT2232HQ based interface. - - for Arty, Basys3, CmodA7 and Nexys4 board simply use `D` + - for Arty A7, Basys3, Cmod A7, Nexys4, and Nexys A7 board simply use `D` - otherwise check with `ls /dev/ttyUSB*` to see what is available - `` is typically '1' if a single `FT2232HQ` based board is connected, like an Arty, Basys3, CmodA7, or Nexys4. Initially two ttyUSB devices @@ -167,22 +171,22 @@ All examples below use the same basic setup connection. - `` is typically '0' if only a single USB-RS232 cable is connected - - on LED display - - is controlled by SWI(3) + - on LED display + - is controlled by SWI(3) 0 -> system status 1 -> DR emulation --> OS specific light patterns - - on Hex display - - is controlled by SWI(5:4) - - boards with a 4 digit display + - on Hex display + - is controlled by SWI(5:4) + - boards with a 4 digit display 00 -> serial link rate divider 01 -> PC 10 -> DISPREG 11 -> DR emulation - - boards with 8 digit display + - boards with 8 digit display SWI(5) select for DSP(7:4) display 0 -> serial link rate divider @@ -300,4 +304,5 @@ Several oskits are provided: | [rt11-53_rl](../tools/oskit/rt11-53_rl) | RT-11 V5.3 | RL02 | | | [xxdp_rl](../tools/oskit/xxdp_rl) | XXDP 22 and 25 | RL02 | | -For further details consult the `README.md` file in the oskit directory. +For further details consult the [README.md](../tools/oskit/README.md) +file in the oskit directory. diff --git a/rtl/sys_gen/w11a/arty/README.md b/rtl/sys_gen/w11a/arty/README.md new file mode 100644 index 00000000..67cd79fd --- /dev/null +++ b/rtl/sys_gen/w11a/arty/README.md @@ -0,0 +1,54 @@ +## Notes on w11 systems: w11a for Arty A7-35 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_arty](sys_w11a_arty.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Arty A7-35](https://wfjm.github.io/home/w11/inst/boards.html#digi_arty) board +with DDR3 SDRAM support via a Vivado MIG core. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 32 kB | +| Memory | 3840 kB from DDR3 SDRAM via [miglib_arty](../../../bplib/arty/miglib_arty.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +An alternative design that uses only BRAM is available as +[sys_w11a_br_arty](../arty_bram). + +### Usage + +The board has only 4 LEDs plus 4 RGB-LEDS and offers only a compactified +console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 0110 (gives console light emulation...) + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The Arty A7-35 board is one of the main w11 development platforms. +The sys_w11a_arty design is often FPGA tested with +[ostest](../../../../tools/bin/ostest) against all +[oskits](../../../../tools/oskit). + +- **2019-06-05**: reduce clock to 72 MHz, Vivado 2919.1 fails with 75 MHz +- **2019-01-27**: reduce clock to 75 MHz, Vivado 2918.3 fails with 80 MHz +- **2018-11-18**: initial version, runs with 80 MHz using Vivado 2017.4 + + + diff --git a/rtl/sys_gen/w11a/arty_bram/README.md b/rtl/sys_gen/w11a/arty_bram/README.md new file mode 100644 index 00000000..ba13bca7 --- /dev/null +++ b/rtl/sys_gen/w11a/arty_bram/README.md @@ -0,0 +1,54 @@ +## Notes on w11 systems: w11a for Arty A7-35 (BRAM only) + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_br_arty](sys_w11a_br_arty.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Arty A7-35](https://wfjm.github.io/home/w11/inst/boards.html#digi_arty) +board, where the w11 memory is based only on BRAMs. +It was created before MIG support was completed, has reduced diagnostics +(to save BRAMs), and is mainly useful for debugging and testing the memory. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 176 kB from BRAMs via [pdp11_bram_memctl](../../../w11a/pdp11_bram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: **no**; ibmon: **no**; dmpcnt: yes; dmhbpt: 2; dmcmon: **no** | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +A design with full SDRAM memory support is available as +[sys_w11a_arty](../arty). + +### Usage + +The board has only 4 LEDs plus 4 RGB-LEDS and offers only a compactified +console light emulation. +The memory size of 176 kB allows starting a few +[oskits](../../../../tools/oskit). +u5ed works fine. XXDP, RT11 and RSX-11M should work. 211bsd will not boot, +neither most RSX-11M+ systems. + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 0110 (gives console light emulation...) + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The Arty A7-35 board is one of the main w11 development platforms. +The sys_w11a_br_arty design is occasionally FPGA tested with +[ostest](../../../../tools/bin/ostest) against the +[oskits](../../../../tools/oskit) running with 176 kB memory. + +- **2016-02-27**: initial version. diff --git a/rtl/sys_gen/w11a/artys7/README.md b/rtl/sys_gen/w11a/artys7/README.md new file mode 100644 index 00000000..ae29f863 --- /dev/null +++ b/rtl/sys_gen/w11a/artys7/README.md @@ -0,0 +1,48 @@ +## Notes on w11 systems: w11a for Arty S7-50 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_as7](sys_w11a_as7.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Arty S7-50](https://wfjm.github.io/home/w11/inst/boards.html#digi_artys7) +board with DDR3 SDRAM support via a Vivado MIG core. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 32 kB | +| Memory | 3840 kB from DDR3 SDRAM via [miglib_artys7](../../../bplib/artys7/miglib_artys7.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +An alternative design that uses only BRAM is available as +[sys_w11a_br_as7](../artys7_bram). + +### Usage + +The board has only 4 LEDs plus 2 RGB-LEDS and offers only a very rudimentary +console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 0110 (gives console light emulation...) + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The author doesn't have an Arty S7 board and doesn't plan to buy one. +The design was made to study differences between Artix-7 and Spartan-7. +The design is [only simulation tested](https://github.com/wfjm/w11/issues/17). + +- **2019-01-12**: initial version diff --git a/rtl/sys_gen/w11a/artys7_bram/README.md b/rtl/sys_gen/w11a/artys7_bram/README.md new file mode 100644 index 00000000..af5cfe85 --- /dev/null +++ b/rtl/sys_gen/w11a/artys7_bram/README.md @@ -0,0 +1,51 @@ +## Notes on w11 systems: w11a for Arty S7-50 (BRAM only) + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_br_as7](sys_w11a_br_as7.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Arty S7-50](https://wfjm.github.io/home/w11/inst/boards.html#digi_artys7) +board , where the w11 memory is based only on BRAMs. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 256 kB from BRAMs via [pdp11_bram_memctl](../../../w11a/pdp11_bram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: **no**; ibmon: **no**; dmpcnt: yes; dmhbpt: 2; dmcmon: **no**| +| Rlink | 12 Mbps via FT2232HQ based serial link | + +A design with full SDRAM memory support is available as +[sys_w11a_artys7](../artys7). + +### Usage + +The board has only 4 LEDs plus 2 RGB-LEDS and offers only a very rudimentary +console light emulation. +The memory size of 256 kB allows starting a few +[oskits](../../../../tools/oskit). +u5ed works fine. XXDP, RT11 and RSX-11M should work. 211bsd will not boot, +neither most RSX-11M+ systems. + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 0110 (gives console light emulation...) + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The author doesn't have an Arty S7 board and doesn't plan to buy one. +The design was made to study differences between Artix-7 and Spartan-7. +The design is [only simulation tested](https://github.com/wfjm/w11/issues/17). + +- **2018-08-11**: initial version diff --git a/rtl/sys_gen/w11a/basys3/README.md b/rtl/sys_gen/w11a/basys3/README.md new file mode 100644 index 00000000..86efa75b --- /dev/null +++ b/rtl/sys_gen/w11a/basys3/README.md @@ -0,0 +1,50 @@ +## Notes on w11 systems: w11a for Basys 3 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_b3](sys_w11a_b3.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Basys 3](https://wfjm.github.io/home/w11/inst/boards.html#digi_basys3) +board. The w11 memory is based on BRAMs only because the board doesn't +feature any memory outside the FPGA. + +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 176 kB from BRAMs via [pdp11_bram_memctl](../../../w11a/pdp11_bram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: **no**; ibmon: **no**; dmpcnt: yes; dmhbpt: 2; dmcmon: **no** | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +### Usage + +The board has 16 LEDs and allows a nice console light emulation. +The memory size of 176 kB allows starting a few +[oskits](../../../../tools/oskit). +u5ed works fine. XXDP, RT11 and RSX-11M should work. 211bsd will not boot, +neither most RSX-11M+ systems. + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00000000 00101000 (gives console light display on LEDS) + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The Basys 3 board is one of the w11 development platforms. +The sys_w11a_b3 design is regularly FPGA tested with +[ostest](../../../../tools/bin/ostest) against the +[oskits](../../../../tools/oskit) running with 176 kB memory. + +- **2015-02-08**: initial version. diff --git a/rtl/sys_gen/w11a/cmoda7/README.md b/rtl/sys_gen/w11a/cmoda7/README.md new file mode 100644 index 00000000..f34eb7c9 --- /dev/null +++ b/rtl/sys_gen/w11a/cmoda7/README.md @@ -0,0 +1,49 @@ +## Notes on w11 systems: w11a for Cmod A7-35 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_c7](sys_w11a_c7.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Cmod A7-35](https://wfjm.github.io/home/w11/inst/boards.html#digi_cmoda7) +board. + +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 16 kB | +| Memory | 672 kB combined from 512 kB SRAM via [c7_sram_memctl](../../../bplib/cmoda7/c7_sram_memctl.vhd) and 160 kB BRAMs via [pdp11_bram_memctl](../../../w11a/pdp11_bram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +### Usage + +The board has no LEDs and thus no console light emulation. +The memory size of 672 kB allows starting only a subset of the available +[oskits](../../../../tools/oskit). +u5ed, u7ed, XXDP, RT11, RSX-11M and most most RSX-11M+ systems should work. +211bsd works only in the 'non-networking' configuration +[211bsd_rpmin](../../../../tools/oskit/211bsd_rpmin). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + ti_w11 -tuD,12M,break,xon @_boot.tcl +``` + +### Status & History + +The Cmod A7-35 board is one of the w11 development platforms. +The sys_w11a_c7 design is regularly FPGA tested with +[ostest](../../../../tools/bin/ostest) against the +[oskits](../../../../tools/oskit) running with 672 kB memory. + +- **2017-06-24**: initial version. diff --git a/rtl/sys_gen/w11a/nexys2/README.md b/rtl/sys_gen/w11a/nexys2/README.md new file mode 100644 index 00000000..f00aad80 --- /dev/null +++ b/rtl/sys_gen/w11a/nexys2/README.md @@ -0,0 +1,48 @@ +## Notes on w11 systems: w11a for and Nexys 2 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_n2](sys_w11a_n2.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Nexys 2](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys2) +board. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 3840 kB from PSRAM via [nx_cram_memctl_as](../../../bplib/nxcramlib/nx_cram_memctl_as.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | USB 2 speed over Cypress FX2 | + +### Usage +The board has 8 LEDs and offers only a compactified console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00101100 + ti_w11 -u @_boot.tcl +``` + +### Status & History + +The Nexys 2 board was, along with the Nexys 3 board, the main w11 +development platforms until the Nexys 4 board arrived and development +moved from ISE to Vivado. +Together with the Nexys 3 board, it still has the best I/O performance +thanks to the USB 2 speed and low-latency rlink connection. +The sys_w11a_n2 design is occasionally FPGA tested with +[ostest](../../../../tools/bin/ostest) against all +[oskits](../../../../tools/oskit). + +- **2010-05-28**: initial version diff --git a/rtl/sys_gen/w11a/nexys3/README.md b/rtl/sys_gen/w11a/nexys3/README.md new file mode 100644 index 00000000..ef7c82db --- /dev/null +++ b/rtl/sys_gen/w11a/nexys3/README.md @@ -0,0 +1,47 @@ +## Notes on w11 systems: w11a for and Nexys 3 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_n3](sys_w11a_n3.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Nexys 3](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys3) +board. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 3840 kB from PSRAM via [nx_cram_memctl_as](../../../bplib/nxcramlib/nx_cram_memctl_as.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | USB 2 speed over Cypress FX2 | + +### Usage +The board has 8 LEDs and offers only a compactified console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00101100 + ti_w11 -u @_boot.tcl +``` + +### Status & History + +The Nexys 3 board was the main w11 development platforms until the +Nexys 4 board arrived and development moved from ISE to Vivado. +Together with the Nexys 2 board, it still has the best I/O performance +thanks to the USB 2 speed and low-latency rlink connection. +The sys_w11a_n3 design is occasionally FPGA tested with +[ostest](../../../../tools/bin/ostest) against all +[oskits](../../../../tools/oskit). + +- **2011-11-20**: initial version diff --git a/rtl/sys_gen/w11a/nexys4/README.md b/rtl/sys_gen/w11a/nexys4/README.md new file mode 100644 index 00000000..ffa10f17 --- /dev/null +++ b/rtl/sys_gen/w11a/nexys4/README.md @@ -0,0 +1,48 @@ +## Notes on w11 systems: w11a for and Nexys 4 + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_n4](sys_w11a_n4.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Nexys 4](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4) +board. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 32 kB | +| Memory | 3840 kB from PSRAM via [nx_cram_memctl_as](../../../bplib/nxcramlib/nx_cram_memctl_as.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +### Usage +The board has 16 LEDs and allows a nice console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00000000 00101000 (gives console light display on LEDS) + ti_w11 -tuD,12M,break,cts @_boot.tcl +``` + +### Status & History + +The Nexys 4 board was the main w11 development platforms until it +[failed in July 2019](https://wfjm.github.io/blogs/w11/2019-07-27-nexys4-obituary.html). Until July 2019 the sys_w11a_n4 design was often FPGA tested with +[ostest](../../../../tools/bin/ostest) against all +[oskits](../../../../tools/oskit). Since July 2019 this design is +only simulation tested. + +- **2019-07-20**: board failed, from now on the design only simulation tested +- **2013-09-22**: initial version + + diff --git a/rtl/sys_gen/w11a/nexys4d/README.md b/rtl/sys_gen/w11a/nexys4d/README.md new file mode 100644 index 00000000..4759487c --- /dev/null +++ b/rtl/sys_gen/w11a/nexys4d/README.md @@ -0,0 +1,55 @@ +## Notes on w11 systems: w11a for Nexys A7-100 and Nexys 4 DDR + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_n4d](sys_w11a_n4d.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Nexys A7-100](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexysa7) +board with DDR2 SDRAM support via a Vivado MIG core. +The design is also compatible with the +[Nexys 4 DDR](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4d) +board. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 32 kB | +| Memory | 3840 kB from DDR2 SDRAM via [miglib_nexys4d](../../../bplib/nexys4d/miglib_nexys4d.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +An alternative design that uses only BRAM is available as +[sys_w11a_br_n4d](../nexys4d_bram). + +### Usage +The board has 16 LEDs and allows a nice console light emulation. +The memory size of 3840 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00000000 00101000 (gives console light display on LEDs) + ti_w11 -tuD,12M,break,cts @_boot.tcl +``` + +### Status & History + +The Nexys A7-100 board is one of the main w11 development platforms. +The sys_w11a_n4d design is often FPGA tested with +[ostest](../../../../tools/bin/ostest) against all +[oskits](../../../../tools/oskit). + +- **2019-08-10**: procured Nexys A7-100 board. BUGFIX in MIG configuration. + Now fully [FPGA tested and verified](https://github.com/wfjm/w11/issues/16). +- **2019-01-02**: initial version, only simulation tested (no board available + for FPGA testing) + + diff --git a/rtl/sys_gen/w11a/nexys4d_bram/README.md b/rtl/sys_gen/w11a/nexys4d_bram/README.md new file mode 100644 index 00000000..63595faf --- /dev/null +++ b/rtl/sys_gen/w11a/nexys4d_bram/README.md @@ -0,0 +1,62 @@ +## Notes on w11 systems: w11a for Nexys A7-100 and Nexys 4 DDR (BRAM only) + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_br_n4d](sys_w11a_br_n4d.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[Nexys A7-100](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexysa7) +board, where the w11 memory is based only on BRAMs. +The design is also compatible with the +[Nexys 4 DDR](https://wfjm.github.io/home/w11/inst/boards.html#digi_nexys4d) +board. +It was created before MIG support was completed, has reduced diagnostics +(to save BRAMs), and is mainly useful for debugging and testing the memory. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 512 kB from BRAMs via [pdp11_bram_memctl](../../../w11a/pdp11_bram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: **no**; ibmon: **no**; dmpcnt: yes; dmhbpt: 2; dmcmon: **no** | +| Rlink | 12 Mbps via FT2232HQ based serial link | + +A design with full SDRAM memory support is available as +[sys_w11a_n4d](../nexys4d). + +### Usage + +The board has 16 LEDs and allows a nice console light emulation. +The memory size of 512 kB allows starting only a subset of the available +[oskits](../../../../tools/oskit). +u5ed, u7ed, XXDP, RT11, RSX-11M and most most RSX-11M+ systems should work. +211bsd works only in the 'non-networking' configuration +[211bsd_rpmin](../../../../tools/oskit/211bsd_rpmin). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00000000 00101000 (gives console light display on LEDs) + ti_w11 -tuD,12M,break,cts @_boot.tcl +``` + +### Status & History + +The Nexys A7-100 board is one of the main w11 development platforms. +The sys_w11a_br_n4d design is occasionally FPGA tested with +[ostest](../../../../tools/bin/ostest) against the +[oskits](../../../../tools/oskit) running with 512 kB memory. + +- **2019-08-10**: procured Nexys A7-100 board. Design is now fully FPGA + tested and verified. +- **2017-01-04**: initial version, only simulation tested (no board available + for FPGA testing) + + diff --git a/rtl/sys_gen/w11a/s3board/README.md b/rtl/sys_gen/w11a/s3board/README.md new file mode 100644 index 00000000..98e050c2 --- /dev/null +++ b/rtl/sys_gen/w11a/s3board/README.md @@ -0,0 +1,46 @@ +## Notes on w11 systems: w11a for and S3BOARD + +- [Basics](#user-content-basics) +- [Usage](#user-content-usage) +- [Status & History](#user-content-status) + +### Basics + +The [sys_w11a_s3](sys_w11a_s3.vhd) system is a +[w11a](../../../w11a) implementation for the Digilent +[S3BOARD](https://wfjm.github.io/home/w11/inst/boards.html#digi_s3board) +board. +For complete configuration, see [sys_conf.vhd](sys_conf.vhd). +The most important features are: + +| Property | Value | +| -------- | ----- | +| CPU options | FPP: no; Cache: 8 kB | +| Memory | 1024 kB from SRAM via [s3_sram_memctl](../../../bplib/s3board/s3_sram_memctl.vhd) | +| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes | +| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes | +| Rlink | 460 kbps via USB-RS232 cable connected to the RS232 port | + +### Usage +The board has 8 LEDs and offers only a compactified console light emulation. +The memory size of 1024 kB allows starting all [oskits](../../../../tools/oskit). + +For complete instructions on how to run operating system images, +[see w11a_os_guide](../../../../doc/w11a_os_guide.md). +The default setup is: + +``` + SWI = 00101010 + ti_w11 -tu,460k,break,xon @_boot.tcl +``` + +### Status & History + +The S3BOARD was the first w11 development platform. All inital w11 +developments were done with this board. In 2011, the developemt switched +to the Nexys 2 board, as this board offered full 4 MB memory, and +more importantly, a high speed rlink connection. +The S3BOARD is still available, but is no longer actively used. +The design is retained for historical and nostalgic reasons. + +- **2007-09-23**: initial version