diff --git a/doc/CHANGELOG.md b/doc/CHANGELOG.md index c4254910..76a090e4 100644 --- a/doc/CHANGELOG.md +++ b/doc/CHANGELOG.md @@ -42,6 +42,7 @@ The full set of tests is only run for tagged releases. - tst_mig/nexys4d/sys_tst_mig_n4d: use 100 MHz MIG SYS_CLK; add clock monitor - tst_sram/nexys4d/sys_tst_sram_n4d: use 100 MHz MIG SYS_CLK - w11a/nexys4d/sys_w11a_n4d: use 100 MHz MIG SYS_CLK + - */*.vhd: fixes for ghdl V0.36 -Whide warnings ### Bug Fixes - nexys4d/mig_a.prj: BUGFIX: SysResetPolarity ACTIVE HIGH diff --git a/rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd b/rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd index dd615e28..e3806c2f 100644 --- a/rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd +++ b/rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd @@ -1,6 +1,6 @@ --- $Id: nx_cram_memctl_as.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: nx_cram_memctl_as.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2010-2016 by Walter F.J. Mueller +-- Copyright 2010-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: nx_cram_memctl_as - syn @@ -14,7 +14,7 @@ -- sys_gen/tst_sram/nexys3/tb/tb_tst_sram_n3 -- sys_gen/tst_sram/nexys4/tb/tb_tst_sram_n4 -- Target Devices: generic --- Tool versions: ise 11.4-14.7; viv 2014.4-2016.4; ghdl 0.26-0.34 +-- Tool versions: ise 11.4-14.7; viv 2014.4-2019.1; ghdl 0.26-0.36 -- -- Synthesized (viv): -- Date Rev viv Target flop lutl lutm bram slic @@ -30,6 +30,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 2.1.1 fix for ghdl V0.36 -Whide warnings -- 2016-07-16 788 2.1 change *DELAY generics, now absolute delay cycles -- add s_init1; drop "KEEP" for data (better for dbg) -- 2016-07-10 786 2.0 add page mode support @@ -359,37 +360,37 @@ begin variable idata_ceo : slbit := '0'; variable idata_oe : slbit := '0'; - procedure do_dispatch(nstate : out state_type; - iaddrh_ce : out slbit; - iaddr0_ce : out slbit; - iaddr0 : out slbit; - ibe_ce : out slbit; - imem_be : out slv2; - imem_ce : out slbit; - imem_oe : out slbit; - nbe2nd : out slv2) is + procedure do_dispatch(pnstate : out state_type; + piaddrh_ce : out slbit; + piaddr0_ce : out slbit; + piaddr0 : out slbit; + pibe_ce : out slbit; + pimem_be : out slv2; + pimem_ce : out slbit; + pimem_oe : out slbit; + pnbe2nd : out slv2) is begin - iaddrh_ce := '1'; -- latch address (high part) - iaddr0_ce := '1'; -- latch address 0 bit - ibe_ce := '1'; -- latch be's - imem_ce := '1'; -- ce CRAM next cycle - nbe2nd := "00"; -- assume no 2nd write cycle + piaddrh_ce := '1'; -- latch address (high part) + piaddr0_ce := '1'; -- latch address 0 bit + pibe_ce := '1'; -- latch be's + pimem_ce := '1'; -- ce CRAM next cycle + pnbe2nd := "00"; -- assume no 2nd write cycle if WE = '0' then -- if READ requested - iaddr0 := '0'; -- go first for low word - imem_be := "11"; -- on read always on - imem_oe := '1'; -- oe CRAM next cycle - nstate := s_rdinit; -- next: read init part + piaddr0 := '0'; -- go first for low word + pimem_be := "11"; -- on read always on + pimem_oe := '1'; -- oe CRAM next cycle + pnstate := s_rdinit; -- next: read init part else -- if WRITE requested if BE(1 downto 0) /= "00" then -- low word write - iaddr0 := '0'; -- access word 0 - imem_be := BE(1 downto 0); -- set be's for 1st cycle - nbe2nd := BE(3 downto 2); -- keep be's for 2nd cycle + piaddr0 := '0'; -- access word 0 + pimem_be := BE(1 downto 0); -- set be's for 1st cycle + pnbe2nd := BE(3 downto 2); -- keep be's for 2nd cycle else -- high word write - iaddr0 := '1'; -- access word 1 - imem_be := BE(3 downto 2); -- set be's for 1st cycle + piaddr0 := '1'; -- access word 1 + pimem_be := BE(3 downto 2); -- set be's for 1st cycle end if; - imem_oe := '0'; -- oe=0 - nstate := s_wrinit; -- next: write init part + pimem_oe := '0'; -- oe=0 + pnstate := s_wrinit; -- next: write init part end if; end procedure do_dispatch; diff --git a/rtl/sys_gen/tst_serloop/tst_serloop.vhd b/rtl/sys_gen/tst_serloop/tst_serloop.vhd index 36cac18c..2cd2a143 100644 --- a/rtl/sys_gen/tst_serloop/tst_serloop.vhd +++ b/rtl/sys_gen/tst_serloop/tst_serloop.vhd @@ -1,6 +1,6 @@ --- $Id: tst_serloop.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: tst_serloop.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2011- by Walter F.J. Mueller +-- Copyright 2011-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: tst_serloop - syn @@ -10,10 +10,11 @@ -- Test bench: - -- -- Target Devices: generic --- Tool versions: ise 13.1-14.7; viv 2014.4-2015.4; ghdl 0.29-0.33 +-- Tool versions: ise 13.1-14.7; viv 2014.4-2019.1; ghdl 0.29-0.36 -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 1.0.3 fix for ghdl V0.36 -Whide warnings -- 2011-12-10 438 1.0.2 clr fecnt when abact; add rxui(cnt|dat) regs -- 2011-12-09 437 1.0.1 rename serport stat->moni port -- 2011-11-06 420 1.0 Initial version @@ -111,14 +112,14 @@ begin variable itxdata : slv8 := (others=>'0'); variable skipxon : slbit := '0'; - function nextchar(skipxon: in slbit; data: in slv8) return slv8 is + function nextchar(pskipxon: in slbit; pdata: in slv8) return slv8 is variable inc : slv8 := (others=>'0'); begin inc := "00000001"; - if skipxon='1' and (data=c_serport_xon or data=c_serport_xoff) then + if pskipxon='1' and (pdata=c_serport_xon or pdata=c_serport_xoff) then inc := "00000010"; end if; - return slv(unsigned(data)+unsigned(inc)); + return slv(unsigned(pdata)+unsigned(inc)); end function nextchar; begin diff --git a/rtl/vlib/rbus/rb_mon.vhd b/rtl/vlib/rbus/rb_mon.vhd index d08b02d0..e27685b6 100644 --- a/rtl/vlib/rbus/rb_mon.vhd +++ b/rtl/vlib/rbus/rb_mon.vhd @@ -1,6 +1,6 @@ --- $Id: rb_mon.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: rb_mon.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2007-2014 by Walter F.J. Mueller +-- Copyright 2007-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: rb_mon - sim @@ -8,10 +8,11 @@ -- -- Dependencies: - -- Test bench: - --- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31 +-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.36 -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 4.1.2 fix for ghdl V0.36 -Whide warnings -- 2014-10-25 599 4.1.1 use writeoptint() -- 2014-09-03 591 4.1 add burst counter; add state checker -- 2014-08-30 589 4.0 use hex for addr; 4 bit STAT; monitor ACK=0 @@ -69,23 +70,23 @@ begin variable r_sel : slbit := '0'; procedure write_data(L: inout line; - tag: in string; - data: in slv16; - nhold: in integer := 0; - nburst: in integer := 0; - cond: in boolean := false; - ctxt: in string := " ") is + ptag: in string; + pdata: in slv16; + pnhold: in integer := 0; + pnburst: in integer := 0; + pcond: in boolean := false; + pctxt: in string := " ") is begin - writetimestamp(L, CLK_CYCLE, tag); + writetimestamp(L, CLK_CYCLE, ptag); writehex(L, RB_MREQ.addr, right, 4); write(L, string'(" ")); - writegen(L, data, right, 0, DBASE); + writegen(L, pdata, right, 0, DBASE); write(L, string'(" ")); write(L, RB_STAT, right, 4); - writeoptint(L, " hold=", nhold, 2); - writeoptint(L, " b=", nburst, 2); - if cond then - write(L, ctxt); + writeoptint(L, " hold=", pnhold, 2); + writeoptint(L, " b=", pnburst, 2); + if pcond then + write(L, pctxt); end if; writeline(output, L); end procedure write_data; diff --git a/rtl/vlib/rlink/tb/tb_rlink.vhd b/rtl/vlib/rlink/tb/tb_rlink.vhd index 73f11d45..ed9ddb27 100644 --- a/rtl/vlib/rlink/tb/tb_rlink.vhd +++ b/rtl/vlib/rlink/tb/tb_rlink.vhd @@ -1,4 +1,4 @@ --- $Id: tb_rlink.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: tb_rlink.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later -- Copyright 2007-2019 by Walter F.J. Mueller -- @@ -17,10 +17,11 @@ -- rlink_serport (via tbd_rlink_serport) -- -- Target Devices: generic --- Tool versions: xst 8.2-14.7; viv 2019.1; ghdl 0.18-0.35 +-- Tool versions: xst 8.2-14.7; viv 2019.1; ghdl 0.18-0.36 -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 4.1.3 fix for ghdl V0.36 -Whide warnings -- 2019-06-02 1159 4.1.2 use rbaddr_ constants -- 2016-09-10 806 4.1.1 use clkdivce_tb -- 2014-10-12 596 4.1 use readgen_ea; add get_cmd_ea; labo instead of stat @@ -329,17 +330,17 @@ begin -- read command line helpers ------------------------------------ procedure get_cmd_ea ( -- ---- get_cmd_ea ----------- L : inout line; - icmd : out slv8) is + picmd : out slv8) is variable cname : string(1 to 4) := (others=>' '); variable ival : natural; - variable ok : boolean; + variable lok : boolean; variable cmd : slv3; variable dat : slv8; begin readword_ea(L, cname); ival := 0; - readoptchar(L, ',', ok); - if ok then + readoptchar(L, ',', lok); + if lok then readint_ea(L, ival, 0, 31); end if; case cname is @@ -356,21 +357,21 @@ begin dat := (others=>'0'); dat(c_rlink_cmd_rbf_seq) := slv(to_unsigned(ival,5)); dat(c_rlink_cmd_rbf_code) := cmd; - icmd := dat; + picmd := dat; end procedure get_cmd_ea; procedure get_seq_ea ( -- ---- get_seq_ea ----------- L : inout line; - code : in slv3; - icmd : out slv8) is + pcode : in slv3; + picmd : out slv8) is variable ival : natural; variable dat : slv8; begin readint_ea(L, ival, 0, 31); dat := (others=>'0'); dat(c_rlink_cmd_rbf_seq) := slv(to_unsigned(ival,5)); - dat(c_rlink_cmd_rbf_code) := code; - icmd := dat; + dat(c_rlink_cmd_rbf_code) := pcode; + picmd := dat; end procedure get_seq_ea; -- tx helpers ---------------------------------------------------- @@ -409,41 +410,41 @@ begin do_tx9(c_rlink_dat_eop); end procedure do_txeop; - procedure do_txc (icmd : in slv8) is -- ---- do_txc ------------- + procedure do_txc (picmd : in slv8) is -- ---- do_txc ------------- begin - do_tx8(icmd); + do_tx8(picmd); do_txcrc; end procedure do_txc; procedure do_txca ( -- ---- do_txca -------------- - icmd : in slv8; - iaddr : in slv16) is + picmd : in slv8; + piaddr : in slv16) is begin - do_tx8(icmd); - do_tx16(iaddr); + do_tx8(picmd); + do_tx16(piaddr); do_txcrc; end procedure do_txca; procedure do_txcad ( -- ---- do_txcad ------------- - icmd : in slv8; - iaddr : in slv16; - idata : in slv16) is + picmd : in slv8; + piaddr : in slv16; + pidata : in slv16) is begin - do_tx8(icmd); - do_tx16(iaddr); - do_tx16(idata); + do_tx8(picmd); + do_tx16(piaddr); + do_tx16(pidata); do_txcrc; end procedure do_txcad; procedure do_txblks ( -- ---- do_txblks ------------ - nblk : in natural; - start : in slv16) is - variable idata : slv16; + pnblk : in natural; + pstart : in slv16) is + variable lidata : slv16; begin - idata := start; - for i in 1 to nblk loop - do_tx16(idata); - idata := slv(unsigned(idata) + 1); + lidata := pstart; + for i in 1 to pnblk loop + do_tx16(lidata); + lidata := slv(unsigned(lidata) + 1); end loop; end procedure do_txblks; @@ -512,62 +513,62 @@ begin end procedure do_rxeop; procedure do_rxcs ( -- ---- do_rxcs ---------- - icmd : in slv8; - istat : in slv8) is + picmd : in slv8; + pistat : in slv8) is begin - do_rx8(icmd); - do_rx8(istat); + do_rx8(picmd); + do_rx8(pistat); do_rxcrc; end procedure do_rxcs; procedure do_rxcds ( -- ---- do_rxcds ---------- - icmd : in slv8; - idata : in slv16; - istat : in slv8) is + picmd : in slv8; + pidata : in slv16; + pistat : in slv8) is begin - do_rx8(icmd); - do_rx16(idata); - do_rx8(istat); + do_rx8(picmd); + do_rx16(pidata); + do_rx8(pistat); do_rxcrc; end procedure do_rxcds; procedure do_rxcbs ( -- ---- do_rxcbs ---------- - icmd : in slv8; - ibabo : in slv8; - istat : in slv8) is + picmd : in slv8; + pibabo : in slv8; + pistat : in slv8) is begin - do_rx8(icmd); - do_rx8(ibabo); - do_rx8(istat); + do_rx8(picmd); + do_rx8(pibabo); + do_rx8(pistat); do_rxcrc; end procedure do_rxcbs; procedure do_rxrbeg ( -- ---- do_rxrbeg ------------- - icmd : in slv8; - nblk : in natural) is + picmd : in slv8; + pnblk : in natural) is begin - do_rx8(icmd); - do_rx16(slv(to_unsigned(nblk,16))); + do_rx8(picmd); + do_rx16(slv(to_unsigned(pnblk,16))); end procedure do_rxrbeg; procedure do_rxrend ( -- ---- do_rxrend ------------- - nblk : in natural; - istat : in slv8) is + pnblk : in natural; + pistat : in slv8) is begin - do_rx16(slv(to_unsigned(nblk,16))); - do_rx8(istat); + do_rx16(slv(to_unsigned(pnblk,16))); + do_rx8(pistat); do_rxcrc; end procedure do_rxrend; procedure do_rxblks ( -- ---- do_rxblks ------------ - nblk : in natural; - start : in slv16) is - variable idata : slv16; + pnblk : in natural; + pstart : in slv16) is + variable lidata : slv16; begin - idata := start; - for i in 1 to nblk loop - do_rx16(idata); - idata := slv(unsigned(idata) + 1); + lidata := pstart; + for i in 1 to pnblk loop + do_rx16(lidata); + lidata := slv(unsigned(lidata) + 1); end loop; end procedure do_rxblks; diff --git a/rtl/vlib/rlink/tb/tb_rlink_tba.vhd b/rtl/vlib/rlink/tb/tb_rlink_tba.vhd index 08647a07..567589d8 100644 --- a/rtl/vlib/rlink/tb/tb_rlink_tba.vhd +++ b/rtl/vlib/rlink/tb/tb_rlink_tba.vhd @@ -1,6 +1,6 @@ --- $Id: tb_rlink_tba.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: tb_rlink_tba.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2007-2016 by Walter F.J. Mueller +-- Copyright 2007-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: tb_rlink_tba - sim @@ -18,10 +18,11 @@ -- To test: generic, any rbtba_aif target -- -- Target Devices: generic --- Tool versions: xst 8.2-14.7; viv 2016.2; ghdl 0.18-0.33 +-- Tool versions: xst 8.2-14.7; viv 2016.2-2019.1; ghdl 0.18-0.36 -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 4.0.2 fix for ghdl V0.36 -Whide warnings -- 2016-09-10 806 4.0.1 use clkdivce_tb -- 2014-12-20 616 4.0.1 add dcnt check (with -n=) and .ndef -- 2014-09-21 595 4.0 now full rlink v4 iface, 4 bit STAT @@ -301,29 +302,29 @@ begin addr: out slv16) is variable ichar : character := ' '; variable name : string(1 to 6) := (others=>' '); - variable ok : boolean := false; - variable iaddr : slv16 := (others=>'0'); + variable lok : boolean := false; + variable liaddr : slv16 := (others=>'0'); variable iaddr_or : slv16 := (others=>'0'); begin readwhite(L); - readoptchar(L, '.', ok); - if ok then + readoptchar(L, '.', lok); + if lok then readword_ea(L, name); for i in 1 to amtbl_defs loop if amtbl(i).name = name then - iaddr := amtbl(i).addr; - readoptchar(L, '|', ok); - if ok then + liaddr := amtbl(i).addr; + readoptchar(L, '|', lok); + if lok then readgen_ea(L, iaddr_or); - for i in iaddr_or'range loop - if iaddr_or(i) = '1' then - iaddr(i) := '1'; + for j in iaddr_or'range loop + if iaddr_or(j) = '1' then + liaddr(j) := '1'; end if; end loop; end if; - addr := iaddr; + addr := liaddr; return; end if; end loop; @@ -336,18 +337,18 @@ begin end procedure get_addr; procedure cmd_waitdone is - variable nwait : integer := 0; + variable lnwait : integer := 0; begin - nwait := 0; + lnwait := 0; while TBA_STAT.busy='1' loop - nwait := nwait + 1; - assert nwait<2000 report "assert(nwait<2000)" severity failure; + lnwait := lnwait + 1; + assert lnwait<2000 report "assert(lnwait<2000)" severity failure; wait for clock_period; end loop; end procedure cmd_waitdone; procedure setup_check_n ( - bcnt : in integer) + pbcnt : in integer) is variable chk_done : boolean := false; variable ref_done : slv16 := (others=>'0'); @@ -358,31 +359,31 @@ begin N_REF_DONE <= ref_done; else N_CHK_DONE <= chk_ndef; - N_REF_DONE <= slv(to_unsigned(bcnt,16)); + N_REF_DONE <= slv(to_unsigned(pbcnt,16)); end if; end procedure setup_check_n; procedure setup_check_d is - variable chk_data : boolean := false; - variable ref_data : slv16 := (others=>'0'); - variable msk_data : slv16 := (others=>'0'); + variable lchk_data : boolean := false; + variable lref_data : slv16 := (others=>'0'); + variable lmsk_data : slv16 := (others=>'0'); begin - readtagval2_ea(iline, "d", chk_data, ref_data, msk_data, sv_dbasi); - N_CHK_DATA <= chk_data; - N_REF_DATA <= ref_data; - N_MSK_DATA <= msk_data; + readtagval2_ea(iline, "d", lchk_data, lref_data, lmsk_data, sv_dbasi); + N_CHK_DATA <= lchk_data; + N_REF_DATA <= lref_data; + N_MSK_DATA <= lmsk_data; end procedure setup_check_d; procedure setup_check_s is - variable chk_stat : boolean := false; - variable ref_stat : slv8 := (others=>'0'); - variable msk_stat : slv8 := (others=>'0'); + variable lchk_stat : boolean := false; + variable lref_stat : slv8 := (others=>'0'); + variable lmsk_stat : slv8 := (others=>'0'); begin - readtagval2_ea(iline, "s", chk_stat, ref_stat, msk_stat); - if chk_stat then - N_CHK_STAT <= chk_stat; - N_REF_STAT <= ref_stat; - N_MSK_STAT <= msk_stat; + readtagval2_ea(iline, "s", lchk_stat, lref_stat, lmsk_stat); + if lchk_stat then + N_CHK_STAT <= lchk_stat; + N_REF_STAT <= lref_stat; + N_MSK_STAT <= lmsk_stat; else N_CHK_STAT <= chk_sdef; N_REF_STAT <= ref_sdef; @@ -391,16 +392,16 @@ begin end procedure setup_check_s; procedure cmd_start ( - cmd : in slv3; - addr : in slv16 := (others=>'0'); - data : in slv16 := (others=>'0'); - bcnt : in integer := 1) is + pcmd : in slv3; + paddr : in slv16 := (others=>'0'); + pdata : in slv16 := (others=>'0'); + pbcnt : in integer := 1) is begin TBA_CNTL <= rlink_tba_cntl_init; - TBA_CNTL.cmd <= cmd; - TBA_CNTl.addr <= addr; - TBA_CNTL.cnt <= slv(to_unsigned(bcnt,16)); - TBA_DI <= data; + TBA_CNTL.cmd <= pcmd; + TBA_CNTl.addr <= paddr; + TBA_CNTL.cnt <= slv(to_unsigned(pbcnt,16)); + TBA_DI <= pdata; ccnt := ccnt + 1; if ccnt >= cmax then @@ -540,7 +541,7 @@ begin N_CMD_DATA <= (others=>'Z'); setup_check_d; setup_check_s; - cmd_start(cmd=>c_rlink_cmd_rreg, addr=>iaddr); + cmd_start(pcmd=>c_rlink_cmd_rreg, paddr=>iaddr); cmd_waitdone; when "rblk " => -- rblk @@ -552,7 +553,7 @@ begin assert bcnt>0 report "assert(bcnt>0)" severity failure; setup_check_n(bcnt); setup_check_s; - cmd_start(cmd=>c_rlink_cmd_rblk, addr=>iaddr, bcnt=>bcnt); + cmd_start(pcmd=>c_rlink_cmd_rblk, paddr=>iaddr, pbcnt=>bcnt); testempty_ea(iline); newline := true; @@ -585,7 +586,7 @@ begin readgen_ea(iline, idata, sv_dbasi); N_CMD_DATA <= idata; setup_check_s; - cmd_start(cmd=>c_rlink_cmd_wreg, addr=>iaddr, data=>idata); + cmd_start(pcmd=>c_rlink_cmd_wreg, paddr=>iaddr, pdata=>idata); cmd_waitdone; when "wblk " => -- wblk @@ -597,7 +598,7 @@ begin assert bcnt>0 report "assert(bcnt>0)" severity failure; setup_check_n(bcnt); setup_check_s; - cmd_start(cmd=>c_rlink_cmd_wblk, addr=>iaddr, bcnt=>bcnt); + cmd_start(pcmd=>c_rlink_cmd_wblk, paddr=>iaddr, pbcnt=>bcnt); testempty_ea(iline); newline := true; @@ -625,7 +626,7 @@ begin N_CMD_DATA <= (others=>'Z'); setup_check_d; setup_check_s; - cmd_start(cmd=>c_rlink_cmd_labo); + cmd_start(pcmd=>c_rlink_cmd_labo); cmd_waitdone; when "attn " => -- attn @@ -634,7 +635,7 @@ begin N_CMD_DATA <= (others=>'Z'); setup_check_d; setup_check_s; - cmd_start(cmd=>c_rlink_cmd_attn); + cmd_start(pcmd=>c_rlink_cmd_attn); cmd_waitdone; when "init " => -- init @@ -644,7 +645,7 @@ begin readgen_ea(iline, idata, sv_dbasi); N_CMD_DATA <= idata; setup_check_s; - cmd_start(cmd=>c_rlink_cmd_init, addr=>iaddr, data=>idata); + cmd_start(pcmd=>c_rlink_cmd_init, paddr=>iaddr, pdata=>idata); cmd_waitdone; when others => -- bad command diff --git a/rtl/w11a/pdp11_aunit.vhd b/rtl/w11a/pdp11_aunit.vhd index a4bde4dc..0f01fcc1 100644 --- a/rtl/w11a/pdp11_aunit.vhd +++ b/rtl/w11a/pdp11_aunit.vhd @@ -1,6 +1,6 @@ --- $Id: pdp11_aunit.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: pdp11_aunit.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2006-2014 by Walter F.J. Mueller +-- Copyright 2006-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: pdp11_aunit - syn @@ -9,9 +9,10 @@ -- Dependencies: - -- Test bench: tb/tb_pdp11_core (implicit) -- Target Devices: generic --- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31 +-- Tool versions: ise 8.2-14.7; viv 2014.4-2019.1; ghdl 0.18-0.36 -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 1.1.2 fix for ghdl V0.36 -Whide warnings -- 2014-08-10 581 1.1.1 use c_cc_f_* -- 2010-09-18 300 1.1 renamed from abox -- 2007-06-14 56 1.0.1 Use slvtypes.all @@ -90,21 +91,21 @@ begin -- implemented following the recommended pattern for XST ISE V8.1 procedure do_add8_ci_co ( - variable a : in slv8; -- input a - variable b : in slv8; -- input b - variable ci : in slbit; -- carry in - variable sum : out slv8; -- sum out - variable co : out slbit -- carry out + variable pa : in slv8; -- input a + variable pb : in slv8; -- input b + variable pci : in slbit; -- carry in + variable psum : out slv8; -- sum out + variable pco : out slbit -- carry out ) is variable tmp: slv9; begin - tmp := conv_std_logic_vector((conv_integer(a) + conv_integer(b) + - conv_integer(ci)),9); - sum := tmp(7 downto 0); - co := tmp(8); + tmp := conv_std_logic_vector((conv_integer(pa) + conv_integer(pb) + + conv_integer(pci)),9); + psum := tmp(7 downto 0); + pco := tmp(8); end procedure do_add8_ci_co; diff --git a/rtl/w11a/pdp11_dmhbpt.vhd b/rtl/w11a/pdp11_dmhbpt.vhd index d76c552d..4cbf525d 100644 --- a/rtl/w11a/pdp11_dmhbpt.vhd +++ b/rtl/w11a/pdp11_dmhbpt.vhd @@ -1,4 +1,4 @@ --- $Id: pdp11_dmhbpt.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: pdp11_dmhbpt.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later -- Copyright 2015-2019 by Walter F.J. Mueller -- @@ -11,7 +11,7 @@ -- Test bench: - -- -- Target Devices: generic --- Tool versions: ise 14.7; viv 2014.4-2019.1; ghdl 0.31-0.35 +-- Tool versions: ise 14.7; viv 2014.4-2019.1; ghdl 0.31-0.36 -- -- Synthesized (xst): -- Date Rev ise Target flop lutl lutm slic t peri @@ -19,6 +19,7 @@ -- -- Revision History: - -- Date Rev Version Comment +-- 2019-08-17 1203 1.0.2 fix for ghdl V0.36 -Whide warnings -- 2019-06-02 1159 1.0.1 use rbaddr_ constants -- 2015-07-19 702 1.0 Initial version -- 2015-07-05 698 0.1 First draft @@ -66,7 +67,7 @@ architecture syn of pdp11_dmhbpt is severity failure; GU: for i in NUNIT-1 downto 0 generate - HBPT : pdp11_dmhbpt_unit + HB : pdp11_dmhbpt_unit generic map ( RB_ADDR => RB_ADDR, INDEX => i) diff --git a/rtl/w11a/pdp11_gpr.vhd b/rtl/w11a/pdp11_gpr.vhd index f0365189..101ef67c 100644 --- a/rtl/w11a/pdp11_gpr.vhd +++ b/rtl/w11a/pdp11_gpr.vhd @@ -1,6 +1,6 @@ --- $Id: pdp11_gpr.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: pdp11_gpr.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2006-2011 by Walter F.J. Mueller +-- Copyright 2006-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: pdp11_gpr - syn @@ -10,9 +10,10 @@ -- -- Test bench: tb/tb_pdp11_core (implicit) -- Target Devices: generic --- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31 +-- Tool versions: ise 8.2-14.7; viv 2014.4-2019.1; ghdl 0.18-0.36 -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 1.0.2 fix for ghdl V0.36 -Whide warnings -- 2011-11-18 427 1.0.4 now numeric_std clean -- 2008-08-22 161 1.0.3 rename ubf_ -> ibf_; use iblib -- 2007-12-30 108 1.0.2 use ubf_byte[01] @@ -72,18 +73,18 @@ architecture syn of pdp11_gpr is -- 1111 110 - 11 SP user mode procedure do_regmap ( - signal RNUM : in slv3; -- register number - signal MODE : in slv2; -- processor mode (k=>00,s=>01,u=>11) - signal RSET : in slbit; -- register set - signal ADDR : out slv4 -- internal address in regfile + signal PRNUM : in slv3; -- register number + signal PMODE : in slv2; -- processor mode (k=>00,s=>01,u=>11) + signal PRSET : in slbit; -- register set + signal PADDR : out slv4 -- internal address in regfile ) is begin - if RNUM = c_gpr_pc then - ADDR <= "1110"; - elsif RNUM = c_gpr_sp then - ADDR <= MODE(1) & "11" & MODE(0); + if PRNUM = c_gpr_pc then + PADDR <= "1110"; + elsif PRNUM = c_gpr_sp then + PADDR <= PMODE(1) & "11" & PMODE(0); else - ADDR <= RSET & RNUM; + PADDR <= PRSET & PRNUM; end if; end procedure do_regmap; @@ -98,8 +99,8 @@ architecture syn of pdp11_gpr is begin - do_regmap(RNUM => ASRC, MODE => MODE, RSET => RSET, ADDR => MASRC); - do_regmap(RNUM => ADST, MODE => MODE, RSET => RSET, ADDR => MADST); + do_regmap(PRNUM => ASRC, PMODE => MODE, PRSET => RSET, PADDR => MASRC); + do_regmap(PRNUM => ADST, PMODE => MODE, PRSET => RSET, PADDR => MADST); WE1 <= WE and not BYTOP; diff --git a/rtl/w11a/pdp11_sequencer.vhd b/rtl/w11a/pdp11_sequencer.vhd index 4896426b..c2439159 100644 --- a/rtl/w11a/pdp11_sequencer.vhd +++ b/rtl/w11a/pdp11_sequencer.vhd @@ -1,6 +1,6 @@ --- $Id: pdp11_sequencer.vhd 1181 2019-07-08 17:00:50Z mueller $ +-- $Id: pdp11_sequencer.vhd 1203 2019-08-19 21:41:03Z mueller $ -- SPDX-License-Identifier: GPL-3.0-or-later --- Copyright 2006-2018 by Walter F.J. Mueller +-- Copyright 2006-2019 by Walter F.J. Mueller -- ------------------------------------------------------------------------------ -- Module Name: pdp11_sequencer - syn @@ -9,10 +9,11 @@ -- Dependencies: ib_sel -- Test bench: tb/tb_pdp11_core (implicit) -- Target Devices: generic --- Tool versions: ise 8.2-14.7; viv 2014.4-2018.2; ghdl 0.18-0.34 +-- Tool versions: ise 8.2-14.7; viv 2014.4-2019.1; ghdl 0.18-0.36 -- -- Revision History: -- Date Rev Version Comment +-- 2019-08-17 1203 1.6.12 fix for ghdl V0.36 -Whide warnings -- 2018-10-07 1054 1.6.11 drop ITIMER, use DM_STAT_SE.itimer -- 2018-10-06 1053 1.6.10 add DM_STAT_SE.(cpbusy,idec,pcload) -- 2017-04-23 885 1.6.9 not sys_conf_dmscnt: set SNUM from state category; @@ -376,209 +377,209 @@ begin alias DSTDEF : slbit is IREG(3); -- dst register mode defered alias DSTREG : slv3 is IREG(2 downto 0); -- dst register number - procedure do_memread_i(nstate : inout state_type; - ndpcntl : inout dpath_cntl_type; - nvmcntl : inout vm_cntl_type; - wstate : in state_type) is + procedure do_memread_i(pnstate : inout state_type; + pndpcntl : inout dpath_cntl_type; + pnvmcntl : inout vm_cntl_type; + pwstate : in state_type) is begin - ndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC - nvmcntl.dspace := '0'; - nvmcntl.req := '1'; - ndpcntl.gpr_pcinc := '1'; -- (pc)++ - nstate := wstate; + pndpcntl.vmaddr_sel := c_dpath_vmaddr_pc; -- VA = PC + pnvmcntl.dspace := '0'; + pnvmcntl.req := '1'; + pndpcntl.gpr_pcinc := '1'; -- (pc)++ + pnstate := pwstate; end procedure do_memread_i; - procedure do_memread_d(nstate : inout state_type; - nvmcntl : inout vm_cntl_type; - wstate : in state_type; - bytop : in slbit := '0'; - macc : in slbit := '0'; - is_pci : in slbit := '0') is + procedure do_memread_d(pnstate : inout state_type; + pnvmcntl : inout vm_cntl_type; + pwstate : in state_type; + pbytop : in slbit := '0'; + pmacc : in slbit := '0'; + pis_pci : in slbit := '0') is begin - nvmcntl.dspace := not is_pci; -- ispace if pc immediate modes + pnvmcntl.dspace := not pis_pci; -- ispace if pc immediate modes -- bytop := R_IDSTAT.is_bytop and not is_addr; - nvmcntl.bytop := bytop; - nvmcntl.macc := macc; - nvmcntl.req := '1'; - nstate := wstate; + pnvmcntl.bytop := pbytop; + pnvmcntl.macc := pmacc; + pnvmcntl.req := '1'; + pnstate := pwstate; end procedure do_memread_d; - procedure do_memread_srcinc(nstate : inout state_type; - ndpcntl : inout dpath_cntl_type; - nvmcntl : inout vm_cntl_type; - wstate : in state_type; - nmmumoni : inout mmu_moni_type; - updt_sp : in slbit := '0') is + procedure do_memread_srcinc(pnstate : inout state_type; + pndpcntl : inout dpath_cntl_type; + pnvmcntl : inout vm_cntl_type; + pwstate : in state_type; + pnmmumoni : inout mmu_moni_type; + pupdt_sp : in slbit := '0') is begin - ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC - ndpcntl.ounit_const := "000000010"; -- OUNIT const=2 - ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const - ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT - ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES - ndpcntl.dsrc_we := '1'; -- update DSRC - if updt_sp = '1' then - nmmumoni.regmod := '1'; - nmmumoni.isdec := '0'; - ndpcntl.gpr_adst := c_gpr_sp; -- update SP too - ndpcntl.gpr_we := '1'; + pndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC + pndpcntl.ounit_const := "000000010"; -- OUNIT const=2 + pndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const + pndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT + pndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES + pndpcntl.dsrc_we := '1'; -- update DSRC + if pupdt_sp = '1' then + pnmmumoni.regmod := '1'; + pnmmumoni.isdec := '0'; + pndpcntl.gpr_adst := c_gpr_sp; -- update SP too + pndpcntl.gpr_we := '1'; end if; - ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC - nvmcntl.dspace := '1'; - nvmcntl.req := '1'; - nstate := wstate; + pndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC + pnvmcntl.dspace := '1'; + pnvmcntl.req := '1'; + pnstate := pwstate; end procedure do_memread_srcinc; - procedure do_memwrite(nstate : inout state_type; - nvmcntl : inout vm_cntl_type; - wstate : in state_type; - macc : in slbit :='0') is + procedure do_memwrite(pnstate : inout state_type; + pnvmcntl : inout vm_cntl_type; + pwstate : in state_type; + pmacc : in slbit :='0') is begin - nvmcntl.dspace := '1'; - nvmcntl.bytop := R_IDSTAT.is_bytop; - nvmcntl.wacc := '1'; - nvmcntl.macc := macc; - nvmcntl.req := '1'; - nstate := wstate; + pnvmcntl.dspace := '1'; + pnvmcntl.bytop := R_IDSTAT.is_bytop; + pnvmcntl.wacc := '1'; + pnvmcntl.macc := pmacc; + pnvmcntl.req := '1'; + pnstate := pwstate; end procedure do_memwrite; - procedure do_memcheck(nstate : inout state_type; - nstatus : inout cpustat_type; - mok : out boolean) is + procedure do_memcheck(pnstate : inout state_type; + pnstatus : inout cpustat_type; + pmok : out boolean) is begin - nstate := nstate; -- dummy to add driver (vivado) - nstatus := nstatus; -- " - mok := false; + pnstate := pnstate; -- dummy to add driver (vivado) + pnstatus := pnstatus; -- " + pmok := false; if VM_STAT.ack = '1' then - mok := true; + pmok := true; if VM_STAT.trap_mmu = '1' then -- remember trap_mmu, may happen on any - nstatus.trap_mmu := '1'; -- memory access of an instruction + pnstatus.trap_mmu := '1'; -- memory access of an instruction end if; if VM_STAT.trap_ysv = '1' then -- remember trap_ysv (on any access) - if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set - nstatus.trap_ysv := '1'; + if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set + pnstatus.trap_ysv := '1'; end if; end if; elsif VM_STAT.err='1' or VM_STAT.fail='1' then - nstate := s_vmerr; + pnstate := s_vmerr; end if; end procedure do_memcheck; - procedure do_const_opsize(ndpcntl : inout dpath_cntl_type; - bytop : in slbit; - isdef : in slbit; - regnum : in slv3) is + procedure do_const_opsize(pndpcntl : inout dpath_cntl_type; + pbytop : in slbit; + pisdef : in slbit; + pregnum : in slv3) is begin - ndpcntl := ndpcntl; -- dummy to add driver (vivado) - if bytop='0' or isdef='1' or - regnum=c_gpr_pc or regnum=c_gpr_sp then - ndpcntl.ounit_const := "000000010"; + pndpcntl := pndpcntl; -- dummy to add driver (vivado) + if pbytop='0' or pisdef='1' or + pregnum=c_gpr_pc or pregnum=c_gpr_sp then + pndpcntl.ounit_const := "000000010"; else - ndpcntl.ounit_const := "000000001"; + pndpcntl.ounit_const := "000000001"; end if; end procedure do_const_opsize; - procedure do_fork_dstr(nstate : inout state_type; - idstat : in decode_stat_type) is + procedure do_fork_dstr(pnstate : inout state_type; + pidstat : in decode_stat_type) is begin - case idstat.fork_dstr is - when c_fork_dstr_def => nstate := s_dstr_def; - when c_fork_dstr_inc => nstate := s_dstr_inc; - when c_fork_dstr_dec => nstate := s_dstr_dec; - when c_fork_dstr_ind => nstate := s_dstr_ind; - when others => nstate := s_cpufail; + case pidstat.fork_dstr is + when c_fork_dstr_def => pnstate := s_dstr_def; + when c_fork_dstr_inc => pnstate := s_dstr_inc; + when c_fork_dstr_dec => pnstate := s_dstr_dec; + when c_fork_dstr_ind => pnstate := s_dstr_ind; + when others => pnstate := s_cpufail; end case; end procedure do_fork_dstr; - procedure do_fork_opg(nstate : inout state_type; - idstat : in decode_stat_type) is + procedure do_fork_opg(pnstate : inout state_type; + pidstat : in decode_stat_type) is begin - case idstat.fork_opg is - when c_fork_opg_gen => nstate := s_opg_gen; - when c_fork_opg_wdef => nstate := s_dstw_def; - when c_fork_opg_winc => nstate := s_dstw_inc; - when c_fork_opg_wdec => nstate := s_dstw_dec; - when c_fork_opg_wind => nstate := s_dstw_ind; - when c_fork_opg_mul => nstate := s_opg_mul; - when c_fork_opg_div => nstate := s_opg_div; - when c_fork_opg_ash => nstate := s_opg_ash; - when c_fork_opg_ashc => nstate := s_opg_ashc; - when others => nstate := s_cpufail; + case pidstat.fork_opg is + when c_fork_opg_gen => pnstate := s_opg_gen; + when c_fork_opg_wdef => pnstate := s_dstw_def; + when c_fork_opg_winc => pnstate := s_dstw_inc; + when c_fork_opg_wdec => pnstate := s_dstw_dec; + when c_fork_opg_wind => pnstate := s_dstw_ind; + when c_fork_opg_mul => pnstate := s_opg_mul; + when c_fork_opg_div => pnstate := s_opg_div; + when c_fork_opg_ash => pnstate := s_opg_ash; + when c_fork_opg_ashc => pnstate := s_opg_ashc; + when others => pnstate := s_cpufail; end case; end procedure do_fork_opg; - procedure do_fork_opa(nstate : inout state_type; - idstat : in decode_stat_type) is + procedure do_fork_opa(pnstate : inout state_type; + pidstat : in decode_stat_type) is begin - case idstat.fork_opa is - when c_fork_opa_jmp => nstate := s_opa_jmp; - when c_fork_opa_jsr => nstate := s_opa_jsr; - when c_fork_opa_mtp => nstate := s_opa_mtp_mem; - when c_fork_opa_mfp_reg => nstate := s_opa_mfp_reg; - when c_fork_opa_mfp_mem => nstate := s_opa_mfp_mem; - when others => nstate := s_cpufail; + case pidstat.fork_opa is + when c_fork_opa_jmp => pnstate := s_opa_jmp; + when c_fork_opa_jsr => pnstate := s_opa_jsr; + when c_fork_opa_mtp => pnstate := s_opa_mtp_mem; + when c_fork_opa_mfp_reg => pnstate := s_opa_mfp_reg; + when c_fork_opa_mfp_mem => pnstate := s_opa_mfp_mem; + when others => pnstate := s_cpufail; end case; end procedure do_fork_opa; - procedure do_fork_next(nstate : inout state_type; - nstatus : inout cpustat_type; - nmmumoni : inout mmu_moni_type) is + procedure do_fork_next(pnstate : inout state_type; + pnstatus : inout cpustat_type; + pnmmumoni : inout mmu_moni_type) is begin - nmmumoni.idone := '1'; + pnmmumoni.idone := '1'; if unsigned(INT_PRI) > unsigned(PSW.pri) then - nstate := s_idle; - elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or - R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or + pnstate := s_idle; + elsif R_STATUS.trap_mmu='1' or pnstatus.trap_mmu='1' or + R_STATUS.trap_ysv='1' or pnstatus.trap_ysv='1' or PSW.tflag='1' then - nstate := s_trap_disp; + pnstate := s_trap_disp; elsif R_STATUS.cpugo='1' and -- running R_STATUS.cpususp='0' and -- and not suspended not R_STATUS.cmdbusy='1' then -- and no cmd pending - nstate := s_ifetch; -- fetch next + pnstate := s_ifetch; -- fetch next else - nstate := s_idle; -- otherwise idle + pnstate := s_idle; -- otherwise idle end if; end procedure do_fork_next; - procedure do_fork_next_pref(nstate : inout state_type; - nstatus : inout cpustat_type; - ndpcntl : inout dpath_cntl_type; - nvmcntl : inout vm_cntl_type; - nmmumoni : inout mmu_moni_type) is + procedure do_fork_next_pref(pnstate : inout state_type; + pnstatus : inout cpustat_type; + pndpcntl : inout dpath_cntl_type; + pnvmcntl : inout vm_cntl_type; + pnmmumoni : inout mmu_moni_type) is begin - ndpcntl := ndpcntl; -- dummy to add driver (vivado) - nvmcntl := nvmcntl; -- " - nmmumoni.idone := '1'; + pndpcntl := pndpcntl; -- dummy to add driver (vivado) + pnvmcntl := pnvmcntl; -- " + pnmmumoni.idone := '1'; if unsigned(INT_PRI) > unsigned(PSW.pri) then - nstate := s_idle; - elsif R_STATUS.trap_mmu='1' or nstatus.trap_mmu='1' or - R_STATUS.trap_ysv='1' or nstatus.trap_ysv='1' or + pnstate := s_idle; + elsif R_STATUS.trap_mmu='1' or pnstatus.trap_mmu='1' or + R_STATUS.trap_ysv='1' or pnstatus.trap_ysv='1' or PSW.tflag='1' then - nstate := s_trap_disp; + pnstate := s_trap_disp; elsif R_STATUS.cpugo='1' and -- running R_STATUS.cpususp='0' and -- and not suspended not R_STATUS.cmdbusy='1' then -- and no cmd pending - nvmcntl.req := '1'; -- read next instruction - ndpcntl.gpr_pcinc := '1'; -- inc PC - nmmumoni.istart := '1'; -- signal istart to MMU - nstate := s_ifetch_w; -- next: wait for fetched instruction + pnvmcntl.req := '1'; -- read next instruction + pndpcntl.gpr_pcinc := '1'; -- inc PC + pnmmumoni.istart := '1'; -- signal istart to MMU + pnstate := s_ifetch_w; -- next: wait for fetched instruction else - nstate := s_idle; -- otherwise idle + pnstate := s_idle; -- otherwise idle end if; end procedure do_fork_next_pref; - procedure do_start_int(nstate : inout state_type; - ndpcntl : inout dpath_cntl_type; - vector : in slv9_2) is + procedure do_start_int(pnstate : inout state_type; + pndpcntl : inout dpath_cntl_type; + pvector : in slv9_2) is begin - ndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW - ndpcntl.dtmp_we := '1'; - ndpcntl.ounit_azero := '1'; -- OUNIT A = 0 - ndpcntl.ounit_const := vector & "00"; -- vector - ndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(vector) - ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT - ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES - ndpcntl.dsrc_we := '1'; -- DSRC = vector - nstate := s_int_getpc; + pndpcntl.dtmp_sel := c_dpath_dtmp_psw; -- DTMP = PSW + pndpcntl.dtmp_we := '1'; + pndpcntl.ounit_azero := '1'; -- OUNIT A = 0 + pndpcntl.ounit_const := pvector & "00"; -- vector + pndpcntl.ounit_bsel := c_ounit_bsel_const;-- OUNIT B=const(vector) + pndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT + pndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES + pndpcntl.dsrc_we := '1'; -- DSRC = vector + pnstate := s_int_getpc; end procedure do_start_int; begin @@ -1019,8 +1020,8 @@ begin when s_srcr_def => -- ----------------------------------- ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC do_memread_d(nstate, nvmcntl, s_srcr_def_w, - bytop=>R_IDSTAT.is_bytop, - is_pci=>R_IDSTAT.is_srcpcmode1); + pbytop=>R_IDSTAT.is_bytop, + pis_pci=>R_IDSTAT.is_srcpcmode1); when s_srcr_def_w => -- ----------------------------------- nstate := s_srcr_def_w; @@ -1052,7 +1053,7 @@ begin ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC bytop := R_IDSTAT.is_bytop and not SRCDEF; do_memread_d(nstate, nvmcntl, s_srcr_inc_w, - bytop=>bytop, is_pci=>R_IDSTAT.is_srcpc); + pbytop=>bytop, pis_pci=>R_IDSTAT.is_srcpc); when s_srcr_inc_w => -- ----------------------------------- nstate := s_srcr_inc_w; @@ -1093,7 +1094,7 @@ begin when s_srcr_dec1 => -- ----------------------------------- ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC bytop := R_IDSTAT.is_bytop and not SRCDEF; - do_memread_d(nstate, nvmcntl, s_srcr_inc_w, bytop=>bytop); + do_memread_d(nstate, nvmcntl, s_srcr_inc_w, pbytop=>bytop); when s_srcr_ind => -- ----------------------------------- do_memread_i(nstate, ndpcntl, nvmcntl, s_srcr_ind1_w); @@ -1119,7 +1120,7 @@ begin when s_srcr_ind2 => -- ----------------------------------- ndpcntl.vmaddr_sel := c_dpath_vmaddr_dsrc; -- VA = DSRC bytop := R_IDSTAT.is_bytop and not SRCDEF; - do_memread_d(nstate, nvmcntl, s_srcr_ind2_w, bytop=>bytop); + do_memread_d(nstate, nvmcntl, s_srcr_ind2_w, pbytop=>bytop); when s_srcr_ind2_w => -- ----------------------------------- nstate := s_srcr_ind2_w; @@ -1184,7 +1185,7 @@ begin when s_dstr_def => -- ----------------------------------- ndpcntl.vmaddr_sel := c_dpath_vmaddr_ddst; -- VA = DDST do_memread_d(nstate, nvmcntl, s_dstr_def_w, - bytop=>R_IDSTAT.is_bytop, macc=>R_IDSTAT.is_rmwop); + pbytop=>R_IDSTAT.is_bytop, pmacc=>R_IDSTAT.is_rmwop); when s_dstr_def_w => -- ----------------------------------- nstate := s_dstr_def_w; @@ -1209,7 +1210,7 @@ begin macc := R_IDSTAT.is_rmwop and not DSTDEF; bytop := R_IDSTAT.is_bytop and not DSTDEF; do_memread_d(nstate, nvmcntl, s_dstr_inc_w, - bytop=>bytop, macc=>macc, is_pci=>R_IDSTAT.is_dstpc); + pbytop=>bytop, pmacc=>macc, pis_pci=>R_IDSTAT.is_dstpc); when s_dstr_inc_w => -- ----------------------------------- nstate := s_dstr_inc_w; @@ -1244,7 +1245,7 @@ begin macc := R_IDSTAT.is_rmwop and not DSTDEF; bytop := R_IDSTAT.is_bytop and not DSTDEF; do_memread_d(nstate, nvmcntl, s_dstr_inc_w, - bytop=>bytop, macc=>macc); + pbytop=>bytop, pmacc=>macc); when s_dstr_ind => -- ----------------------------------- do_memread_i(nstate, ndpcntl, nvmcntl, s_dstr_ind1_w); @@ -1270,7 +1271,7 @@ begin macc := R_IDSTAT.is_rmwop and not DSTDEF; bytop := R_IDSTAT.is_bytop and not DSTDEF; do_memread_d(nstate, nvmcntl, s_dstr_ind2_w, - bytop=>bytop, macc=>macc); + pbytop=>bytop, pmacc=>macc); when s_dstr_ind2_w => -- ----------------------------------- nstate := s_dstr_ind2_w; @@ -1361,7 +1362,7 @@ begin nmmumoni.regmod := '1'; nmmumoni.isdec := '0'; do_memread_d(nstate, nvmcntl, s_dstw_incdef_w, - is_pci=>R_IDSTAT.is_dstpc); + pis_pci=>R_IDSTAT.is_dstpc); end if; when s_dstw_inc_w => -- ----------------------------------- @@ -1493,7 +1494,7 @@ begin do_fork_opa(nstate, R_IDSTAT); else do_memread_d(nstate, nvmcntl, s_dsta_incdef_w, - is_pci=>R_IDSTAT.is_dstpc); + pis_pci=>R_IDSTAT.is_dstpc); end if; when s_dsta_incdef_w => -- ----------------------------------- @@ -1618,7 +1619,7 @@ begin when s_op_rts_pop => -- ----------------------------------- do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_rts_pop_w, - nmmumoni, updt_sp=>'1'); + nmmumoni, pupdt_sp=>'1'); when s_op_rts_pop_w => -- ----------------------------------- nstate := s_op_rts_pop_w; @@ -1710,7 +1711,7 @@ begin when s_op_mark_pop => -- ----------------------------------- do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_op_mark_pop_w, - nmmumoni, updt_sp=>'1'); + nmmumoni, pupdt_sp=>'1'); when s_op_mark_pop_w => -- ----------------------------------- nstate := s_op_mark_pop_w; @@ -1767,7 +1768,7 @@ begin end if; if R_IDSTAT.is_rmwop = '1' then - do_memwrite(nstate, nvmcntl, s_opg_gen_rmw_w, macc=>'1'); + do_memwrite(nstate, nvmcntl, s_opg_gen_rmw_w, pmacc=>'1'); else idm_idone := '1'; -- instruction done if R_STATUS.prefdone = '1' then @@ -2014,7 +2015,7 @@ begin when s_opa_mtp => -- ----------------------------------- do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_opa_mtp_pop_w, - nmmumoni, updt_sp=>'1'); + nmmumoni, pupdt_sp=>'1'); when s_opa_mtp_pop_w => -- ----------------------------------- nstate := s_opa_mtp_pop_w; @@ -2273,7 +2274,7 @@ begin when s_rti_getpc => -- ----------------------------------- do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getpc_w, - nmmumoni, updt_sp=>'1'); + nmmumoni, pupdt_sp=>'1'); when s_rti_getpc_w => -- ----------------------------------- nstate := s_rti_getpc_w; @@ -2287,7 +2288,7 @@ begin when s_rti_getps => -- ----------------------------------- do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_rti_getps_w, - nmmumoni, updt_sp=>'1'); + nmmumoni, pupdt_sp=>'1'); when s_rti_getps_w => -- ----------------------------------- nstate := s_rti_getps_w;