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https://github.com/wfjm/w11.git
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asm-11 .list update; tcode updates
- tools/bin
- asm-11
- add minimal .list,.nlist (cnd,me,meb) directive support
- add -(n)list options
- tools/asm-11
- tests(-err): some tuneups
- mlib: some macros added, some tuneups
- tools/tcode/cpu_(details|mmu).mac: use rt?jmp, hta??? macros
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@@ -1,10 +1,10 @@
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; $Id: cpu_mmu.mac 1358 2023-01-27 10:37:36Z mueller $
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; $Id: cpu_mmu.mac 1359 2023-01-27 20:58:50Z mueller $
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; SPDX-License-Identifier: GPL-3.0-or-later
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; Copyright 2022-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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;
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; Revision History:
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; Date Rev Version Comment
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; 2023-01-27 1358 1.1 use .mcall and mlib
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; 2023-01-27 1358 1.1 use .mcall and mlib; use hta??? macros
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; 2023-01-05 1346 1.0 Initial version
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; 2022-07-24 1262 0.1 First draft
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;
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@@ -32,6 +32,7 @@
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.mcall push,pop
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.mcall hcmpeq,hcmbeq,htsteq,htstge,hbiteq,hbitne
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.mcall vecset,vecclr
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.mcall htabuf,htaadd,htaini,htacmp
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;
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; some useful definitions
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uipdr0 = uipdr+ 0
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@@ -89,18 +90,6 @@
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p6p1p2 = p6base+<1*100>+2 ; page 6, +1 click, +2
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p7base = <7*20000> ; page 7
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;
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; helper macro for trace area check setup (from cpu_details A4)
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.macro htinit,buf,nent
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hcmpeq #buf+<4*nent>,r5
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mov #buf,r5
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.endm
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;
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; helper macro for trace area check entry (from cpu_details A4)
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.macro htitem,tvec,tadr
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hcmpeq tvec,(r5)+
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hcmpeq tadr,(r5)+
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.endm
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;
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; Section A: pdr,par registers ===============================================
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; A1.1 test that pdr/par are 16 bit write/readable
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; A1.2 set up MMU default configuration
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@@ -1887,21 +1876,16 @@ td0201: tstb systyp ; skip if not on w11
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clr cp.psw ; PSW to default
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hcmpeq #<127.*md.plf>!md.aia!md.aiw!md.att,sipdr7 ; check sipdr7
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;
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htinit 2000$,5. ; expect 5 items
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htitem #250,#200$ ; mmu(ico=1) after movb to cp.pir+1
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htitem #250,#p2base+2 ; mmu(ico=1) after 1st instruction fetch
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htitem #240,#200$ ; PIRQ, sees PC after movb to cp.pir+1
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htitem #250,#p2base+<vc3l1-vc3> ; mmu(trap) after clr of cp.pir
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htitem #032,#p2base+<vc3l2-vc3> ; EMT after emt 100
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htaini 2000$,5. ; expect 5 items
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htacmp #250,#200$ ; mmu(ico=1) after movb to cp.pir+1
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htacmp #250,#p2base+2 ; mmu(ico=1) after 1st instruction fetch
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htacmp #240,#200$ ; PIRQ, sees PC after movb to cp.pir+1
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htacmp #250,#p2base+<vc3l1-vc3> ; mmu(trap) after clr of cp.pir
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htacmp #032,#p2base+<vc3l2-vc3> ; EMT after emt 100
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;
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jmp 9000$
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;
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2000$: .word 0,0 ; trace data area
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.word 0,0
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.word 0,0
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.word 0,0
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.word 0,0
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.word -1,-1
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2000$: htabuf 5. ; trace area
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;
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; MMU handler ----------------------------------------------
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; It expects an abort with ico=1, an abort with ico=0 and a trap.
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@@ -2452,15 +2436,12 @@ te0201: mov #m0.ent!m0.ena,mmr0 ; enable mmu with traps ;! MMU 18
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call p5ce21 ; start probe code in page 5
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1000$: br 2000$ ; rts will land here
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;
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1500$: .word 0,0 ; 1st marker (MMU for movb)
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.word 0,0 ; 2nd marker (PIRQ)
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.word 0,0 ; 3rd marker (MMU for rts)
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.word -1,-1 ; fence
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1500$: htabuf 3. ; trace area
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;
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2000$: htinit 1500$,3. ; expect 3 items
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htitem #250,#p5ce21+6 ; mmu for movb
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htitem #240,#p5ce21+6 ; PIRQ, sees PC after movb
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htitem #250,#1000$ ; mmu for rts, PC is return address
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2000$: htaini 1500$,3. ; expect 3 items
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htacmp #250,#p5ce21+6 ; mmu for movb
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htacmp #240,#p5ce21+6 ; PIRQ, sees PC after movb
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htacmp #250,#1000$ ; mmu for rts, PC is return address
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;
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reset ; mmu off ;! MMU off
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;
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@@ -2739,8 +2720,7 @@ vhuhlt: halt
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;
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vhtmmu: htstge (r5) ; r5 at fence ?
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bic #m0.trp,mmr0 ; allow further MMU traps
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mov #250,(r5)+ ; track MMU vector
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mov (sp),(r5)+ ; track PC
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htaadd #v..mmu ; track MMU vector, track return PC
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rti
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;
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; vhtpir - handler for PIRQ interrupt tracing ++++++++++++++++++++++++++++++++
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@@ -2750,8 +2730,7 @@ vhtmmu: htstge (r5) ; r5 at fence ?
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;
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vhtpir: htstge (r5) ; r5 at fence ?
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clr cp.pir ; clear all PIRQ interrupts
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mov #240,(r5)+ ; track PIRQ vector
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mov (sp),(r5)+ ; track PC
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htaadd #v..pir ; track PIRQ vector, track return PC
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rti
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;
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; Test codes that will be mapped in user or supervisor mode ==================
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@@ -2831,8 +2810,7 @@ vc2dat: .word 010111
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;
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. = 105000 ; I space ------------------------------------
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vc3: htstge (r5) ; r5 at fence ?
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mov #240,(r5)+ ; trace
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mov (sp),(r5)+
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htaadd #v..pir ; track PIRQ vector, track return PC
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clr @#cp.pir ; cancel PIRQ (use absolute mode!)
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vc3l1: emt 100 ; delegate RTI to system service
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vc3l2: halt ; label after emt
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